/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-McrStrategy.epf -i ../../../trunk/examples/svcomp/pthread-lit/fkp2013-1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-b981219 [2020-04-18 15:48:13,165 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-04-18 15:48:13,168 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-04-18 15:48:13,183 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-04-18 15:48:13,183 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-04-18 15:48:13,184 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-04-18 15:48:13,186 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-04-18 15:48:13,187 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-04-18 15:48:13,188 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-04-18 15:48:13,189 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-04-18 15:48:13,190 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-04-18 15:48:13,194 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-04-18 15:48:13,194 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-04-18 15:48:13,197 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-04-18 15:48:13,198 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-04-18 15:48:13,199 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-04-18 15:48:13,200 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-04-18 15:48:13,201 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-04-18 15:48:13,203 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-04-18 15:48:13,205 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-04-18 15:48:13,206 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-04-18 15:48:13,207 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-04-18 15:48:13,208 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-04-18 15:48:13,209 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-04-18 15:48:13,211 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-04-18 15:48:13,211 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-04-18 15:48:13,211 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-04-18 15:48:13,212 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-04-18 15:48:13,213 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-04-18 15:48:13,214 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-04-18 15:48:13,214 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-04-18 15:48:13,214 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-04-18 15:48:13,215 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-04-18 15:48:13,216 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-04-18 15:48:13,217 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-04-18 15:48:13,217 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-04-18 15:48:13,218 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-04-18 15:48:13,218 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-04-18 15:48:13,218 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-04-18 15:48:13,219 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-04-18 15:48:13,219 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-04-18 15:48:13,220 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-McrStrategy.epf [2020-04-18 15:48:13,237 INFO L113 SettingsManager]: Loading preferences was successful [2020-04-18 15:48:13,238 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-04-18 15:48:13,246 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-04-18 15:48:13,246 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-04-18 15:48:13,247 INFO L138 SettingsManager]: * Use SBE=true [2020-04-18 15:48:13,247 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-04-18 15:48:13,247 INFO L138 SettingsManager]: * sizeof long=4 [2020-04-18 15:48:13,247 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-04-18 15:48:13,247 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-04-18 15:48:13,248 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-04-18 15:48:13,248 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2020-04-18 15:48:13,248 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2020-04-18 15:48:13,249 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2020-04-18 15:48:13,249 INFO L138 SettingsManager]: * sizeof long double=12 [2020-04-18 15:48:13,250 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-04-18 15:48:13,250 INFO L138 SettingsManager]: * Use constant arrays=true [2020-04-18 15:48:13,250 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2020-04-18 15:48:13,250 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-04-18 15:48:13,251 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-04-18 15:48:13,251 INFO L138 SettingsManager]: * To the following directory=./dump/ [2020-04-18 15:48:13,251 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2020-04-18 15:48:13,251 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 15:48:13,251 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-04-18 15:48:13,252 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2020-04-18 15:48:13,252 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * Trace refinement strategy=MCR [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=VARIABLE_BASED_MOVER_CHECK [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * Trace refinement strategy used in MCR=CAMEL [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-04-18 15:48:13,253 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2020-04-18 15:48:13,531 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-04-18 15:48:13,549 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-04-18 15:48:13,552 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-04-18 15:48:13,554 INFO L271 PluginConnector]: Initializing CDTParser... [2020-04-18 15:48:13,555 INFO L275 PluginConnector]: CDTParser initialized [2020-04-18 15:48:13,556 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-lit/fkp2013-1.i [2020-04-18 15:48:13,628 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/146848d83/efafa17fcd6b43de9f1e113ceeec3ca7/FLAGaddde8a9a [2020-04-18 15:48:14,195 INFO L306 CDTParser]: Found 1 translation units. [2020-04-18 15:48:14,197 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-lit/fkp2013-1.i [2020-04-18 15:48:14,221 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/146848d83/efafa17fcd6b43de9f1e113ceeec3ca7/FLAGaddde8a9a [2020-04-18 15:48:14,518 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/146848d83/efafa17fcd6b43de9f1e113ceeec3ca7 [2020-04-18 15:48:14,531 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-04-18 15:48:14,554 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2020-04-18 15:48:14,557 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-04-18 15:48:14,558 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-04-18 15:48:14,561 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-04-18 15:48:14,562 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 03:48:14" (1/1) ... [2020-04-18 15:48:14,565 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@340abb2f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:14, skipping insertion in model container [2020-04-18 15:48:14,565 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 03:48:14" (1/1) ... [2020-04-18 15:48:14,574 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-04-18 15:48:14,632 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-04-18 15:48:15,103 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 15:48:15,113 INFO L203 MainTranslator]: Completed pre-run [2020-04-18 15:48:15,155 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 15:48:15,226 INFO L208 MainTranslator]: Completed translation [2020-04-18 15:48:15,226 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15 WrapperNode [2020-04-18 15:48:15,227 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-04-18 15:48:15,227 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-04-18 15:48:15,228 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-04-18 15:48:15,228 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2020-04-18 15:48:15,236 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,253 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,275 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-04-18 15:48:15,275 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-04-18 15:48:15,275 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-04-18 15:48:15,276 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-04-18 15:48:15,282 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,283 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,285 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,286 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,292 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,296 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,298 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... [2020-04-18 15:48:15,300 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-04-18 15:48:15,301 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-04-18 15:48:15,301 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-04-18 15:48:15,301 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-04-18 15:48:15,302 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 15:48:15,353 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2020-04-18 15:48:15,353 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2020-04-18 15:48:15,353 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2020-04-18 15:48:15,353 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2020-04-18 15:48:15,354 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2020-04-18 15:48:15,354 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2020-04-18 15:48:15,354 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2020-04-18 15:48:15,354 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-04-18 15:48:15,354 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-04-18 15:48:15,356 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2020-04-18 15:48:15,697 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-04-18 15:48:15,697 INFO L295 CfgBuilder]: Removed 7 assume(true) statements. [2020-04-18 15:48:15,701 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 03:48:15 BoogieIcfgContainer [2020-04-18 15:48:15,701 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-04-18 15:48:15,703 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-04-18 15:48:15,703 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-04-18 15:48:15,706 INFO L275 PluginConnector]: TraceAbstraction initialized [2020-04-18 15:48:15,706 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.04 03:48:14" (1/3) ... [2020-04-18 15:48:15,707 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56d1f982 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 03:48:15, skipping insertion in model container [2020-04-18 15:48:15,707 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:48:15" (2/3) ... [2020-04-18 15:48:15,708 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@56d1f982 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 03:48:15, skipping insertion in model container [2020-04-18 15:48:15,708 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 03:48:15" (3/3) ... [2020-04-18 15:48:15,710 INFO L109 eAbstractionObserver]: Analyzing ICFG fkp2013-1.i [2020-04-18 15:48:15,720 WARN L146 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2020-04-18 15:48:15,721 INFO L157 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2020-04-18 15:48:15,726 INFO L169 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2020-04-18 15:48:15,728 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2020-04-18 15:48:15,752 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,753 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,753 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,754 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,754 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,755 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,756 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,756 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,757 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,758 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,758 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,758 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,758 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,759 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,759 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,759 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,760 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,760 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,761 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,761 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,761 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,768 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,769 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,769 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,769 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,769 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,775 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,775 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,776 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,776 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,776 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,776 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:15,791 INFO L251 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2020-04-18 15:48:15,811 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:48:15,812 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:48:15,812 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:48:15,812 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:48:15,812 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:48:15,812 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:48:15,813 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:48:15,813 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:48:15,828 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 55 places, 51 transitions, 112 flow [2020-04-18 15:48:15,831 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 55 places, 51 transitions, 112 flow [2020-04-18 15:48:15,873 INFO L129 PetriNetUnfolder]: 3/61 cut-off events. [2020-04-18 15:48:15,874 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2020-04-18 15:48:15,882 INFO L80 FinitePrefix]: Finished finitePrefix Result has 69 conditions, 61 events. 3/61 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 100 event pairs, 0 based on Foata normal form. 0/55 useless extension candidates. Maximal degree in co-relation 49. Up to 4 conditions per place. [2020-04-18 15:48:15,888 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 55 places, 51 transitions, 112 flow [2020-04-18 15:48:15,908 INFO L129 PetriNetUnfolder]: 3/61 cut-off events. [2020-04-18 15:48:15,909 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2020-04-18 15:48:15,910 INFO L80 FinitePrefix]: Finished finitePrefix Result has 69 conditions, 61 events. 3/61 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 100 event pairs, 0 based on Foata normal form. 0/55 useless extension candidates. Maximal degree in co-relation 49. Up to 4 conditions per place. [2020-04-18 15:48:15,911 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 692 [2020-04-18 15:48:15,912 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:48:17,087 WARN L192 SmtUtils]: Spent 154.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2020-04-18 15:48:17,159 INFO L206 etLargeBlockEncoding]: Checked pairs total: 576 [2020-04-18 15:48:17,160 INFO L214 etLargeBlockEncoding]: Total number of compositions: 45 [2020-04-18 15:48:17,164 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 18 places, 12 transitions, 34 flow [2020-04-18 15:48:17,174 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 44 states. [2020-04-18 15:48:17,176 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states. [2020-04-18 15:48:17,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:17,183 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:17,183 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:48:17,184 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:17,189 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,189 INFO L82 PathProgramCache]: Analyzing trace with hash 208056, now seen corresponding path program 1 times [2020-04-18 15:48:17,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:17,197 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1007254679] [2020-04-18 15:48:17,210 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,219 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:17,220 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:48:17,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:17,221 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:17,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,221 INFO L82 PathProgramCache]: Analyzing trace with hash 208056, now seen corresponding path program 2 times [2020-04-18 15:48:17,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:17,226 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461308317] [2020-04-18 15:48:17,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:17,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:17,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:17,448 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461308317] [2020-04-18 15:48:17,449 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:17,449 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:48:17,450 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:17,451 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,452 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:17,452 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:17,461 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:17,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:17,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:17,467 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:48:17,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:17,471 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:48:17,471 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:48:17,471 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:17,472 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1007254679] [2020-04-18 15:48:17,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:17,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:48:17,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1007254679] [2020-04-18 15:48:17,474 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:48:17,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:17,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:17,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:17,480 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 3 states. [2020-04-18 15:48:17,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:17,495 INFO L93 Difference]: Finished difference Result 35 states and 59 transitions. [2020-04-18 15:48:17,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:48:17,497 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:48:17,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:17,509 INFO L225 Difference]: With dead ends: 35 [2020-04-18 15:48:17,509 INFO L226 Difference]: Without dead ends: 31 [2020-04-18 15:48:17,518 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:17,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2020-04-18 15:48:17,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2020-04-18 15:48:17,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2020-04-18 15:48:17,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 51 transitions. [2020-04-18 15:48:17,558 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 51 transitions. Word has length 3 [2020-04-18 15:48:17,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:17,558 INFO L479 AbstractCegarLoop]: Abstraction has 31 states and 51 transitions. [2020-04-18 15:48:17,558 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:48:17,558 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 51 transitions. [2020-04-18 15:48:17,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:48:17,559 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:17,559 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:17,560 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:17,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1139052385, now seen corresponding path program 1 times [2020-04-18 15:48:17,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:17,561 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1362905727] [2020-04-18 15:48:17,561 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,563 INFO L259 McrAutomatonBuilder]: Finished intersection with 12 states and 15 transitions. [2020-04-18 15:48:17,563 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states. [2020-04-18 15:48:17,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:48:17,564 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:17,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,565 INFO L82 PathProgramCache]: Analyzing trace with hash -1124688655, now seen corresponding path program 2 times [2020-04-18 15:48:17,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:17,565 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745621191] [2020-04-18 15:48:17,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:17,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:17,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:17,657 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745621191] [2020-04-18 15:48:17,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:17,658 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:17,658 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:17,659 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,663 INFO L259 McrAutomatonBuilder]: Finished intersection with 11 states and 13 transitions. [2020-04-18 15:48:17,663 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:17,668 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:17,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:17,669 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:17,669 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 3 states. [2020-04-18 15:48:17,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:17,673 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2020-04-18 15:48:17,673 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2020-04-18 15:48:17,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:48:17,674 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:17,674 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1139052385, now seen corresponding path program 3 times [2020-04-18 15:48:17,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:17,675 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672572831] [2020-04-18 15:48:17,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:17,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:17,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:17,743 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672572831] [2020-04-18 15:48:17,743 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:17,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:17,744 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:17,744 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,746 INFO L259 McrAutomatonBuilder]: Finished intersection with 8 states and 7 transitions. [2020-04-18 15:48:17,747 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:17,753 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:17,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 15:48:17,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:48:17,754 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. Second operand 4 states. [2020-04-18 15:48:17,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:17,761 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2020-04-18 15:48:17,761 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2020-04-18 15:48:17,761 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:17,762 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1362905727] [2020-04-18 15:48:17,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:17,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2] total 2 [2020-04-18 15:48:17,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1362905727] [2020-04-18 15:48:17,763 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2020-04-18 15:48:17,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:17,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 15:48:17,764 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:48:17,764 INFO L87 Difference]: Start difference. First operand 31 states and 51 transitions. Second operand 4 states. [2020-04-18 15:48:17,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:17,774 INFO L93 Difference]: Finished difference Result 26 states and 42 transitions. [2020-04-18 15:48:17,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2020-04-18 15:48:17,774 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 7 [2020-04-18 15:48:17,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:17,775 INFO L225 Difference]: With dead ends: 26 [2020-04-18 15:48:17,775 INFO L226 Difference]: Without dead ends: 24 [2020-04-18 15:48:17,776 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:48:17,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2020-04-18 15:48:17,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2020-04-18 15:48:17,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2020-04-18 15:48:17,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 39 transitions. [2020-04-18 15:48:17,781 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 39 transitions. Word has length 7 [2020-04-18 15:48:17,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:17,781 INFO L479 AbstractCegarLoop]: Abstraction has 24 states and 39 transitions. [2020-04-18 15:48:17,781 INFO L480 AbstractCegarLoop]: Interpolant automaton has 4 states. [2020-04-18 15:48:17,781 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 39 transitions. [2020-04-18 15:48:17,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2020-04-18 15:48:17,782 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:17,782 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:17,782 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:17,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,783 INFO L82 PathProgramCache]: Analyzing trace with hash -950894116, now seen corresponding path program 1 times [2020-04-18 15:48:17,783 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:17,783 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1324460995] [2020-04-18 15:48:17,784 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:17,784 INFO L259 McrAutomatonBuilder]: Finished intersection with 9 states and 8 transitions. [2020-04-18 15:48:17,785 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states. [2020-04-18 15:48:17,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2020-04-18 15:48:17,785 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:17,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:17,786 INFO L82 PathProgramCache]: Analyzing trace with hash -950894116, now seen corresponding path program 2 times [2020-04-18 15:48:17,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:17,786 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2048680134] [2020-04-18 15:48:17,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:17,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:17,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:17,855 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:48:17,855 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:48:17,855 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:48:17,856 WARN L363 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:48:17,857 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2020-04-18 15:48:17,865 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,866 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,866 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,866 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,866 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,866 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,867 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,867 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,867 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,867 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,867 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,868 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,868 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,868 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,868 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,868 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,869 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,869 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,872 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,873 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,874 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,874 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,874 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,874 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,874 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,875 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,876 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,876 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,876 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,877 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,877 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,878 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,878 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,878 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,878 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,880 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,880 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,880 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,880 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,880 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,883 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,885 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:17,887 INFO L251 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2020-04-18 15:48:17,888 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:48:17,888 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:48:17,888 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:48:17,888 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:48:17,888 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:48:17,888 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:48:17,888 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:48:17,888 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:48:17,891 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 76 places, 69 transitions, 162 flow [2020-04-18 15:48:17,891 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 76 places, 69 transitions, 162 flow [2020-04-18 15:48:17,910 INFO L129 PetriNetUnfolder]: 4/83 cut-off events. [2020-04-18 15:48:17,910 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2020-04-18 15:48:17,911 INFO L80 FinitePrefix]: Finished finitePrefix Result has 97 conditions, 83 events. 4/83 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 141 event pairs, 0 based on Foata normal form. 0/75 useless extension candidates. Maximal degree in co-relation 92. Up to 6 conditions per place. [2020-04-18 15:48:17,914 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 76 places, 69 transitions, 162 flow [2020-04-18 15:48:17,933 INFO L129 PetriNetUnfolder]: 4/83 cut-off events. [2020-04-18 15:48:17,933 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2020-04-18 15:48:17,936 INFO L80 FinitePrefix]: Finished finitePrefix Result has 97 conditions, 83 events. 4/83 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 141 event pairs, 0 based on Foata normal form. 0/75 useless extension candidates. Maximal degree in co-relation 92. Up to 6 conditions per place. [2020-04-18 15:48:17,938 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 1108 [2020-04-18 15:48:17,938 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:48:19,133 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:48:19,199 INFO L206 etLargeBlockEncoding]: Checked pairs total: 964 [2020-04-18 15:48:19,199 INFO L214 etLargeBlockEncoding]: Total number of compositions: 59 [2020-04-18 15:48:19,199 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 31 places, 21 transitions, 66 flow [2020-04-18 15:48:19,210 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 224 states. [2020-04-18 15:48:19,211 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states. [2020-04-18 15:48:19,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:19,211 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:19,211 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:48:19,212 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:19,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,212 INFO L82 PathProgramCache]: Analyzing trace with hash 354555, now seen corresponding path program 1 times [2020-04-18 15:48:19,212 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:19,213 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1124084479] [2020-04-18 15:48:19,213 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,213 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:19,214 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:48:19,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:19,214 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:19,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,214 INFO L82 PathProgramCache]: Analyzing trace with hash 354555, now seen corresponding path program 2 times [2020-04-18 15:48:19,215 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:19,215 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582941139] [2020-04-18 15:48:19,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:19,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:19,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:19,260 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582941139] [2020-04-18 15:48:19,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:19,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:48:19,261 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:19,261 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,261 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:19,262 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:19,267 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:19,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:19,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:19,267 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:48:19,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,268 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:48:19,268 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:48:19,268 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:19,269 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1124084479] [2020-04-18 15:48:19,269 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:19,269 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:48:19,269 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1124084479] [2020-04-18 15:48:19,269 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:48:19,269 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:19,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:19,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:19,270 INFO L87 Difference]: Start difference. First operand 224 states. Second operand 3 states. [2020-04-18 15:48:19,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,296 INFO L93 Difference]: Finished difference Result 185 states and 459 transitions. [2020-04-18 15:48:19,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:48:19,297 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:48:19,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:19,302 INFO L225 Difference]: With dead ends: 185 [2020-04-18 15:48:19,302 INFO L226 Difference]: Without dead ends: 171 [2020-04-18 15:48:19,302 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:19,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2020-04-18 15:48:19,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2020-04-18 15:48:19,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2020-04-18 15:48:19,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 418 transitions. [2020-04-18 15:48:19,327 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 418 transitions. Word has length 3 [2020-04-18 15:48:19,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:19,327 INFO L479 AbstractCegarLoop]: Abstraction has 171 states and 418 transitions. [2020-04-18 15:48:19,327 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:48:19,327 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 418 transitions. [2020-04-18 15:48:19,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:19,328 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:19,328 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:19,328 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:19,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1106209149, now seen corresponding path program 1 times [2020-04-18 15:48:19,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:19,329 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [134509083] [2020-04-18 15:48:19,330 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,330 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:48:19,331 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:48:19,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:19,331 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:19,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,331 INFO L82 PathProgramCache]: Analyzing trace with hash -1106209149, now seen corresponding path program 2 times [2020-04-18 15:48:19,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:19,332 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629929871] [2020-04-18 15:48:19,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:19,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:19,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:19,375 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629929871] [2020-04-18 15:48:19,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:19,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:19,376 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:19,376 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,378 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:48:19,378 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:19,402 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:19,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:19,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:19,403 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 5 states. [2020-04-18 15:48:19,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,426 INFO L93 Difference]: Finished difference Result 16 states and 21 transitions. [2020-04-18 15:48:19,426 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 21 transitions. [2020-04-18 15:48:19,427 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:19,427 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [134509083] [2020-04-18 15:48:19,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:19,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:19,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [134509083] [2020-04-18 15:48:19,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:19,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:19,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:19,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:19,429 INFO L87 Difference]: Start difference. First operand 171 states and 418 transitions. Second operand 5 states. [2020-04-18 15:48:19,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,472 INFO L93 Difference]: Finished difference Result 205 states and 460 transitions. [2020-04-18 15:48:19,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:19,472 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:48:19,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:19,475 INFO L225 Difference]: With dead ends: 205 [2020-04-18 15:48:19,475 INFO L226 Difference]: Without dead ends: 201 [2020-04-18 15:48:19,475 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:19,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2020-04-18 15:48:19,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 162. [2020-04-18 15:48:19,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2020-04-18 15:48:19,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 399 transitions. [2020-04-18 15:48:19,494 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 399 transitions. Word has length 9 [2020-04-18 15:48:19,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:19,494 INFO L479 AbstractCegarLoop]: Abstraction has 162 states and 399 transitions. [2020-04-18 15:48:19,494 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:19,494 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 399 transitions. [2020-04-18 15:48:19,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:19,496 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:19,496 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:19,496 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:19,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,496 INFO L82 PathProgramCache]: Analyzing trace with hash 583411714, now seen corresponding path program 1 times [2020-04-18 15:48:19,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:19,497 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [658576317] [2020-04-18 15:48:19,498 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,498 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:48:19,499 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:48:19,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:19,499 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:19,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,500 INFO L82 PathProgramCache]: Analyzing trace with hash 583411714, now seen corresponding path program 2 times [2020-04-18 15:48:19,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:19,500 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267751415] [2020-04-18 15:48:19,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:19,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:19,572 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:19,573 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267751415] [2020-04-18 15:48:19,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:19,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:19,574 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:19,576 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,578 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:48:19,578 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:19,594 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:19,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:19,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:19,595 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 5 states. [2020-04-18 15:48:19,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,612 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2020-04-18 15:48:19,613 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2020-04-18 15:48:19,613 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:19,614 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [658576317] [2020-04-18 15:48:19,614 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:19,614 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:19,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [658576317] [2020-04-18 15:48:19,615 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:19,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:19,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:19,616 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:19,616 INFO L87 Difference]: Start difference. First operand 162 states and 399 transitions. Second operand 5 states. [2020-04-18 15:48:19,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:19,657 INFO L93 Difference]: Finished difference Result 189 states and 423 transitions. [2020-04-18 15:48:19,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:19,657 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:48:19,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:19,659 INFO L225 Difference]: With dead ends: 189 [2020-04-18 15:48:19,659 INFO L226 Difference]: Without dead ends: 185 [2020-04-18 15:48:19,660 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:19,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2020-04-18 15:48:19,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 153. [2020-04-18 15:48:19,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2020-04-18 15:48:19,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 367 transitions. [2020-04-18 15:48:19,673 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 367 transitions. Word has length 13 [2020-04-18 15:48:19,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:19,674 INFO L479 AbstractCegarLoop]: Abstraction has 153 states and 367 transitions. [2020-04-18 15:48:19,674 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:19,674 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 367 transitions. [2020-04-18 15:48:19,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2020-04-18 15:48:19,675 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:19,676 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:19,676 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:19,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,676 INFO L82 PathProgramCache]: Analyzing trace with hash 903154619, now seen corresponding path program 1 times [2020-04-18 15:48:19,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:19,677 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [864201698] [2020-04-18 15:48:19,677 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:19,678 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 14 transitions. [2020-04-18 15:48:19,678 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states. [2020-04-18 15:48:19,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2020-04-18 15:48:19,679 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:19,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:19,679 INFO L82 PathProgramCache]: Analyzing trace with hash 903154619, now seen corresponding path program 2 times [2020-04-18 15:48:19,679 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:19,680 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940940712] [2020-04-18 15:48:19,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:19,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:19,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:19,710 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:48:19,711 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:48:19,711 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:48:19,711 WARN L363 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:48:19,713 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2020-04-18 15:48:19,722 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,723 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,724 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,725 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,725 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,725 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,725 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,725 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,726 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,727 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,727 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,727 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,727 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,728 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,729 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,729 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,729 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,729 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,730 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,731 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,731 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,731 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,731 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,731 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,732 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,733 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,733 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,733 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,733 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,734 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,734 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,734 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,734 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,734 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,735 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,736 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,736 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,736 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,736 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,737 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,737 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,737 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,737 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,737 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,738 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,738 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,738 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,738 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,739 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,739 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,740 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,741 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,741 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,741 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,742 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,742 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,742 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:19,744 INFO L251 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2020-04-18 15:48:19,744 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:48:19,744 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:48:19,744 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:48:19,744 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:48:19,744 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:48:19,744 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:48:19,745 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:48:19,745 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:48:19,746 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 97 places, 87 transitions, 216 flow [2020-04-18 15:48:19,747 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 97 places, 87 transitions, 216 flow [2020-04-18 15:48:19,763 INFO L129 PetriNetUnfolder]: 5/105 cut-off events. [2020-04-18 15:48:19,763 INFO L130 PetriNetUnfolder]: For 7/7 co-relation queries the response was YES. [2020-04-18 15:48:19,764 INFO L80 FinitePrefix]: Finished finitePrefix Result has 126 conditions, 105 events. 5/105 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 187 event pairs, 0 based on Foata normal form. 0/95 useless extension candidates. Maximal degree in co-relation 119. Up to 8 conditions per place. [2020-04-18 15:48:19,767 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 97 places, 87 transitions, 216 flow [2020-04-18 15:48:19,780 INFO L129 PetriNetUnfolder]: 5/105 cut-off events. [2020-04-18 15:48:19,780 INFO L130 PetriNetUnfolder]: For 7/7 co-relation queries the response was YES. [2020-04-18 15:48:19,781 INFO L80 FinitePrefix]: Finished finitePrefix Result has 126 conditions, 105 events. 5/105 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 187 event pairs, 0 based on Foata normal form. 0/95 useless extension candidates. Maximal degree in co-relation 119. Up to 8 conditions per place. [2020-04-18 15:48:19,784 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 1608 [2020-04-18 15:48:19,784 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:48:21,149 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2020-04-18 15:48:21,341 INFO L206 etLargeBlockEncoding]: Checked pairs total: 1796 [2020-04-18 15:48:21,341 INFO L214 etLargeBlockEncoding]: Total number of compositions: 73 [2020-04-18 15:48:21,341 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 41 places, 27 transitions, 96 flow [2020-04-18 15:48:21,369 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 683 states. [2020-04-18 15:48:21,369 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states. [2020-04-18 15:48:21,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:21,369 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:21,370 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:48:21,370 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:21,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,370 INFO L82 PathProgramCache]: Analyzing trace with hash 535749, now seen corresponding path program 1 times [2020-04-18 15:48:21,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:21,371 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [835301204] [2020-04-18 15:48:21,371 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,372 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:21,372 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:48:21,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:21,372 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:21,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,373 INFO L82 PathProgramCache]: Analyzing trace with hash 535749, now seen corresponding path program 2 times [2020-04-18 15:48:21,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,373 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934879608] [2020-04-18 15:48:21,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:21,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:21,404 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934879608] [2020-04-18 15:48:21,404 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:21,404 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:48:21,405 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:21,405 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,405 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:21,406 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:21,409 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:21,409 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:21,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:21,410 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:48:21,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,411 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:48:21,411 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:48:21,411 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:21,411 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [835301204] [2020-04-18 15:48:21,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:21,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:48:21,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [835301204] [2020-04-18 15:48:21,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:48:21,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:21,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:21,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:21,413 INFO L87 Difference]: Start difference. First operand 683 states. Second operand 3 states. [2020-04-18 15:48:21,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,441 INFO L93 Difference]: Finished difference Result 600 states and 1886 transitions. [2020-04-18 15:48:21,442 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:48:21,442 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:48:21,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:21,448 INFO L225 Difference]: With dead ends: 600 [2020-04-18 15:48:21,448 INFO L226 Difference]: Without dead ends: 559 [2020-04-18 15:48:21,449 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:21,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 559 states. [2020-04-18 15:48:21,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 559 to 559. [2020-04-18 15:48:21,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 559 states. [2020-04-18 15:48:21,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 559 states to 559 states and 1737 transitions. [2020-04-18 15:48:21,494 INFO L78 Accepts]: Start accepts. Automaton has 559 states and 1737 transitions. Word has length 3 [2020-04-18 15:48:21,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:21,494 INFO L479 AbstractCegarLoop]: Abstraction has 559 states and 1737 transitions. [2020-04-18 15:48:21,494 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:48:21,494 INFO L276 IsEmpty]: Start isEmpty. Operand 559 states and 1737 transitions. [2020-04-18 15:48:21,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:21,495 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:21,495 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:21,495 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:21,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,496 INFO L82 PathProgramCache]: Analyzing trace with hash -404806880, now seen corresponding path program 1 times [2020-04-18 15:48:21,496 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:21,496 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2130004038] [2020-04-18 15:48:21,497 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,497 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:48:21,498 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:48:21,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:21,498 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:21,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,499 INFO L82 PathProgramCache]: Analyzing trace with hash -1142033206, now seen corresponding path program 2 times [2020-04-18 15:48:21,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,499 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955593795] [2020-04-18 15:48:21,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:21,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:21,520 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955593795] [2020-04-18 15:48:21,520 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:21,520 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:21,520 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:21,521 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,522 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:48:21,522 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:21,526 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:21,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:21,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:21,527 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:48:21,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,530 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:21,530 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:21,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:21,531 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:21,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,531 INFO L82 PathProgramCache]: Analyzing trace with hash -404806880, now seen corresponding path program 3 times [2020-04-18 15:48:21,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,532 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000771448] [2020-04-18 15:48:21,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:21,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:21,563 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000771448] [2020-04-18 15:48:21,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:21,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:21,564 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:21,565 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,566 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:48:21,566 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:21,575 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:21,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:21,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:21,576 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:48:21,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,617 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:21,617 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:21,617 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:21,618 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2130004038] [2020-04-18 15:48:21,618 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:21,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:21,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2130004038] [2020-04-18 15:48:21,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:21,620 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:21,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:21,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:21,620 INFO L87 Difference]: Start difference. First operand 559 states and 1737 transitions. Second operand 5 states. [2020-04-18 15:48:21,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,681 INFO L93 Difference]: Finished difference Result 817 states and 2317 transitions. [2020-04-18 15:48:21,681 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:21,682 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:48:21,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:21,689 INFO L225 Difference]: With dead ends: 817 [2020-04-18 15:48:21,689 INFO L226 Difference]: Without dead ends: 812 [2020-04-18 15:48:21,689 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:21,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2020-04-18 15:48:21,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 585. [2020-04-18 15:48:21,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2020-04-18 15:48:21,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 1832 transitions. [2020-04-18 15:48:21,720 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 1832 transitions. Word has length 9 [2020-04-18 15:48:21,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:21,721 INFO L479 AbstractCegarLoop]: Abstraction has 585 states and 1832 transitions. [2020-04-18 15:48:21,721 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:21,721 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 1832 transitions. [2020-04-18 15:48:21,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:21,722 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:21,722 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:21,722 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:21,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,722 INFO L82 PathProgramCache]: Analyzing trace with hash -669323978, now seen corresponding path program 1 times [2020-04-18 15:48:21,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:21,723 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1028087260] [2020-04-18 15:48:21,723 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,724 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:48:21,725 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:48:21,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:21,725 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:21,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,726 INFO L82 PathProgramCache]: Analyzing trace with hash -1586901388, now seen corresponding path program 2 times [2020-04-18 15:48:21,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,726 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148196045] [2020-04-18 15:48:21,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:21,745 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:21,746 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1148196045] [2020-04-18 15:48:21,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:21,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:21,746 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:21,747 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,750 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:48:21,750 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:21,753 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:21,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:21,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:21,754 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:48:21,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,758 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:21,758 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:21,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:21,759 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:21,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,759 INFO L82 PathProgramCache]: Analyzing trace with hash -669323978, now seen corresponding path program 3 times [2020-04-18 15:48:21,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,760 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2098449979] [2020-04-18 15:48:21,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:21,819 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:21,820 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2098449979] [2020-04-18 15:48:21,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:21,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:21,820 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:21,822 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,823 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:48:21,824 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:21,841 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:21,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:21,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:21,842 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:48:21,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,867 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:21,868 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:21,868 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:21,868 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1028087260] [2020-04-18 15:48:21,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:21,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:21,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1028087260] [2020-04-18 15:48:21,869 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:21,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:21,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:21,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:21,870 INFO L87 Difference]: Start difference. First operand 585 states and 1832 transitions. Second operand 5 states. [2020-04-18 15:48:21,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:21,933 INFO L93 Difference]: Finished difference Result 843 states and 2406 transitions. [2020-04-18 15:48:21,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:21,934 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:48:21,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:21,941 INFO L225 Difference]: With dead ends: 843 [2020-04-18 15:48:21,941 INFO L226 Difference]: Without dead ends: 836 [2020-04-18 15:48:21,942 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:21,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 836 states. [2020-04-18 15:48:21,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 836 to 611. [2020-04-18 15:48:21,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 611 states. [2020-04-18 15:48:21,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 611 states to 611 states and 1906 transitions. [2020-04-18 15:48:21,975 INFO L78 Accepts]: Start accepts. Automaton has 611 states and 1906 transitions. Word has length 13 [2020-04-18 15:48:21,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:21,976 INFO L479 AbstractCegarLoop]: Abstraction has 611 states and 1906 transitions. [2020-04-18 15:48:21,976 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:21,976 INFO L276 IsEmpty]: Start isEmpty. Operand 611 states and 1906 transitions. [2020-04-18 15:48:21,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:21,977 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:21,977 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:21,977 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:21,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,978 INFO L82 PathProgramCache]: Analyzing trace with hash -56737855, now seen corresponding path program 1 times [2020-04-18 15:48:21,978 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:21,978 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [322428288] [2020-04-18 15:48:21,979 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:21,980 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:48:21,981 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:48:21,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:21,983 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:21,983 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:21,984 INFO L82 PathProgramCache]: Analyzing trace with hash -1442093623, now seen corresponding path program 2 times [2020-04-18 15:48:21,984 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:21,984 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [76633909] [2020-04-18 15:48:21,984 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:21,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:22,017 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:22,018 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [76633909] [2020-04-18 15:48:22,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:22,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:22,018 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:22,021 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:22,026 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:48:22,026 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:22,033 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:22,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:22,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:22,034 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:48:22,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:22,042 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:48:22,042 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:48:22,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:22,042 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:22,043 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:22,043 INFO L82 PathProgramCache]: Analyzing trace with hash -2771455, now seen corresponding path program 3 times [2020-04-18 15:48:22,043 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:22,043 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72264538] [2020-04-18 15:48:22,043 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:22,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:22,100 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:22,100 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72264538] [2020-04-18 15:48:22,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:22,101 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:22,101 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:22,102 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:22,108 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:48:22,108 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:22,122 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:48:22,123 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:22,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:22,123 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:48:22,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:22,161 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:48:22,161 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:48:22,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:22,162 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:22,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:22,162 INFO L82 PathProgramCache]: Analyzing trace with hash -56737855, now seen corresponding path program 4 times [2020-04-18 15:48:22,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:22,163 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2079901975] [2020-04-18 15:48:22,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:22,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:22,234 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:22,235 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2079901975] [2020-04-18 15:48:22,235 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [863313485] [2020-04-18 15:48:22,235 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:22,340 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:22,340 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:22,347 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:22,350 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:22,377 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:22,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:22,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:22,378 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:22,382 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:22,385 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:48:22,385 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:22,418 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:48:22,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:22,419 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:22,419 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:48:22,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:22,520 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:48:22,520 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:48:22,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:22,520 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:22,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:22,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1024744543, now seen corresponding path program 5 times [2020-04-18 15:48:22,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:22,521 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479251840] [2020-04-18 15:48:22,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:22,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:22,598 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:22,598 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479251840] [2020-04-18 15:48:22,599 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:22,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:22,599 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:22,602 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:22,605 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:48:22,605 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:22,625 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:22,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:22,626 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:22,627 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:48:22,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:22,771 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:48:22,771 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:48:22,772 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:22,772 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [322428288] [2020-04-18 15:48:22,772 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:22,772 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:22,773 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [322428288] [2020-04-18 15:48:22,773 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:22,773 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:22,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:22,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:22,775 INFO L87 Difference]: Start difference. First operand 611 states and 1906 transitions. Second operand 11 states. [2020-04-18 15:48:22,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:22,986 INFO L93 Difference]: Finished difference Result 1142 states and 2948 transitions. [2020-04-18 15:48:22,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:22,987 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:48:22,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:22,994 INFO L225 Difference]: With dead ends: 1142 [2020-04-18 15:48:22,995 INFO L226 Difference]: Without dead ends: 1127 [2020-04-18 15:48:22,995 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:23,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1127 states. [2020-04-18 15:48:23,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1127 to 536. [2020-04-18 15:48:23,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2020-04-18 15:48:23,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 1688 transitions. [2020-04-18 15:48:23,026 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 1688 transitions. Word has length 15 [2020-04-18 15:48:23,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:23,026 INFO L479 AbstractCegarLoop]: Abstraction has 536 states and 1688 transitions. [2020-04-18 15:48:23,027 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:23,027 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 1688 transitions. [2020-04-18 15:48:23,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:23,028 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:23,028 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:23,233 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:23,234 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:23,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:23,234 INFO L82 PathProgramCache]: Analyzing trace with hash 68174732, now seen corresponding path program 1 times [2020-04-18 15:48:23,235 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:23,235 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [717825898] [2020-04-18 15:48:23,236 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:23,238 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:48:23,239 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:48:23,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:23,240 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:23,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:23,240 INFO L82 PathProgramCache]: Analyzing trace with hash 1382437854, now seen corresponding path program 2 times [2020-04-18 15:48:23,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:23,240 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141814271] [2020-04-18 15:48:23,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:23,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:23,259 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:23,260 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141814271] [2020-04-18 15:48:23,260 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:23,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:23,261 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:23,262 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:23,264 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:48:23,264 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:23,268 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:23,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:23,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:23,269 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:48:23,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:23,273 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:23,273 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:23,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:23,273 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:23,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:23,274 INFO L82 PathProgramCache]: Analyzing trace with hash 68174732, now seen corresponding path program 3 times [2020-04-18 15:48:23,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:23,274 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65682806] [2020-04-18 15:48:23,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:23,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:23,308 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:23,309 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65682806] [2020-04-18 15:48:23,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:23,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:23,309 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:23,310 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:23,312 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:48:23,313 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:23,321 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:23,321 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:23,321 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:23,322 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:48:23,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:23,336 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:23,336 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:23,336 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:23,337 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [717825898] [2020-04-18 15:48:23,337 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:23,337 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:23,337 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [717825898] [2020-04-18 15:48:23,337 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:23,338 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:23,338 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:23,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:23,338 INFO L87 Difference]: Start difference. First operand 536 states and 1688 transitions. Second operand 5 states. [2020-04-18 15:48:23,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:23,386 INFO L93 Difference]: Finished difference Result 736 states and 2123 transitions. [2020-04-18 15:48:23,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:23,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:48:23,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:23,393 INFO L225 Difference]: With dead ends: 736 [2020-04-18 15:48:23,393 INFO L226 Difference]: Without dead ends: 728 [2020-04-18 15:48:23,394 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:23,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2020-04-18 15:48:23,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 549. [2020-04-18 15:48:23,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 549 states. [2020-04-18 15:48:23,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 1684 transitions. [2020-04-18 15:48:23,419 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 1684 transitions. Word has length 17 [2020-04-18 15:48:23,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:23,420 INFO L479 AbstractCegarLoop]: Abstraction has 549 states and 1684 transitions. [2020-04-18 15:48:23,420 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:23,420 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 1684 transitions. [2020-04-18 15:48:23,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2020-04-18 15:48:23,421 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:23,421 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:23,421 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:23,422 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:23,422 INFO L82 PathProgramCache]: Analyzing trace with hash 2109628021, now seen corresponding path program 1 times [2020-04-18 15:48:23,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:23,422 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1181461913] [2020-04-18 15:48:23,423 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:23,424 INFO L259 McrAutomatonBuilder]: Finished intersection with 19 states and 18 transitions. [2020-04-18 15:48:23,424 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2020-04-18 15:48:23,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2020-04-18 15:48:23,425 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:23,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:23,425 INFO L82 PathProgramCache]: Analyzing trace with hash 2109628021, now seen corresponding path program 2 times [2020-04-18 15:48:23,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:23,426 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1781060403] [2020-04-18 15:48:23,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:23,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:23,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:23,452 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:48:23,452 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:48:23,453 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:48:23,453 WARN L363 ceAbstractionStarter]: 3 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:48:23,454 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 4 thread instances. [2020-04-18 15:48:23,466 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,467 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,467 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,467 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,467 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,469 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,471 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,472 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,472 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,473 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,473 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,473 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,473 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,474 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,475 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,476 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,477 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,479 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,481 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,481 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,481 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,481 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,481 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,483 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,483 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,483 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,483 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,483 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,485 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,485 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,485 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,486 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,486 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,487 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,487 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,487 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,488 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,488 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,489 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,489 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,489 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,489 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,490 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,490 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,491 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,491 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,491 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,491 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,492 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,492 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,495 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,496 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,496 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,496 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,496 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,496 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,499 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:23,501 INFO L251 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2020-04-18 15:48:23,501 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:48:23,502 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:48:23,502 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:48:23,502 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:48:23,502 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:48:23,502 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:48:23,502 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:48:23,502 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:48:23,504 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 118 places, 105 transitions, 274 flow [2020-04-18 15:48:23,504 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 118 places, 105 transitions, 274 flow [2020-04-18 15:48:23,535 INFO L129 PetriNetUnfolder]: 6/127 cut-off events. [2020-04-18 15:48:23,536 INFO L130 PetriNetUnfolder]: For 16/16 co-relation queries the response was YES. [2020-04-18 15:48:23,537 INFO L80 FinitePrefix]: Finished finitePrefix Result has 156 conditions, 127 events. 6/127 cut-off events. For 16/16 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 211 event pairs, 0 based on Foata normal form. 0/115 useless extension candidates. Maximal degree in co-relation 147. Up to 10 conditions per place. [2020-04-18 15:48:23,541 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 118 places, 105 transitions, 274 flow [2020-04-18 15:48:23,557 INFO L129 PetriNetUnfolder]: 6/127 cut-off events. [2020-04-18 15:48:23,557 INFO L130 PetriNetUnfolder]: For 16/16 co-relation queries the response was YES. [2020-04-18 15:48:23,559 INFO L80 FinitePrefix]: Finished finitePrefix Result has 156 conditions, 127 events. 6/127 cut-off events. For 16/16 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 211 event pairs, 0 based on Foata normal form. 0/115 useless extension candidates. Maximal degree in co-relation 147. Up to 10 conditions per place. [2020-04-18 15:48:23,562 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 2192 [2020-04-18 15:48:23,562 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:48:25,331 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2020-04-18 15:48:25,404 INFO L206 etLargeBlockEncoding]: Checked pairs total: 2240 [2020-04-18 15:48:25,404 INFO L214 etLargeBlockEncoding]: Total number of compositions: 92 [2020-04-18 15:48:25,404 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 51 places, 33 transitions, 130 flow [2020-04-18 15:48:25,527 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 2060 states. [2020-04-18 15:48:25,527 INFO L276 IsEmpty]: Start isEmpty. Operand 2060 states. [2020-04-18 15:48:25,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:25,527 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:25,527 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:48:25,528 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:25,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:25,528 INFO L82 PathProgramCache]: Analyzing trace with hash 753552, now seen corresponding path program 1 times [2020-04-18 15:48:25,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:25,528 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [651659563] [2020-04-18 15:48:25,529 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:25,529 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:25,529 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:48:25,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:25,529 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:25,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:25,530 INFO L82 PathProgramCache]: Analyzing trace with hash 753552, now seen corresponding path program 2 times [2020-04-18 15:48:25,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:25,530 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029232827] [2020-04-18 15:48:25,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:25,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:25,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:25,545 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029232827] [2020-04-18 15:48:25,545 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:25,545 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:48:25,546 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:25,546 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:25,546 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:25,546 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:25,554 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:25,555 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:25,555 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:25,555 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:48:25,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:25,556 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:48:25,556 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:48:25,556 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:25,556 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [651659563] [2020-04-18 15:48:25,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:25,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:48:25,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [651659563] [2020-04-18 15:48:25,557 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:48:25,557 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:25,557 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:25,558 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:25,558 INFO L87 Difference]: Start difference. First operand 2060 states. Second operand 3 states. [2020-04-18 15:48:25,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:25,595 INFO L93 Difference]: Finished difference Result 1889 states and 7217 transitions. [2020-04-18 15:48:25,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:48:25,596 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:48:25,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:25,614 INFO L225 Difference]: With dead ends: 1889 [2020-04-18 15:48:25,614 INFO L226 Difference]: Without dead ends: 1767 [2020-04-18 15:48:25,615 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:25,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1767 states. [2020-04-18 15:48:25,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1767 to 1767. [2020-04-18 15:48:25,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1767 states. [2020-04-18 15:48:25,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1767 states to 1767 states and 6690 transitions. [2020-04-18 15:48:25,699 INFO L78 Accepts]: Start accepts. Automaton has 1767 states and 6690 transitions. Word has length 3 [2020-04-18 15:48:25,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:25,700 INFO L479 AbstractCegarLoop]: Abstraction has 1767 states and 6690 transitions. [2020-04-18 15:48:25,700 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:48:25,700 INFO L276 IsEmpty]: Start isEmpty. Operand 1767 states and 6690 transitions. [2020-04-18 15:48:25,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:25,700 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:25,700 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:25,701 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:25,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:25,701 INFO L82 PathProgramCache]: Analyzing trace with hash -260829075, now seen corresponding path program 1 times [2020-04-18 15:48:25,701 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:25,701 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [557096854] [2020-04-18 15:48:25,702 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:25,702 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:48:25,703 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:48:25,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:25,703 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:25,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:25,703 INFO L82 PathProgramCache]: Analyzing trace with hash 773468699, now seen corresponding path program 2 times [2020-04-18 15:48:25,703 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:25,704 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330379784] [2020-04-18 15:48:25,704 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:25,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:25,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:25,722 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330379784] [2020-04-18 15:48:25,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:25,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:25,722 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:25,723 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:25,724 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:48:25,724 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:25,727 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:25,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:25,728 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:25,728 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:48:25,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:25,731 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:25,731 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:25,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:25,732 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:25,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:25,732 INFO L82 PathProgramCache]: Analyzing trace with hash -260829075, now seen corresponding path program 3 times [2020-04-18 15:48:25,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:25,732 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479297794] [2020-04-18 15:48:25,733 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:25,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:25,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:25,761 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479297794] [2020-04-18 15:48:25,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:25,761 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:25,761 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:25,762 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:25,763 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:48:25,763 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:25,778 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:25,778 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:25,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:25,779 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:48:25,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:25,794 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:25,795 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:25,795 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:25,795 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [557096854] [2020-04-18 15:48:25,795 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:25,795 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:25,795 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [557096854] [2020-04-18 15:48:25,796 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:25,796 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:25,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:25,796 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:25,796 INFO L87 Difference]: Start difference. First operand 1767 states and 6690 transitions. Second operand 5 states. [2020-04-18 15:48:25,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:25,916 INFO L93 Difference]: Finished difference Result 2905 states and 10138 transitions. [2020-04-18 15:48:25,916 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:25,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:48:25,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:25,941 INFO L225 Difference]: With dead ends: 2905 [2020-04-18 15:48:25,942 INFO L226 Difference]: Without dead ends: 2899 [2020-04-18 15:48:25,942 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:25,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2899 states. [2020-04-18 15:48:26,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2899 to 1966. [2020-04-18 15:48:26,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1966 states. [2020-04-18 15:48:26,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1966 states to 1966 states and 7503 transitions. [2020-04-18 15:48:26,060 INFO L78 Accepts]: Start accepts. Automaton has 1966 states and 7503 transitions. Word has length 9 [2020-04-18 15:48:26,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:26,060 INFO L479 AbstractCegarLoop]: Abstraction has 1966 states and 7503 transitions. [2020-04-18 15:48:26,060 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:26,060 INFO L276 IsEmpty]: Start isEmpty. Operand 1966 states and 7503 transitions. [2020-04-18 15:48:26,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:26,061 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:26,061 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:26,061 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:26,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,062 INFO L82 PathProgramCache]: Analyzing trace with hash -1408743431, now seen corresponding path program 1 times [2020-04-18 15:48:26,062 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:26,062 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1359824440] [2020-04-18 15:48:26,062 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,063 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:48:26,063 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:48:26,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:26,063 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:26,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,064 INFO L82 PathProgramCache]: Analyzing trace with hash 1718911887, now seen corresponding path program 2 times [2020-04-18 15:48:26,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,064 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640717164] [2020-04-18 15:48:26,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,085 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:26,086 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1640717164] [2020-04-18 15:48:26,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:26,086 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:26,086 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,087 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,089 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:48:26,089 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,092 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:26,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:26,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:26,093 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:48:26,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,096 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:26,096 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:26,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:26,096 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:26,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1408743431, now seen corresponding path program 3 times [2020-04-18 15:48:26,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,097 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [48824801] [2020-04-18 15:48:26,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:26,140 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [48824801] [2020-04-18 15:48:26,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:26,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:26,141 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,142 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,143 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:48:26,143 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,151 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:26,151 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:26,151 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:26,151 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:48:26,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,167 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:26,167 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:26,167 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:26,168 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1359824440] [2020-04-18 15:48:26,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:26,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:26,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1359824440] [2020-04-18 15:48:26,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:26,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:26,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:26,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:26,169 INFO L87 Difference]: Start difference. First operand 1966 states and 7503 transitions. Second operand 5 states. [2020-04-18 15:48:26,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,257 INFO L93 Difference]: Finished difference Result 3204 states and 11312 transitions. [2020-04-18 15:48:26,257 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:26,257 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:48:26,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:26,284 INFO L225 Difference]: With dead ends: 3204 [2020-04-18 15:48:26,284 INFO L226 Difference]: Without dead ends: 3194 [2020-04-18 15:48:26,284 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:26,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3194 states. [2020-04-18 15:48:26,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3194 to 2200. [2020-04-18 15:48:26,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2200 states. [2020-04-18 15:48:26,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2200 states to 2200 states and 8453 transitions. [2020-04-18 15:48:26,402 INFO L78 Accepts]: Start accepts. Automaton has 2200 states and 8453 transitions. Word has length 13 [2020-04-18 15:48:26,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:26,402 INFO L479 AbstractCegarLoop]: Abstraction has 2200 states and 8453 transitions. [2020-04-18 15:48:26,402 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:26,402 INFO L276 IsEmpty]: Start isEmpty. Operand 2200 states and 8453 transitions. [2020-04-18 15:48:26,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:26,403 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:26,403 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:26,403 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:26,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1555768808, now seen corresponding path program 1 times [2020-04-18 15:48:26,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:26,405 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1275994075] [2020-04-18 15:48:26,406 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,407 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:48:26,407 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:48:26,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:26,407 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:26,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,408 INFO L82 PathProgramCache]: Analyzing trace with hash 746064128, now seen corresponding path program 2 times [2020-04-18 15:48:26,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,408 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1740922970] [2020-04-18 15:48:26,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,430 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:26,430 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1740922970] [2020-04-18 15:48:26,431 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:26,431 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:26,431 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,432 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,435 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:48:26,435 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,439 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:26,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:26,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:26,440 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:48:26,446 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,447 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:48:26,447 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:48:26,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:26,447 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:26,448 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,448 INFO L82 PathProgramCache]: Analyzing trace with hash -1842869288, now seen corresponding path program 3 times [2020-04-18 15:48:26,448 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,448 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866356992] [2020-04-18 15:48:26,448 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,492 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:26,493 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866356992] [2020-04-18 15:48:26,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:26,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:26,493 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,495 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,498 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:48:26,498 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,507 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:48:26,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:26,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:26,508 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:48:26,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,544 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:48:26,545 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:48:26,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:26,545 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:26,545 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,545 INFO L82 PathProgramCache]: Analyzing trace with hash 1555768808, now seen corresponding path program 4 times [2020-04-18 15:48:26,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,546 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527548361] [2020-04-18 15:48:26,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,593 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:26,593 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527548361] [2020-04-18 15:48:26,593 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1317124444] [2020-04-18 15:48:26,594 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:26,686 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:26,686 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:26,687 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:26,688 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:26,713 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:26,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:26,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:26,714 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,715 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,717 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:48:26,718 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,746 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:26,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:26,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:26,747 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:48:26,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:26,827 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:48:26,827 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:48:26,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:26,828 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:26,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:26,828 INFO L82 PathProgramCache]: Analyzing trace with hash -887756896, now seen corresponding path program 5 times [2020-04-18 15:48:26,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:26,828 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305127351] [2020-04-18 15:48:26,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:26,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:26,874 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:26,874 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305127351] [2020-04-18 15:48:26,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:26,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:26,875 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:26,876 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:26,878 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:48:26,878 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:26,898 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:26,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:26,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:26,899 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:48:27,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:27,005 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:48:27,005 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:48:27,006 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:27,007 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1275994075] [2020-04-18 15:48:27,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:27,007 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:27,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1275994075] [2020-04-18 15:48:27,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:27,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:27,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:27,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:27,009 INFO L87 Difference]: Start difference. First operand 2200 states and 8453 transitions. Second operand 11 states. [2020-04-18 15:48:27,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:27,335 INFO L93 Difference]: Finished difference Result 5101 states and 16214 transitions. [2020-04-18 15:48:27,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:27,336 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:48:27,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:27,369 INFO L225 Difference]: With dead ends: 5101 [2020-04-18 15:48:27,369 INFO L226 Difference]: Without dead ends: 5080 [2020-04-18 15:48:27,370 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:27,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5080 states. [2020-04-18 15:48:27,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5080 to 2035. [2020-04-18 15:48:27,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2035 states. [2020-04-18 15:48:27,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2035 states to 2035 states and 7845 transitions. [2020-04-18 15:48:27,491 INFO L78 Accepts]: Start accepts. Automaton has 2035 states and 7845 transitions. Word has length 15 [2020-04-18 15:48:27,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:27,493 INFO L479 AbstractCegarLoop]: Abstraction has 2035 states and 7845 transitions. [2020-04-18 15:48:27,493 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:27,493 INFO L276 IsEmpty]: Start isEmpty. Operand 2035 states and 7845 transitions. [2020-04-18 15:48:27,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:27,494 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:27,495 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:27,700 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:27,701 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:27,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:27,702 INFO L82 PathProgramCache]: Analyzing trace with hash 695111130, now seen corresponding path program 1 times [2020-04-18 15:48:27,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:27,702 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [90105643] [2020-04-18 15:48:27,703 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:27,704 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:48:27,704 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:48:27,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:27,705 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:27,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:27,705 INFO L82 PathProgramCache]: Analyzing trace with hash 1378740238, now seen corresponding path program 2 times [2020-04-18 15:48:27,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:27,705 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359851179] [2020-04-18 15:48:27,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:27,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:27,732 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:27,732 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359851179] [2020-04-18 15:48:27,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:27,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:27,733 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:27,734 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:27,736 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:48:27,737 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:27,740 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:27,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:27,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:27,741 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:48:27,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:27,744 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:27,744 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:27,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:27,744 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:27,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:27,745 INFO L82 PathProgramCache]: Analyzing trace with hash 695111130, now seen corresponding path program 3 times [2020-04-18 15:48:27,745 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:27,745 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129835692] [2020-04-18 15:48:27,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:27,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:27,776 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:27,776 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129835692] [2020-04-18 15:48:27,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:27,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:27,777 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:27,778 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:27,780 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:48:27,780 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:27,790 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:27,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:27,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:27,791 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:48:27,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:27,807 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:27,807 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:27,808 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:27,808 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [90105643] [2020-04-18 15:48:27,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:27,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:27,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [90105643] [2020-04-18 15:48:27,809 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:27,809 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:27,809 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:27,809 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:27,809 INFO L87 Difference]: Start difference. First operand 2035 states and 7845 transitions. Second operand 5 states. [2020-04-18 15:48:27,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:27,879 INFO L93 Difference]: Finished difference Result 3265 states and 11681 transitions. [2020-04-18 15:48:27,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:27,879 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:48:27,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:27,914 INFO L225 Difference]: With dead ends: 3265 [2020-04-18 15:48:27,914 INFO L226 Difference]: Without dead ends: 3250 [2020-04-18 15:48:27,914 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:27,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3250 states. [2020-04-18 15:48:27,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3250 to 2281. [2020-04-18 15:48:27,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2281 states. [2020-04-18 15:48:28,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 2281 states and 8755 transitions. [2020-04-18 15:48:28,009 INFO L78 Accepts]: Start accepts. Automaton has 2281 states and 8755 transitions. Word has length 17 [2020-04-18 15:48:28,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:28,009 INFO L479 AbstractCegarLoop]: Abstraction has 2281 states and 8755 transitions. [2020-04-18 15:48:28,010 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:28,010 INFO L276 IsEmpty]: Start isEmpty. Operand 2281 states and 8755 transitions. [2020-04-18 15:48:28,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:28,011 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:28,011 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:28,011 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:28,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:28,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1754455113, now seen corresponding path program 1 times [2020-04-18 15:48:28,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:28,012 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1372274250] [2020-04-18 15:48:28,013 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:28,014 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:48:28,014 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:48:28,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:28,015 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:28,015 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:28,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1222685441, now seen corresponding path program 2 times [2020-04-18 15:48:28,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:28,016 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990180563] [2020-04-18 15:48:28,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:28,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:28,034 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:28,035 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990180563] [2020-04-18 15:48:28,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:28,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:28,035 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:28,037 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:28,042 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 101 transitions. [2020-04-18 15:48:28,042 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:28,045 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:28,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:28,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:28,046 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:48:28,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:28,053 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:48:28,053 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:48:28,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:28,053 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:28,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:28,054 INFO L82 PathProgramCache]: Analyzing trace with hash -320724009, now seen corresponding path program 3 times [2020-04-18 15:48:28,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:28,054 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595016205] [2020-04-18 15:48:28,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:28,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:28,102 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:28,102 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1595016205] [2020-04-18 15:48:28,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:28,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:28,103 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:28,104 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:28,108 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 15:48:28,109 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:28,118 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:28,118 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:28,118 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:28,118 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:48:28,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:28,148 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:48:28,148 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:48:28,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:28,149 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:28,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:28,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1754455113, now seen corresponding path program 4 times [2020-04-18 15:48:28,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:28,149 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993808458] [2020-04-18 15:48:28,150 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:28,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:28,196 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:28,196 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993808458] [2020-04-18 15:48:28,197 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [501748334] [2020-04-18 15:48:28,197 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:28,278 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:28,278 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:28,279 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:28,280 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:28,314 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:28,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:28,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:28,315 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:28,317 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:28,321 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:48:28,321 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:28,346 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:28,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:28,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:28,347 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 9 states. [2020-04-18 15:48:28,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:28,436 INFO L93 Difference]: Finished difference Result 97 states and 168 transitions. [2020-04-18 15:48:28,436 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 168 transitions. [2020-04-18 15:48:28,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:28,437 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:28,437 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:28,437 INFO L82 PathProgramCache]: Analyzing trace with hash -2013120191, now seen corresponding path program 5 times [2020-04-18 15:48:28,437 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:28,437 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809675618] [2020-04-18 15:48:28,437 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:28,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:28,479 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:28,479 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1809675618] [2020-04-18 15:48:28,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:28,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:28,480 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:28,481 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:28,484 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:48:28,484 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:28,503 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:28,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:28,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:28,504 INFO L87 Difference]: Start difference. First operand 97 states and 168 transitions. Second operand 7 states. [2020-04-18 15:48:28,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:28,618 INFO L93 Difference]: Finished difference Result 100 states and 171 transitions. [2020-04-18 15:48:28,618 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 171 transitions. [2020-04-18 15:48:28,618 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:28,619 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1372274250] [2020-04-18 15:48:28,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:28,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:28,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1372274250] [2020-04-18 15:48:28,619 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:28,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:28,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:28,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:28,620 INFO L87 Difference]: Start difference. First operand 2281 states and 8755 transitions. Second operand 11 states. [2020-04-18 15:48:28,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:28,937 INFO L93 Difference]: Finished difference Result 5387 states and 17317 transitions. [2020-04-18 15:48:28,937 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:28,937 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:48:28,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:28,958 INFO L225 Difference]: With dead ends: 5387 [2020-04-18 15:48:28,958 INFO L226 Difference]: Without dead ends: 5358 [2020-04-18 15:48:28,959 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:28,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5358 states. [2020-04-18 15:48:29,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5358 to 2153. [2020-04-18 15:48:29,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2153 states. [2020-04-18 15:48:29,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2153 states to 2153 states and 8255 transitions. [2020-04-18 15:48:29,077 INFO L78 Accepts]: Start accepts. Automaton has 2153 states and 8255 transitions. Word has length 19 [2020-04-18 15:48:29,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:29,077 INFO L479 AbstractCegarLoop]: Abstraction has 2153 states and 8255 transitions. [2020-04-18 15:48:29,078 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:29,078 INFO L276 IsEmpty]: Start isEmpty. Operand 2153 states and 8255 transitions. [2020-04-18 15:48:29,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:29,079 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:29,079 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:29,282 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:29,283 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:29,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:29,283 INFO L82 PathProgramCache]: Analyzing trace with hash -131464925, now seen corresponding path program 1 times [2020-04-18 15:48:29,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:29,284 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [295928033] [2020-04-18 15:48:29,285 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:29,286 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:48:29,287 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:48:29,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:29,287 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:29,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:29,287 INFO L82 PathProgramCache]: Analyzing trace with hash -1006426907, now seen corresponding path program 2 times [2020-04-18 15:48:29,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:29,287 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461898474] [2020-04-18 15:48:29,288 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:29,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:29,301 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:29,301 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461898474] [2020-04-18 15:48:29,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:29,302 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:29,302 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:29,303 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:29,307 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 73 transitions. [2020-04-18 15:48:29,307 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:29,315 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:29,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:29,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:29,316 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:48:29,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:29,323 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:48:29,323 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:48:29,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:29,323 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:29,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:29,324 INFO L82 PathProgramCache]: Analyzing trace with hash 764819305, now seen corresponding path program 3 times [2020-04-18 15:48:29,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:29,324 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762544092] [2020-04-18 15:48:29,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:29,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:29,358 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:29,359 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762544092] [2020-04-18 15:48:29,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:29,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:29,359 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:29,361 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:29,364 INFO L259 McrAutomatonBuilder]: Finished intersection with 33 states and 45 transitions. [2020-04-18 15:48:29,364 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:29,373 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:48:29,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:29,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:29,374 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 5 states. [2020-04-18 15:48:29,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:29,402 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:48:29,403 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:48:29,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:29,403 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:29,403 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:29,403 INFO L82 PathProgramCache]: Analyzing trace with hash -131464925, now seen corresponding path program 4 times [2020-04-18 15:48:29,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:29,404 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497261034] [2020-04-18 15:48:29,404 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:29,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:29,446 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:29,447 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497261034] [2020-04-18 15:48:29,447 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1431727750] [2020-04-18 15:48:29,447 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:29,522 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:29,523 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:29,523 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:29,525 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:29,549 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:29,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:29,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:29,550 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:29,551 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:29,556 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:48:29,556 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:29,585 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:48:29,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:29,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:29,585 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 9 states. [2020-04-18 15:48:29,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:29,683 INFO L93 Difference]: Finished difference Result 77 states and 124 transitions. [2020-04-18 15:48:29,683 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 124 transitions. [2020-04-18 15:48:29,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:29,684 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:29,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:29,684 INFO L82 PathProgramCache]: Analyzing trace with hash -2013113743, now seen corresponding path program 5 times [2020-04-18 15:48:29,684 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:29,685 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [568304064] [2020-04-18 15:48:29,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:29,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:29,736 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:29,737 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [568304064] [2020-04-18 15:48:29,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:29,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:29,737 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:29,739 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:29,741 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:48:29,741 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:29,758 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:29,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:29,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:29,759 INFO L87 Difference]: Start difference. First operand 77 states and 124 transitions. Second operand 7 states. [2020-04-18 15:48:29,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:29,861 INFO L93 Difference]: Finished difference Result 80 states and 127 transitions. [2020-04-18 15:48:29,861 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 127 transitions. [2020-04-18 15:48:29,861 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:29,862 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [295928033] [2020-04-18 15:48:29,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:29,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:29,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [295928033] [2020-04-18 15:48:29,863 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:29,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:29,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:29,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:29,864 INFO L87 Difference]: Start difference. First operand 2153 states and 8255 transitions. Second operand 11 states. [2020-04-18 15:48:30,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:30,093 INFO L93 Difference]: Finished difference Result 5272 states and 17008 transitions. [2020-04-18 15:48:30,094 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:30,094 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:48:30,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:30,114 INFO L225 Difference]: With dead ends: 5272 [2020-04-18 15:48:30,114 INFO L226 Difference]: Without dead ends: 5238 [2020-04-18 15:48:30,114 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:30,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5238 states. [2020-04-18 15:48:30,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5238 to 2150. [2020-04-18 15:48:30,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2150 states. [2020-04-18 15:48:30,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2150 states to 2150 states and 8243 transitions. [2020-04-18 15:48:30,244 INFO L78 Accepts]: Start accepts. Automaton has 2150 states and 8243 transitions. Word has length 19 [2020-04-18 15:48:30,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:30,244 INFO L479 AbstractCegarLoop]: Abstraction has 2150 states and 8243 transitions. [2020-04-18 15:48:30,245 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:30,245 INFO L276 IsEmpty]: Start isEmpty. Operand 2150 states and 8243 transitions. [2020-04-18 15:48:30,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:30,246 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:30,247 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:30,451 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:30,451 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:30,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:30,452 INFO L82 PathProgramCache]: Analyzing trace with hash -9146414, now seen corresponding path program 1 times [2020-04-18 15:48:30,452 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:30,453 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [889029618] [2020-04-18 15:48:30,454 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:30,456 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:48:30,459 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:48:30,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:30,460 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:30,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:30,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1305538154, now seen corresponding path program 2 times [2020-04-18 15:48:30,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:30,460 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1711414140] [2020-04-18 15:48:30,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:30,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:30,484 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:30,485 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1711414140] [2020-04-18 15:48:30,485 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:30,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:30,485 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:30,487 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:30,495 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 119 transitions. [2020-04-18 15:48:30,495 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:30,498 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:30,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:30,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:30,499 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:48:30,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:30,509 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:48:30,509 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:48:30,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:30,510 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:30,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:30,510 INFO L82 PathProgramCache]: Analyzing trace with hash -2103995794, now seen corresponding path program 3 times [2020-04-18 15:48:30,510 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:30,510 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329907944] [2020-04-18 15:48:30,510 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:30,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:30,533 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:30,533 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329907944] [2020-04-18 15:48:30,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:30,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:30,534 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:30,536 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:30,542 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 99 transitions. [2020-04-18 15:48:30,543 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:30,551 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:30,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:30,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:30,552 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:48:30,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:30,599 INFO L93 Difference]: Finished difference Result 266 states and 576 transitions. [2020-04-18 15:48:30,600 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 576 transitions. [2020-04-18 15:48:30,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:30,601 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:30,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:30,601 INFO L82 PathProgramCache]: Analyzing trace with hash 887137816, now seen corresponding path program 4 times [2020-04-18 15:48:30,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:30,602 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406822548] [2020-04-18 15:48:30,602 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:30,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:30,644 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:30,644 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1406822548] [2020-04-18 15:48:30,644 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [274816613] [2020-04-18 15:48:30,645 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:30,772 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:30,772 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:30,773 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:30,774 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:30,791 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:30,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:30,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:48:30,792 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:30,794 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:30,800 INFO L259 McrAutomatonBuilder]: Finished intersection with 51 states and 79 transitions. [2020-04-18 15:48:30,801 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:30,827 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:48:30,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:30,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:30,828 INFO L87 Difference]: Start difference. First operand 266 states and 576 transitions. Second operand 9 states. [2020-04-18 15:48:31,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:31,010 INFO L93 Difference]: Finished difference Result 312 states and 632 transitions. [2020-04-18 15:48:31,010 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 632 transitions. [2020-04-18 15:48:31,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:31,011 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:31,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:31,013 INFO L82 PathProgramCache]: Analyzing trace with hash -9146414, now seen corresponding path program 5 times [2020-04-18 15:48:31,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:31,013 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626898530] [2020-04-18 15:48:31,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:31,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:31,073 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:31,073 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626898530] [2020-04-18 15:48:31,074 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [779942413] [2020-04-18 15:48:31,074 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:31,149 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:48:31,149 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:31,150 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:31,151 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:31,169 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:31,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:31,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:31,170 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:31,171 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:31,178 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:48:31,178 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:31,197 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:48:31,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:31,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=238, Unknown=0, NotChecked=0, Total=342 [2020-04-18 15:48:31,198 INFO L87 Difference]: Start difference. First operand 312 states and 632 transitions. Second operand 11 states. [2020-04-18 15:48:31,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:31,641 INFO L93 Difference]: Finished difference Result 329 states and 643 transitions. [2020-04-18 15:48:31,641 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 643 transitions. [2020-04-18 15:48:31,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:31,643 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:48:31,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:31,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1890795232, now seen corresponding path program 6 times [2020-04-18 15:48:31,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:31,643 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552546276] [2020-04-18 15:48:31,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:31,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:31,713 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:31,713 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552546276] [2020-04-18 15:48:31,714 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1735277558] [2020-04-18 15:48:31,714 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:31,784 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 2 check-sat command(s) [2020-04-18 15:48:31,784 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:31,785 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:31,788 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:31,803 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:31,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:31,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:31,804 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:31,806 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:31,811 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:48:31,811 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:31,835 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:31,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:31,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=888, Unknown=0, NotChecked=0, Total=1190 [2020-04-18 15:48:31,836 INFO L87 Difference]: Start difference. First operand 329 states and 643 transitions. Second operand 11 states. [2020-04-18 15:48:32,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:32,380 INFO L93 Difference]: Finished difference Result 358 states and 677 transitions. [2020-04-18 15:48:32,380 INFO L276 IsEmpty]: Start isEmpty. Operand 358 states and 677 transitions. [2020-04-18 15:48:32,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:32,382 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:48:32,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:32,382 INFO L82 PathProgramCache]: Analyzing trace with hash 1077008290, now seen corresponding path program 7 times [2020-04-18 15:48:32,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:32,383 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249744011] [2020-04-18 15:48:32,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:32,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:32,428 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:32,429 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249744011] [2020-04-18 15:48:32,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:32,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:48:32,429 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:32,431 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:32,437 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 63 transitions. [2020-04-18 15:48:32,437 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:32,469 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:48:32,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:32,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=644, Invalid=2436, Unknown=0, NotChecked=0, Total=3080 [2020-04-18 15:48:32,470 INFO L87 Difference]: Start difference. First operand 358 states and 677 transitions. Second operand 7 states. [2020-04-18 15:48:32,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:32,710 INFO L93 Difference]: Finished difference Result 403 states and 735 transitions. [2020-04-18 15:48:32,710 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 735 transitions. [2020-04-18 15:48:32,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:32,711 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:48:32,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:32,712 INFO L82 PathProgramCache]: Analyzing trace with hash 180724060, now seen corresponding path program 8 times [2020-04-18 15:48:32,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:32,713 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1297190822] [2020-04-18 15:48:32,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:32,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:32,781 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:32,781 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1297190822] [2020-04-18 15:48:32,782 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1455572043] [2020-04-18 15:48:32,782 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:32,847 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:48:32,847 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:32,848 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:32,849 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:32,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:32,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:32,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:32,883 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:32,888 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:32,893 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:48:32,894 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:32,909 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:48:32,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:32,911 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=774, Invalid=3386, Unknown=0, NotChecked=0, Total=4160 [2020-04-18 15:48:32,911 INFO L87 Difference]: Start difference. First operand 403 states and 735 transitions. Second operand 11 states. [2020-04-18 15:48:33,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:33,340 INFO L93 Difference]: Finished difference Result 406 states and 736 transitions. [2020-04-18 15:48:33,341 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 736 transitions. [2020-04-18 15:48:33,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:33,342 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:48:33,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:33,343 INFO L82 PathProgramCache]: Analyzing trace with hash -1783759286, now seen corresponding path program 9 times [2020-04-18 15:48:33,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:33,343 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533069592] [2020-04-18 15:48:33,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:33,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:33,409 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:33,409 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533069592] [2020-04-18 15:48:33,410 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [595284542] [2020-04-18 15:48:33,410 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:33,479 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:48:33,480 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:33,480 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:33,482 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:33,523 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:48:33,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:33,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:33,524 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:33,525 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:33,529 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:48:33,529 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:33,543 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:48:33,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:33,545 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=4925, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:48:33,545 INFO L87 Difference]: Start difference. First operand 406 states and 736 transitions. Second operand 11 states. [2020-04-18 15:48:34,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:34,095 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:48:34,095 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:48:34,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:34,097 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:48:34,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:34,097 INFO L82 PathProgramCache]: Analyzing trace with hash -1873231848, now seen corresponding path program 10 times [2020-04-18 15:48:34,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:34,098 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768927592] [2020-04-18 15:48:34,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:34,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:34,157 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:34,157 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768927592] [2020-04-18 15:48:34,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:34,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:48:34,158 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:34,159 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:34,162 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:48:34,162 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:34,190 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:34,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:34,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1516, Invalid=7604, Unknown=0, NotChecked=0, Total=9120 [2020-04-18 15:48:34,193 INFO L87 Difference]: Start difference. First operand 441 states and 773 transitions. Second operand 9 states. [2020-04-18 15:48:34,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:34,675 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:48:34,675 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:48:34,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:34,677 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:48:34,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:34,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1867041768, now seen corresponding path program 11 times [2020-04-18 15:48:34,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:34,678 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781953811] [2020-04-18 15:48:34,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:34,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:34,742 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:34,742 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781953811] [2020-04-18 15:48:34,743 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:34,743 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:48:34,743 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:34,744 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:34,748 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:48:34,748 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:34,749 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:34,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:34,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1930, Invalid=10726, Unknown=0, NotChecked=0, Total=12656 [2020-04-18 15:48:34,753 INFO L87 Difference]: Start difference. First operand 441 states and 773 transitions. Second operand 9 states. [2020-04-18 15:48:35,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:35,412 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:48:35,412 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:48:35,414 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:35,415 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [889029618] [2020-04-18 15:48:35,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:35,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:48:35,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [889029618] [2020-04-18 15:48:35,416 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2020-04-18 15:48:35,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:35,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 15:48:35,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2359, Invalid=13897, Unknown=0, NotChecked=0, Total=16256 [2020-04-18 15:48:35,426 INFO L87 Difference]: Start difference. First operand 2150 states and 8243 transitions. Second operand 18 states. [2020-04-18 15:48:36,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:36,989 INFO L93 Difference]: Finished difference Result 8475 states and 24418 transitions. [2020-04-18 15:48:36,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2020-04-18 15:48:36,989 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 21 [2020-04-18 15:48:36,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:37,016 INFO L225 Difference]: With dead ends: 8475 [2020-04-18 15:48:37,016 INFO L226 Difference]: Without dead ends: 8417 [2020-04-18 15:48:37,020 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 536 GetRequests, 370 SyntacticMatches, 0 SemanticMatches, 166 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11609 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=4181, Invalid=23875, Unknown=0, NotChecked=0, Total=28056 [2020-04-18 15:48:37,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8417 states. [2020-04-18 15:48:37,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8417 to 1800. [2020-04-18 15:48:37,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1800 states. [2020-04-18 15:48:37,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1800 states to 1800 states and 6961 transitions. [2020-04-18 15:48:37,153 INFO L78 Accepts]: Start accepts. Automaton has 1800 states and 6961 transitions. Word has length 21 [2020-04-18 15:48:37,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:37,153 INFO L479 AbstractCegarLoop]: Abstraction has 1800 states and 6961 transitions. [2020-04-18 15:48:37,153 INFO L480 AbstractCegarLoop]: Interpolant automaton has 18 states. [2020-04-18 15:48:37,153 INFO L276 IsEmpty]: Start isEmpty. Operand 1800 states and 6961 transitions. [2020-04-18 15:48:37,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:37,155 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:37,155 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:38,164 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:38,165 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:38,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:38,165 INFO L82 PathProgramCache]: Analyzing trace with hash -964809789, now seen corresponding path program 1 times [2020-04-18 15:48:38,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:38,166 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1903270214] [2020-04-18 15:48:38,167 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:38,168 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:48:38,169 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:48:38,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:38,169 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:38,169 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:38,170 INFO L82 PathProgramCache]: Analyzing trace with hash 603296645, now seen corresponding path program 2 times [2020-04-18 15:48:38,170 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:38,170 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [687119586] [2020-04-18 15:48:38,170 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:38,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:38,197 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:48:38,197 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [687119586] [2020-04-18 15:48:38,197 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:38,197 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:38,197 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:38,199 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:38,204 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:48:38,204 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:38,207 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:38,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:38,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:38,208 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:48:38,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:38,210 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:48:38,210 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:48:38,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:38,210 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:38,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:38,210 INFO L82 PathProgramCache]: Analyzing trace with hash -964809789, now seen corresponding path program 3 times [2020-04-18 15:48:38,211 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:38,211 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [131216372] [2020-04-18 15:48:38,211 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:38,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:38,242 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:48:38,242 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [131216372] [2020-04-18 15:48:38,242 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:38,242 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:38,243 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:38,245 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:38,247 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:48:38,247 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:38,255 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:38,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:38,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:38,255 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:48:38,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:38,287 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:48:38,287 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:48:38,287 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:38,287 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1903270214] [2020-04-18 15:48:38,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:38,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:38,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1903270214] [2020-04-18 15:48:38,288 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:38,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:38,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:38,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:38,289 INFO L87 Difference]: Start difference. First operand 1800 states and 6961 transitions. Second operand 5 states. [2020-04-18 15:48:38,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:38,356 INFO L93 Difference]: Finished difference Result 2762 states and 9976 transitions. [2020-04-18 15:48:38,356 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:38,357 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:48:38,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:38,365 INFO L225 Difference]: With dead ends: 2762 [2020-04-18 15:48:38,365 INFO L226 Difference]: Without dead ends: 2746 [2020-04-18 15:48:38,367 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:38,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2746 states. [2020-04-18 15:48:38,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2746 to 1965. [2020-04-18 15:48:38,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1965 states. [2020-04-18 15:48:38,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1965 states to 1965 states and 7429 transitions. [2020-04-18 15:48:38,434 INFO L78 Accepts]: Start accepts. Automaton has 1965 states and 7429 transitions. Word has length 21 [2020-04-18 15:48:38,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:38,434 INFO L479 AbstractCegarLoop]: Abstraction has 1965 states and 7429 transitions. [2020-04-18 15:48:38,434 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:38,434 INFO L276 IsEmpty]: Start isEmpty. Operand 1965 states and 7429 transitions. [2020-04-18 15:48:38,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 15:48:38,437 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:38,437 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:38,437 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:48:38,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:38,438 INFO L82 PathProgramCache]: Analyzing trace with hash 150840888, now seen corresponding path program 1 times [2020-04-18 15:48:38,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:38,439 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [160594108] [2020-04-18 15:48:38,439 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:38,441 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 22 transitions. [2020-04-18 15:48:38,441 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2020-04-18 15:48:38,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 15:48:38,441 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:38,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:38,442 INFO L82 PathProgramCache]: Analyzing trace with hash 150840888, now seen corresponding path program 2 times [2020-04-18 15:48:38,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:38,442 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679913710] [2020-04-18 15:48:38,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:38,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:38,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:48:38,546 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:48:38,546 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:48:38,547 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:48:38,550 WARN L363 ceAbstractionStarter]: 4 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:48:38,550 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 5 thread instances. [2020-04-18 15:48:38,569 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,570 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,571 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,576 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,577 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,581 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,581 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,581 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,583 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,583 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,583 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,583 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,583 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,585 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,586 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,586 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,586 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,587 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,588 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,588 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,588 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,588 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,589 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,590 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,590 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,590 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,590 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,591 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,592 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,592 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,592 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,592 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,593 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,594 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,595 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,596 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,596 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,596 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,596 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,596 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,597 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,597 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,597 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,598 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,598 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,598 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,599 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,600 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,600 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,601 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,601 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,601 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,601 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,601 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,602 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,603 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:48:38,605 INFO L251 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2020-04-18 15:48:38,605 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:48:38,605 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:48:38,605 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:48:38,605 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:48:38,605 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:48:38,605 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:48:38,605 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:48:38,605 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:48:38,608 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 139 places, 123 transitions, 336 flow [2020-04-18 15:48:38,608 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 139 places, 123 transitions, 336 flow [2020-04-18 15:48:38,633 INFO L129 PetriNetUnfolder]: 7/149 cut-off events. [2020-04-18 15:48:38,633 INFO L130 PetriNetUnfolder]: For 30/30 co-relation queries the response was YES. [2020-04-18 15:48:38,635 INFO L80 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 149 events. 7/149 cut-off events. For 30/30 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 256 event pairs, 0 based on Foata normal form. 0/135 useless extension candidates. Maximal degree in co-relation 176. Up to 12 conditions per place. [2020-04-18 15:48:38,639 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 139 places, 123 transitions, 336 flow [2020-04-18 15:48:38,657 INFO L129 PetriNetUnfolder]: 7/149 cut-off events. [2020-04-18 15:48:38,658 INFO L130 PetriNetUnfolder]: For 30/30 co-relation queries the response was YES. [2020-04-18 15:48:38,659 INFO L80 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 149 events. 7/149 cut-off events. For 30/30 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 256 event pairs, 0 based on Foata normal form. 0/135 useless extension candidates. Maximal degree in co-relation 176. Up to 12 conditions per place. [2020-04-18 15:48:38,663 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 2860 [2020-04-18 15:48:38,664 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:48:40,498 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:48:40,563 INFO L206 etLargeBlockEncoding]: Checked pairs total: 3096 [2020-04-18 15:48:40,563 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2020-04-18 15:48:40,564 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 61 places, 39 transitions, 168 flow [2020-04-18 15:48:40,889 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 6191 states. [2020-04-18 15:48:40,890 INFO L276 IsEmpty]: Start isEmpty. Operand 6191 states. [2020-04-18 15:48:40,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:40,890 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:40,890 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:48:40,890 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:40,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:40,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1011964, now seen corresponding path program 1 times [2020-04-18 15:48:40,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:40,891 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [30123083] [2020-04-18 15:48:40,891 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:40,891 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:40,891 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:48:40,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:48:40,892 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:40,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:40,892 INFO L82 PathProgramCache]: Analyzing trace with hash 1011964, now seen corresponding path program 2 times [2020-04-18 15:48:40,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:40,892 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382622742] [2020-04-18 15:48:40,892 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:40,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:40,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:40,907 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382622742] [2020-04-18 15:48:40,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:40,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:48:40,907 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:40,907 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:40,908 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:48:40,908 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:40,910 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:40,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:40,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:40,911 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:48:40,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:40,911 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:48:40,911 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:48:40,911 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:40,912 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [30123083] [2020-04-18 15:48:40,912 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:40,912 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:48:40,912 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [30123083] [2020-04-18 15:48:40,912 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:48:40,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:40,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:40,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:40,913 INFO L87 Difference]: Start difference. First operand 6191 states. Second operand 3 states. [2020-04-18 15:48:41,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,041 INFO L93 Difference]: Finished difference Result 5844 states and 26316 transitions. [2020-04-18 15:48:41,042 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:48:41,042 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:48:41,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:41,056 INFO L225 Difference]: With dead ends: 5844 [2020-04-18 15:48:41,056 INFO L226 Difference]: Without dead ends: 5479 [2020-04-18 15:48:41,056 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:41,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5479 states. [2020-04-18 15:48:41,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5479 to 5479. [2020-04-18 15:48:41,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5479 states. [2020-04-18 15:48:41,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5479 states to 5479 states and 24493 transitions. [2020-04-18 15:48:41,230 INFO L78 Accepts]: Start accepts. Automaton has 5479 states and 24493 transitions. Word has length 3 [2020-04-18 15:48:41,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:41,230 INFO L479 AbstractCegarLoop]: Abstraction has 5479 states and 24493 transitions. [2020-04-18 15:48:41,230 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:48:41,230 INFO L276 IsEmpty]: Start isEmpty. Operand 5479 states and 24493 transitions. [2020-04-18 15:48:41,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:41,231 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:41,231 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:41,231 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:41,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1084774388, now seen corresponding path program 1 times [2020-04-18 15:48:41,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:41,232 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [627293357] [2020-04-18 15:48:41,232 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,232 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:48:41,232 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:48:41,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:41,232 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:41,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1529479740, now seen corresponding path program 2 times [2020-04-18 15:48:41,233 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:41,233 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276320667] [2020-04-18 15:48:41,233 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:41,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:41,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:41,253 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276320667] [2020-04-18 15:48:41,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:41,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:41,254 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:41,255 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,255 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:48:41,255 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:41,258 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:41,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:41,258 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:41,259 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:48:41,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,261 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:41,261 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:41,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:48:41,261 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:41,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,262 INFO L82 PathProgramCache]: Analyzing trace with hash 1084774388, now seen corresponding path program 3 times [2020-04-18 15:48:41,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:41,262 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916473092] [2020-04-18 15:48:41,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:41,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:41,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:41,285 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916473092] [2020-04-18 15:48:41,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:41,286 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:41,286 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:41,286 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,287 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:48:41,287 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:41,295 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:41,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:41,296 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:41,296 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:48:41,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,312 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:48:41,312 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:48:41,312 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:41,313 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [627293357] [2020-04-18 15:48:41,313 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:41,313 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:41,313 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [627293357] [2020-04-18 15:48:41,313 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:41,313 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:41,314 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:41,314 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:41,314 INFO L87 Difference]: Start difference. First operand 5479 states and 24493 transitions. Second operand 5 states. [2020-04-18 15:48:41,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,426 INFO L93 Difference]: Finished difference Result 9673 states and 40333 transitions. [2020-04-18 15:48:41,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:41,426 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:48:41,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:41,457 INFO L225 Difference]: With dead ends: 9673 [2020-04-18 15:48:41,457 INFO L226 Difference]: Without dead ends: 9666 [2020-04-18 15:48:41,459 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:41,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9666 states. [2020-04-18 15:48:41,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9666 to 6331. [2020-04-18 15:48:41,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6331 states. [2020-04-18 15:48:41,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6331 states to 6331 states and 28544 transitions. [2020-04-18 15:48:41,733 INFO L78 Accepts]: Start accepts. Automaton has 6331 states and 28544 transitions. Word has length 9 [2020-04-18 15:48:41,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:41,733 INFO L479 AbstractCegarLoop]: Abstraction has 6331 states and 28544 transitions. [2020-04-18 15:48:41,733 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:41,733 INFO L276 IsEmpty]: Start isEmpty. Operand 6331 states and 28544 transitions. [2020-04-18 15:48:41,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:41,734 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:41,734 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:41,734 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:41,734 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,735 INFO L82 PathProgramCache]: Analyzing trace with hash 2112403116, now seen corresponding path program 1 times [2020-04-18 15:48:41,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:41,735 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1159016411] [2020-04-18 15:48:41,735 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,736 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:48:41,736 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:48:41,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:41,736 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:41,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,737 INFO L82 PathProgramCache]: Analyzing trace with hash -372579188, now seen corresponding path program 2 times [2020-04-18 15:48:41,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:41,737 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171707596] [2020-04-18 15:48:41,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:41,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:41,761 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:41,761 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171707596] [2020-04-18 15:48:41,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:41,761 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:41,762 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:41,762 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,764 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:48:41,764 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:41,767 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:41,767 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:41,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:41,767 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:48:41,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,770 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:41,770 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:41,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:48:41,771 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:41,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:41,771 INFO L82 PathProgramCache]: Analyzing trace with hash 2112403116, now seen corresponding path program 3 times [2020-04-18 15:48:41,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:41,771 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047638376] [2020-04-18 15:48:41,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:41,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:41,794 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:41,794 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1047638376] [2020-04-18 15:48:41,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:41,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:41,795 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:41,795 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:41,796 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:48:41,797 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:41,805 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:41,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:41,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:41,806 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:48:41,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,820 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:48:41,820 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:48:41,820 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:41,821 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1159016411] [2020-04-18 15:48:41,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:41,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:41,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1159016411] [2020-04-18 15:48:41,822 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:41,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:41,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:41,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:41,822 INFO L87 Difference]: Start difference. First operand 6331 states and 28544 transitions. Second operand 5 states. [2020-04-18 15:48:41,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:41,926 INFO L93 Difference]: Finished difference Result 11081 states and 46826 transitions. [2020-04-18 15:48:41,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:41,927 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:48:41,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:41,953 INFO L225 Difference]: With dead ends: 11081 [2020-04-18 15:48:41,953 INFO L226 Difference]: Without dead ends: 11068 [2020-04-18 15:48:41,954 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:42,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11068 states. [2020-04-18 15:48:42,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11068 to 7391. [2020-04-18 15:48:42,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7391 states. [2020-04-18 15:48:42,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7391 states to 7391 states and 33694 transitions. [2020-04-18 15:48:42,935 INFO L78 Accepts]: Start accepts. Automaton has 7391 states and 33694 transitions. Word has length 13 [2020-04-18 15:48:42,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:42,936 INFO L479 AbstractCegarLoop]: Abstraction has 7391 states and 33694 transitions. [2020-04-18 15:48:42,936 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:42,936 INFO L276 IsEmpty]: Start isEmpty. Operand 7391 states and 33694 transitions. [2020-04-18 15:48:42,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:42,939 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:42,939 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:42,940 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:42,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:42,940 INFO L82 PathProgramCache]: Analyzing trace with hash -28983895, now seen corresponding path program 1 times [2020-04-18 15:48:42,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:42,941 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1510979273] [2020-04-18 15:48:42,941 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:42,943 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:48:42,943 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:48:42,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:42,944 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:42,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:42,945 INFO L82 PathProgramCache]: Analyzing trace with hash 975024175, now seen corresponding path program 2 times [2020-04-18 15:48:42,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:42,945 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [496649463] [2020-04-18 15:48:42,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:42,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:42,959 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:42,959 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [496649463] [2020-04-18 15:48:42,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:42,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:42,960 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:42,962 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:42,967 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:48:42,967 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:42,972 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:42,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:42,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:42,973 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:48:42,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:42,986 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:48:42,987 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:48:42,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:42,987 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:42,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:42,988 INFO L82 PathProgramCache]: Analyzing trace with hash 208643679, now seen corresponding path program 3 times [2020-04-18 15:48:42,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:42,988 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388988490] [2020-04-18 15:48:42,989 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:42,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:43,011 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:43,012 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388988490] [2020-04-18 15:48:43,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:43,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:43,013 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:43,014 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:43,016 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:48:43,017 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:43,025 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:43,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:43,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:43,026 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:48:43,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:43,058 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:48:43,058 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:48:43,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:43,058 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:43,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:43,059 INFO L82 PathProgramCache]: Analyzing trace with hash -28983895, now seen corresponding path program 4 times [2020-04-18 15:48:43,059 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:43,059 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717954092] [2020-04-18 15:48:43,059 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:43,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:43,092 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:43,093 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1717954092] [2020-04-18 15:48:43,093 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [356064395] [2020-04-18 15:48:43,093 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:43,166 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:43,167 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:43,168 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:43,168 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:43,187 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:43,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:43,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:43,189 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:43,190 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:43,192 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:48:43,192 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:43,213 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:43,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:43,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:43,214 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:48:43,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:43,302 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:48:43,302 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:48:43,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:48:43,303 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:43,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:43,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1500121559, now seen corresponding path program 5 times [2020-04-18 15:48:43,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:43,304 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1373460100] [2020-04-18 15:48:43,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:43,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:43,362 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:43,363 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1373460100] [2020-04-18 15:48:43,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:43,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:43,363 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:43,364 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:43,366 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:48:43,366 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:43,386 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:43,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:43,387 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:43,387 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:48:43,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:43,485 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:48:43,486 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:48:43,486 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:43,486 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1510979273] [2020-04-18 15:48:43,486 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:43,486 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:43,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1510979273] [2020-04-18 15:48:43,487 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:43,487 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:43,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:43,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:43,488 INFO L87 Difference]: Start difference. First operand 7391 states and 33694 transitions. Second operand 11 states. [2020-04-18 15:48:43,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:43,884 INFO L93 Difference]: Finished difference Result 19072 states and 73298 transitions. [2020-04-18 15:48:43,884 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:43,884 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:48:43,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:43,948 INFO L225 Difference]: With dead ends: 19072 [2020-04-18 15:48:43,948 INFO L226 Difference]: Without dead ends: 19045 [2020-04-18 15:48:43,948 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:44,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19045 states. [2020-04-18 15:48:44,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19045 to 7048. [2020-04-18 15:48:44,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7048 states. [2020-04-18 15:48:44,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7048 states to 7048 states and 32136 transitions. [2020-04-18 15:48:44,321 INFO L78 Accepts]: Start accepts. Automaton has 7048 states and 32136 transitions. Word has length 15 [2020-04-18 15:48:44,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:44,321 INFO L479 AbstractCegarLoop]: Abstraction has 7048 states and 32136 transitions. [2020-04-18 15:48:44,321 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:44,321 INFO L276 IsEmpty]: Start isEmpty. Operand 7048 states and 32136 transitions. [2020-04-18 15:48:44,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:44,322 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:44,322 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:44,522 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:44,523 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:44,523 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:44,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1891696605, now seen corresponding path program 1 times [2020-04-18 15:48:44,524 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:44,524 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1997423092] [2020-04-18 15:48:44,525 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:44,526 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:48:44,526 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:48:44,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:44,526 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:44,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:44,527 INFO L82 PathProgramCache]: Analyzing trace with hash 1671417013, now seen corresponding path program 2 times [2020-04-18 15:48:44,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:44,527 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169201878] [2020-04-18 15:48:44,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:44,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:44,541 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:44,542 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169201878] [2020-04-18 15:48:44,542 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:44,542 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:44,543 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:44,544 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:44,546 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:48:44,546 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:44,548 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:44,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:44,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:44,549 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:48:44,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:44,551 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:44,551 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:44,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:48:44,551 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:44,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:44,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1891696605, now seen corresponding path program 3 times [2020-04-18 15:48:44,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:44,552 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2068687977] [2020-04-18 15:48:44,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:44,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:44,581 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:44,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2068687977] [2020-04-18 15:48:44,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:44,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:44,582 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:44,583 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:44,585 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:48:44,586 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:44,595 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:44,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:44,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:44,595 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:48:44,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:44,612 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:48:44,612 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:48:44,612 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:44,613 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1997423092] [2020-04-18 15:48:44,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:44,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:48:44,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1997423092] [2020-04-18 15:48:44,613 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:48:44,614 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:44,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:44,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:44,614 INFO L87 Difference]: Start difference. First operand 7048 states and 32136 transitions. Second operand 5 states. [2020-04-18 15:48:44,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:44,912 INFO L93 Difference]: Finished difference Result 12234 states and 52488 transitions. [2020-04-18 15:48:44,913 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:48:44,913 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:48:44,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:44,961 INFO L225 Difference]: With dead ends: 12234 [2020-04-18 15:48:44,961 INFO L226 Difference]: Without dead ends: 12212 [2020-04-18 15:48:44,961 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:45,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12212 states. [2020-04-18 15:48:45,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12212 to 8342. [2020-04-18 15:48:45,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8342 states. [2020-04-18 15:48:45,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8342 states to 8342 states and 38278 transitions. [2020-04-18 15:48:45,227 INFO L78 Accepts]: Start accepts. Automaton has 8342 states and 38278 transitions. Word has length 17 [2020-04-18 15:48:45,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:45,228 INFO L479 AbstractCegarLoop]: Abstraction has 8342 states and 38278 transitions. [2020-04-18 15:48:45,228 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:48:45,228 INFO L276 IsEmpty]: Start isEmpty. Operand 8342 states and 38278 transitions. [2020-04-18 15:48:45,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:45,228 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:45,228 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:45,229 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:45,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:45,229 INFO L82 PathProgramCache]: Analyzing trace with hash -74039136, now seen corresponding path program 1 times [2020-04-18 15:48:45,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:45,229 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [767720942] [2020-04-18 15:48:45,229 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:45,230 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:48:45,231 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:48:45,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:45,231 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:45,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:45,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1888358104, now seen corresponding path program 2 times [2020-04-18 15:48:45,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:45,232 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937098838] [2020-04-18 15:48:45,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:45,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:45,240 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:45,240 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [937098838] [2020-04-18 15:48:45,240 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:45,240 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:45,241 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:45,242 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:45,247 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 101 transitions. [2020-04-18 15:48:45,247 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:45,249 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:45,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:45,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:45,249 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:48:45,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:45,256 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:48:45,256 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:48:45,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:45,257 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:45,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:45,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1067019528, now seen corresponding path program 3 times [2020-04-18 15:48:45,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:45,258 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048725340] [2020-04-18 15:48:45,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:45,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:45,292 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:45,292 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048725340] [2020-04-18 15:48:45,292 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:45,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:45,293 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:45,294 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:45,299 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 15:48:45,299 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:45,308 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:45,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:45,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:45,309 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:48:45,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:45,337 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:48:45,337 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:48:45,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:45,338 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:45,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:45,338 INFO L82 PathProgramCache]: Analyzing trace with hash -74039136, now seen corresponding path program 4 times [2020-04-18 15:48:45,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:45,338 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628035884] [2020-04-18 15:48:45,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:45,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:45,369 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:45,370 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1628035884] [2020-04-18 15:48:45,370 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1699061373] [2020-04-18 15:48:45,370 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:45,440 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:45,440 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:45,441 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:45,442 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:45,461 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:45,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:45,461 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:45,462 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:45,463 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:45,466 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:48:45,466 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:45,501 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:45,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:45,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:45,502 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 9 states. [2020-04-18 15:48:45,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:45,586 INFO L93 Difference]: Finished difference Result 97 states and 168 transitions. [2020-04-18 15:48:45,586 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 168 transitions. [2020-04-18 15:48:45,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:45,587 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:45,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:45,587 INFO L82 PathProgramCache]: Analyzing trace with hash -1149256224, now seen corresponding path program 5 times [2020-04-18 15:48:45,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:45,587 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055843529] [2020-04-18 15:48:45,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:45,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:45,628 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:45,629 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2055843529] [2020-04-18 15:48:45,629 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:45,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:45,629 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:45,630 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:45,632 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:48:45,632 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:45,645 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:45,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:45,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:45,645 INFO L87 Difference]: Start difference. First operand 97 states and 168 transitions. Second operand 7 states. [2020-04-18 15:48:45,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:45,743 INFO L93 Difference]: Finished difference Result 100 states and 171 transitions. [2020-04-18 15:48:45,743 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 171 transitions. [2020-04-18 15:48:45,744 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:45,744 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [767720942] [2020-04-18 15:48:45,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:45,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:45,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [767720942] [2020-04-18 15:48:45,745 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:48:45,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:45,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:45,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:48:45,746 INFO L87 Difference]: Start difference. First operand 8342 states and 38278 transitions. Second operand 11 states. [2020-04-18 15:48:46,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:46,121 INFO L93 Difference]: Finished difference Result 21543 states and 84183 transitions. [2020-04-18 15:48:46,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:48:46,122 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:48:46,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:46,171 INFO L225 Difference]: With dead ends: 21543 [2020-04-18 15:48:46,171 INFO L226 Difference]: Without dead ends: 21500 [2020-04-18 15:48:46,171 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:48:46,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21500 states. [2020-04-18 15:48:47,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21500 to 8129. [2020-04-18 15:48:47,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8129 states. [2020-04-18 15:48:47,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8129 states to 8129 states and 37298 transitions. [2020-04-18 15:48:47,304 INFO L78 Accepts]: Start accepts. Automaton has 8129 states and 37298 transitions. Word has length 19 [2020-04-18 15:48:47,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:47,305 INFO L479 AbstractCegarLoop]: Abstraction has 8129 states and 37298 transitions. [2020-04-18 15:48:47,305 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:48:47,305 INFO L276 IsEmpty]: Start isEmpty. Operand 8129 states and 37298 transitions. [2020-04-18 15:48:47,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:47,305 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:47,306 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:47,506 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:47,507 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:47,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:47,507 INFO L82 PathProgramCache]: Analyzing trace with hash -274460668, now seen corresponding path program 1 times [2020-04-18 15:48:47,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:47,508 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [564149698] [2020-04-18 15:48:47,509 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:47,510 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:48:47,511 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:48:47,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:47,511 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:47,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:47,512 INFO L82 PathProgramCache]: Analyzing trace with hash 496442822, now seen corresponding path program 2 times [2020-04-18 15:48:47,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:47,512 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366162586] [2020-04-18 15:48:47,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:47,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:47,534 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:47,535 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366162586] [2020-04-18 15:48:47,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:47,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:47,535 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:47,539 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:47,544 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 74 transitions. [2020-04-18 15:48:47,544 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:47,552 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:47,552 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:47,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:47,552 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:48:47,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:47,560 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:48:47,560 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:48:47,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:47,560 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:47,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:47,561 INFO L82 PathProgramCache]: Analyzing trace with hash -273739378, now seen corresponding path program 3 times [2020-04-18 15:48:47,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:47,561 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187017059] [2020-04-18 15:48:47,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:47,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:47,584 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:47,584 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187017059] [2020-04-18 15:48:47,584 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [147514252] [2020-04-18 15:48:47,584 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:47,659 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:48:47,660 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:47,660 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:48:47,661 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:47,673 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:47,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:47,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2020-04-18 15:48:47,674 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:47,675 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:47,677 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 32 transitions. [2020-04-18 15:48:47,677 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:47,692 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:47,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:47,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:48:47,692 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 7 states. [2020-04-18 15:48:47,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:47,738 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:48:47,738 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:48:47,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:47,738 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:47,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:47,739 INFO L82 PathProgramCache]: Analyzing trace with hash -273739918, now seen corresponding path program 4 times [2020-04-18 15:48:47,739 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:47,739 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1759713637] [2020-04-18 15:48:47,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:47,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:47,784 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:47,784 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1759713637] [2020-04-18 15:48:47,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:47,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:48:47,785 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:47,786 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:47,790 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 32 transitions. [2020-04-18 15:48:47,790 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:47,802 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:48:47,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:47,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:48:47,803 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 5 states. [2020-04-18 15:48:47,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:47,836 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:48:47,837 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:48:47,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:47,837 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:47,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:47,838 INFO L82 PathProgramCache]: Analyzing trace with hash -274460668, now seen corresponding path program 5 times [2020-04-18 15:48:47,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:47,838 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242013934] [2020-04-18 15:48:47,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:47,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:47,883 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:47,884 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242013934] [2020-04-18 15:48:47,884 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1658558136] [2020-04-18 15:48:47,884 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:47,996 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:48:47,996 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:47,997 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:47,998 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:48,036 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:48,036 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:48,036 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:48,037 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:48,039 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:48,045 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:48:48,045 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:48,099 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:48:48,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:48,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:48:48,100 INFO L87 Difference]: Start difference. First operand 83 states and 128 transitions. Second operand 11 states. [2020-04-18 15:48:48,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:48,212 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:48:48,212 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:48:48,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:48:48,213 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:48:48,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:48,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1149271290, now seen corresponding path program 6 times [2020-04-18 15:48:48,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:48,213 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456771780] [2020-04-18 15:48:48,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:48,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:48,276 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:48,276 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456771780] [2020-04-18 15:48:48,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:48,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:48:48,277 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:48,278 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:48,281 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:48:48,281 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:48,291 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:48,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:48,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:48:48,292 INFO L87 Difference]: Start difference. First operand 83 states and 128 transitions. Second operand 7 states. [2020-04-18 15:48:48,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:48,367 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:48:48,367 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:48:48,368 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:48,368 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [564149698] [2020-04-18 15:48:48,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:48,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:48:48,369 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [564149698] [2020-04-18 15:48:48,369 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:48:48,369 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:48,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:48:48,369 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=505, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:48:48,369 INFO L87 Difference]: Start difference. First operand 8129 states and 37298 transitions. Second operand 13 states. [2020-04-18 15:48:48,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:48,945 INFO L93 Difference]: Finished difference Result 23663 states and 90455 transitions. [2020-04-18 15:48:48,945 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:48:48,946 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2020-04-18 15:48:48,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:48:48,996 INFO L225 Difference]: With dead ends: 23663 [2020-04-18 15:48:48,996 INFO L226 Difference]: Without dead ends: 23589 [2020-04-18 15:48:48,996 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 408 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=383, Invalid=1099, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:48:49,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23589 states. [2020-04-18 15:48:49,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23589 to 8317. [2020-04-18 15:48:49,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8317 states. [2020-04-18 15:48:49,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8317 states to 8317 states and 38184 transitions. [2020-04-18 15:48:49,501 INFO L78 Accepts]: Start accepts. Automaton has 8317 states and 38184 transitions. Word has length 19 [2020-04-18 15:48:49,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:48:49,502 INFO L479 AbstractCegarLoop]: Abstraction has 8317 states and 38184 transitions. [2020-04-18 15:48:49,502 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:48:49,502 INFO L276 IsEmpty]: Start isEmpty. Operand 8317 states and 38184 transitions. [2020-04-18 15:48:49,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:49,503 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:48:49,503 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:48:49,903 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true,13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:49,904 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:48:49,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:49,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1557322431, now seen corresponding path program 1 times [2020-04-18 15:48:49,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:48:49,905 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [339950868] [2020-04-18 15:48:49,907 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:49,909 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:48:49,910 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:48:49,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:49,910 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:48:49,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:49,911 INFO L82 PathProgramCache]: Analyzing trace with hash -1963684983, now seen corresponding path program 2 times [2020-04-18 15:48:49,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:49,911 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118448428] [2020-04-18 15:48:49,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:49,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:49,921 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:49,921 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118448428] [2020-04-18 15:48:49,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:49,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:48:49,922 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:49,923 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:49,929 INFO L259 McrAutomatonBuilder]: Finished intersection with 65 states and 115 transitions. [2020-04-18 15:48:49,929 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:49,931 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:49,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:48:49,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:48:49,931 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:48:49,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:49,941 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:48:49,941 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:48:49,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:49,942 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:48:49,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:49,942 INFO L82 PathProgramCache]: Analyzing trace with hash -508954823, now seen corresponding path program 3 times [2020-04-18 15:48:49,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:49,942 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038329449] [2020-04-18 15:48:49,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:49,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:49,965 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:49,965 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038329449] [2020-04-18 15:48:49,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:49,966 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:48:49,966 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:49,967 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:49,973 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 100 transitions. [2020-04-18 15:48:49,973 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:49,980 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:49,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:48:49,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:48:49,981 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:48:50,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:50,034 INFO L93 Difference]: Finished difference Result 266 states and 576 transitions. [2020-04-18 15:48:50,035 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 576 transitions. [2020-04-18 15:48:50,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:50,035 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:48:50,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:50,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1556585781, now seen corresponding path program 4 times [2020-04-18 15:48:50,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:50,036 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723734132] [2020-04-18 15:48:50,036 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:50,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:50,074 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:50,075 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723734132] [2020-04-18 15:48:50,075 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1215739800] [2020-04-18 15:48:50,075 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:50,185 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:50,186 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:50,187 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:50,188 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:50,219 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:50,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:50,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:48:50,220 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:50,222 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:50,231 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 66 transitions. [2020-04-18 15:48:50,231 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:50,259 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:50,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:50,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:48:50,260 INFO L87 Difference]: Start difference. First operand 266 states and 576 transitions. Second operand 9 states. [2020-04-18 15:48:50,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:50,452 INFO L93 Difference]: Finished difference Result 308 states and 628 transitions. [2020-04-18 15:48:50,452 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 628 transitions. [2020-04-18 15:48:50,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:50,452 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:48:50,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:50,453 INFO L82 PathProgramCache]: Analyzing trace with hash -1556586801, now seen corresponding path program 5 times [2020-04-18 15:48:50,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:50,453 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019171125] [2020-04-18 15:48:50,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:50,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:50,494 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:50,494 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019171125] [2020-04-18 15:48:50,494 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1155364398] [2020-04-18 15:48:50,494 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:50,563 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:48:50,564 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:50,564 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:50,565 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:50,578 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:50,579 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:50,579 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:50,579 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:50,581 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:50,586 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 66 transitions. [2020-04-18 15:48:50,586 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:50,593 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:50,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:50,594 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:48:50,594 INFO L87 Difference]: Start difference. First operand 308 states and 628 transitions. Second operand 9 states. [2020-04-18 15:48:50,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:50,792 INFO L93 Difference]: Finished difference Result 361 states and 682 transitions. [2020-04-18 15:48:50,792 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 682 transitions. [2020-04-18 15:48:50,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:50,793 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:48:50,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:50,793 INFO L82 PathProgramCache]: Analyzing trace with hash -1557322431, now seen corresponding path program 6 times [2020-04-18 15:48:50,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:50,794 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715876670] [2020-04-18 15:48:50,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:50,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:50,846 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:50,846 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715876670] [2020-04-18 15:48:50,846 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [68392071] [2020-04-18 15:48:50,846 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:50,921 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:48:50,921 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:50,922 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:50,923 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:50,956 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:48:50,956 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:50,956 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:50,956 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:50,958 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:50,965 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:48:50,965 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:51,010 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:48:51,011 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:48:51,011 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=549, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:48:51,011 INFO L87 Difference]: Start difference. First operand 361 states and 682 transitions. Second operand 13 states. [2020-04-18 15:48:51,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:51,511 INFO L93 Difference]: Finished difference Result 368 states and 687 transitions. [2020-04-18 15:48:51,511 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 687 transitions. [2020-04-18 15:48:51,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:51,512 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:48:51,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:51,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1862834243, now seen corresponding path program 7 times [2020-04-18 15:48:51,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:51,513 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642823719] [2020-04-18 15:48:51,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:51,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:51,560 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:51,561 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642823719] [2020-04-18 15:48:51,561 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1642931541] [2020-04-18 15:48:51,561 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:51,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:51,633 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:51,633 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:51,654 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:48:51,655 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:51,655 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:51,656 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:51,657 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:51,662 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:48:51,662 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:51,671 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:51,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:48:51,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1371, Unknown=0, NotChecked=0, Total=1806 [2020-04-18 15:48:51,672 INFO L87 Difference]: Start difference. First operand 368 states and 687 transitions. Second operand 11 states. [2020-04-18 15:48:52,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:52,155 INFO L93 Difference]: Finished difference Result 375 states and 692 transitions. [2020-04-18 15:48:52,155 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 692 transitions. [2020-04-18 15:48:52,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:52,156 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:48:52,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:52,156 INFO L82 PathProgramCache]: Analyzing trace with hash -1056201999, now seen corresponding path program 8 times [2020-04-18 15:48:52,157 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:52,158 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1370999171] [2020-04-18 15:48:52,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:52,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:52,223 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:52,223 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1370999171] [2020-04-18 15:48:52,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:52,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:48:52,224 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:52,227 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:52,233 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 37 transitions. [2020-04-18 15:48:52,234 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:52,267 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:48:52,267 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:48:52,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=728, Invalid=2694, Unknown=0, NotChecked=0, Total=3422 [2020-04-18 15:48:52,268 INFO L87 Difference]: Start difference. First operand 375 states and 692 transitions. Second operand 7 states. [2020-04-18 15:48:52,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:52,482 INFO L93 Difference]: Finished difference Result 411 states and 727 transitions. [2020-04-18 15:48:52,482 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 727 transitions. [2020-04-18 15:48:52,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:52,483 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:48:52,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:52,484 INFO L82 PathProgramCache]: Analyzing trace with hash -1056741489, now seen corresponding path program 9 times [2020-04-18 15:48:52,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:52,484 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [122726250] [2020-04-18 15:48:52,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:52,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:52,541 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:52,541 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [122726250] [2020-04-18 15:48:52,541 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [558036047] [2020-04-18 15:48:52,542 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:52,633 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:48:52,633 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:52,634 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:48:52,635 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:52,654 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:52,655 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:52,655 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:48:52,656 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:52,783 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:52,787 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 37 transitions. [2020-04-18 15:48:52,787 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:52,818 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:48:52,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:52,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=870, Invalid=3822, Unknown=0, NotChecked=0, Total=4692 [2020-04-18 15:48:52,819 INFO L87 Difference]: Start difference. First operand 411 states and 727 transitions. Second operand 9 states. [2020-04-18 15:48:53,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:53,097 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:48:53,097 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:48:53,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:53,098 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:48:53,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:53,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1769991039, now seen corresponding path program 10 times [2020-04-18 15:48:53,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:53,099 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [280960505] [2020-04-18 15:48:53,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:53,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:53,181 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:53,181 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [280960505] [2020-04-18 15:48:53,182 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1162972374] [2020-04-18 15:48:53,182 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:53,290 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:48:53,290 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:53,291 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:53,292 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:53,312 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:53,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:53,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:53,313 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:53,318 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:53,328 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:48:53,329 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:53,432 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:48:53,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:48:53,433 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1121, Invalid=5041, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:48:53,433 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 17 states. [2020-04-18 15:48:54,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:54,135 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:48:54,135 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:48:54,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:54,136 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:48:54,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:54,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1763681919, now seen corresponding path program 11 times [2020-04-18 15:48:54,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:54,136 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488641769] [2020-04-18 15:48:54,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:54,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:54,204 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:54,205 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488641769] [2020-04-18 15:48:54,205 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [327139089] [2020-04-18 15:48:54,205 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:48:54,278 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:48:54,278 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:48:54,279 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:48:54,280 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:48:54,296 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:48:54,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:48:54,297 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:48:54,297 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:54,298 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:54,301 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:48:54,301 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:54,317 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:48:54,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:48:54,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=6887, Unknown=0, NotChecked=0, Total=8372 [2020-04-18 15:48:54,318 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 13 states. [2020-04-18 15:48:55,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:55,035 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:48:55,035 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:48:55,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:55,036 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:48:55,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:55,036 INFO L82 PathProgramCache]: Analyzing trace with hash -628636285, now seen corresponding path program 12 times [2020-04-18 15:48:55,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:55,037 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292780070] [2020-04-18 15:48:55,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:55,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:55,081 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:55,082 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292780070] [2020-04-18 15:48:55,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:55,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:48:55,082 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:55,084 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:55,087 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:48:55,087 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:55,087 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:55,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:55,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1970, Invalid=9802, Unknown=0, NotChecked=0, Total=11772 [2020-04-18 15:48:55,089 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 9 states. [2020-04-18 15:48:55,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:55,518 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:48:55,518 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:48:55,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:48:55,519 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:48:55,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:48:55,519 INFO L82 PathProgramCache]: Analyzing trace with hash -643099645, now seen corresponding path program 13 times [2020-04-18 15:48:55,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:48:55,520 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422517406] [2020-04-18 15:48:55,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:48:55,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:48:55,563 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:48:55,563 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422517406] [2020-04-18 15:48:55,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:48:55,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:48:55,564 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:48:55,565 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:48:55,568 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:48:55,568 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:48:55,569 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:48:55,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:48:55,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2330, Invalid=12190, Unknown=0, NotChecked=0, Total=14520 [2020-04-18 15:48:55,570 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 9 states. [2020-04-18 15:48:56,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:48:56,043 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:48:56,043 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:48:56,044 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:48:56,045 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [339950868] [2020-04-18 15:48:56,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:48:56,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:48:56,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [339950868] [2020-04-18 15:48:56,045 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2020-04-18 15:48:56,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:48:56,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-04-18 15:48:56,047 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2794, Invalid=15566, Unknown=0, NotChecked=0, Total=18360 [2020-04-18 15:48:56,047 INFO L87 Difference]: Start difference. First operand 8317 states and 38184 transitions. Second operand 24 states. [2020-04-18 15:49:00,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:00,390 INFO L93 Difference]: Finished difference Result 44264 states and 150047 transitions. [2020-04-18 15:49:00,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:49:00,390 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 21 [2020-04-18 15:49:00,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:00,484 INFO L225 Difference]: With dead ends: 44264 [2020-04-18 15:49:00,485 INFO L226 Difference]: Without dead ends: 44119 [2020-04-18 15:49:00,488 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 713 GetRequests, 465 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26620 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=8309, Invalid=53941, Unknown=0, NotChecked=0, Total=62250 [2020-04-18 15:49:00,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44119 states. [2020-04-18 15:49:01,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44119 to 7221. [2020-04-18 15:49:01,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7221 states. [2020-04-18 15:49:01,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7221 states to 7221 states and 33268 transitions. [2020-04-18 15:49:01,262 INFO L78 Accepts]: Start accepts. Automaton has 7221 states and 33268 transitions. Word has length 21 [2020-04-18 15:49:01,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:01,262 INFO L479 AbstractCegarLoop]: Abstraction has 7221 states and 33268 transitions. [2020-04-18 15:49:01,262 INFO L480 AbstractCegarLoop]: Interpolant automaton has 24 states. [2020-04-18 15:49:01,262 INFO L276 IsEmpty]: Start isEmpty. Operand 7221 states and 33268 transitions. [2020-04-18 15:49:01,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:01,263 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:01,263 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:02,666 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 z3 -smt2 -in SMTLIB2_COMPLIANT=true,19 z3 -smt2 -in SMTLIB2_COMPLIANT=true,18 z3 -smt2 -in SMTLIB2_COMPLIANT=true,16 z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 z3 -smt2 -in SMTLIB2_COMPLIANT=true,15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:02,667 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:02,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:02,668 INFO L82 PathProgramCache]: Analyzing trace with hash 1774143127, now seen corresponding path program 1 times [2020-04-18 15:49:02,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:02,669 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1072087250] [2020-04-18 15:49:02,670 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:02,671 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:49:02,671 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:49:02,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:02,671 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:02,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:02,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1956013121, now seen corresponding path program 2 times [2020-04-18 15:49:02,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:02,672 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815534083] [2020-04-18 15:49:02,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:02,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:02,681 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:02,681 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815534083] [2020-04-18 15:49:02,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:02,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:02,682 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:02,683 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:02,686 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:49:02,686 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:02,689 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:02,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:02,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:02,689 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:49:02,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:02,692 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:02,692 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:02,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:02,692 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:02,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:02,692 INFO L82 PathProgramCache]: Analyzing trace with hash 1774143127, now seen corresponding path program 3 times [2020-04-18 15:49:02,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:02,692 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210148053] [2020-04-18 15:49:02,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:02,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:02,712 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:02,712 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210148053] [2020-04-18 15:49:02,712 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:02,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:02,713 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:02,715 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:02,717 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:02,717 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:02,732 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:02,732 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:02,732 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:02,732 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:49:02,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:02,746 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:02,746 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:02,746 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:02,746 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1072087250] [2020-04-18 15:49:02,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:02,747 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:02,747 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1072087250] [2020-04-18 15:49:02,747 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:02,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:02,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:02,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:02,747 INFO L87 Difference]: Start difference. First operand 7221 states and 33268 transitions. Second operand 5 states. [2020-04-18 15:49:02,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:02,851 INFO L93 Difference]: Finished difference Result 12418 states and 54012 transitions. [2020-04-18 15:49:02,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:02,851 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:49:02,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:02,879 INFO L225 Difference]: With dead ends: 12418 [2020-04-18 15:49:02,879 INFO L226 Difference]: Without dead ends: 12387 [2020-04-18 15:49:02,879 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:02,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12387 states. [2020-04-18 15:49:03,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12387 to 8573. [2020-04-18 15:49:03,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8573 states. [2020-04-18 15:49:03,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8573 states to 8573 states and 39353 transitions. [2020-04-18 15:49:03,118 INFO L78 Accepts]: Start accepts. Automaton has 8573 states and 39353 transitions. Word has length 21 [2020-04-18 15:49:03,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:03,119 INFO L479 AbstractCegarLoop]: Abstraction has 8573 states and 39353 transitions. [2020-04-18 15:49:03,119 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:03,119 INFO L276 IsEmpty]: Start isEmpty. Operand 8573 states and 39353 transitions. [2020-04-18 15:49:03,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:03,120 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:03,120 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:03,120 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:03,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:03,120 INFO L82 PathProgramCache]: Analyzing trace with hash 1599602836, now seen corresponding path program 1 times [2020-04-18 15:49:03,121 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:03,121 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1158750189] [2020-04-18 15:49:03,121 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:03,124 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 203 transitions. [2020-04-18 15:49:03,124 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states. [2020-04-18 15:49:03,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:03,125 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:03,125 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:03,125 INFO L82 PathProgramCache]: Analyzing trace with hash -25109276, now seen corresponding path program 2 times [2020-04-18 15:49:03,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:03,125 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763117448] [2020-04-18 15:49:03,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:03,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:03,132 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:03,133 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763117448] [2020-04-18 15:49:03,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:03,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:03,133 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:03,134 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:03,141 INFO L259 McrAutomatonBuilder]: Finished intersection with 77 states and 141 transitions. [2020-04-18 15:49:03,142 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:03,144 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:03,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:03,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:03,144 INFO L87 Difference]: Start difference. First operand 100 states. Second operand 3 states. [2020-04-18 15:49:03,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:03,150 INFO L93 Difference]: Finished difference Result 117 states and 219 transitions. [2020-04-18 15:49:03,151 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 219 transitions. [2020-04-18 15:49:03,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:03,151 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:03,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:03,151 INFO L82 PathProgramCache]: Analyzing trace with hash 2136056596, now seen corresponding path program 3 times [2020-04-18 15:49:03,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:03,152 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938815482] [2020-04-18 15:49:03,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:03,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:03,174 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:03,175 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938815482] [2020-04-18 15:49:03,175 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:03,175 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:03,176 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:03,178 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:03,184 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 97 transitions. [2020-04-18 15:49:03,184 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:03,192 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:03,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:03,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:03,192 INFO L87 Difference]: Start difference. First operand 117 states and 219 transitions. Second operand 5 states. [2020-04-18 15:49:03,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:03,221 INFO L93 Difference]: Finished difference Result 124 states and 224 transitions. [2020-04-18 15:49:03,221 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 224 transitions. [2020-04-18 15:49:03,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:03,222 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:03,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:03,222 INFO L82 PathProgramCache]: Analyzing trace with hash 1599602836, now seen corresponding path program 4 times [2020-04-18 15:49:03,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:03,223 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653289092] [2020-04-18 15:49:03,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:03,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:03,257 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:03,258 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653289092] [2020-04-18 15:49:03,258 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1711433252] [2020-04-18 15:49:03,258 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:03,341 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:03,342 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:03,342 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:03,343 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:03,368 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:03,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:03,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:03,369 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:03,370 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:03,376 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 71 transitions. [2020-04-18 15:49:03,376 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:03,397 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:03,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:03,398 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:03,398 INFO L87 Difference]: Start difference. First operand 124 states and 224 transitions. Second operand 9 states. [2020-04-18 15:49:03,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:03,482 INFO L93 Difference]: Finished difference Result 125 states and 224 transitions. [2020-04-18 15:49:03,482 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 224 transitions. [2020-04-18 15:49:03,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:03,483 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:03,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:03,483 INFO L82 PathProgramCache]: Analyzing trace with hash -150456492, now seen corresponding path program 5 times [2020-04-18 15:49:03,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:03,484 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627545921] [2020-04-18 15:49:03,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:03,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:03,534 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:03,534 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627545921] [2020-04-18 15:49:03,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:03,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:03,535 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:03,536 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:03,540 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:49:03,541 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:03,558 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:03,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:03,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:03,559 INFO L87 Difference]: Start difference. First operand 125 states and 224 transitions. Second operand 7 states. [2020-04-18 15:49:03,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:03,687 INFO L93 Difference]: Finished difference Result 128 states and 227 transitions. [2020-04-18 15:49:03,688 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 227 transitions. [2020-04-18 15:49:03,688 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:03,689 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1158750189] [2020-04-18 15:49:03,689 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:03,689 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:03,689 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1158750189] [2020-04-18 15:49:03,689 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:03,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:03,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:03,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:03,690 INFO L87 Difference]: Start difference. First operand 8573 states and 39353 transitions. Second operand 11 states. [2020-04-18 15:49:04,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:04,076 INFO L93 Difference]: Finished difference Result 22356 states and 88808 transitions. [2020-04-18 15:49:04,077 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:04,077 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2020-04-18 15:49:04,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:04,131 INFO L225 Difference]: With dead ends: 22356 [2020-04-18 15:49:04,131 INFO L226 Difference]: Without dead ends: 22295 [2020-04-18 15:49:04,132 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:04,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22295 states. [2020-04-18 15:49:04,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22295 to 8496. [2020-04-18 15:49:04,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8496 states. [2020-04-18 15:49:04,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8496 states to 8496 states and 38896 transitions. [2020-04-18 15:49:04,758 INFO L78 Accepts]: Start accepts. Automaton has 8496 states and 38896 transitions. Word has length 23 [2020-04-18 15:49:04,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:04,758 INFO L479 AbstractCegarLoop]: Abstraction has 8496 states and 38896 transitions. [2020-04-18 15:49:04,758 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:04,758 INFO L276 IsEmpty]: Start isEmpty. Operand 8496 states and 38896 transitions. [2020-04-18 15:49:04,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:04,760 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:04,760 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:04,960 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:04,961 INFO L427 AbstractCegarLoop]: === Iteration 11 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:04,962 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:04,962 INFO L82 PathProgramCache]: Analyzing trace with hash 72758744, now seen corresponding path program 1 times [2020-04-18 15:49:04,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:04,963 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [565122678] [2020-04-18 15:49:04,964 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:04,967 INFO L259 McrAutomatonBuilder]: Finished intersection with 84 states and 163 transitions. [2020-04-18 15:49:04,968 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states. [2020-04-18 15:49:04,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:04,968 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:04,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:04,968 INFO L82 PathProgramCache]: Analyzing trace with hash -905639014, now seen corresponding path program 2 times [2020-04-18 15:49:04,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:04,969 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458541943] [2020-04-18 15:49:04,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:04,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:04,982 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:04,982 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458541943] [2020-04-18 15:49:04,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:04,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:04,983 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:04,984 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:04,989 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 106 transitions. [2020-04-18 15:49:04,989 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:04,992 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:04,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:04,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:04,992 INFO L87 Difference]: Start difference. First operand 84 states. Second operand 3 states. [2020-04-18 15:49:04,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:04,999 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2020-04-18 15:49:04,999 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2020-04-18 15:49:05,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:05,000 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:05,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:05,000 INFO L82 PathProgramCache]: Analyzing trace with hash 72985754, now seen corresponding path program 3 times [2020-04-18 15:49:05,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:05,001 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244137312] [2020-04-18 15:49:05,001 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:05,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:05,022 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:05,022 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1244137312] [2020-04-18 15:49:05,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:05,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:05,023 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:05,026 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:05,031 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 44 transitions. [2020-04-18 15:49:05,032 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:05,043 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:05,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:05,043 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:05,043 INFO L87 Difference]: Start difference. First operand 97 states and 175 transitions. Second operand 5 states. [2020-04-18 15:49:05,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:05,074 INFO L93 Difference]: Finished difference Result 104 states and 180 transitions. [2020-04-18 15:49:05,074 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 180 transitions. [2020-04-18 15:49:05,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:05,075 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:05,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:05,075 INFO L82 PathProgramCache]: Analyzing trace with hash 72984734, now seen corresponding path program 4 times [2020-04-18 15:49:05,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:05,076 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278803616] [2020-04-18 15:49:05,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:05,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:05,095 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:05,096 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1278803616] [2020-04-18 15:49:05,096 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1523302801] [2020-04-18 15:49:05,096 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:05,172 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:05,172 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:05,173 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:05,174 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:05,184 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:05,184 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:05,184 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:49:05,184 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:05,186 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:05,192 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 44 transitions. [2020-04-18 15:49:05,192 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:05,211 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:05,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:05,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:05,211 INFO L87 Difference]: Start difference. First operand 104 states and 180 transitions. Second operand 7 states. [2020-04-18 15:49:05,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:05,258 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:05,258 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:05,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:05,258 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:05,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:05,259 INFO L82 PathProgramCache]: Analyzing trace with hash 72758744, now seen corresponding path program 5 times [2020-04-18 15:49:05,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:05,260 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973824105] [2020-04-18 15:49:05,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:05,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:05,311 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:05,311 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973824105] [2020-04-18 15:49:05,311 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2081254051] [2020-04-18 15:49:05,311 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:05,392 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:05,392 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:05,393 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:05,394 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:05,408 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:05,408 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:05,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:05,409 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:05,411 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:05,416 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 55 transitions. [2020-04-18 15:49:05,416 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:05,475 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:49:05,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:49:05,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=187, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:49:05,476 INFO L87 Difference]: Start difference. First operand 111 states and 184 transitions. Second operand 12 states. [2020-04-18 15:49:05,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:05,587 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:05,587 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:05,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:05,588 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:05,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:05,589 INFO L82 PathProgramCache]: Analyzing trace with hash -150471558, now seen corresponding path program 6 times [2020-04-18 15:49:05,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:05,589 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [81865797] [2020-04-18 15:49:05,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:05,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:05,633 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:05,633 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [81865797] [2020-04-18 15:49:05,634 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:05,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:05,634 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:05,636 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:05,640 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:49:05,640 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:05,651 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:05,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:05,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=356, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:49:05,651 INFO L87 Difference]: Start difference. First operand 111 states and 184 transitions. Second operand 7 states. [2020-04-18 15:49:05,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:05,740 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:05,740 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:05,741 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:05,741 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [565122678] [2020-04-18 15:49:05,742 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:05,742 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:05,742 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [565122678] [2020-04-18 15:49:05,742 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2020-04-18 15:49:05,742 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:05,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:49:05,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=542, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:49:05,743 INFO L87 Difference]: Start difference. First operand 8496 states and 38896 transitions. Second operand 14 states. [2020-04-18 15:49:06,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:06,341 INFO L93 Difference]: Finished difference Result 24945 states and 96342 transitions. [2020-04-18 15:49:06,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:49:06,341 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 23 [2020-04-18 15:49:06,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:06,396 INFO L225 Difference]: With dead ends: 24945 [2020-04-18 15:49:06,396 INFO L226 Difference]: Without dead ends: 24844 [2020-04-18 15:49:06,396 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=409, Invalid=1151, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:49:06,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24844 states. [2020-04-18 15:49:06,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24844 to 8914. [2020-04-18 15:49:06,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8914 states. [2020-04-18 15:49:06,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8914 states to 8914 states and 40728 transitions. [2020-04-18 15:49:06,783 INFO L78 Accepts]: Start accepts. Automaton has 8914 states and 40728 transitions. Word has length 23 [2020-04-18 15:49:06,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:06,784 INFO L479 AbstractCegarLoop]: Abstraction has 8914 states and 40728 transitions. [2020-04-18 15:49:06,784 INFO L480 AbstractCegarLoop]: Interpolant automaton has 14 states. [2020-04-18 15:49:06,784 INFO L276 IsEmpty]: Start isEmpty. Operand 8914 states and 40728 transitions. [2020-04-18 15:49:06,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:06,786 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:06,786 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:07,186 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 z3 -smt2 -in SMTLIB2_COMPLIANT=true,23 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:07,187 INFO L427 AbstractCegarLoop]: === Iteration 12 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:07,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,188 INFO L82 PathProgramCache]: Analyzing trace with hash -328675496, now seen corresponding path program 1 times [2020-04-18 15:49:07,188 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:07,188 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2036686769] [2020-04-18 15:49:07,189 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:07,191 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 123 transitions. [2020-04-18 15:49:07,191 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states. [2020-04-18 15:49:07,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:07,192 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:07,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,192 INFO L82 PathProgramCache]: Analyzing trace with hash -1334245862, now seen corresponding path program 2 times [2020-04-18 15:49:07,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:07,192 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889791239] [2020-04-18 15:49:07,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:07,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:07,200 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:07,201 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1889791239] [2020-04-18 15:49:07,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:07,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:07,201 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:07,202 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:07,207 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 86 transitions. [2020-04-18 15:49:07,207 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:07,209 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:07,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:07,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:07,209 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 3 states. [2020-04-18 15:49:07,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:07,216 INFO L93 Difference]: Finished difference Result 77 states and 131 transitions. [2020-04-18 15:49:07,216 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 131 transitions. [2020-04-18 15:49:07,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:07,217 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:07,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,217 INFO L82 PathProgramCache]: Analyzing trace with hash -328925126, now seen corresponding path program 3 times [2020-04-18 15:49:07,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:07,218 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807131455] [2020-04-18 15:49:07,218 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:07,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:07,245 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:07,246 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807131455] [2020-04-18 15:49:07,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:07,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:07,246 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:07,248 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:07,255 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 36 transitions. [2020-04-18 15:49:07,255 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:07,265 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:07,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:07,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:07,266 INFO L87 Difference]: Start difference. First operand 77 states and 131 transitions. Second operand 5 states. [2020-04-18 15:49:07,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:07,306 INFO L93 Difference]: Finished difference Result 84 states and 136 transitions. [2020-04-18 15:49:07,307 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 136 transitions. [2020-04-18 15:49:07,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:07,307 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:07,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,307 INFO L82 PathProgramCache]: Analyzing trace with hash -328925666, now seen corresponding path program 4 times [2020-04-18 15:49:07,308 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:07,308 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1820965712] [2020-04-18 15:49:07,308 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:07,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:07,334 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:07,334 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1820965712] [2020-04-18 15:49:07,334 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [542100170] [2020-04-18 15:49:07,335 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:07,410 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:07,411 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:07,411 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:07,412 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:07,420 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:07,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:07,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:49:07,421 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:07,422 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:07,426 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 36 transitions. [2020-04-18 15:49:07,426 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:07,442 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:07,442 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:07,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:07,442 INFO L87 Difference]: Start difference. First operand 84 states and 136 transitions. Second operand 7 states. [2020-04-18 15:49:07,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:07,485 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:49:07,485 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:49:07,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:07,486 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:07,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,486 INFO L82 PathProgramCache]: Analyzing trace with hash -328675496, now seen corresponding path program 5 times [2020-04-18 15:49:07,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:07,486 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728704096] [2020-04-18 15:49:07,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:07,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:07,518 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:07,519 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1728704096] [2020-04-18 15:49:07,519 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [482850824] [2020-04-18 15:49:07,519 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:07,593 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:07,593 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:07,594 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:07,595 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:07,607 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:07,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:07,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:07,608 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:07,609 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:07,614 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 39 transitions. [2020-04-18 15:49:07,614 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:07,666 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:49:07,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:07,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:49:07,666 INFO L87 Difference]: Start difference. First operand 91 states and 140 transitions. Second operand 11 states. [2020-04-18 15:49:07,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:07,763 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:49:07,763 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:49:07,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:07,763 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:07,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:07,764 INFO L82 PathProgramCache]: Analyzing trace with hash -150449920, now seen corresponding path program 6 times [2020-04-18 15:49:07,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:07,764 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550974089] [2020-04-18 15:49:07,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:07,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:08,089 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:08,089 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550974089] [2020-04-18 15:49:08,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:08,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:08,090 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:08,091 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:08,094 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:49:08,094 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:08,101 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:08,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:08,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:49:08,102 INFO L87 Difference]: Start difference. First operand 91 states and 140 transitions. Second operand 7 states. [2020-04-18 15:49:08,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:08,180 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:49:08,180 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:49:08,180 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:08,181 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2036686769] [2020-04-18 15:49:08,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:08,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:08,181 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2036686769] [2020-04-18 15:49:08,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:49:08,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:08,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:08,182 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=505, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:49:08,182 INFO L87 Difference]: Start difference. First operand 8914 states and 40728 transitions. Second operand 13 states. [2020-04-18 15:49:08,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:08,747 INFO L93 Difference]: Finished difference Result 25403 states and 98232 transitions. [2020-04-18 15:49:08,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:49:08,747 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2020-04-18 15:49:08,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:08,801 INFO L225 Difference]: With dead ends: 25403 [2020-04-18 15:49:08,802 INFO L226 Difference]: Without dead ends: 25289 [2020-04-18 15:49:08,802 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 411 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=383, Invalid=1099, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:49:08,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25289 states. [2020-04-18 15:49:09,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25289 to 9426. [2020-04-18 15:49:09,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9426 states. [2020-04-18 15:49:09,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9426 states to 9426 states and 43057 transitions. [2020-04-18 15:49:09,188 INFO L78 Accepts]: Start accepts. Automaton has 9426 states and 43057 transitions. Word has length 23 [2020-04-18 15:49:09,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:09,188 INFO L479 AbstractCegarLoop]: Abstraction has 9426 states and 43057 transitions. [2020-04-18 15:49:09,188 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:49:09,188 INFO L276 IsEmpty]: Start isEmpty. Operand 9426 states and 43057 transitions. [2020-04-18 15:49:09,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:09,191 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:09,191 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:09,591 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 z3 -smt2 -in SMTLIB2_COMPLIANT=true,25 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:09,592 INFO L427 AbstractCegarLoop]: === Iteration 13 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:09,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:09,592 INFO L82 PathProgramCache]: Analyzing trace with hash -156736363, now seen corresponding path program 1 times [2020-04-18 15:49:09,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:09,593 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [548939811] [2020-04-18 15:49:09,594 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:09,600 INFO L259 McrAutomatonBuilder]: Finished intersection with 232 states and 609 transitions. [2020-04-18 15:49:09,602 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states. [2020-04-18 15:49:09,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:09,602 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:09,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:09,603 INFO L82 PathProgramCache]: Analyzing trace with hash 825478653, now seen corresponding path program 2 times [2020-04-18 15:49:09,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:09,603 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582890606] [2020-04-18 15:49:09,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:09,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:09,613 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:09,613 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582890606] [2020-04-18 15:49:09,614 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:09,614 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:09,614 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:09,616 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:09,629 INFO L259 McrAutomatonBuilder]: Finished intersection with 89 states and 163 transitions. [2020-04-18 15:49:09,629 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:09,632 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:09,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:09,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:09,633 INFO L87 Difference]: Start difference. First operand 232 states. Second operand 3 states. [2020-04-18 15:49:09,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:09,643 INFO L93 Difference]: Finished difference Result 295 states and 715 transitions. [2020-04-18 15:49:09,643 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 715 transitions. [2020-04-18 15:49:09,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:09,644 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:09,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:09,644 INFO L82 PathProgramCache]: Analyzing trace with hash 783331315, now seen corresponding path program 3 times [2020-04-18 15:49:09,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:09,644 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974860337] [2020-04-18 15:49:09,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:09,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:09,663 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:09,663 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974860337] [2020-04-18 15:49:09,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:09,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:09,663 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:09,665 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:09,674 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 148 transitions. [2020-04-18 15:49:09,674 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:09,682 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:09,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:09,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:09,682 INFO L87 Difference]: Start difference. First operand 295 states and 715 transitions. Second operand 5 states. [2020-04-18 15:49:09,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:09,736 INFO L93 Difference]: Finished difference Result 386 states and 864 transitions. [2020-04-18 15:49:09,736 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 864 transitions. [2020-04-18 15:49:09,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:09,737 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:09,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:09,738 INFO L82 PathProgramCache]: Analyzing trace with hash 145278167, now seen corresponding path program 4 times [2020-04-18 15:49:09,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:09,738 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218209683] [2020-04-18 15:49:09,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:09,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:09,770 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:09,770 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218209683] [2020-04-18 15:49:09,770 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [326629197] [2020-04-18 15:49:09,770 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:09,853 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:09,853 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:09,854 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:09,855 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:09,871 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:09,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:09,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:49:09,872 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:09,873 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:09,882 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 94 transitions. [2020-04-18 15:49:09,882 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:09,905 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:09,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:09,905 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:09,905 INFO L87 Difference]: Start difference. First operand 386 states and 864 transitions. Second operand 9 states. [2020-04-18 15:49:10,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:10,126 INFO L93 Difference]: Finished difference Result 428 states and 916 transitions. [2020-04-18 15:49:10,126 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 916 transitions. [2020-04-18 15:49:10,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:10,127 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:10,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,128 INFO L82 PathProgramCache]: Analyzing trace with hash 145277147, now seen corresponding path program 5 times [2020-04-18 15:49:10,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:10,128 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1302996934] [2020-04-18 15:49:10,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:10,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:10,156 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:10,157 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1302996934] [2020-04-18 15:49:10,157 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1583996257] [2020-04-18 15:49:10,157 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:10,238 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:10,238 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:10,239 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:10,240 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:10,252 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:10,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:10,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:10,253 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:10,255 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,264 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 94 transitions. [2020-04-18 15:49:10,264 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:10,272 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:10,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:10,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:10,273 INFO L87 Difference]: Start difference. First operand 428 states and 916 transitions. Second operand 9 states. [2020-04-18 15:49:10,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:10,491 INFO L93 Difference]: Finished difference Result 485 states and 974 transitions. [2020-04-18 15:49:10,492 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 974 transitions. [2020-04-18 15:49:10,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:10,493 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:10,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,493 INFO L82 PathProgramCache]: Analyzing trace with hash 145051157, now seen corresponding path program 6 times [2020-04-18 15:49:10,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:10,494 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [730273044] [2020-04-18 15:49:10,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:10,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:10,570 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:10,570 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [730273044] [2020-04-18 15:49:10,571 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [144878446] [2020-04-18 15:49:10,571 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:10,696 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:49:10,696 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:10,697 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:10,698 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:10,729 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:10,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:10,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:10,732 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:10,736 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,756 INFO L259 McrAutomatonBuilder]: Finished intersection with 66 states and 105 transitions. [2020-04-18 15:49:10,757 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:10,891 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 9 times. [2020-04-18 15:49:10,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:49:10,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=227, Invalid=585, Unknown=0, NotChecked=0, Total=812 [2020-04-18 15:49:10,892 INFO L87 Difference]: Start difference. First operand 485 states and 974 transitions. Second operand 14 states. [2020-04-18 15:49:11,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:11,532 INFO L93 Difference]: Finished difference Result 492 states and 979 transitions. [2020-04-18 15:49:11,532 INFO L276 IsEmpty]: Start isEmpty. Operand 492 states and 979 transitions. [2020-04-18 15:49:11,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:11,533 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:49:11,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:11,534 INFO L82 PathProgramCache]: Analyzing trace with hash -78179145, now seen corresponding path program 7 times [2020-04-18 15:49:11,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:11,534 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1325252909] [2020-04-18 15:49:11,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:11,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:11,601 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:11,601 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1325252909] [2020-04-18 15:49:11,602 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [652010909] [2020-04-18 15:49:11,602 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:11,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:11,683 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:11,684 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:11,698 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:11,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:11,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:11,699 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:11,701 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:11,713 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:49:11,713 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:11,738 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:11,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:11,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:49:11,739 INFO L87 Difference]: Start difference. First operand 492 states and 979 transitions. Second operand 11 states. [2020-04-18 15:49:12,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,217 INFO L93 Difference]: Finished difference Result 499 states and 984 transitions. [2020-04-18 15:49:12,217 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 984 transitions. [2020-04-18 15:49:12,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:12,218 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:49:12,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1419407101, now seen corresponding path program 8 times [2020-04-18 15:49:12,218 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:12,218 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [464023587] [2020-04-18 15:49:12,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:12,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:12,251 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:12,251 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [464023587] [2020-04-18 15:49:12,251 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:12,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:49:12,252 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:12,254 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,874 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:49:12,875 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:12,899 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:12,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:12,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=764, Invalid=2776, Unknown=0, NotChecked=0, Total=3540 [2020-04-18 15:49:12,900 INFO L87 Difference]: Start difference. First operand 499 states and 984 transitions. Second operand 7 states. [2020-04-18 15:49:13,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:13,104 INFO L93 Difference]: Finished difference Result 535 states and 1019 transitions. [2020-04-18 15:49:13,104 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1019 transitions. [2020-04-18 15:49:13,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:13,105 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:49:13,105 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:13,105 INFO L82 PathProgramCache]: Analyzing trace with hash 1418867611, now seen corresponding path program 9 times [2020-04-18 15:49:13,105 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:13,106 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215495331] [2020-04-18 15:49:13,106 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:13,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:13,137 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:13,138 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215495331] [2020-04-18 15:49:13,138 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [142091964] [2020-04-18 15:49:13,138 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:13,218 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2020-04-18 15:49:13,218 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:13,219 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:13,219 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:13,230 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:13,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:13,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:13,231 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:13,233 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:13,240 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:49:13,240 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:13,274 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:13,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:13,275 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=913, Invalid=3917, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 15:49:13,275 INFO L87 Difference]: Start difference. First operand 535 states and 1019 transitions. Second operand 9 states. [2020-04-18 15:49:13,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:13,496 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:49:13,496 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:49:13,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:13,497 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:49:13,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:13,498 INFO L82 PathProgramCache]: Analyzing trace with hash 1211690581, now seen corresponding path program 10 times [2020-04-18 15:49:13,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:13,498 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [909733007] [2020-04-18 15:49:13,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:13,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:13,553 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:13,553 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [909733007] [2020-04-18 15:49:13,553 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [981789118] [2020-04-18 15:49:13,553 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:13,632 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:13,632 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:13,633 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:13,635 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:13,650 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:13,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:13,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:13,651 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:13,653 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:13,662 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:49:13,663 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:13,818 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 24 times. [2020-04-18 15:49:13,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2020-04-18 15:49:13,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1251, Invalid=5391, Unknown=0, NotChecked=0, Total=6642 [2020-04-18 15:49:13,819 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 20 states. [2020-04-18 15:49:14,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:14,587 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:49:14,587 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:49:14,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:14,588 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:49:14,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1201691221, now seen corresponding path program 11 times [2020-04-18 15:49:14,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:14,589 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376846216] [2020-04-18 15:49:14,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:14,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:14,687 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:14,688 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376846216] [2020-04-18 15:49:14,688 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054235401] [2020-04-18 15:49:14,688 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:14,792 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:14,793 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:14,794 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:14,796 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:14,862 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:14,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:14,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:14,863 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:14,865 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:14,874 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:49:14,874 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,040 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:49:15,040 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:49:15,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1635, Invalid=7295, Unknown=0, NotChecked=0, Total=8930 [2020-04-18 15:49:15,041 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 14 states. [2020-04-18 15:49:15,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,763 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:49:15,763 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:49:15,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:15,764 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:49:15,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1440199159, now seen corresponding path program 12 times [2020-04-18 15:49:15,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,765 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432636629] [2020-04-18 15:49:15,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,833 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:15,833 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432636629] [2020-04-18 15:49:15,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:15,834 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,837 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,843 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:15,843 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,844 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:15,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:15,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2139, Invalid=10293, Unknown=0, NotChecked=0, Total=12432 [2020-04-18 15:49:15,846 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 9 states. [2020-04-18 15:49:16,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,259 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:49:16,260 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:49:16,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:16,261 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:49:16,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,261 INFO L82 PathProgramCache]: Analyzing trace with hash 1425735799, now seen corresponding path program 13 times [2020-04-18 15:49:16,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:16,261 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911258235] [2020-04-18 15:49:16,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:16,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:16,308 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:16,309 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911258235] [2020-04-18 15:49:16,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:16,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:16,310 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:16,311 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,316 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:16,316 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:16,316 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:16,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:16,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2519, Invalid=12733, Unknown=0, NotChecked=0, Total=15252 [2020-04-18 15:49:16,317 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 9 states. [2020-04-18 15:49:16,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,783 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:49:16,783 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:49:16,784 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:16,785 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [548939811] [2020-04-18 15:49:16,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:16,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:49:16,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [548939811] [2020-04-18 15:49:16,786 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2020-04-18 15:49:16,786 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:16,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-04-18 15:49:16,787 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3000, Invalid=16182, Unknown=0, NotChecked=0, Total=19182 [2020-04-18 15:49:16,787 INFO L87 Difference]: Start difference. First operand 9426 states and 43057 transitions. Second operand 27 states. [2020-04-18 15:49:21,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,536 INFO L93 Difference]: Finished difference Result 48582 states and 167110 transitions. [2020-04-18 15:49:21,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:49:21,536 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 25 [2020-04-18 15:49:21,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:21,640 INFO L225 Difference]: With dead ends: 48582 [2020-04-18 15:49:21,640 INFO L226 Difference]: Without dead ends: 48341 [2020-04-18 15:49:21,643 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 812 GetRequests, 556 SyntacticMatches, 5 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27287 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=8784, Invalid=54972, Unknown=0, NotChecked=0, Total=63756 [2020-04-18 15:49:21,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48341 states. [2020-04-18 15:49:22,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48341 to 8476. [2020-04-18 15:49:22,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8476 states. [2020-04-18 15:49:22,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8476 states to 8476 states and 38671 transitions. [2020-04-18 15:49:22,222 INFO L78 Accepts]: Start accepts. Automaton has 8476 states and 38671 transitions. Word has length 25 [2020-04-18 15:49:22,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:22,222 INFO L479 AbstractCegarLoop]: Abstraction has 8476 states and 38671 transitions. [2020-04-18 15:49:22,222 INFO L480 AbstractCegarLoop]: Interpolant automaton has 27 states. [2020-04-18 15:49:22,222 INFO L276 IsEmpty]: Start isEmpty. Operand 8476 states and 38671 transitions. [2020-04-18 15:49:22,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:22,224 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:22,224 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:23,628 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 z3 -smt2 -in SMTLIB2_COMPLIANT=true,28 z3 -smt2 -in SMTLIB2_COMPLIANT=true,30 z3 -smt2 -in SMTLIB2_COMPLIANT=true,32 z3 -smt2 -in SMTLIB2_COMPLIANT=true,27 z3 -smt2 -in SMTLIB2_COMPLIANT=true,29 z3 -smt2 -in SMTLIB2_COMPLIANT=true,31 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:23,630 INFO L427 AbstractCegarLoop]: === Iteration 14 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:23,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,630 INFO L82 PathProgramCache]: Analyzing trace with hash -558170603, now seen corresponding path program 1 times [2020-04-18 15:49:23,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:23,631 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [429530094] [2020-04-18 15:49:23,632 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,636 INFO L259 McrAutomatonBuilder]: Finished intersection with 184 states and 457 transitions. [2020-04-18 15:49:23,637 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states. [2020-04-18 15:49:23,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:23,637 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:23,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1772610045, now seen corresponding path program 2 times [2020-04-18 15:49:23,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,638 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983109267] [2020-04-18 15:49:23,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,645 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:23,645 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983109267] [2020-04-18 15:49:23,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:23,646 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:23,646 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,647 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,656 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 155 transitions. [2020-04-18 15:49:23,656 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,659 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:23,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:23,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:23,659 INFO L87 Difference]: Start difference. First operand 184 states. Second operand 3 states. [2020-04-18 15:49:23,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,669 INFO L93 Difference]: Finished difference Result 231 states and 531 transitions. [2020-04-18 15:49:23,669 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 531 transitions. [2020-04-18 15:49:23,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:23,670 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:23,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,670 INFO L82 PathProgramCache]: Analyzing trace with hash -111158227, now seen corresponding path program 3 times [2020-04-18 15:49:23,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,671 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346766294] [2020-04-18 15:49:23,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,693 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:23,693 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346766294] [2020-04-18 15:49:23,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:23,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:23,694 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,696 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,704 INFO L259 McrAutomatonBuilder]: Finished intersection with 75 states and 128 transitions. [2020-04-18 15:49:23,704 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,711 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:23,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:23,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:23,712 INFO L87 Difference]: Start difference. First operand 231 states and 531 transitions. Second operand 5 states. [2020-04-18 15:49:23,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,767 INFO L93 Difference]: Finished difference Result 294 states and 632 transitions. [2020-04-18 15:49:23,767 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 632 transitions. [2020-04-18 15:49:23,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:23,768 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:23,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,768 INFO L82 PathProgramCache]: Analyzing trace with hash -558420233, now seen corresponding path program 4 times [2020-04-18 15:49:23,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,768 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1099017602] [2020-04-18 15:49:23,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,797 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:23,797 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1099017602] [2020-04-18 15:49:23,797 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [693230447] [2020-04-18 15:49:23,797 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:23,871 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:23,871 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:23,872 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:23,872 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:23,884 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:23,884 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:23,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:49:23,885 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,886 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,894 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 86 transitions. [2020-04-18 15:49:23,894 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,917 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:23,917 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:23,917 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:23,917 INFO L87 Difference]: Start difference. First operand 294 states and 632 transitions. Second operand 9 states. [2020-04-18 15:49:24,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:24,206 INFO L93 Difference]: Finished difference Result 336 states and 684 transitions. [2020-04-18 15:49:24,206 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 684 transitions. [2020-04-18 15:49:24,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:24,207 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:24,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:24,208 INFO L82 PathProgramCache]: Analyzing trace with hash -558420773, now seen corresponding path program 5 times [2020-04-18 15:49:24,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:24,208 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337735784] [2020-04-18 15:49:24,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:24,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:24,238 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:24,238 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [337735784] [2020-04-18 15:49:24,239 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1445502377] [2020-04-18 15:49:24,239 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:24,318 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:24,318 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:24,319 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:24,319 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:24,332 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:24,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:24,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:24,332 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:24,334 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:24,341 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 86 transitions. [2020-04-18 15:49:24,342 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:24,350 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:24,350 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:24,350 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:24,350 INFO L87 Difference]: Start difference. First operand 336 states and 684 transitions. Second operand 9 states. [2020-04-18 15:49:24,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:24,559 INFO L93 Difference]: Finished difference Result 389 states and 738 transitions. [2020-04-18 15:49:24,559 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 738 transitions. [2020-04-18 15:49:24,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:24,560 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:24,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:24,560 INFO L82 PathProgramCache]: Analyzing trace with hash -558170603, now seen corresponding path program 6 times [2020-04-18 15:49:24,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:24,561 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143114315] [2020-04-18 15:49:24,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:24,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:24,608 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:24,608 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [143114315] [2020-04-18 15:49:24,608 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [587718415] [2020-04-18 15:49:24,608 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:24,688 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:49:24,688 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:24,689 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:24,689 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:24,703 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:24,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:24,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:24,703 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:24,705 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:24,713 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:49:24,713 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:24,754 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:49:24,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:24,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=549, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:49:24,755 INFO L87 Difference]: Start difference. First operand 389 states and 738 transitions. Second operand 13 states. [2020-04-18 15:49:25,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:25,289 INFO L93 Difference]: Finished difference Result 396 states and 743 transitions. [2020-04-18 15:49:25,289 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 743 transitions. [2020-04-18 15:49:25,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:25,290 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:49:25,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:25,291 INFO L82 PathProgramCache]: Analyzing trace with hash -379945027, now seen corresponding path program 7 times [2020-04-18 15:49:25,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:25,291 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300137188] [2020-04-18 15:49:25,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:25,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:25,338 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:25,338 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [300137188] [2020-04-18 15:49:25,338 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1489670738] [2020-04-18 15:49:25,338 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:25,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:25,418 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:25,418 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:25,433 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:25,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:25,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:25,434 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:25,435 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:25,443 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:49:25,443 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:25,452 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:25,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:25,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1371, Unknown=0, NotChecked=0, Total=1806 [2020-04-18 15:49:25,453 INFO L87 Difference]: Start difference. First operand 396 states and 743 transitions. Second operand 11 states. [2020-04-18 15:49:25,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:25,922 INFO L93 Difference]: Finished difference Result 403 states and 748 transitions. [2020-04-18 15:49:25,922 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 748 transitions. [2020-04-18 15:49:25,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:25,923 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:49:25,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:25,923 INFO L82 PathProgramCache]: Analyzing trace with hash 1730092701, now seen corresponding path program 8 times [2020-04-18 15:49:25,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:25,924 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58926066] [2020-04-18 15:49:25,924 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:25,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:25,952 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:25,952 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58926066] [2020-04-18 15:49:25,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:25,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:49:25,953 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:25,954 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:25,960 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:49:25,960 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:25,982 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:25,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:25,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=728, Invalid=2694, Unknown=0, NotChecked=0, Total=3422 [2020-04-18 15:49:25,983 INFO L87 Difference]: Start difference. First operand 403 states and 748 transitions. Second operand 7 states. [2020-04-18 15:49:26,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:26,182 INFO L93 Difference]: Finished difference Result 439 states and 783 transitions. [2020-04-18 15:49:26,182 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 783 transitions. [2020-04-18 15:49:26,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:26,183 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:49:26,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:26,183 INFO L82 PathProgramCache]: Analyzing trace with hash 1730029851, now seen corresponding path program 9 times [2020-04-18 15:49:26,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:26,184 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [940882558] [2020-04-18 15:49:26,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:26,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:26,214 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:26,215 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [940882558] [2020-04-18 15:49:26,215 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [61962936] [2020-04-18 15:49:26,215 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:26,292 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:49:26,292 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:26,293 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:26,293 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:26,304 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:26,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:26,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:26,305 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:26,306 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:26,312 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:49:26,312 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:26,357 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:26,357 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:26,357 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=870, Invalid=3822, Unknown=0, NotChecked=0, Total=4692 [2020-04-18 15:49:26,357 INFO L87 Difference]: Start difference. First operand 439 states and 783 transitions. Second operand 9 states. [2020-04-18 15:49:26,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:26,591 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:49:26,591 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:49:26,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:26,592 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:49:26,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:26,593 INFO L82 PathProgramCache]: Analyzing trace with hash 1980442581, now seen corresponding path program 10 times [2020-04-18 15:49:26,593 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:26,593 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933211958] [2020-04-18 15:49:26,593 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:26,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:26,637 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:26,637 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933211958] [2020-04-18 15:49:26,637 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [608317045] [2020-04-18 15:49:26,637 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:26,716 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:26,716 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:26,717 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:26,718 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:26,735 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:26,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:26,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:26,736 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:26,737 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:26,742 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:49:26,742 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:26,814 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 14 times. [2020-04-18 15:49:26,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:49:26,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1121, Invalid=5041, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:49:26,815 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 17 states. [2020-04-18 15:49:27,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:27,518 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:49:27,518 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:49:27,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:27,520 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:49:27,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:27,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1970443221, now seen corresponding path program 11 times [2020-04-18 15:49:27,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:27,521 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954699160] [2020-04-18 15:49:27,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:27,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:27,582 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:27,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954699160] [2020-04-18 15:49:27,583 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1842585492] [2020-04-18 15:49:27,583 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:27,666 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:27,666 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:27,667 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:27,667 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:27,681 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:27,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:27,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:27,681 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:27,683 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:27,688 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:49:27,689 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:27,705 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:49:27,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:27,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=6887, Unknown=0, NotChecked=0, Total=8372 [2020-04-18 15:49:27,707 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 13 states. [2020-04-18 15:49:28,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:28,341 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:49:28,341 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:49:28,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:28,343 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:49:28,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:28,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1440220797, now seen corresponding path program 12 times [2020-04-18 15:49:28,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:28,343 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821190922] [2020-04-18 15:49:28,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:28,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:28,395 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:28,396 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821190922] [2020-04-18 15:49:28,396 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:28,396 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:28,396 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:28,399 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:28,404 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:28,404 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:28,405 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:28,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:28,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1970, Invalid=9802, Unknown=0, NotChecked=0, Total=11772 [2020-04-18 15:49:28,407 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 9 states. [2020-04-18 15:49:28,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:28,823 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:49:28,823 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:49:28,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:28,824 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:49:28,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:28,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1446529917, now seen corresponding path program 13 times [2020-04-18 15:49:28,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:28,825 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834845476] [2020-04-18 15:49:28,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:28,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:28,879 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:28,879 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834845476] [2020-04-18 15:49:28,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:28,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:28,880 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:28,881 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:28,886 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:28,886 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:28,886 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:28,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:28,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2330, Invalid=12190, Unknown=0, NotChecked=0, Total=14520 [2020-04-18 15:49:28,888 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 9 states. [2020-04-18 15:49:29,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:29,356 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:49:29,356 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:49:29,357 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:29,358 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [429530094] [2020-04-18 15:49:29,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:29,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:49:29,358 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [429530094] [2020-04-18 15:49:29,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2020-04-18 15:49:29,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:29,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-04-18 15:49:29,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2794, Invalid=15566, Unknown=0, NotChecked=0, Total=18360 [2020-04-18 15:49:29,361 INFO L87 Difference]: Start difference. First operand 8476 states and 38671 transitions. Second operand 24 states. [2020-04-18 15:49:33,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:33,413 INFO L93 Difference]: Finished difference Result 46283 states and 159277 transitions. [2020-04-18 15:49:33,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:49:33,414 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 25 [2020-04-18 15:49:33,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:33,514 INFO L225 Difference]: With dead ends: 46283 [2020-04-18 15:49:33,514 INFO L226 Difference]: Without dead ends: 46035 [2020-04-18 15:49:33,517 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 797 GetRequests, 549 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26371 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=8309, Invalid=53941, Unknown=0, NotChecked=0, Total=62250 [2020-04-18 15:49:33,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46035 states. [2020-04-18 15:49:34,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46035 to 7590. [2020-04-18 15:49:34,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7590 states. [2020-04-18 15:49:34,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7590 states to 7590 states and 34684 transitions. [2020-04-18 15:49:34,048 INFO L78 Accepts]: Start accepts. Automaton has 7590 states and 34684 transitions. Word has length 25 [2020-04-18 15:49:34,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:34,048 INFO L479 AbstractCegarLoop]: Abstraction has 7590 states and 34684 transitions. [2020-04-18 15:49:34,048 INFO L480 AbstractCegarLoop]: Interpolant automaton has 24 states. [2020-04-18 15:49:34,048 INFO L276 IsEmpty]: Start isEmpty. Operand 7590 states and 34684 transitions. [2020-04-18 15:49:34,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:34,050 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:34,050 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:35,456 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 z3 -smt2 -in SMTLIB2_COMPLIANT=true,38 z3 -smt2 -in SMTLIB2_COMPLIANT=true,37 z3 -smt2 -in SMTLIB2_COMPLIANT=true,40 z3 -smt2 -in SMTLIB2_COMPLIANT=true,34 z3 -smt2 -in SMTLIB2_COMPLIANT=true,39 z3 -smt2 -in SMTLIB2_COMPLIANT=true,36 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:35,457 INFO L427 AbstractCegarLoop]: === Iteration 15 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:35,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,458 INFO L82 PathProgramCache]: Analyzing trace with hash 1201697793, now seen corresponding path program 1 times [2020-04-18 15:49:35,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:35,459 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1848903735] [2020-04-18 15:49:35,460 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,463 INFO L259 McrAutomatonBuilder]: Finished intersection with 168 states and 417 transitions. [2020-04-18 15:49:35,464 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states. [2020-04-18 15:49:35,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:35,465 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:35,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,465 INFO L82 PathProgramCache]: Analyzing trace with hash 1380847073, now seen corresponding path program 2 times [2020-04-18 15:49:35,465 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,465 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026226180] [2020-04-18 15:49:35,465 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,474 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:35,475 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026226180] [2020-04-18 15:49:35,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:35,475 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:35,475 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,476 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,486 INFO L259 McrAutomatonBuilder]: Finished intersection with 89 states and 182 transitions. [2020-04-18 15:49:35,486 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,489 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:35,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:35,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:35,489 INFO L87 Difference]: Start difference. First operand 168 states. Second operand 3 states. [2020-04-18 15:49:35,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,499 INFO L93 Difference]: Finished difference Result 211 states and 487 transitions. [2020-04-18 15:49:35,500 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 487 transitions. [2020-04-18 15:49:35,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:35,500 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:35,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,501 INFO L82 PathProgramCache]: Analyzing trace with hash 181846743, now seen corresponding path program 3 times [2020-04-18 15:49:35,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,501 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864151508] [2020-04-18 15:49:35,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,532 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:35,532 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864151508] [2020-04-18 15:49:35,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:35,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:35,533 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,534 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,542 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:49:35,542 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,548 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:35,549 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:35,549 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:35,549 INFO L87 Difference]: Start difference. First operand 211 states and 487 transitions. Second operand 5 states. [2020-04-18 15:49:35,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,602 INFO L93 Difference]: Finished difference Result 246 states and 540 transitions. [2020-04-18 15:49:35,602 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 540 transitions. [2020-04-18 15:49:35,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:35,603 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:35,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,603 INFO L82 PathProgramCache]: Analyzing trace with hash 181830003, now seen corresponding path program 4 times [2020-04-18 15:49:35,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,604 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830431915] [2020-04-18 15:49:35,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,623 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:35,623 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830431915] [2020-04-18 15:49:35,623 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [372148746] [2020-04-18 15:49:35,623 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:35,702 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:35,702 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:35,703 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:35,703 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:35,716 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:35,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:35,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2020-04-18 15:49:35,717 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,718 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,726 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:49:35,726 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,747 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:49:35,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:35,748 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:35,748 INFO L87 Difference]: Start difference. First operand 246 states and 540 transitions. Second operand 7 states. [2020-04-18 15:49:35,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,821 INFO L93 Difference]: Finished difference Result 331 states and 661 transitions. [2020-04-18 15:49:35,821 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 661 transitions. [2020-04-18 15:49:35,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:35,822 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:35,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,822 INFO L82 PathProgramCache]: Analyzing trace with hash 181828983, now seen corresponding path program 5 times [2020-04-18 15:49:35,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,823 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514254330] [2020-04-18 15:49:35,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,850 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:35,851 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514254330] [2020-04-18 15:49:35,851 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1365774174] [2020-04-18 15:49:35,852 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:35,940 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:35,940 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:35,941 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:35,942 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:36,118 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:36,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:36,120 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:49:36,120 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:36,121 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:36,129 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:49:36,129 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:36,143 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:36,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:36,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2020-04-18 15:49:36,144 INFO L87 Difference]: Start difference. First operand 331 states and 661 transitions. Second operand 7 states. [2020-04-18 15:49:36,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:36,217 INFO L93 Difference]: Finished difference Result 442 states and 794 transitions. [2020-04-18 15:49:36,218 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 794 transitions. [2020-04-18 15:49:36,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:36,218 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:36,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:36,219 INFO L82 PathProgramCache]: Analyzing trace with hash 189585273, now seen corresponding path program 6 times [2020-04-18 15:49:36,219 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:36,219 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925783707] [2020-04-18 15:49:36,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:36,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:36,266 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:36,266 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925783707] [2020-04-18 15:49:36,267 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [467369304] [2020-04-18 15:49:36,267 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:36,344 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:49:36,344 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:36,344 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:36,345 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:36,356 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:36,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:36,356 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:49:36,356 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:36,358 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:36,369 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 93 transitions. [2020-04-18 15:49:36,370 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:36,428 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:49:36,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:36,428 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:49:36,429 INFO L87 Difference]: Start difference. First operand 442 states and 794 transitions. Second operand 11 states. [2020-04-18 15:49:36,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:36,686 INFO L93 Difference]: Finished difference Result 457 states and 806 transitions. [2020-04-18 15:49:36,686 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 806 transitions. [2020-04-18 15:49:36,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:36,687 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:49:36,687 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:36,687 INFO L82 PathProgramCache]: Analyzing trace with hash 189358263, now seen corresponding path program 7 times [2020-04-18 15:49:36,687 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:36,687 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [354861287] [2020-04-18 15:49:36,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:36,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:36,719 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:36,719 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [354861287] [2020-04-18 15:49:36,720 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1237763694] [2020-04-18 15:49:36,720 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:36,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:36,801 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:36,801 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:36,816 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:36,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:36,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:36,817 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:36,818 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:36,827 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 93 transitions. [2020-04-18 15:49:36,827 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:36,828 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:49:36,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:36,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=491, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:49:36,829 INFO L87 Difference]: Start difference. First operand 457 states and 806 transitions. Second operand 11 states. [2020-04-18 15:49:37,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,078 INFO L93 Difference]: Finished difference Result 468 states and 813 transitions. [2020-04-18 15:49:37,078 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 813 transitions. [2020-04-18 15:49:37,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:37,079 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:49:37,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1419610833, now seen corresponding path program 8 times [2020-04-18 15:49:37,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:37,080 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553948437] [2020-04-18 15:49:37,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:37,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:37,125 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:37,125 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553948437] [2020-04-18 15:49:37,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:37,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:49:37,126 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:37,127 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,133 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:49:37,133 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:37,143 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:37,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:37,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=717, Unknown=0, NotChecked=0, Total=930 [2020-04-18 15:49:37,143 INFO L87 Difference]: Start difference. First operand 468 states and 813 transitions. Second operand 7 states. [2020-04-18 15:49:37,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,320 INFO L93 Difference]: Finished difference Result 483 states and 825 transitions. [2020-04-18 15:49:37,320 INFO L276 IsEmpty]: Start isEmpty. Operand 483 states and 825 transitions. [2020-04-18 15:49:37,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:37,321 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:49:37,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,322 INFO L82 PathProgramCache]: Analyzing trace with hash 1418874183, now seen corresponding path program 9 times [2020-04-18 15:49:37,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:37,322 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546620721] [2020-04-18 15:49:37,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:37,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:37,359 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:37,360 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546620721] [2020-04-18 15:49:37,360 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [16468201] [2020-04-18 15:49:37,360 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:37,443 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2020-04-18 15:49:37,443 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:37,444 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:37,445 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:37,458 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:37,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:37,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:37,459 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:37,461 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,468 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:49:37,468 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:37,469 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:37,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:37,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2020-04-18 15:49:37,470 INFO L87 Difference]: Start difference. First operand 483 states and 825 transitions. Second operand 9 states. [2020-04-18 15:49:37,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,683 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:49:37,683 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:49:37,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:37,684 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:49:37,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,684 INFO L82 PathProgramCache]: Analyzing trace with hash 1201697793, now seen corresponding path program 10 times [2020-04-18 15:49:37,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:37,685 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861895302] [2020-04-18 15:49:37,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:37,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:37,726 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:37,726 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861895302] [2020-04-18 15:49:37,726 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [113377575] [2020-04-18 15:49:37,726 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:37,808 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:37,808 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:37,809 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:37,810 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:37,823 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:37,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:37,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:37,823 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:37,825 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,831 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:49:37,831 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:37,878 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:49:37,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:49:37,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=398, Invalid=1494, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:49:37,879 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 14 states. [2020-04-18 15:49:38,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:38,501 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:49:38,502 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:49:38,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:38,502 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:49:38,503 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,503 INFO L82 PathProgramCache]: Analyzing trace with hash 1218006273, now seen corresponding path program 11 times [2020-04-18 15:49:38,503 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:38,503 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1871254261] [2020-04-18 15:49:38,504 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:38,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:38,578 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:38,578 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1871254261] [2020-04-18 15:49:38,578 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1937743572] [2020-04-18 15:49:38,578 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:38,659 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:38,659 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:38,660 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:38,661 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:38,676 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:38,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:38,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:38,677 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:38,678 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,684 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:49:38,685 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:38,783 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:49:38,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 15:49:38,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=791, Invalid=3115, Unknown=0, NotChecked=0, Total=3906 [2020-04-18 15:49:38,784 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 18 states. [2020-04-18 15:49:39,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:39,560 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:49:39,560 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:49:39,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:39,561 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:49:39,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:39,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1729639995, now seen corresponding path program 12 times [2020-04-18 15:49:39,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:39,562 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65407668] [2020-04-18 15:49:39,562 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:39,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:39,599 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:39,600 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65407668] [2020-04-18 15:49:39,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:39,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:39,600 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:39,603 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:39,609 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:49:39,610 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:39,650 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:39,650 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:39,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1147, Invalid=4859, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:49:39,651 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 7 states. [2020-04-18 15:49:39,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:39,897 INFO L93 Difference]: Finished difference Result 509 states and 842 transitions. [2020-04-18 15:49:39,897 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 842 transitions. [2020-04-18 15:49:39,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:39,899 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:49:39,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:39,899 INFO L82 PathProgramCache]: Analyzing trace with hash 1730014785, now seen corresponding path program 13 times [2020-04-18 15:49:39,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:39,900 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818717935] [2020-04-18 15:49:39,900 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:39,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:39,965 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:39,966 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [818717935] [2020-04-18 15:49:39,966 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021545199] [2020-04-18 15:49:39,966 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:40,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,093 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:40,094 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:40,126 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:40,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:40,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:40,129 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,130 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,138 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:49:40,138 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,140 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:40,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:40,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1260, Invalid=5712, Unknown=0, NotChecked=0, Total=6972 [2020-04-18 15:49:40,141 INFO L87 Difference]: Start difference. First operand 509 states and 842 transitions. Second operand 9 states. [2020-04-18 15:49:40,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:40,361 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:49:40,361 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:49:40,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:40,362 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:49:40,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,362 INFO L82 PathProgramCache]: Analyzing trace with hash 1965964155, now seen corresponding path program 14 times [2020-04-18 15:49:40,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,363 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261457923] [2020-04-18 15:49:40,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,442 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:40,443 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261457923] [2020-04-18 15:49:40,443 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1601227112] [2020-04-18 15:49:40,443 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:40,540 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:49:40,540 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:40,540 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:40,542 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:40,570 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:40,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:40,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:40,571 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,573 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,581 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:49:40,582 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,633 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 14 times. [2020-04-18 15:49:40,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:49:40,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1422, Invalid=6588, Unknown=0, NotChecked=0, Total=8010 [2020-04-18 15:49:40,634 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 17 states. [2020-04-18 15:49:41,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:41,363 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:49:41,364 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:49:41,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:41,365 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:49:41,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:41,365 INFO L82 PathProgramCache]: Analyzing trace with hash 1970428155, now seen corresponding path program 15 times [2020-04-18 15:49:41,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:41,365 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783031455] [2020-04-18 15:49:41,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:41,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:41,413 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:41,414 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783031455] [2020-04-18 15:49:41,414 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [153259509] [2020-04-18 15:49:41,414 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:41,492 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:49:41,493 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:41,493 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:41,494 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:41,508 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:41,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:41,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:41,508 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:41,509 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:41,514 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:49:41,514 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:41,531 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:49:41,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:41,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1817, Invalid=8689, Unknown=0, NotChecked=0, Total=10506 [2020-04-18 15:49:41,532 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 13 states. [2020-04-18 15:49:42,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:42,143 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:49:42,143 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:49:42,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:42,144 INFO L105 Mcr]: ---- MCR iteration 14 ---- [2020-04-18 15:49:42,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,145 INFO L82 PathProgramCache]: Analyzing trace with hash 1425742371, now seen corresponding path program 16 times [2020-04-18 15:49:42,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:42,145 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459285340] [2020-04-18 15:49:42,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:42,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:42,187 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:42,188 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459285340] [2020-04-18 15:49:42,188 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:42,188 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:42,188 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:42,189 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,193 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:42,193 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:42,193 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:42,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:42,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2233, Invalid=11339, Unknown=0, NotChecked=0, Total=13572 [2020-04-18 15:49:42,195 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 9 states. [2020-04-18 15:49:42,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:42,758 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:49:42,758 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:49:42,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:42,759 INFO L105 Mcr]: ---- MCR iteration 15 ---- [2020-04-18 15:49:42,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,759 INFO L82 PathProgramCache]: Analyzing trace with hash 1446514851, now seen corresponding path program 17 times [2020-04-18 15:49:42,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:42,760 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221520689] [2020-04-18 15:49:42,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:42,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:42,799 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:42,799 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221520689] [2020-04-18 15:49:42,800 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:42,800 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:42,800 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:42,801 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,804 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:42,805 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:42,805 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:42,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:42,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2608, Invalid=13904, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:49:42,806 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 9 states. [2020-04-18 15:49:43,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:43,280 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:49:43,280 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:49:43,281 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:43,282 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1848903735] [2020-04-18 15:49:43,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:43,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:49:43,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1848903735] [2020-04-18 15:49:43,283 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2020-04-18 15:49:43,283 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:43,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-04-18 15:49:43,284 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=16735, Unknown=0, NotChecked=0, Total=19740 [2020-04-18 15:49:43,284 INFO L87 Difference]: Start difference. First operand 7590 states and 34684 transitions. Second operand 27 states. [2020-04-18 15:49:49,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:49,080 INFO L93 Difference]: Finished difference Result 45221 states and 154374 transitions. [2020-04-18 15:49:49,080 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 185 states. [2020-04-18 15:49:49,080 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 25 [2020-04-18 15:49:49,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:49,173 INFO L225 Difference]: With dead ends: 45221 [2020-04-18 15:49:49,173 INFO L226 Difference]: Without dead ends: 44954 [2020-04-18 15:49:49,179 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 1057 GetRequests, 775 SyntacticMatches, 2 SemanticMatches, 280 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33574 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=10400, Invalid=68842, Unknown=0, NotChecked=0, Total=79242 [2020-04-18 15:49:49,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44954 states. [2020-04-18 15:49:49,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44954 to 7269. [2020-04-18 15:49:49,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7269 states. [2020-04-18 15:49:49,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7269 states to 7269 states and 33154 transitions. [2020-04-18 15:49:49,913 INFO L78 Accepts]: Start accepts. Automaton has 7269 states and 33154 transitions. Word has length 25 [2020-04-18 15:49:49,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:49,913 INFO L479 AbstractCegarLoop]: Abstraction has 7269 states and 33154 transitions. [2020-04-18 15:49:49,913 INFO L480 AbstractCegarLoop]: Interpolant automaton has 27 states. [2020-04-18 15:49:49,913 INFO L276 IsEmpty]: Start isEmpty. Operand 7269 states and 33154 transitions. [2020-04-18 15:49:49,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:49,915 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:49,915 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:51,921 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 47 z3 -smt2 -in SMTLIB2_COMPLIANT=true,45 z3 -smt2 -in SMTLIB2_COMPLIANT=true,42 z3 -smt2 -in SMTLIB2_COMPLIANT=true,50 z3 -smt2 -in SMTLIB2_COMPLIANT=true,49 z3 -smt2 -in SMTLIB2_COMPLIANT=true,46 z3 -smt2 -in SMTLIB2_COMPLIANT=true,44 z3 -smt2 -in SMTLIB2_COMPLIANT=true,43 z3 -smt2 -in SMTLIB2_COMPLIANT=true,41 z3 -smt2 -in SMTLIB2_COMPLIANT=true,48 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:51,922 INFO L427 AbstractCegarLoop]: === Iteration 16 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:51,923 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:51,924 INFO L82 PathProgramCache]: Analyzing trace with hash -1943046054, now seen corresponding path program 1 times [2020-04-18 15:49:51,924 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:51,924 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [850901284] [2020-04-18 15:49:51,925 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:51,927 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 69 transitions. [2020-04-18 15:49:51,927 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states. [2020-04-18 15:49:51,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:51,927 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:51,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:51,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1874285922, now seen corresponding path program 2 times [2020-04-18 15:49:51,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:51,928 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050665700] [2020-04-18 15:49:51,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:51,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:51,937 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:49:51,937 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050665700] [2020-04-18 15:49:51,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:51,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:51,938 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:51,939 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:51,944 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:49:51,945 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:51,947 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:51,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:51,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:51,948 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 3 states. [2020-04-18 15:49:51,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:51,950 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:49:51,950 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:49:51,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:49:51,951 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:51,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:51,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1943046054, now seen corresponding path program 3 times [2020-04-18 15:49:51,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:51,951 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478085140] [2020-04-18 15:49:51,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:51,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:51,971 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:49:51,971 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478085140] [2020-04-18 15:49:51,971 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:51,972 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:51,972 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:51,973 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:51,977 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:49:51,977 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:51,984 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:51,985 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:51,985 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:51,985 INFO L87 Difference]: Start difference. First operand 49 states and 69 transitions. Second operand 5 states. [2020-04-18 15:49:51,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:51,999 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:49:51,999 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:49:52,000 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:52,000 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [850901284] [2020-04-18 15:49:52,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:52,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:52,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [850901284] [2020-04-18 15:49:52,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:52,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:52,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:52,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:52,002 INFO L87 Difference]: Start difference. First operand 7269 states and 33154 transitions. Second operand 5 states. [2020-04-18 15:49:52,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:52,128 INFO L93 Difference]: Finished difference Result 11919 states and 51979 transitions. [2020-04-18 15:49:52,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:52,128 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2020-04-18 15:49:52,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:52,154 INFO L225 Difference]: With dead ends: 11919 [2020-04-18 15:49:52,155 INFO L226 Difference]: Without dead ends: 11887 [2020-04-18 15:49:52,155 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:52,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11887 states. [2020-04-18 15:49:52,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11887 to 8560. [2020-04-18 15:49:52,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8560 states. [2020-04-18 15:49:52,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8560 states to 8560 states and 38495 transitions. [2020-04-18 15:49:52,388 INFO L78 Accepts]: Start accepts. Automaton has 8560 states and 38495 transitions. Word has length 25 [2020-04-18 15:49:52,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:52,388 INFO L479 AbstractCegarLoop]: Abstraction has 8560 states and 38495 transitions. [2020-04-18 15:49:52,388 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:52,388 INFO L276 IsEmpty]: Start isEmpty. Operand 8560 states and 38495 transitions. [2020-04-18 15:49:52,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2020-04-18 15:49:52,391 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:52,391 INFO L425 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:52,391 INFO L427 AbstractCegarLoop]: === Iteration 17 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:52,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:52,391 INFO L82 PathProgramCache]: Analyzing trace with hash -110415564, now seen corresponding path program 1 times [2020-04-18 15:49:52,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:52,392 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1586582579] [2020-04-18 15:49:52,392 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:52,394 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 26 transitions. [2020-04-18 15:49:52,394 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2020-04-18 15:49:52,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2020-04-18 15:49:52,394 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:52,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:52,394 INFO L82 PathProgramCache]: Analyzing trace with hash -110415564, now seen corresponding path program 2 times [2020-04-18 15:49:52,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:52,395 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1660651000] [2020-04-18 15:49:52,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:52,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:52,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:52,412 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:49:52,412 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:49:52,412 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:49:52,413 WARN L363 ceAbstractionStarter]: 5 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:49:52,413 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 6 thread instances. [2020-04-18 15:49:52,432 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,432 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,432 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,432 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,432 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,433 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,433 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,433 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,433 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,434 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,435 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,436 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,437 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,438 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,439 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,440 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,441 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,442 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,443 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,444 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,445 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,446 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,447 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,466 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,466 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,466 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,466 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,467 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,468 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,468 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,468 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,469 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,470 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,470 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,470 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,472 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,472 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,472 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,474 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,474 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,475 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,476 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,476 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,476 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,477 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,478 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,478 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,478 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,479 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,480 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,480 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,480 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,481 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,482 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,482 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,482 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,482 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,482 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,483 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,483 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,484 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,484 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,484 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,484 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,485 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,485 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,485 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,486 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,486 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,486 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:52,487 INFO L251 AbstractCegarLoop]: Starting to check reachability of 9 error locations. [2020-04-18 15:49:52,487 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:52,487 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:52,487 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:52,487 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:52,488 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:52,488 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:52,488 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:52,488 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:52,489 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 160 places, 141 transitions, 402 flow [2020-04-18 15:49:52,490 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 160 places, 141 transitions, 402 flow [2020-04-18 15:49:52,506 INFO L129 PetriNetUnfolder]: 8/171 cut-off events. [2020-04-18 15:49:52,506 INFO L130 PetriNetUnfolder]: For 50/50 co-relation queries the response was YES. [2020-04-18 15:49:52,508 INFO L80 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 171 events. 8/171 cut-off events. For 50/50 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 310 event pairs, 0 based on Foata normal form. 0/155 useless extension candidates. Maximal degree in co-relation 206. Up to 14 conditions per place. [2020-04-18 15:49:52,514 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 160 places, 141 transitions, 402 flow [2020-04-18 15:49:52,531 INFO L129 PetriNetUnfolder]: 8/171 cut-off events. [2020-04-18 15:49:52,532 INFO L130 PetriNetUnfolder]: For 50/50 co-relation queries the response was YES. [2020-04-18 15:49:52,533 INFO L80 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 171 events. 8/171 cut-off events. For 50/50 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 310 event pairs, 0 based on Foata normal form. 0/155 useless extension candidates. Maximal degree in co-relation 206. Up to 14 conditions per place. [2020-04-18 15:49:52,539 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 3612 [2020-04-18 15:49:52,539 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:54,350 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:49:54,633 INFO L206 etLargeBlockEncoding]: Checked pairs total: 4226 [2020-04-18 15:49:54,633 INFO L214 etLargeBlockEncoding]: Total number of compositions: 127 [2020-04-18 15:49:54,634 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 71 places, 45 transitions, 210 flow [2020-04-18 15:49:56,131 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 18584 states. [2020-04-18 15:49:56,132 INFO L276 IsEmpty]: Start isEmpty. Operand 18584 states. [2020-04-18 15:49:56,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:56,132 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:56,132 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:56,132 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:56,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:56,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1291919, now seen corresponding path program 1 times [2020-04-18 15:49:56,132 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:56,133 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [908561357] [2020-04-18 15:49:56,133 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:56,133 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:56,133 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:56,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:56,133 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:56,133 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:56,133 INFO L82 PathProgramCache]: Analyzing trace with hash 1291919, now seen corresponding path program 2 times [2020-04-18 15:49:56,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:56,134 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140437840] [2020-04-18 15:49:56,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:56,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:56,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:56,140 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140437840] [2020-04-18 15:49:56,140 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:56,140 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:56,141 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:56,141 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:56,141 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:56,141 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:56,143 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:56,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:56,143 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:56,143 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:56,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:56,143 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:56,143 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:56,144 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:56,144 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [908561357] [2020-04-18 15:49:56,144 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:56,144 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:56,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [908561357] [2020-04-18 15:49:56,144 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:56,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:56,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:56,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:56,145 INFO L87 Difference]: Start difference. First operand 18584 states. Second operand 3 states. [2020-04-18 15:49:56,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:56,282 INFO L93 Difference]: Finished difference Result 17885 states and 92755 transitions. [2020-04-18 15:49:56,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:56,282 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:56,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:56,335 INFO L225 Difference]: With dead ends: 17885 [2020-04-18 15:49:56,335 INFO L226 Difference]: Without dead ends: 16791 [2020-04-18 15:49:56,335 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:57,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16791 states. [2020-04-18 15:49:57,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16791 to 16791. [2020-04-18 15:49:57,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16791 states. [2020-04-18 15:49:57,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16791 states to 16791 states and 86558 transitions. [2020-04-18 15:49:57,396 INFO L78 Accepts]: Start accepts. Automaton has 16791 states and 86558 transitions. Word has length 3 [2020-04-18 15:49:57,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:57,397 INFO L479 AbstractCegarLoop]: Abstraction has 16791 states and 86558 transitions. [2020-04-18 15:49:57,397 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:57,397 INFO L276 IsEmpty]: Start isEmpty. Operand 16791 states and 86558 transitions. [2020-04-18 15:49:57,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:57,397 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:57,397 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:57,397 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:57,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,398 INFO L82 PathProgramCache]: Analyzing trace with hash -1124534846, now seen corresponding path program 1 times [2020-04-18 15:49:57,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:57,398 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1820629201] [2020-04-18 15:49:57,399 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,399 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:49:57,399 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:49:57,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:57,399 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:57,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,400 INFO L82 PathProgramCache]: Analyzing trace with hash -838148292, now seen corresponding path program 2 times [2020-04-18 15:49:57,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,400 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693768591] [2020-04-18 15:49:57,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:57,408 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [693768591] [2020-04-18 15:49:57,408 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:57,408 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:57,408 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,409 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,409 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:49:57,410 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,413 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:57,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:57,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:57,413 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:49:57,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,415 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:57,415 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:57,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:57,416 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:57,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1124534846, now seen corresponding path program 3 times [2020-04-18 15:49:57,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,416 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244643503] [2020-04-18 15:49:57,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:57,450 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [244643503] [2020-04-18 15:49:57,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:57,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:57,451 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,451 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,452 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:49:57,452 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,460 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:57,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:57,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:57,461 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:49:57,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,476 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:57,476 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:57,476 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:57,476 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1820629201] [2020-04-18 15:49:57,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:57,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:57,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1820629201] [2020-04-18 15:49:57,477 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:57,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:57,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:57,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:57,478 INFO L87 Difference]: Start difference. First operand 16791 states and 86558 transitions. Second operand 5 states. [2020-04-18 15:49:57,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,709 INFO L93 Difference]: Finished difference Result 30985 states and 150574 transitions. [2020-04-18 15:49:57,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:57,709 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:49:57,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:57,802 INFO L225 Difference]: With dead ends: 30985 [2020-04-18 15:49:57,802 INFO L226 Difference]: Without dead ends: 30977 [2020-04-18 15:49:57,803 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:58,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30977 states. [2020-04-18 15:49:58,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30977 to 19868. [2020-04-18 15:49:58,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19868 states. [2020-04-18 15:49:58,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19868 states to 19868 states and 103363 transitions. [2020-04-18 15:49:58,845 INFO L78 Accepts]: Start accepts. Automaton has 19868 states and 103363 transitions. Word has length 9 [2020-04-18 15:49:58,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:58,845 INFO L479 AbstractCegarLoop]: Abstraction has 19868 states and 103363 transitions. [2020-04-18 15:49:58,845 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:58,845 INFO L276 IsEmpty]: Start isEmpty. Operand 19868 states and 103363 transitions. [2020-04-18 15:49:58,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:58,845 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:58,845 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:58,846 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:58,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:58,846 INFO L82 PathProgramCache]: Analyzing trace with hash -696216523, now seen corresponding path program 1 times [2020-04-18 15:49:58,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:58,846 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1707401794] [2020-04-18 15:49:58,846 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:58,847 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:49:58,847 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:49:58,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:58,847 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:58,847 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:58,847 INFO L82 PathProgramCache]: Analyzing trace with hash -1465956375, now seen corresponding path program 2 times [2020-04-18 15:49:58,847 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:58,847 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1986463322] [2020-04-18 15:49:58,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:58,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:58,854 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:58,854 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1986463322] [2020-04-18 15:49:58,854 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:58,854 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:58,854 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:58,855 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:58,856 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:49:58,856 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:58,858 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:58,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:58,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:58,858 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:49:58,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:58,860 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:58,860 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:58,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:58,860 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:58,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:58,861 INFO L82 PathProgramCache]: Analyzing trace with hash -696216523, now seen corresponding path program 3 times [2020-04-18 15:49:58,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:58,861 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396270283] [2020-04-18 15:49:58,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:58,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:58,880 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:58,881 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396270283] [2020-04-18 15:49:58,881 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:58,881 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:58,881 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:58,882 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:58,883 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:49:58,883 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:58,890 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:58,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:58,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:58,891 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:49:58,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:58,908 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:58,908 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:58,908 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:58,909 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1707401794] [2020-04-18 15:49:58,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:58,909 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:58,909 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1707401794] [2020-04-18 15:49:58,909 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:58,909 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:58,909 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:58,909 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:58,909 INFO L87 Difference]: Start difference. First operand 19868 states and 103363 transitions. Second operand 5 states. [2020-04-18 15:49:59,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:59,159 INFO L93 Difference]: Finished difference Result 36296 states and 178836 transitions. [2020-04-18 15:49:59,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:59,160 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:49:59,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:59,265 INFO L225 Difference]: With dead ends: 36296 [2020-04-18 15:49:59,265 INFO L226 Difference]: Without dead ends: 36280 [2020-04-18 15:49:59,265 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:01,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36280 states. [2020-04-18 15:50:01,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36280 to 23806. [2020-04-18 15:50:01,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23806 states. [2020-04-18 15:50:02,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23806 states to 23806 states and 125455 transitions. [2020-04-18 15:50:02,078 INFO L78 Accepts]: Start accepts. Automaton has 23806 states and 125455 transitions. Word has length 13 [2020-04-18 15:50:02,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:02,079 INFO L479 AbstractCegarLoop]: Abstraction has 23806 states and 125455 transitions. [2020-04-18 15:50:02,079 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:02,079 INFO L276 IsEmpty]: Start isEmpty. Operand 23806 states and 125455 transitions. [2020-04-18 15:50:02,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:02,079 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:02,079 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:02,079 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:02,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,080 INFO L82 PathProgramCache]: Analyzing trace with hash -2123666531, now seen corresponding path program 1 times [2020-04-18 15:50:02,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:02,080 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [562504617] [2020-04-18 15:50:02,081 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,081 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:50:02,082 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:50:02,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:02,082 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:02,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,082 INFO L82 PathProgramCache]: Analyzing trace with hash 835890241, now seen corresponding path program 2 times [2020-04-18 15:50:02,082 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,083 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327531274] [2020-04-18 15:50:02,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,089 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:02,089 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327531274] [2020-04-18 15:50:02,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:02,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:02,090 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,090 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,092 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:50:02,092 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,094 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:02,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:02,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:02,094 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:50:02,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,102 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:50:02,102 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:50:02,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:02,102 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:02,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,103 INFO L82 PathProgramCache]: Analyzing trace with hash -2123648201, now seen corresponding path program 3 times [2020-04-18 15:50:02,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,103 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772806348] [2020-04-18 15:50:02,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:02,121 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1772806348] [2020-04-18 15:50:02,121 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [882062808] [2020-04-18 15:50:02,122 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:02,211 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:02,211 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:02,211 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:02,212 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:02,213 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:02,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:02,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:50:02,213 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,214 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,215 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:50:02,215 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,255 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:02,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:02,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:02,256 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 9 states. [2020-04-18 15:50:02,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,328 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:50:02,328 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:50:02,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:02,329 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:02,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,329 INFO L82 PathProgramCache]: Analyzing trace with hash -2123666531, now seen corresponding path program 4 times [2020-04-18 15:50:02,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,330 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125893779] [2020-04-18 15:50:02,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,360 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:02,361 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125893779] [2020-04-18 15:50:02,361 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1725471203] [2020-04-18 15:50:02,361 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:02,450 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:02,450 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:02,451 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:02,451 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:02,453 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:02,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:02,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:02,453 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,453 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,455 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:50:02,455 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,473 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:50:02,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:02,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2020-04-18 15:50:02,474 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:50:02,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,569 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:50:02,569 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:50:02,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:02,570 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:02,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,570 INFO L82 PathProgramCache]: Analyzing trace with hash 950817645, now seen corresponding path program 5 times [2020-04-18 15:50:02,570 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,570 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786341844] [2020-04-18 15:50:02,571 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,605 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:02,605 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786341844] [2020-04-18 15:50:02,606 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:02,606 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:02,606 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,607 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,609 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:50:02,609 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,629 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:02,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:02,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:50:02,629 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:50:02,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,735 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:50:02,735 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:50:02,735 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:02,736 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [562504617] [2020-04-18 15:50:02,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:02,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:02,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [562504617] [2020-04-18 15:50:02,736 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:50:02,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:02,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:02,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=519, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:50:02,737 INFO L87 Difference]: Start difference. First operand 23806 states and 125455 transitions. Second operand 13 states. [2020-04-18 15:50:03,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:03,893 INFO L93 Difference]: Finished difference Result 65163 states and 295360 transitions. [2020-04-18 15:50:03,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:50:03,893 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 15 [2020-04-18 15:50:03,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:04,081 INFO L225 Difference]: With dead ends: 65163 [2020-04-18 15:50:04,081 INFO L226 Difference]: Without dead ends: 65130 [2020-04-18 15:50:04,082 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 627 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=539, Invalid=1717, Unknown=0, NotChecked=0, Total=2256 [2020-04-18 15:50:05,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65130 states. [2020-04-18 15:50:06,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65130 to 23109. [2020-04-18 15:50:06,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23109 states. [2020-04-18 15:50:06,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23109 states to 23109 states and 121651 transitions. [2020-04-18 15:50:06,108 INFO L78 Accepts]: Start accepts. Automaton has 23109 states and 121651 transitions. Word has length 15 [2020-04-18 15:50:06,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:06,108 INFO L479 AbstractCegarLoop]: Abstraction has 23109 states and 121651 transitions. [2020-04-18 15:50:06,108 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:50:06,108 INFO L276 IsEmpty]: Start isEmpty. Operand 23109 states and 121651 transitions. [2020-04-18 15:50:06,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:06,109 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:06,109 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:06,509 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 52 z3 -smt2 -in SMTLIB2_COMPLIANT=true,51 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:06,510 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:06,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:06,511 INFO L82 PathProgramCache]: Analyzing trace with hash -2120658652, now seen corresponding path program 1 times [2020-04-18 15:50:06,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:06,511 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [346554321] [2020-04-18 15:50:06,512 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:06,513 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:50:06,513 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:50:06,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:06,513 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:06,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:06,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1298525542, now seen corresponding path program 2 times [2020-04-18 15:50:06,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:06,514 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797006145] [2020-04-18 15:50:06,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:06,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:06,521 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:06,522 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797006145] [2020-04-18 15:50:06,522 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:06,522 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:06,522 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:06,523 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:06,524 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:50:06,524 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:06,526 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:06,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:06,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:06,527 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:50:06,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:06,528 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:50:06,529 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:50:06,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:06,529 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:06,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:06,529 INFO L82 PathProgramCache]: Analyzing trace with hash -2120658652, now seen corresponding path program 3 times [2020-04-18 15:50:06,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:06,529 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [597318908] [2020-04-18 15:50:06,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:06,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:06,565 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:06,566 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [597318908] [2020-04-18 15:50:06,566 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:06,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:06,566 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:06,567 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:06,569 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:50:06,569 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:06,577 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:06,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:06,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:06,578 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:50:06,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:06,600 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:50:06,600 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:50:06,600 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:06,600 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [346554321] [2020-04-18 15:50:06,601 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:06,601 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:06,601 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [346554321] [2020-04-18 15:50:06,601 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:06,601 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:06,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:06,602 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:06,602 INFO L87 Difference]: Start difference. First operand 23109 states and 121651 transitions. Second operand 5 states. [2020-04-18 15:50:06,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:06,889 INFO L93 Difference]: Finished difference Result 41885 states and 209629 transitions. [2020-04-18 15:50:06,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:06,890 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:50:06,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:07,025 INFO L225 Difference]: With dead ends: 41885 [2020-04-18 15:50:07,025 INFO L226 Difference]: Without dead ends: 41856 [2020-04-18 15:50:07,025 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:07,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41856 states. [2020-04-18 15:50:08,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41856 to 28237. [2020-04-18 15:50:08,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28237 states. [2020-04-18 15:50:08,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28237 states to 28237 states and 150261 transitions. [2020-04-18 15:50:08,345 INFO L78 Accepts]: Start accepts. Automaton has 28237 states and 150261 transitions. Word has length 17 [2020-04-18 15:50:08,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:08,346 INFO L479 AbstractCegarLoop]: Abstraction has 28237 states and 150261 transitions. [2020-04-18 15:50:08,346 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:08,346 INFO L276 IsEmpty]: Start isEmpty. Operand 28237 states and 150261 transitions. [2020-04-18 15:50:08,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:08,347 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:08,347 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:08,347 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:08,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:08,347 INFO L82 PathProgramCache]: Analyzing trace with hash 269605662, now seen corresponding path program 1 times [2020-04-18 15:50:08,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:08,348 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2042352520] [2020-04-18 15:50:08,348 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:08,349 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:50:08,349 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:50:08,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:08,350 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:08,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:08,350 INFO L82 PathProgramCache]: Analyzing trace with hash -2126269866, now seen corresponding path program 2 times [2020-04-18 15:50:08,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:08,350 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1015306013] [2020-04-18 15:50:08,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:08,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:08,361 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:08,362 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1015306013] [2020-04-18 15:50:08,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:08,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:08,362 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:08,363 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:08,368 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 94 transitions. [2020-04-18 15:50:08,368 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:08,370 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:08,370 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:08,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:08,371 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:50:08,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:08,377 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:50:08,377 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:50:08,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:08,378 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:08,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:08,378 INFO L82 PathProgramCache]: Analyzing trace with hash 269417922, now seen corresponding path program 3 times [2020-04-18 15:50:08,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:08,379 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1428114482] [2020-04-18 15:50:08,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:08,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:08,415 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:08,416 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1428114482] [2020-04-18 15:50:08,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:08,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:08,416 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:08,418 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:08,422 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 40 transitions. [2020-04-18 15:50:08,422 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:08,430 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:08,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:08,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:08,431 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:50:10,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:10,619 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:50:10,619 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:50:10,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:10,619 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:10,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:10,620 INFO L82 PathProgramCache]: Analyzing trace with hash 269416872, now seen corresponding path program 4 times [2020-04-18 15:50:10,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:10,620 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101443975] [2020-04-18 15:50:10,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:10,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:10,637 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:10,637 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101443975] [2020-04-18 15:50:10,637 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2144030557] [2020-04-18 15:50:10,638 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:10,731 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:10,732 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:10,732 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:10,733 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:10,735 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:10,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:10,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:50:10,736 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:10,736 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:10,739 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 40 transitions. [2020-04-18 15:50:10,739 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:10,744 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:10,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:10,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:50:10,745 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 5 states. [2020-04-18 15:50:10,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:10,782 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:50:10,782 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:50:10,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:10,783 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:10,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:10,783 INFO L82 PathProgramCache]: Analyzing trace with hash 269605662, now seen corresponding path program 5 times [2020-04-18 15:50:10,783 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:10,783 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1492399265] [2020-04-18 15:50:10,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:10,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:10,826 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:10,826 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1492399265] [2020-04-18 15:50:10,827 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1322008831] [2020-04-18 15:50:10,827 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:10,913 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:50:10,913 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:10,914 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:10,914 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:10,916 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:10,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:10,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:10,916 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:10,917 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:10,920 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:50:10,920 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:10,982 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:10,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:50:10,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=140, Unknown=0, NotChecked=0, Total=210 [2020-04-18 15:50:10,983 INFO L87 Difference]: Start difference. First operand 103 states and 172 transitions. Second operand 10 states. [2020-04-18 15:50:11,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:11,078 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:50:11,078 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:50:11,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:11,078 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:11,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:11,078 INFO L82 PathProgramCache]: Analyzing trace with hash -2138468196, now seen corresponding path program 6 times [2020-04-18 15:50:11,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:11,079 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267330063] [2020-04-18 15:50:11,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:11,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:11,107 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:11,107 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267330063] [2020-04-18 15:50:11,108 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:11,108 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:11,108 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:11,109 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:11,111 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:50:11,111 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:11,118 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:11,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:11,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2020-04-18 15:50:11,119 INFO L87 Difference]: Start difference. First operand 103 states and 172 transitions. Second operand 7 states. [2020-04-18 15:50:11,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:11,194 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:50:11,194 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:50:11,194 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:11,195 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2042352520] [2020-04-18 15:50:11,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:11,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:11,195 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2042352520] [2020-04-18 15:50:11,195 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2020-04-18 15:50:11,196 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:11,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:50:11,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=459, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:50:11,196 INFO L87 Difference]: Start difference. First operand 28237 states and 150261 transitions. Second operand 12 states. [2020-04-18 15:50:12,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:12,161 INFO L93 Difference]: Finished difference Result 83516 states and 377086 transitions. [2020-04-18 15:50:12,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:50:12,161 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2020-04-18 15:50:12,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:12,395 INFO L225 Difference]: With dead ends: 83516 [2020-04-18 15:50:12,395 INFO L226 Difference]: Without dead ends: 83431 [2020-04-18 15:50:12,395 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 137 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=377, Invalid=1029, Unknown=0, NotChecked=0, Total=1406 [2020-04-18 15:50:13,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83431 states. [2020-04-18 15:50:14,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83431 to 28061. [2020-04-18 15:50:14,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28061 states. [2020-04-18 15:50:14,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28061 states to 28061 states and 149307 transitions. [2020-04-18 15:50:14,918 INFO L78 Accepts]: Start accepts. Automaton has 28061 states and 149307 transitions. Word has length 19 [2020-04-18 15:50:14,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:14,918 INFO L479 AbstractCegarLoop]: Abstraction has 28061 states and 149307 transitions. [2020-04-18 15:50:14,918 INFO L480 AbstractCegarLoop]: Interpolant automaton has 12 states. [2020-04-18 15:50:14,918 INFO L276 IsEmpty]: Start isEmpty. Operand 28061 states and 149307 transitions. [2020-04-18 15:50:14,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:14,919 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:14,919 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:15,319 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 z3 -smt2 -in SMTLIB2_COMPLIANT=true,53 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:15,320 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:15,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,320 INFO L82 PathProgramCache]: Analyzing trace with hash -2138444729, now seen corresponding path program 1 times [2020-04-18 15:50:15,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:15,321 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [673462780] [2020-04-18 15:50:15,322 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,323 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:50:15,324 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:50:15,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:15,324 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:15,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,324 INFO L82 PathProgramCache]: Analyzing trace with hash 1952477143, now seen corresponding path program 2 times [2020-04-18 15:50:15,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,324 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471106015] [2020-04-18 15:50:15,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:15,333 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471106015] [2020-04-18 15:50:15,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:15,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:15,333 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,334 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,337 INFO L259 McrAutomatonBuilder]: Finished intersection with 33 states and 45 transitions. [2020-04-18 15:50:15,337 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,339 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:15,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:15,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:15,339 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:50:15,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,346 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:50:15,346 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:50:15,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:15,346 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:15,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,347 INFO L82 PathProgramCache]: Analyzing trace with hash -2138426399, now seen corresponding path program 3 times [2020-04-18 15:50:15,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,347 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921584395] [2020-04-18 15:50:15,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,371 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:15,372 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1921584395] [2020-04-18 15:50:15,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:15,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:15,372 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,373 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,374 INFO L259 McrAutomatonBuilder]: Finished intersection with 21 states and 21 transitions. [2020-04-18 15:50:15,375 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,381 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:15,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:15,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:15,381 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 5 states. [2020-04-18 15:50:15,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,416 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:50:15,416 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:50:15,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:15,417 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:15,417 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,417 INFO L82 PathProgramCache]: Analyzing trace with hash -2138444729, now seen corresponding path program 4 times [2020-04-18 15:50:15,417 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,418 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417902787] [2020-04-18 15:50:15,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,443 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:15,443 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417902787] [2020-04-18 15:50:15,443 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:15,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:15,444 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,444 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,446 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:50:15,446 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,461 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:15,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:15,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:15,462 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 7 states. [2020-04-18 15:50:15,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,540 INFO L93 Difference]: Finished difference Result 77 states and 124 transitions. [2020-04-18 15:50:15,540 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 124 transitions. [2020-04-18 15:50:15,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:50:15,540 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:15,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2117255609, now seen corresponding path program 5 times [2020-04-18 15:50:15,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,541 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235615091] [2020-04-18 15:50:15,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,573 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:15,574 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235615091] [2020-04-18 15:50:15,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:15,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:15,574 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,575 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,577 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:50:15,578 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,635 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:15,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:15,635 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:50:15,635 INFO L87 Difference]: Start difference. First operand 77 states and 124 transitions. Second operand 11 states. [2020-04-18 15:50:15,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,765 INFO L93 Difference]: Finished difference Result 80 states and 127 transitions. [2020-04-18 15:50:15,765 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 127 transitions. [2020-04-18 15:50:15,766 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:15,766 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [673462780] [2020-04-18 15:50:15,767 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:15,767 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:15,767 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [673462780] [2020-04-18 15:50:15,767 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:50:15,767 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:15,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:15,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=510, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:50:15,768 INFO L87 Difference]: Start difference. First operand 28061 states and 149307 transitions. Second operand 13 states. [2020-04-18 15:50:17,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:17,020 INFO L93 Difference]: Finished difference Result 89447 states and 400291 transitions. [2020-04-18 15:50:17,020 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:50:17,020 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2020-04-18 15:50:17,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:17,273 INFO L225 Difference]: With dead ends: 89447 [2020-04-18 15:50:17,274 INFO L226 Difference]: Without dead ends: 89337 [2020-04-18 15:50:17,274 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 637 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=526, Invalid=1636, Unknown=0, NotChecked=0, Total=2162 [2020-04-18 15:50:18,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89337 states. [2020-04-18 15:50:19,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89337 to 29094. [2020-04-18 15:50:19,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29094 states. [2020-04-18 15:50:19,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29094 states to 29094 states and 154883 transitions. [2020-04-18 15:50:19,325 INFO L78 Accepts]: Start accepts. Automaton has 29094 states and 154883 transitions. Word has length 19 [2020-04-18 15:50:19,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:19,325 INFO L479 AbstractCegarLoop]: Abstraction has 29094 states and 154883 transitions. [2020-04-18 15:50:19,325 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:50:19,325 INFO L276 IsEmpty]: Start isEmpty. Operand 29094 states and 154883 transitions. [2020-04-18 15:50:19,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:19,326 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:19,326 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:19,326 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:19,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:19,326 INFO L82 PathProgramCache]: Analyzing trace with hash 1393024961, now seen corresponding path program 1 times [2020-04-18 15:50:19,326 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:19,326 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [869401979] [2020-04-18 15:50:19,327 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:19,329 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:50:19,329 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:50:19,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:19,330 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:19,330 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:19,330 INFO L82 PathProgramCache]: Analyzing trace with hash 1059131539, now seen corresponding path program 2 times [2020-04-18 15:50:19,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:19,330 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738416419] [2020-04-18 15:50:19,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:19,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:19,358 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:19,359 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738416419] [2020-04-18 15:50:19,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:19,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:19,359 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:19,360 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:19,368 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 99 transitions. [2020-04-18 15:50:19,368 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:19,371 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:19,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:19,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:19,371 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:50:19,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:19,381 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:50:19,381 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:50:19,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:19,382 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:19,382 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:19,382 INFO L82 PathProgramCache]: Analyzing trace with hash 1212625151, now seen corresponding path program 3 times [2020-04-18 15:50:19,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:19,382 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2000928806] [2020-04-18 15:50:19,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:19,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:19,402 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:19,402 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2000928806] [2020-04-18 15:50:19,402 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:19,403 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:19,403 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:19,404 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:19,410 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 46 transitions. [2020-04-18 15:50:19,411 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:19,424 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:19,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:19,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:19,425 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:50:19,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:19,487 INFO L93 Difference]: Finished difference Result 238 states and 528 transitions. [2020-04-18 15:50:19,487 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 528 transitions. [2020-04-18 15:50:19,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:19,488 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:19,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:19,488 INFO L82 PathProgramCache]: Analyzing trace with hash 1211616101, now seen corresponding path program 4 times [2020-04-18 15:50:19,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:19,489 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949183202] [2020-04-18 15:50:19,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:19,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:19,511 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:19,511 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949183202] [2020-04-18 15:50:19,511 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1136111706] [2020-04-18 15:50:19,512 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:20,054 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:20,055 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:20,055 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:20,056 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:20,058 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:20,059 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:20,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:50:20,059 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:20,060 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:20,063 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 49 transitions. [2020-04-18 15:50:20,063 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:20,069 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:20,069 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:20,070 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:50:20,070 INFO L87 Difference]: Start difference. First operand 238 states and 528 transitions. Second operand 5 states. [2020-04-18 15:50:20,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:20,123 INFO L93 Difference]: Finished difference Result 323 states and 649 transitions. [2020-04-18 15:50:20,123 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 649 transitions. [2020-04-18 15:50:20,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:20,124 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:20,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:20,125 INFO L82 PathProgramCache]: Analyzing trace with hash 1211597771, now seen corresponding path program 5 times [2020-04-18 15:50:20,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:20,125 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35750358] [2020-04-18 15:50:20,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:20,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:20,163 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:20,163 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35750358] [2020-04-18 15:50:20,164 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1672836480] [2020-04-18 15:50:20,164 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:20,289 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:50:20,289 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:20,290 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:20,292 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:20,295 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:20,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:20,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:20,296 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:20,297 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:20,303 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 45 transitions. [2020-04-18 15:50:20,304 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:20,332 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:20,332 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:20,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2020-04-18 15:50:20,333 INFO L87 Difference]: Start difference. First operand 323 states and 649 transitions. Second operand 7 states. [2020-04-18 15:50:20,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:20,539 INFO L93 Difference]: Finished difference Result 382 states and 708 transitions. [2020-04-18 15:50:20,540 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 708 transitions. [2020-04-18 15:50:20,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:20,540 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:20,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:20,541 INFO L82 PathProgramCache]: Analyzing trace with hash 1212072191, now seen corresponding path program 6 times [2020-04-18 15:50:20,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:20,541 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587825468] [2020-04-18 15:50:20,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:20,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:20,574 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:20,575 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587825468] [2020-04-18 15:50:20,575 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:20,575 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:50:20,575 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:20,576 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:20,582 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 45 transitions. [2020-04-18 15:50:20,582 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:20,583 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:20,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:20,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:50:20,583 INFO L87 Difference]: Start difference. First operand 382 states and 708 transitions. Second operand 7 states. [2020-04-18 15:50:20,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:20,730 INFO L93 Difference]: Finished difference Result 452 states and 797 transitions. [2020-04-18 15:50:20,730 INFO L276 IsEmpty]: Start isEmpty. Operand 452 states and 797 transitions. [2020-04-18 15:50:20,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:20,731 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:50:20,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:20,732 INFO L82 PathProgramCache]: Analyzing trace with hash 1393043291, now seen corresponding path program 7 times [2020-04-18 15:50:20,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:20,732 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634330436] [2020-04-18 15:50:20,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:20,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:20,759 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:20,760 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634330436] [2020-04-18 15:50:20,760 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [804287741] [2020-04-18 15:50:20,760 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:20,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:20,852 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:20,853 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:20,855 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:20,855 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:20,855 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:50:20,855 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:20,857 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:20,861 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:50:20,861 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:20,929 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:20,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:50:20,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=172, Invalid=478, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:50:20,930 INFO L87 Difference]: Start difference. First operand 452 states and 797 transitions. Second operand 10 states. [2020-04-18 15:50:21,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:21,196 INFO L93 Difference]: Finished difference Result 467 states and 808 transitions. [2020-04-18 15:50:21,196 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 808 transitions. [2020-04-18 15:50:21,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:21,197 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:50:21,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:21,198 INFO L82 PathProgramCache]: Analyzing trace with hash 1393024961, now seen corresponding path program 8 times [2020-04-18 15:50:21,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:21,198 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284465555] [2020-04-18 15:50:21,198 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:21,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:21,243 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:21,243 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284465555] [2020-04-18 15:50:21,244 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1233508164] [2020-04-18 15:50:21,244 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:21,338 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:50:21,338 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:21,338 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:21,339 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:21,342 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:21,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:21,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:50:21,343 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:21,343 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:21,347 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:50:21,347 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:21,383 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:21,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:50:21,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=853, Unknown=0, NotChecked=0, Total=1122 [2020-04-18 15:50:21,383 INFO L87 Difference]: Start difference. First operand 467 states and 808 transitions. Second operand 12 states. [2020-04-18 15:50:21,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:21,919 INFO L93 Difference]: Finished difference Result 467 states and 808 transitions. [2020-04-18 15:50:21,920 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 808 transitions. [2020-04-18 15:50:21,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:21,920 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:50:21,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:21,921 INFO L82 PathProgramCache]: Analyzing trace with hash 1414214081, now seen corresponding path program 9 times [2020-04-18 15:50:21,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:21,921 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918634801] [2020-04-18 15:50:21,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:21,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:21,992 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:21,993 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918634801] [2020-04-18 15:50:21,993 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [684670086] [2020-04-18 15:50:21,993 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:22,089 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:50:22,089 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:22,090 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:22,090 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:22,093 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:22,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:22,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:50:22,094 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:22,095 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:22,100 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:50:22,100 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:22,191 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:50:22,191 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-04-18 15:50:22,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=600, Invalid=2156, Unknown=0, NotChecked=0, Total=2756 [2020-04-18 15:50:22,191 INFO L87 Difference]: Start difference. First operand 467 states and 808 transitions. Second operand 16 states. [2020-04-18 15:50:22,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:22,882 INFO L93 Difference]: Finished difference Result 474 states and 813 transitions. [2020-04-18 15:50:22,882 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 813 transitions. [2020-04-18 15:50:22,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:22,883 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:50:22,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:22,883 INFO L82 PathProgramCache]: Analyzing trace with hash -2073528999, now seen corresponding path program 10 times [2020-04-18 15:50:22,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:22,884 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [293453372] [2020-04-18 15:50:22,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:22,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:22,920 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:22,920 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [293453372] [2020-04-18 15:50:22,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:22,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:50:22,921 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:22,922 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:22,926 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 23 transitions. [2020-04-18 15:50:22,926 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:22,943 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:22,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:22,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=928, Invalid=3628, Unknown=0, NotChecked=0, Total=4556 [2020-04-18 15:50:22,944 INFO L87 Difference]: Start difference. First operand 474 states and 813 transitions. Second operand 7 states. [2020-04-18 15:50:23,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:23,129 INFO L93 Difference]: Finished difference Result 489 states and 824 transitions. [2020-04-18 15:50:23,129 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 824 transitions. [2020-04-18 15:50:23,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:23,130 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:50:23,130 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:23,130 INFO L82 PathProgramCache]: Analyzing trace with hash -2073547329, now seen corresponding path program 11 times [2020-04-18 15:50:23,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:23,131 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948870185] [2020-04-18 15:50:23,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:23,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:23,171 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:23,172 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948870185] [2020-04-18 15:50:23,172 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:23,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:23,172 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:23,173 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:23,175 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:50:23,175 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:23,176 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:23,176 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:23,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1039, Invalid=4363, Unknown=0, NotChecked=0, Total=5402 [2020-04-18 15:50:23,176 INFO L87 Difference]: Start difference. First operand 489 states and 824 transitions. Second operand 9 states. [2020-04-18 15:50:23,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:23,584 INFO L93 Difference]: Finished difference Result 489 states and 824 transitions. [2020-04-18 15:50:23,585 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 824 transitions. [2020-04-18 15:50:23,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:23,586 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:50:23,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:23,586 INFO L82 PathProgramCache]: Analyzing trace with hash -2051019009, now seen corresponding path program 12 times [2020-04-18 15:50:23,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:23,587 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224960374] [2020-04-18 15:50:23,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:23,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:23,626 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:23,626 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224960374] [2020-04-18 15:50:23,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:23,626 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:23,627 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:23,627 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:23,630 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:50:23,630 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:23,644 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:23,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:23,645 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1375, Invalid=6107, Unknown=0, NotChecked=0, Total=7482 [2020-04-18 15:50:23,645 INFO L87 Difference]: Start difference. First operand 489 states and 824 transitions. Second operand 9 states. [2020-04-18 15:50:24,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:24,069 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:50:24,069 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:50:24,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:24,070 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:50:24,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:24,071 INFO L82 PathProgramCache]: Analyzing trace with hash 1130516927, now seen corresponding path program 13 times [2020-04-18 15:50:24,071 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:24,071 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129592155] [2020-04-18 15:50:24,071 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:24,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:24,114 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:24,114 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129592155] [2020-04-18 15:50:24,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:24,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:24,114 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:24,115 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:24,119 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:50:24,119 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:24,214 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:50:24,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:50:24,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1869, Invalid=9261, Unknown=0, NotChecked=0, Total=11130 [2020-04-18 15:50:24,216 INFO L87 Difference]: Start difference. First operand 496 states and 828 transitions. Second operand 17 states. [2020-04-18 15:50:24,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:24,985 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:50:24,986 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:50:24,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:24,986 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:50:24,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:24,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1131856127, now seen corresponding path program 14 times [2020-04-18 15:50:24,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:24,987 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [546068475] [2020-04-18 15:50:24,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:24,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:25,053 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:25,054 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [546068475] [2020-04-18 15:50:25,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:25,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:25,055 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:25,056 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:25,060 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:50:25,060 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:25,062 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:25,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:25,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2403, Invalid=12603, Unknown=0, NotChecked=0, Total=15006 [2020-04-18 15:50:25,064 INFO L87 Difference]: Start difference. First operand 496 states and 828 transitions. Second operand 13 states. [2020-04-18 15:50:25,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:25,706 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:50:25,706 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:50:25,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:25,707 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [869401979] [2020-04-18 15:50:25,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:25,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:50:25,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [869401979] [2020-04-18 15:50:25,708 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2020-04-18 15:50:25,708 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:25,708 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2020-04-18 15:50:25,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2913, Invalid=15993, Unknown=0, NotChecked=0, Total=18906 [2020-04-18 15:50:25,710 INFO L87 Difference]: Start difference. First operand 29094 states and 154883 transitions. Second operand 26 states. [2020-04-18 15:50:33,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:33,707 INFO L93 Difference]: Finished difference Result 184065 states and 731893 transitions. [2020-04-18 15:50:33,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 232 states. [2020-04-18 15:50:33,707 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 21 [2020-04-18 15:50:33,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:34,249 INFO L225 Difference]: With dead ends: 184065 [2020-04-18 15:50:34,249 INFO L226 Difference]: Without dead ends: 183845 [2020-04-18 15:50:34,254 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 807 GetRequests, 479 SyntacticMatches, 3 SemanticMatches, 325 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47645 ImplicationChecksByTransitivity, 6.6s TimeCoverageRelationStatistics Valid=13393, Invalid=93209, Unknown=0, NotChecked=0, Total=106602 [2020-04-18 15:50:36,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183845 states. [2020-04-18 15:50:37,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183845 to 25744. [2020-04-18 15:50:37,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25744 states. [2020-04-18 15:50:38,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25744 states to 25744 states and 137181 transitions. [2020-04-18 15:50:38,056 INFO L78 Accepts]: Start accepts. Automaton has 25744 states and 137181 transitions. Word has length 21 [2020-04-18 15:50:38,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:38,056 INFO L479 AbstractCegarLoop]: Abstraction has 25744 states and 137181 transitions. [2020-04-18 15:50:38,057 INFO L480 AbstractCegarLoop]: Interpolant automaton has 26 states. [2020-04-18 15:50:38,057 INFO L276 IsEmpty]: Start isEmpty. Operand 25744 states and 137181 transitions. [2020-04-18 15:50:38,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:38,057 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:38,057 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:39,059 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 z3 -smt2 -in SMTLIB2_COMPLIANT=true,55 z3 -smt2 -in SMTLIB2_COMPLIANT=true,57 z3 -smt2 -in SMTLIB2_COMPLIANT=true,56 z3 -smt2 -in SMTLIB2_COMPLIANT=true,58 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:39,060 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:39,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:39,060 INFO L82 PathProgramCache]: Analyzing trace with hash 102150333, now seen corresponding path program 1 times [2020-04-18 15:50:39,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:39,061 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1058300664] [2020-04-18 15:50:39,062 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:39,063 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:50:39,063 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:50:39,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:39,063 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:39,063 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:39,063 INFO L82 PathProgramCache]: Analyzing trace with hash 2131721569, now seen corresponding path program 2 times [2020-04-18 15:50:39,063 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:39,064 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346061705] [2020-04-18 15:50:39,064 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:39,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:39,071 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:39,071 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346061705] [2020-04-18 15:50:39,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:39,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:39,071 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:39,072 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:39,075 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:50:39,075 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:39,077 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:39,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:39,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:39,077 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:50:39,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:39,079 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:50:39,079 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:50:39,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:50:39,080 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:39,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:39,080 INFO L82 PathProgramCache]: Analyzing trace with hash 102150333, now seen corresponding path program 3 times [2020-04-18 15:50:39,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:39,081 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628688724] [2020-04-18 15:50:39,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:39,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:39,099 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:39,100 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1628688724] [2020-04-18 15:50:39,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:39,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:39,101 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:39,102 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:39,104 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:50:39,104 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:39,111 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:39,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:39,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:39,112 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:50:39,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:39,128 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:50:39,128 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:50:39,128 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:39,128 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1058300664] [2020-04-18 15:50:39,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:39,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:39,129 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1058300664] [2020-04-18 15:50:39,129 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:39,129 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:39,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:39,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:39,129 INFO L87 Difference]: Start difference. First operand 25744 states and 137181 transitions. Second operand 5 states. [2020-04-18 15:50:39,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:39,470 INFO L93 Difference]: Finished difference Result 46463 states and 236107 transitions. [2020-04-18 15:50:39,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:39,470 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:50:39,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:39,619 INFO L225 Difference]: With dead ends: 46463 [2020-04-18 15:50:39,619 INFO L226 Difference]: Without dead ends: 46417 [2020-04-18 15:50:39,619 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:40,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46417 states. [2020-04-18 15:50:41,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46417 to 31960. [2020-04-18 15:50:41,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31960 states. [2020-04-18 15:50:41,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31960 states to 31960 states and 171209 transitions. [2020-04-18 15:50:41,571 INFO L78 Accepts]: Start accepts. Automaton has 31960 states and 171209 transitions. Word has length 21 [2020-04-18 15:50:41,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:41,571 INFO L479 AbstractCegarLoop]: Abstraction has 31960 states and 171209 transitions. [2020-04-18 15:50:41,571 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:41,571 INFO L276 IsEmpty]: Start isEmpty. Operand 31960 states and 171209 transitions. [2020-04-18 15:50:41,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:41,572 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:41,573 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:41,573 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:41,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:41,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1106577557, now seen corresponding path program 1 times [2020-04-18 15:50:41,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:41,573 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [618736554] [2020-04-18 15:50:41,574 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:41,575 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 203 transitions. [2020-04-18 15:50:41,576 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states. [2020-04-18 15:50:41,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:41,576 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:41,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:41,576 INFO L82 PathProgramCache]: Analyzing trace with hash 2086035311, now seen corresponding path program 2 times [2020-04-18 15:50:41,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:41,576 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987903997] [2020-04-18 15:50:41,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:41,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:41,585 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:41,585 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [987903997] [2020-04-18 15:50:41,585 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:41,585 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:41,586 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:41,586 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:41,592 INFO L259 McrAutomatonBuilder]: Finished intersection with 69 states and 126 transitions. [2020-04-18 15:50:41,592 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:41,595 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:41,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:41,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:41,595 INFO L87 Difference]: Start difference. First operand 100 states. Second operand 3 states. [2020-04-18 15:50:41,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:41,602 INFO L93 Difference]: Finished difference Result 117 states and 219 transitions. [2020-04-18 15:50:41,602 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 219 transitions. [2020-04-18 15:50:41,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:41,602 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:41,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:41,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1107229367, now seen corresponding path program 3 times [2020-04-18 15:50:41,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:41,603 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181019848] [2020-04-18 15:50:41,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:41,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:41,621 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [181019848] [2020-04-18 15:50:41,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:41,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:41,622 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:41,624 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:41,629 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 52 transitions. [2020-04-18 15:50:41,629 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:41,637 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:41,637 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:41,637 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:41,637 INFO L87 Difference]: Start difference. First operand 117 states and 219 transitions. Second operand 5 states. [2020-04-18 15:50:41,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:41,669 INFO L93 Difference]: Finished difference Result 124 states and 224 transitions. [2020-04-18 15:50:41,669 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 224 transitions. [2020-04-18 15:50:41,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:41,669 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:41,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:41,670 INFO L82 PathProgramCache]: Analyzing trace with hash -1107230417, now seen corresponding path program 4 times [2020-04-18 15:50:41,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:41,670 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16230129] [2020-04-18 15:50:41,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:41,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:41,689 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:41,689 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16230129] [2020-04-18 15:50:41,690 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1448570280] [2020-04-18 15:50:41,690 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:41,780 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:41,780 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:41,781 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:41,781 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:41,783 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:41,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:41,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:50:41,783 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:41,784 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:41,788 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 52 transitions. [2020-04-18 15:50:41,788 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:41,793 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:41,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:41,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:50:41,793 INFO L87 Difference]: Start difference. First operand 124 states and 224 transitions. Second operand 5 states. [2020-04-18 15:50:41,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:41,827 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:50:41,827 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:50:41,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:41,828 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:41,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:41,828 INFO L82 PathProgramCache]: Analyzing trace with hash -1106577557, now seen corresponding path program 5 times [2020-04-18 15:50:41,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:41,828 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966090887] [2020-04-18 15:50:41,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:41,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:41,857 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:41,858 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966090887] [2020-04-18 15:50:41,858 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1088592709] [2020-04-18 15:50:41,858 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:41,950 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:41,951 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:41,951 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:41,952 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:41,953 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:41,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:41,954 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:41,954 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:41,955 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:41,960 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 71 transitions. [2020-04-18 15:50:41,960 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:42,029 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:50:42,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:42,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=159, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:50:42,030 INFO L87 Difference]: Start difference. First operand 131 states and 228 transitions. Second operand 11 states. [2020-04-18 15:50:42,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:42,141 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:50:42,141 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:50:42,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:42,141 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:42,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:42,142 INFO L82 PathProgramCache]: Analyzing trace with hash -617779723, now seen corresponding path program 6 times [2020-04-18 15:50:42,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:42,142 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869636366] [2020-04-18 15:50:42,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:42,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:42,170 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:42,170 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869636366] [2020-04-18 15:50:42,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:42,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:42,171 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:42,172 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:42,175 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:50:42,176 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:42,184 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:42,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:42,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=319, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:50:42,184 INFO L87 Difference]: Start difference. First operand 131 states and 228 transitions. Second operand 7 states. [2020-04-18 15:50:42,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:42,266 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:50:42,266 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:50:42,266 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:42,267 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [618736554] [2020-04-18 15:50:42,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:42,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:42,267 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [618736554] [2020-04-18 15:50:42,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:50:42,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:42,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:42,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=494, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:50:42,268 INFO L87 Difference]: Start difference. First operand 31960 states and 171209 transitions. Second operand 13 states. [2020-04-18 15:50:43,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:43,371 INFO L93 Difference]: Finished difference Result 94350 states and 432647 transitions. [2020-04-18 15:50:43,371 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:50:43,371 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2020-04-18 15:50:43,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:43,665 INFO L225 Difference]: With dead ends: 94350 [2020-04-18 15:50:43,665 INFO L226 Difference]: Without dead ends: 94208 [2020-04-18 15:50:43,665 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 167 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 414 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=403, Invalid=1079, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:50:44,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94208 states. [2020-04-18 15:50:46,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94208 to 32410. [2020-04-18 15:50:46,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32410 states. [2020-04-18 15:50:46,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32410 states to 32410 states and 173487 transitions. [2020-04-18 15:50:46,429 INFO L78 Accepts]: Start accepts. Automaton has 32410 states and 173487 transitions. Word has length 23 [2020-04-18 15:50:46,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:46,429 INFO L479 AbstractCegarLoop]: Abstraction has 32410 states and 173487 transitions. [2020-04-18 15:50:46,429 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:50:46,429 INFO L276 IsEmpty]: Start isEmpty. Operand 32410 states and 173487 transitions. [2020-04-18 15:50:46,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:46,431 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:46,431 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:46,831 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 61 z3 -smt2 -in SMTLIB2_COMPLIANT=true,60 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:46,832 INFO L427 AbstractCegarLoop]: === Iteration 11 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:46,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:46,833 INFO L82 PathProgramCache]: Analyzing trace with hash 1026706248, now seen corresponding path program 1 times [2020-04-18 15:50:46,833 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:46,833 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [902152274] [2020-04-18 15:50:46,834 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:46,836 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 123 transitions. [2020-04-18 15:50:46,836 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states. [2020-04-18 15:50:46,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:46,837 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:46,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:46,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1724453322, now seen corresponding path program 2 times [2020-04-18 15:50:46,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:46,837 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233518413] [2020-04-18 15:50:46,837 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:46,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:46,845 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:46,845 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [233518413] [2020-04-18 15:50:46,845 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:46,845 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:46,845 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:46,846 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:46,850 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 85 transitions. [2020-04-18 15:50:46,850 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:46,852 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:46,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:46,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:46,853 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 3 states. [2020-04-18 15:50:46,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:46,859 INFO L93 Difference]: Finished difference Result 77 states and 131 transitions. [2020-04-18 15:50:46,860 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 131 transitions. [2020-04-18 15:50:46,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:46,860 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:46,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:46,860 INFO L82 PathProgramCache]: Analyzing trace with hash 1118728608, now seen corresponding path program 3 times [2020-04-18 15:50:46,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:46,861 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2036226491] [2020-04-18 15:50:46,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:46,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:46,879 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:46,879 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2036226491] [2020-04-18 15:50:46,879 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [971894864] [2020-04-18 15:50:46,880 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:46,964 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:46,965 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:46,965 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:46,966 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:46,968 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:46,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:46,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:50:46,968 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:46,969 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:46,973 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 49 transitions. [2020-04-18 15:50:46,973 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:46,981 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:50:46,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:46,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:46,981 INFO L87 Difference]: Start difference. First operand 77 states and 131 transitions. Second operand 5 states. [2020-04-18 15:50:47,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,014 INFO L93 Difference]: Finished difference Result 84 states and 136 transitions. [2020-04-18 15:50:47,014 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 136 transitions. [2020-04-18 15:50:47,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:47,014 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:47,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1026706248, now seen corresponding path program 4 times [2020-04-18 15:50:47,015 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:47,015 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962001727] [2020-04-18 15:50:47,015 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:47,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:47,043 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:47,043 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962001727] [2020-04-18 15:50:47,043 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [385818987] [2020-04-18 15:50:47,043 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:47,135 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:47,135 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:47,136 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:47,136 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:47,139 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:47,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:47,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:47,139 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:47,141 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,144 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 39 transitions. [2020-04-18 15:50:47,144 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:47,158 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:47,159 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:47,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:47,159 INFO L87 Difference]: Start difference. First operand 84 states and 136 transitions. Second operand 7 states. [2020-04-18 15:50:47,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,230 INFO L93 Difference]: Finished difference Result 85 states and 136 transitions. [2020-04-18 15:50:47,230 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 136 transitions. [2020-04-18 15:50:47,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:47,231 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:47,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,231 INFO L82 PathProgramCache]: Analyzing trace with hash -617778328, now seen corresponding path program 5 times [2020-04-18 15:50:47,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:47,232 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51695817] [2020-04-18 15:50:47,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:47,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:47,261 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:47,262 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51695817] [2020-04-18 15:50:47,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:47,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:47,263 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:47,264 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,267 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:50:47,267 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:47,279 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:47,279 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:47,279 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:50:47,280 INFO L87 Difference]: Start difference. First operand 85 states and 136 transitions. Second operand 7 states. [2020-04-18 15:50:47,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,371 INFO L93 Difference]: Finished difference Result 88 states and 139 transitions. [2020-04-18 15:50:47,371 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 139 transitions. [2020-04-18 15:50:47,371 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:47,372 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [902152274] [2020-04-18 15:50:47,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:47,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:47,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [902152274] [2020-04-18 15:50:47,373 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-04-18 15:50:47,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:47,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:47,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:50:47,373 INFO L87 Difference]: Start difference. First operand 32410 states and 173487 transitions. Second operand 9 states. [2020-04-18 15:50:48,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:48,120 INFO L93 Difference]: Finished difference Result 89551 states and 421651 transitions. [2020-04-18 15:50:48,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:50:48,121 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 23 [2020-04-18 15:50:48,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:48,391 INFO L225 Difference]: With dead ends: 89551 [2020-04-18 15:50:48,391 INFO L226 Difference]: Without dead ends: 89454 [2020-04-18 15:50:48,392 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 141 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 194 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=216, Invalid=540, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:50:49,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89454 states. [2020-04-18 15:50:50,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89454 to 34508. [2020-04-18 15:50:50,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34508 states. [2020-04-18 15:50:51,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34508 states to 34508 states and 184670 transitions. [2020-04-18 15:50:51,089 INFO L78 Accepts]: Start accepts. Automaton has 34508 states and 184670 transitions. Word has length 23 [2020-04-18 15:50:51,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:51,090 INFO L479 AbstractCegarLoop]: Abstraction has 34508 states and 184670 transitions. [2020-04-18 15:50:51,090 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-04-18 15:50:51,090 INFO L276 IsEmpty]: Start isEmpty. Operand 34508 states and 184670 transitions. [2020-04-18 15:50:51,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:51,091 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:51,091 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:51,492 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 63 z3 -smt2 -in SMTLIB2_COMPLIANT=true,62 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:51,492 INFO L427 AbstractCegarLoop]: === Iteration 12 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:51,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,493 INFO L82 PathProgramCache]: Analyzing trace with hash -617756256, now seen corresponding path program 1 times [2020-04-18 15:50:51,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:51,494 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [392093199] [2020-04-18 15:50:51,495 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,496 INFO L259 McrAutomatonBuilder]: Finished intersection with 84 states and 163 transitions. [2020-04-18 15:50:51,497 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states. [2020-04-18 15:50:51,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:51,497 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:51,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,497 INFO L82 PathProgramCache]: Analyzing trace with hash -114932514, now seen corresponding path program 2 times [2020-04-18 15:50:51,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,498 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306869244] [2020-04-18 15:50:51,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,504 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:51,504 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306869244] [2020-04-18 15:50:51,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:51,505 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,506 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,510 INFO L259 McrAutomatonBuilder]: Finished intersection with 41 states and 57 transitions. [2020-04-18 15:50:51,510 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,512 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:51,513 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:51,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:51,513 INFO L87 Difference]: Start difference. First operand 84 states. Second operand 3 states. [2020-04-18 15:50:51,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,519 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2020-04-18 15:50:51,519 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2020-04-18 15:50:51,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:51,520 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:51,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,520 INFO L82 PathProgramCache]: Analyzing trace with hash -617737926, now seen corresponding path program 3 times [2020-04-18 15:50:51,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,521 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651747048] [2020-04-18 15:50:51,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,559 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:51,559 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651747048] [2020-04-18 15:50:51,560 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,560 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:51,560 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,561 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,565 INFO L259 McrAutomatonBuilder]: Finished intersection with 25 states and 25 transitions. [2020-04-18 15:50:51,565 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,573 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:51,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:51,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:51,573 INFO L87 Difference]: Start difference. First operand 97 states and 175 transitions. Second operand 5 states. [2020-04-18 15:50:51,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,602 INFO L93 Difference]: Finished difference Result 104 states and 180 transitions. [2020-04-18 15:50:51,603 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 180 transitions. [2020-04-18 15:50:51,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:51,603 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:51,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,603 INFO L82 PathProgramCache]: Analyzing trace with hash -617756256, now seen corresponding path program 4 times [2020-04-18 15:50:51,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,604 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1835383379] [2020-04-18 15:50:51,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,634 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:51,634 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1835383379] [2020-04-18 15:50:51,635 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,635 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:51,635 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,636 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,639 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:50:51,639 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,649 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:51,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:51,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:51,649 INFO L87 Difference]: Start difference. First operand 104 states and 180 transitions. Second operand 7 states. [2020-04-18 15:50:51,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,721 INFO L93 Difference]: Finished difference Result 105 states and 180 transitions. [2020-04-18 15:50:51,721 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 180 transitions. [2020-04-18 15:50:51,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:51,721 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:51,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,722 INFO L82 PathProgramCache]: Analyzing trace with hash -581716896, now seen corresponding path program 5 times [2020-04-18 15:50:51,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,722 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89554134] [2020-04-18 15:50:51,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,747 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:51,747 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89554134] [2020-04-18 15:50:51,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:51,748 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,749 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,754 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 55 transitions. [2020-04-18 15:50:51,754 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,863 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:50:51,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:51,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=344, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:50:51,864 INFO L87 Difference]: Start difference. First operand 105 states and 180 transitions. Second operand 13 states. [2020-04-18 15:50:52,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:52,006 INFO L93 Difference]: Finished difference Result 108 states and 183 transitions. [2020-04-18 15:50:52,006 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 183 transitions. [2020-04-18 15:50:52,006 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:52,007 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [392093199] [2020-04-18 15:50:52,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:52,007 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:52,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [392093199] [2020-04-18 15:50:52,008 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2020-04-18 15:50:52,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:52,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:50:52,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=594, Unknown=0, NotChecked=0, Total=812 [2020-04-18 15:50:52,009 INFO L87 Difference]: Start difference. First operand 34508 states and 184670 transitions. Second operand 15 states. [2020-04-18 15:50:53,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:53,308 INFO L93 Difference]: Finished difference Result 107380 states and 487761 transitions. [2020-04-18 15:50:53,308 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:50:53,309 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 23 [2020-04-18 15:50:53,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:53,671 INFO L225 Difference]: With dead ends: 107380 [2020-04-18 15:50:53,671 INFO L226 Difference]: Without dead ends: 107189 [2020-04-18 15:50:53,671 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 703 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=585, Invalid=1767, Unknown=0, NotChecked=0, Total=2352 [2020-04-18 15:50:55,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107189 states. [2020-04-18 15:50:56,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107189 to 37062. [2020-04-18 15:50:56,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37062 states. [2020-04-18 15:50:56,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37062 states to 37062 states and 198528 transitions. [2020-04-18 15:50:56,598 INFO L78 Accepts]: Start accepts. Automaton has 37062 states and 198528 transitions. Word has length 23 [2020-04-18 15:50:56,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:56,598 INFO L479 AbstractCegarLoop]: Abstraction has 37062 states and 198528 transitions. [2020-04-18 15:50:56,598 INFO L480 AbstractCegarLoop]: Interpolant automaton has 15 states. [2020-04-18 15:50:56,598 INFO L276 IsEmpty]: Start isEmpty. Operand 37062 states and 198528 transitions. [2020-04-18 15:50:56,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:56,600 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:56,600 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:56,601 INFO L427 AbstractCegarLoop]: === Iteration 13 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:56,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:56,601 INFO L82 PathProgramCache]: Analyzing trace with hash 1745706838, now seen corresponding path program 1 times [2020-04-18 15:50:56,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:56,601 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1124098217] [2020-04-18 15:50:56,602 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:56,604 INFO L259 McrAutomatonBuilder]: Finished intersection with 184 states and 457 transitions. [2020-04-18 15:50:56,605 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states. [2020-04-18 15:50:56,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:56,605 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:56,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:56,606 INFO L82 PathProgramCache]: Analyzing trace with hash 574724282, now seen corresponding path program 2 times [2020-04-18 15:50:56,606 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:56,606 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705414905] [2020-04-18 15:50:56,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:56,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:56,613 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:56,614 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705414905] [2020-04-18 15:50:56,614 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:56,614 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:56,615 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:56,616 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:56,629 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 203 transitions. [2020-04-18 15:50:56,629 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:56,632 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:56,632 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:56,632 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:56,632 INFO L87 Difference]: Start difference. First operand 184 states. Second operand 3 states. [2020-04-18 15:50:56,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:56,642 INFO L93 Difference]: Finished difference Result 231 states and 531 transitions. [2020-04-18 15:50:56,642 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 531 transitions. [2020-04-18 15:50:56,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:56,642 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:56,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:56,643 INFO L82 PathProgramCache]: Analyzing trace with hash -899589434, now seen corresponding path program 3 times [2020-04-18 15:50:56,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:56,643 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661394305] [2020-04-18 15:50:56,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:56,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:56,684 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:56,685 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661394305] [2020-04-18 15:50:56,685 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [973623125] [2020-04-18 15:50:56,685 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:56,799 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:56,799 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:56,800 INFO L264 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:56,801 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:56,803 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:56,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:56,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:50:56,803 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:56,805 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:56,816 INFO L259 McrAutomatonBuilder]: Finished intersection with 73 states and 121 transitions. [2020-04-18 15:50:56,816 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:56,831 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:50:56,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:56,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:56,831 INFO L87 Difference]: Start difference. First operand 231 states and 531 transitions. Second operand 5 states. [2020-04-18 15:50:56,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:56,882 INFO L93 Difference]: Finished difference Result 294 states and 632 transitions. [2020-04-18 15:50:56,882 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 632 transitions. [2020-04-18 15:50:56,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:56,883 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:56,883 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:56,883 INFO L82 PathProgramCache]: Analyzing trace with hash 542684702, now seen corresponding path program 4 times [2020-04-18 15:50:56,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:56,883 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323758372] [2020-04-18 15:50:56,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:56,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:56,912 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:56,912 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323758372] [2020-04-18 15:50:56,912 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2068138725] [2020-04-18 15:50:56,913 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:57,006 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:57,006 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:57,007 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:57,008 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:57,009 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:57,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:57,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:50:57,010 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:57,011 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:57,018 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 101 transitions. [2020-04-18 15:50:57,019 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:57,028 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:50:57,028 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:57,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:57,029 INFO L87 Difference]: Start difference. First operand 294 states and 632 transitions. Second operand 7 states. [2020-04-18 15:50:57,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:57,199 INFO L93 Difference]: Finished difference Result 336 states and 684 transitions. [2020-04-18 15:50:57,199 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 684 transitions. [2020-04-18 15:50:57,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:57,199 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:57,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:57,200 INFO L82 PathProgramCache]: Analyzing trace with hash 542683652, now seen corresponding path program 5 times [2020-04-18 15:50:57,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:57,200 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1280439766] [2020-04-18 15:50:57,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:57,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:57,219 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:57,219 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1280439766] [2020-04-18 15:50:57,219 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [240827181] [2020-04-18 15:50:57,219 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:57,315 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:57,315 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:57,316 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:57,317 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:57,319 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:57,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:57,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:50:57,319 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:57,320 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:57,330 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 110 transitions. [2020-04-18 15:50:57,330 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:57,379 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 11 times. [2020-04-18 15:50:57,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:57,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=279, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:50:57,380 INFO L87 Difference]: Start difference. First operand 336 states and 684 transitions. Second operand 9 states. [2020-04-18 15:50:57,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:57,512 INFO L93 Difference]: Finished difference Result 434 states and 804 transitions. [2020-04-18 15:50:57,512 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 804 transitions. [2020-04-18 15:50:57,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:57,513 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:57,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:57,513 INFO L82 PathProgramCache]: Analyzing trace with hash 543336512, now seen corresponding path program 6 times [2020-04-18 15:50:57,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:57,514 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1538176768] [2020-04-18 15:50:57,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:57,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:57,541 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:57,541 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1538176768] [2020-04-18 15:50:57,542 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [366413209] [2020-04-18 15:50:57,542 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:57,638 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:50:57,638 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:57,639 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:57,640 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:57,641 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:57,641 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:57,641 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:57,642 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:57,642 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:57,650 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 101 transitions. [2020-04-18 15:50:57,650 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:57,652 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:50:57,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:57,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=345, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:50:57,652 INFO L87 Difference]: Start difference. First operand 434 states and 804 transitions. Second operand 9 states. [2020-04-18 15:50:59,898 WARN L192 SmtUtils]: Spent 2.16 s on a formula simplification that was a NOOP. DAG size: 10 [2020-04-18 15:51:00,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,030 INFO L93 Difference]: Finished difference Result 480 states and 853 transitions. [2020-04-18 15:51:00,030 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 853 transitions. [2020-04-18 15:51:00,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:00,031 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:51:00,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1103270398, now seen corresponding path program 7 times [2020-04-18 15:51:00,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,032 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467356284] [2020-04-18 15:51:00,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,059 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:00,059 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467356284] [2020-04-18 15:51:00,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:00,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:00,060 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,062 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,068 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:00,068 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,089 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:00,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:00,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=588, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:51:00,090 INFO L87 Difference]: Start difference. First operand 480 states and 853 transitions. Second operand 7 states. [2020-04-18 15:51:00,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,287 INFO L93 Difference]: Finished difference Result 499 states and 867 transitions. [2020-04-18 15:51:00,287 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 867 transitions. [2020-04-18 15:51:00,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:00,288 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:51:00,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1103458138, now seen corresponding path program 8 times [2020-04-18 15:51:00,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,289 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336568587] [2020-04-18 15:51:00,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,317 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:00,318 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336568587] [2020-04-18 15:51:00,318 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1955962897] [2020-04-18 15:51:00,318 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:00,411 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:51:00,412 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:00,413 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:00,414 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:00,415 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:00,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:00,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:00,416 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,416 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,422 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:00,422 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,424 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:00,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:00,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=256, Invalid=1004, Unknown=0, NotChecked=0, Total=1260 [2020-04-18 15:51:00,424 INFO L87 Difference]: Start difference. First operand 499 states and 867 transitions. Second operand 7 states. [2020-04-18 15:51:00,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,585 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:00,586 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:00,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:00,587 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:51:00,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,587 INFO L82 PathProgramCache]: Analyzing trace with hash 1730856598, now seen corresponding path program 9 times [2020-04-18 15:51:00,587 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,587 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975074988] [2020-04-18 15:51:00,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,654 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:00,654 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975074988] [2020-04-18 15:51:00,655 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1160154519] [2020-04-18 15:51:00,655 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:00,749 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:51:00,750 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:00,750 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:00,751 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:00,753 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:00,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:00,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:00,753 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,754 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,761 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:51:00,761 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,858 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:51:00,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:00,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=391, Invalid=1501, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:51:00,859 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 13 states. [2020-04-18 15:51:01,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:01,456 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:01,456 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:01,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:01,457 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:51:01,457 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:01,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1745706838, now seen corresponding path program 10 times [2020-04-18 15:51:01,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:01,458 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778023282] [2020-04-18 15:51:01,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:01,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:01,497 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:01,498 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778023282] [2020-04-18 15:51:01,498 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [133214349] [2020-04-18 15:51:01,498 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:01,593 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:01,594 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:01,594 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:01,595 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:01,597 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:01,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:01,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:01,598 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:01,599 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:01,609 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:51:01,610 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:01,804 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 20 times. [2020-04-18 15:51:01,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:51:01,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=3126, Unknown=0, NotChecked=0, Total=3906 [2020-04-18 15:51:01,805 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 17 states. [2020-04-18 15:51:02,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:02,880 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:02,880 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:02,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:02,882 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:51:02,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:02,882 INFO L82 PathProgramCache]: Analyzing trace with hash 1848455064, now seen corresponding path program 11 times [2020-04-18 15:51:02,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:02,883 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154776298] [2020-04-18 15:51:02,883 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:02,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:02,944 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:02,945 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154776298] [2020-04-18 15:51:02,945 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1738227996] [2020-04-18 15:51:02,945 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:03,098 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:03,098 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:03,100 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:03,101 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:03,104 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:03,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:03,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:03,106 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:03,110 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:03,122 INFO L259 McrAutomatonBuilder]: Finished intersection with 41 states and 54 transitions. [2020-04-18 15:51:03,122 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:03,156 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:51:03,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:03,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1129, Invalid=4877, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:51:03,157 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 7 states. [2020-04-18 15:51:03,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:03,459 INFO L93 Difference]: Finished difference Result 525 states and 884 transitions. [2020-04-18 15:51:03,459 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 884 transitions. [2020-04-18 15:51:03,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:03,461 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:51:03,461 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:03,461 INFO L82 PathProgramCache]: Analyzing trace with hash 1849107924, now seen corresponding path program 12 times [2020-04-18 15:51:03,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:03,462 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1893820663] [2020-04-18 15:51:03,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:03,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:03,542 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:03,542 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1893820663] [2020-04-18 15:51:03,542 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1011712855] [2020-04-18 15:51:03,543 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:03,695 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:51:03,695 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:03,696 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:03,698 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:03,702 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:03,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:03,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:03,703 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:03,706 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:03,718 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:51:03,719 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:03,721 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:03,721 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:03,722 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1251, Invalid=5721, Unknown=0, NotChecked=0, Total=6972 [2020-04-18 15:51:03,723 INFO L87 Difference]: Start difference. First operand 525 states and 884 transitions. Second operand 11 states. [2020-04-18 15:51:04,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:04,361 INFO L93 Difference]: Finished difference Result 525 states and 884 transitions. [2020-04-18 15:51:04,362 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 884 transitions. [2020-04-18 15:51:04,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:04,363 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:51:04,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:04,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1177775680, now seen corresponding path program 13 times [2020-04-18 15:51:04,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:04,364 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306046966] [2020-04-18 15:51:04,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:04,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:04,402 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:04,402 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306046966] [2020-04-18 15:51:04,402 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1568494704] [2020-04-18 15:51:04,402 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:04,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:04,496 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:04,497 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:04,499 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:04,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:04,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:04,500 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:04,501 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:04,508 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:51:04,508 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:04,550 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:04,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:04,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1608, Invalid=7704, Unknown=0, NotChecked=0, Total=9312 [2020-04-18 15:51:04,552 INFO L87 Difference]: Start difference. First operand 525 states and 884 transitions. Second operand 9 states. [2020-04-18 15:51:04,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:04,999 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:05,000 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:05,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:05,001 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:51:05,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,001 INFO L82 PathProgramCache]: Analyzing trace with hash -980827488, now seen corresponding path program 14 times [2020-04-18 15:51:05,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,001 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [621722399] [2020-04-18 15:51:05,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,043 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:05,043 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [621722399] [2020-04-18 15:51:05,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:05,044 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,046 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,050 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:05,050 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,050 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:05,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:05,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2003, Invalid=10207, Unknown=0, NotChecked=0, Total=12210 [2020-04-18 15:51:05,052 INFO L87 Difference]: Start difference. First operand 532 states and 888 transitions. Second operand 9 states. [2020-04-18 15:51:05,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:05,534 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:05,535 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:05,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:05,536 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:51:05,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,536 INFO L82 PathProgramCache]: Analyzing trace with hash -979488288, now seen corresponding path program 15 times [2020-04-18 15:51:05,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,536 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623342520] [2020-04-18 15:51:05,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,577 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:05,578 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623342520] [2020-04-18 15:51:05,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:05,578 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,579 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,584 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:05,584 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,584 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:05,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:05,586 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2446, Invalid=13304, Unknown=0, NotChecked=0, Total=15750 [2020-04-18 15:51:05,586 INFO L87 Difference]: Start difference. First operand 532 states and 888 transitions. Second operand 9 states. [2020-04-18 15:51:06,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:06,024 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:06,024 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:06,025 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:06,026 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1124098217] [2020-04-18 15:51:06,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:06,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:51:06,026 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1124098217] [2020-04-18 15:51:06,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2020-04-18 15:51:06,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:06,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2020-04-18 15:51:06,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2844, Invalid=16062, Unknown=0, NotChecked=0, Total=18906 [2020-04-18 15:51:06,029 INFO L87 Difference]: Start difference. First operand 37062 states and 198528 transitions. Second operand 25 states. [2020-04-18 15:51:11,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:11,207 INFO L93 Difference]: Finished difference Result 181501 states and 778700 transitions. [2020-04-18 15:51:11,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:51:11,208 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 25 [2020-04-18 15:51:11,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:11,711 INFO L225 Difference]: With dead ends: 181501 [2020-04-18 15:51:11,711 INFO L226 Difference]: Without dead ends: 181305 [2020-04-18 15:51:11,713 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 969 GetRequests, 716 SyntacticMatches, 4 SemanticMatches, 249 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26029 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=8756, Invalid=53994, Unknown=0, NotChecked=0, Total=62750 [2020-04-18 15:51:14,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181305 states. [2020-04-18 15:51:15,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181305 to 33875. [2020-04-18 15:51:15,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33875 states. [2020-04-18 15:51:15,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33875 states to 33875 states and 181202 transitions. [2020-04-18 15:51:15,798 INFO L78 Accepts]: Start accepts. Automaton has 33875 states and 181202 transitions. Word has length 25 [2020-04-18 15:51:15,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:15,799 INFO L479 AbstractCegarLoop]: Abstraction has 33875 states and 181202 transitions. [2020-04-18 15:51:15,799 INFO L480 AbstractCegarLoop]: Interpolant automaton has 25 states. [2020-04-18 15:51:15,799 INFO L276 IsEmpty]: Start isEmpty. Operand 33875 states and 181202 transitions. [2020-04-18 15:51:15,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:15,801 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:15,801 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:17,806 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 66 z3 -smt2 -in SMTLIB2_COMPLIANT=true,71 z3 -smt2 -in SMTLIB2_COMPLIANT=true,69 z3 -smt2 -in SMTLIB2_COMPLIANT=true,67 z3 -smt2 -in SMTLIB2_COMPLIANT=true,65 z3 -smt2 -in SMTLIB2_COMPLIANT=true,73 z3 -smt2 -in SMTLIB2_COMPLIANT=true,72 z3 -smt2 -in SMTLIB2_COMPLIANT=true,70 z3 -smt2 -in SMTLIB2_COMPLIANT=true,68 z3 -smt2 -in SMTLIB2_COMPLIANT=true,64 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:17,806 INFO L427 AbstractCegarLoop]: === Iteration 14 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:17,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:17,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1730878670, now seen corresponding path program 1 times [2020-04-18 15:51:17,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:17,808 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1472222550] [2020-04-18 15:51:17,809 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:17,813 INFO L259 McrAutomatonBuilder]: Finished intersection with 232 states and 609 transitions. [2020-04-18 15:51:17,814 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states. [2020-04-18 15:51:17,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:17,815 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:17,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:17,815 INFO L82 PathProgramCache]: Analyzing trace with hash -290393454, now seen corresponding path program 2 times [2020-04-18 15:51:17,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:17,815 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849051488] [2020-04-18 15:51:17,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:17,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:17,823 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:17,823 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849051488] [2020-04-18 15:51:17,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:17,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:17,823 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:17,824 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:17,838 INFO L259 McrAutomatonBuilder]: Finished intersection with 129 states and 275 transitions. [2020-04-18 15:51:17,838 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:17,841 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:17,841 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:17,841 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:17,841 INFO L87 Difference]: Start difference. First operand 232 states. Second operand 3 states. [2020-04-18 15:51:17,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:17,851 INFO L93 Difference]: Finished difference Result 295 states and 715 transitions. [2020-04-18 15:51:17,852 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 715 transitions. [2020-04-18 15:51:17,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:17,852 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:17,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:17,853 INFO L82 PathProgramCache]: Analyzing trace with hash -1948435474, now seen corresponding path program 3 times [2020-04-18 15:51:17,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:17,853 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134072190] [2020-04-18 15:51:17,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:17,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:17,870 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:17,870 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134072190] [2020-04-18 15:51:17,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:17,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:17,871 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:17,873 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:17,885 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 181 transitions. [2020-04-18 15:51:17,885 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:17,894 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:51:17,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:17,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:17,894 INFO L87 Difference]: Start difference. First operand 295 states and 715 transitions. Second operand 5 states. [2020-04-18 15:51:17,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:17,947 INFO L93 Difference]: Finished difference Result 386 states and 864 transitions. [2020-04-18 15:51:17,947 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 864 transitions. [2020-04-18 15:51:17,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:17,949 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:17,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:17,949 INFO L82 PathProgramCache]: Analyzing trace with hash -506161338, now seen corresponding path program 4 times [2020-04-18 15:51:17,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:17,950 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863268650] [2020-04-18 15:51:17,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:17,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:18,000 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:18,001 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863268650] [2020-04-18 15:51:18,001 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1834773005] [2020-04-18 15:51:18,001 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:18,114 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:18,115 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:18,116 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:18,116 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:18,119 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:18,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:18,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:51:18,120 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:18,121 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:18,138 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 145 transitions. [2020-04-18 15:51:18,138 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:18,156 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:51:18,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:18,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:18,156 INFO L87 Difference]: Start difference. First operand 386 states and 864 transitions. Second operand 7 states. [2020-04-18 15:51:20,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:20,472 INFO L93 Difference]: Finished difference Result 428 states and 916 transitions. [2020-04-18 15:51:20,472 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 916 transitions. [2020-04-18 15:51:20,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:20,473 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:20,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:20,474 INFO L82 PathProgramCache]: Analyzing trace with hash -506162388, now seen corresponding path program 5 times [2020-04-18 15:51:20,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:20,474 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90088632] [2020-04-18 15:51:20,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:20,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:20,492 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:20,492 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90088632] [2020-04-18 15:51:20,493 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [283608927] [2020-04-18 15:51:20,493 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:20,589 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:20,590 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:20,591 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:20,591 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:20,592 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:20,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:20,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:51:20,593 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:20,594 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:20,604 INFO L259 McrAutomatonBuilder]: Finished intersection with 92 states and 162 transitions. [2020-04-18 15:51:20,604 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:20,690 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 19 times. [2020-04-18 15:51:20,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:20,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=343, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:51:20,691 INFO L87 Difference]: Start difference. First operand 428 states and 916 transitions. Second operand 11 states. [2020-04-18 15:51:20,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:20,857 INFO L93 Difference]: Finished difference Result 554 states and 1080 transitions. [2020-04-18 15:51:20,857 INFO L276 IsEmpty]: Start isEmpty. Operand 554 states and 1080 transitions. [2020-04-18 15:51:20,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:20,858 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:20,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:20,858 INFO L82 PathProgramCache]: Analyzing trace with hash -505509528, now seen corresponding path program 6 times [2020-04-18 15:51:20,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:20,859 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519431432] [2020-04-18 15:51:20,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:20,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:20,885 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:20,886 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519431432] [2020-04-18 15:51:20,886 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623660125] [2020-04-18 15:51:20,886 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:20,978 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:51:20,978 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:20,978 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:20,979 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:20,981 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:20,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:20,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:20,982 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:20,983 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:20,993 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 145 transitions. [2020-04-18 15:51:20,994 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:21,005 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:51:21,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:51:21,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2020-04-18 15:51:21,005 INFO L87 Difference]: Start difference. First operand 554 states and 1080 transitions. Second operand 10 states. [2020-04-18 15:51:21,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:21,257 INFO L93 Difference]: Finished difference Result 600 states and 1129 transitions. [2020-04-18 15:51:21,257 INFO L276 IsEmpty]: Start isEmpty. Operand 600 states and 1129 transitions. [2020-04-18 15:51:21,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:21,258 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:51:21,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:21,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1103954630, now seen corresponding path program 7 times [2020-04-18 15:51:21,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:21,259 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [862895910] [2020-04-18 15:51:21,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:21,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:21,285 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:21,285 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [862895910] [2020-04-18 15:51:21,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:21,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:21,285 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:21,286 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:21,293 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:21,293 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:21,315 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:21,315 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:21,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=680, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:51:21,316 INFO L87 Difference]: Start difference. First operand 600 states and 1129 transitions. Second operand 7 states. [2020-04-18 15:51:21,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:21,511 INFO L93 Difference]: Finished difference Result 619 states and 1143 transitions. [2020-04-18 15:51:21,511 INFO L276 IsEmpty]: Start isEmpty. Operand 619 states and 1143 transitions. [2020-04-18 15:51:21,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:21,512 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:51:21,512 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:21,512 INFO L82 PathProgramCache]: Analyzing trace with hash 1103480210, now seen corresponding path program 8 times [2020-04-18 15:51:21,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:21,513 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215015956] [2020-04-18 15:51:21,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:21,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:21,558 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:21,559 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215015956] [2020-04-18 15:51:21,559 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1911885203] [2020-04-18 15:51:21,559 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:21,660 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:51:21,660 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:21,661 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:21,662 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:21,664 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:21,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:21,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:21,664 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:21,665 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:21,671 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:21,671 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:21,672 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:21,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:21,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=1123, Unknown=0, NotChecked=0, Total=1406 [2020-04-18 15:51:21,672 INFO L87 Difference]: Start difference. First operand 619 states and 1143 transitions. Second operand 7 states. [2020-04-18 15:51:21,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:21,842 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:51:21,842 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:51:21,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:21,843 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:51:21,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:21,844 INFO L82 PathProgramCache]: Analyzing trace with hash 1730878670, now seen corresponding path program 9 times [2020-04-18 15:51:21,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:21,844 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091832032] [2020-04-18 15:51:21,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:21,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:21,909 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:21,910 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091832032] [2020-04-18 15:51:21,910 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2124567419] [2020-04-18 15:51:21,910 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:22,003 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:51:22,003 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:22,004 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:22,004 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:22,006 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:22,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:22,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:22,006 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:22,007 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:22,014 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:51:22,014 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:22,090 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:51:22,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:22,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1583, Unknown=0, NotChecked=0, Total=1980 [2020-04-18 15:51:22,091 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 13 states. [2020-04-18 15:51:22,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:22,693 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:51:22,693 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:51:22,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:22,694 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:51:22,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:22,695 INFO L82 PathProgramCache]: Analyzing trace with hash 1766918030, now seen corresponding path program 10 times [2020-04-18 15:51:22,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:22,695 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [380168052] [2020-04-18 15:51:22,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:22,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:22,734 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:22,735 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [380168052] [2020-04-18 15:51:22,735 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1119577074] [2020-04-18 15:51:22,735 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:22,826 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:22,827 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:22,827 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:22,828 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:22,829 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:22,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:22,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:22,830 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:22,831 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:22,839 INFO L259 McrAutomatonBuilder]: Finished intersection with 66 states and 105 transitions. [2020-04-18 15:51:22,839 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:23,288 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 28 times. [2020-04-18 15:51:23,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 15:51:23,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=854, Invalid=3436, Unknown=0, NotChecked=0, Total=4290 [2020-04-18 15:51:23,290 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 19 states. [2020-04-18 15:51:24,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:24,138 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:51:24,138 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:51:24,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:24,139 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:51:24,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:24,140 INFO L82 PathProgramCache]: Analyzing trace with hash -601001104, now seen corresponding path program 11 times [2020-04-18 15:51:24,140 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:24,140 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912172729] [2020-04-18 15:51:24,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:24,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:24,167 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:24,168 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912172729] [2020-04-18 15:51:24,168 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2021883072] [2020-04-18 15:51:24,168 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:24,258 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:24,259 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:24,259 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:24,260 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:24,262 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:24,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:24,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:24,262 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:24,263 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:24,270 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 78 transitions. [2020-04-18 15:51:24,270 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:24,287 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:51:24,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:24,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1219, Invalid=5261, Unknown=0, NotChecked=0, Total=6480 [2020-04-18 15:51:24,289 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 7 states. [2020-04-18 15:51:24,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:24,490 INFO L93 Difference]: Finished difference Result 645 states and 1160 transitions. [2020-04-18 15:51:24,490 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 1160 transitions. [2020-04-18 15:51:24,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:24,491 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:51:24,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:24,491 INFO L82 PathProgramCache]: Analyzing trace with hash -600348244, now seen corresponding path program 12 times [2020-04-18 15:51:24,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:24,492 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1496229224] [2020-04-18 15:51:24,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:24,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:24,529 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:24,529 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1496229224] [2020-04-18 15:51:24,529 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1384520349] [2020-04-18 15:51:24,529 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:24,615 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:51:24,616 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:24,616 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:24,617 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:24,619 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:24,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:24,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:24,619 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:24,620 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:24,627 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:51:24,627 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:24,648 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 17 times. [2020-04-18 15:51:24,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:51:24,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1350, Invalid=6132, Unknown=0, NotChecked=0, Total=7482 [2020-04-18 15:51:24,649 INFO L87 Difference]: Start difference. First operand 645 states and 1160 transitions. Second operand 12 states. [2020-04-18 15:51:25,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:25,177 INFO L93 Difference]: Finished difference Result 645 states and 1160 transitions. [2020-04-18 15:51:25,177 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 1160 transitions. [2020-04-18 15:51:25,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:25,179 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:51:25,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:25,179 INFO L82 PathProgramCache]: Analyzing trace with hash 667735448, now seen corresponding path program 13 times [2020-04-18 15:51:25,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:25,180 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800030050] [2020-04-18 15:51:25,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:25,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:25,244 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:25,244 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [800030050] [2020-04-18 15:51:25,244 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1544895558] [2020-04-18 15:51:25,244 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:25,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:25,343 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:25,343 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:25,345 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:25,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:25,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:25,346 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:25,346 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:25,353 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:51:25,353 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:25,369 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:51:25,369 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:25,370 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1722, Invalid=8178, Unknown=0, NotChecked=0, Total=9900 [2020-04-18 15:51:25,370 INFO L87 Difference]: Start difference. First operand 645 states and 1160 transitions. Second operand 9 states. [2020-04-18 15:51:25,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:25,822 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:51:25,822 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:51:25,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:25,823 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:51:25,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:25,824 INFO L82 PathProgramCache]: Analyzing trace with hash -980805416, now seen corresponding path program 14 times [2020-04-18 15:51:25,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:25,824 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531646915] [2020-04-18 15:51:25,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:25,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:25,866 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:25,866 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1531646915] [2020-04-18 15:51:25,866 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:25,866 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:25,866 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:25,868 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:25,872 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:25,872 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:25,873 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:25,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:25,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2133, Invalid=10749, Unknown=0, NotChecked=0, Total=12882 [2020-04-18 15:51:25,874 INFO L87 Difference]: Start difference. First operand 652 states and 1164 transitions. Second operand 9 states. [2020-04-18 15:51:26,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:26,380 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:51:26,380 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:51:26,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:26,381 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:51:26,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:26,382 INFO L82 PathProgramCache]: Analyzing trace with hash -958277096, now seen corresponding path program 15 times [2020-04-18 15:51:26,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:26,382 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646956914] [2020-04-18 15:51:26,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:26,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:26,421 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:26,422 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1646956914] [2020-04-18 15:51:26,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:26,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:26,422 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:26,423 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:26,427 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:26,427 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:26,427 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:26,428 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:26,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2586, Invalid=13926, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:51:26,429 INFO L87 Difference]: Start difference. First operand 652 states and 1164 transitions. Second operand 9 states. [2020-04-18 15:51:26,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:26,874 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:51:26,874 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:51:26,875 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:26,876 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1472222550] [2020-04-18 15:51:26,877 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:26,877 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:51:26,877 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1472222550] [2020-04-18 15:51:26,877 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2020-04-18 15:51:26,877 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:26,877 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2020-04-18 15:51:26,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2999, Invalid=16741, Unknown=0, NotChecked=0, Total=19740 [2020-04-18 15:51:26,879 INFO L87 Difference]: Start difference. First operand 33875 states and 181202 transitions. Second operand 28 states. [2020-04-18 15:51:32,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:32,136 INFO L93 Difference]: Finished difference Result 176501 states and 756208 transitions. [2020-04-18 15:51:32,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:51:32,136 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 25 [2020-04-18 15:51:32,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:32,693 INFO L225 Difference]: With dead ends: 176501 [2020-04-18 15:51:32,693 INFO L226 Difference]: Without dead ends: 176298 [2020-04-18 15:51:32,696 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 992 GetRequests, 730 SyntacticMatches, 10 SemanticMatches, 252 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26407 ImplicationChecksByTransitivity, 4.1s TimeCoverageRelationStatistics Valid=9190, Invalid=55072, Unknown=0, NotChecked=0, Total=64262 [2020-04-18 15:51:34,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176298 states. [2020-04-18 15:51:36,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176298 to 30886. [2020-04-18 15:51:36,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30886 states. [2020-04-18 15:51:36,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30886 states to 30886 states and 165408 transitions. [2020-04-18 15:51:36,486 INFO L78 Accepts]: Start accepts. Automaton has 30886 states and 165408 transitions. Word has length 25 [2020-04-18 15:51:36,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:36,486 INFO L479 AbstractCegarLoop]: Abstraction has 30886 states and 165408 transitions. [2020-04-18 15:51:36,486 INFO L480 AbstractCegarLoop]: Interpolant automaton has 28 states. [2020-04-18 15:51:36,486 INFO L276 IsEmpty]: Start isEmpty. Operand 30886 states and 165408 transitions. [2020-04-18 15:51:36,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:36,488 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:36,488 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [MP z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Forcibly destroying the process [2020-04-18 15:51:39,908 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 78 z3 -smt2 -in SMTLIB2_COMPLIANT=true,75 z3 -smt2 -in SMTLIB2_COMPLIANT=true,81 z3 -smt2 -in SMTLIB2_COMPLIANT=true,79 z3 -smt2 -in SMTLIB2_COMPLIANT=true,77 z3 -smt2 -in SMTLIB2_COMPLIANT=true,82 z3 -smt2 -in SMTLIB2_COMPLIANT=true,76 z3 -smt2 -in SMTLIB2_COMPLIANT=true,74 z3 -smt2 -in SMTLIB2_COMPLIANT=true,80 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:39,909 INFO L427 AbstractCegarLoop]: === Iteration 15 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:39,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1177752213, now seen corresponding path program 1 times [2020-04-18 15:51:39,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:39,910 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1865782167] [2020-04-18 15:51:39,911 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,915 INFO L259 McrAutomatonBuilder]: Finished intersection with 168 states and 417 transitions. [2020-04-18 15:51:39,916 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states. [2020-04-18 15:51:39,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:39,916 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:39,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1256748813, now seen corresponding path program 2 times [2020-04-18 15:51:39,916 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,917 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775446353] [2020-04-18 15:51:39,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,923 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:39,924 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1775446353] [2020-04-18 15:51:39,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:39,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:39,924 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:39,925 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,932 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 103 transitions. [2020-04-18 15:51:39,932 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:39,935 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:39,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:39,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:39,935 INFO L87 Difference]: Start difference. First operand 168 states. Second operand 3 states. [2020-04-18 15:51:39,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:39,945 INFO L93 Difference]: Finished difference Result 211 states and 487 transitions. [2020-04-18 15:51:39,946 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 487 transitions. [2020-04-18 15:51:39,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:39,946 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:39,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,947 INFO L82 PathProgramCache]: Analyzing trace with hash -558114339, now seen corresponding path program 3 times [2020-04-18 15:51:39,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,947 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1249557865] [2020-04-18 15:51:39,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,966 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:39,966 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1249557865] [2020-04-18 15:51:39,967 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [765572320] [2020-04-18 15:51:39,967 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:40,054 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:51:40,055 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:40,055 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:40,056 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:40,058 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:40,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:40,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:51:40,058 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:40,059 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:40,065 INFO L259 McrAutomatonBuilder]: Finished intersection with 51 states and 79 transitions. [2020-04-18 15:51:40,065 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:40,073 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:51:40,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:40,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:40,073 INFO L87 Difference]: Start difference. First operand 211 states and 487 transitions. Second operand 5 states. [2020-04-18 15:51:40,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:40,128 INFO L93 Difference]: Finished difference Result 274 states and 588 transitions. [2020-04-18 15:51:40,128 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 588 transitions. [2020-04-18 15:51:40,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:40,129 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:40,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:40,130 INFO L82 PathProgramCache]: Analyzing trace with hash -306385085, now seen corresponding path program 4 times [2020-04-18 15:51:40,130 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:40,130 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6377503] [2020-04-18 15:51:40,131 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:40,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:40,165 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:40,166 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6377503] [2020-04-18 15:51:40,166 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [789409405] [2020-04-18 15:51:40,166 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:40,254 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:40,254 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:40,255 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:40,255 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:40,257 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:40,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:40,258 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:51:40,258 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:40,259 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:40,266 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:51:40,266 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:40,278 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:40,278 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:40,278 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:40,278 INFO L87 Difference]: Start difference. First operand 274 states and 588 transitions. Second operand 7 states. [2020-04-18 15:51:40,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:40,441 INFO L93 Difference]: Finished difference Result 320 states and 644 transitions. [2020-04-18 15:51:40,441 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 644 transitions. [2020-04-18 15:51:40,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:40,442 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:40,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:40,442 INFO L82 PathProgramCache]: Analyzing trace with hash -398407445, now seen corresponding path program 5 times [2020-04-18 15:51:40,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:40,442 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [6460789] [2020-04-18 15:51:40,443 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:40,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:40,490 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:40,490 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [6460789] [2020-04-18 15:51:40,490 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1997811948] [2020-04-18 15:51:40,491 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:40,583 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:40,584 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:40,584 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:40,585 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:40,587 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:40,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:40,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:40,588 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:40,589 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:40,597 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:51:40,597 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:40,623 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:51:40,623 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:40,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=186, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:51:40,624 INFO L87 Difference]: Start difference. First operand 320 states and 644 transitions. Second operand 9 states. [2020-04-18 15:51:41,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:41,056 INFO L93 Difference]: Finished difference Result 337 states and 655 transitions. [2020-04-18 15:51:41,057 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 655 transitions. [2020-04-18 15:51:41,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:41,057 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:41,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:41,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1177752213, now seen corresponding path program 6 times [2020-04-18 15:51:41,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:41,058 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947856119] [2020-04-18 15:51:41,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:41,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:41,122 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:41,122 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947856119] [2020-04-18 15:51:41,122 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1866746807] [2020-04-18 15:51:41,123 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:41,251 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:51:41,252 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:41,253 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:41,255 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:41,259 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:41,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:41,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:41,260 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:41,262 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:41,272 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:51:41,272 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:41,306 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:41,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:41,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=784, Unknown=0, NotChecked=0, Total=1056 [2020-04-18 15:51:41,307 INFO L87 Difference]: Start difference. First operand 337 states and 655 transitions. Second operand 9 states. [2020-04-18 15:51:41,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:41,760 INFO L93 Difference]: Finished difference Result 366 states and 689 transitions. [2020-04-18 15:51:41,761 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 689 transitions. [2020-04-18 15:51:41,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:41,761 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:51:41,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:41,762 INFO L82 PathProgramCache]: Analyzing trace with hash -1664960285, now seen corresponding path program 7 times [2020-04-18 15:51:41,762 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:41,762 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [206756957] [2020-04-18 15:51:41,763 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:41,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:41,788 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:41,789 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [206756957] [2020-04-18 15:51:41,789 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:41,789 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:41,789 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:41,790 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:41,798 INFO L259 McrAutomatonBuilder]: Finished intersection with 55 states and 83 transitions. [2020-04-18 15:51:41,798 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:41,885 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 18 times. [2020-04-18 15:51:41,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:41,886 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=652, Invalid=2654, Unknown=0, NotChecked=0, Total=3306 [2020-04-18 15:51:41,887 INFO L87 Difference]: Start difference. First operand 366 states and 689 transitions. Second operand 11 states. [2020-04-18 15:51:42,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:42,179 INFO L93 Difference]: Finished difference Result 411 states and 747 transitions. [2020-04-18 15:51:42,179 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 747 transitions. [2020-04-18 15:51:42,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:42,180 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:51:42,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:42,180 INFO L82 PathProgramCache]: Analyzing trace with hash -1756982645, now seen corresponding path program 8 times [2020-04-18 15:51:42,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:42,181 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914583711] [2020-04-18 15:51:42,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:42,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:42,222 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:42,223 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1914583711] [2020-04-18 15:51:42,223 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [55404372] [2020-04-18 15:51:42,223 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:42,313 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:51:42,314 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:42,314 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:42,315 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:42,317 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:42,317 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:42,317 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:42,317 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:42,318 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:42,324 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:51:42,325 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:42,326 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 13 times. [2020-04-18 15:51:42,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:42,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=790, Invalid=3500, Unknown=0, NotChecked=0, Total=4290 [2020-04-18 15:51:42,326 INFO L87 Difference]: Start difference. First operand 411 states and 747 transitions. Second operand 11 states. [2020-04-18 15:51:42,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:42,782 INFO L93 Difference]: Finished difference Result 414 states and 748 transitions. [2020-04-18 15:51:42,783 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 748 transitions. [2020-04-18 15:51:42,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:42,783 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:51:42,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:42,784 INFO L82 PathProgramCache]: Analyzing trace with hash 667736843, now seen corresponding path program 9 times [2020-04-18 15:51:42,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:42,784 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359594079] [2020-04-18 15:51:42,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:42,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:42,824 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:42,824 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359594079] [2020-04-18 15:51:42,825 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [378452918] [2020-04-18 15:51:42,825 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:42,915 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:51:42,915 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:42,915 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:42,916 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:42,918 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:42,918 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:42,919 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:42,919 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:42,919 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:42,925 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:51:42,925 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:42,938 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:51:42,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:42,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1111, Invalid=5051, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:51:42,939 INFO L87 Difference]: Start difference. First operand 414 states and 748 transitions. Second operand 9 states. [2020-04-18 15:51:43,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:43,389 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:51:43,390 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:51:43,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:43,390 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:51:43,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:43,391 INFO L82 PathProgramCache]: Analyzing trace with hash -979464821, now seen corresponding path program 10 times [2020-04-18 15:51:43,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:43,391 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476705350] [2020-04-18 15:51:43,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:43,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:43,433 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:43,434 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476705350] [2020-04-18 15:51:43,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:43,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:43,434 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:43,435 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:43,440 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:43,440 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:43,456 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:43,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:43,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1568, Invalid=7744, Unknown=0, NotChecked=0, Total=9312 [2020-04-18 15:51:43,458 INFO L87 Difference]: Start difference. First operand 449 states and 785 transitions. Second operand 9 states. [2020-04-18 15:51:43,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:43,924 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:51:43,924 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:51:43,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:43,925 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:51:43,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:43,925 INFO L82 PathProgramCache]: Analyzing trace with hash -958275701, now seen corresponding path program 11 times [2020-04-18 15:51:43,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:43,926 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196697848] [2020-04-18 15:51:43,926 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:43,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:43,967 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:43,968 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196697848] [2020-04-18 15:51:43,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:43,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:43,968 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:43,969 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:43,973 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:43,973 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:43,974 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:43,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:43,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1995, Invalid=10887, Unknown=0, NotChecked=0, Total=12882 [2020-04-18 15:51:43,975 INFO L87 Difference]: Start difference. First operand 449 states and 785 transitions. Second operand 9 states. [2020-04-18 15:51:44,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:44,435 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:51:44,436 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:51:44,436 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:44,437 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1865782167] [2020-04-18 15:51:44,437 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:44,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:51:44,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1865782167] [2020-04-18 15:51:44,437 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2020-04-18 15:51:44,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:44,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 15:51:44,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2434, Invalid=14078, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:51:44,439 INFO L87 Difference]: Start difference. First operand 30886 states and 165408 transitions. Second operand 19 states. [2020-04-18 15:51:50,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:50,375 INFO L93 Difference]: Finished difference Result 200901 states and 821147 transitions. [2020-04-18 15:51:50,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 189 states. [2020-04-18 15:51:50,375 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 25 [2020-04-18 15:51:50,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:50,929 INFO L225 Difference]: With dead ends: 200901 [2020-04-18 15:51:50,929 INFO L226 Difference]: Without dead ends: 199946 [2020-04-18 15:51:50,932 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 774 GetRequests, 498 SyntacticMatches, 0 SemanticMatches, 276 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33765 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=9444, Invalid=67562, Unknown=0, NotChecked=0, Total=77006 [2020-04-18 15:51:53,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199946 states. [2020-04-18 15:51:54,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199946 to 30079. [2020-04-18 15:51:54,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30079 states. [2020-04-18 15:51:55,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30079 states to 30079 states and 160377 transitions. [2020-04-18 15:51:55,039 INFO L78 Accepts]: Start accepts. Automaton has 30079 states and 160377 transitions. Word has length 25 [2020-04-18 15:51:55,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:55,039 INFO L479 AbstractCegarLoop]: Abstraction has 30079 states and 160377 transitions. [2020-04-18 15:51:55,039 INFO L480 AbstractCegarLoop]: Interpolant automaton has 19 states. [2020-04-18 15:51:55,039 INFO L276 IsEmpty]: Start isEmpty. Operand 30079 states and 160377 transitions. [2020-04-18 15:51:55,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:55,042 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:55,042 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:56,243 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 85 z3 -smt2 -in SMTLIB2_COMPLIANT=true,87 z3 -smt2 -in SMTLIB2_COMPLIANT=true,88 z3 -smt2 -in SMTLIB2_COMPLIANT=true,83 z3 -smt2 -in SMTLIB2_COMPLIANT=true,84 z3 -smt2 -in SMTLIB2_COMPLIANT=true,86 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:56,245 INFO L427 AbstractCegarLoop]: === Iteration 16 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:56,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:56,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1698987747, now seen corresponding path program 1 times [2020-04-18 15:51:56,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:56,246 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1752559232] [2020-04-18 15:51:56,247 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:56,248 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 69 transitions. [2020-04-18 15:51:56,248 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states. [2020-04-18 15:51:56,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:56,248 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:56,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:56,249 INFO L82 PathProgramCache]: Analyzing trace with hash 86770305, now seen corresponding path program 2 times [2020-04-18 15:51:56,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:56,249 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578555685] [2020-04-18 15:51:56,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:56,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:56,256 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:51:56,257 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578555685] [2020-04-18 15:51:56,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:56,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:56,257 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:56,258 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:56,263 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:51:56,263 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:56,265 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:56,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:56,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:56,266 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 3 states. [2020-04-18 15:51:56,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:56,272 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:51:56,272 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:51:56,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:56,272 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:56,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:56,273 INFO L82 PathProgramCache]: Analyzing trace with hash -1698987747, now seen corresponding path program 3 times [2020-04-18 15:51:56,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:56,273 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727168585] [2020-04-18 15:51:56,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:56,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:56,292 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:51:56,293 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727168585] [2020-04-18 15:51:56,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:56,293 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:51:56,293 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:56,295 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:58,179 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:58,179 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:58,188 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:58,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:58,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:58,189 INFO L87 Difference]: Start difference. First operand 49 states and 69 transitions. Second operand 5 states. [2020-04-18 15:51:58,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:58,204 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:51:58,205 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:51:58,205 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:58,205 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1752559232] [2020-04-18 15:51:58,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:58,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:51:58,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1752559232] [2020-04-18 15:51:58,206 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:51:58,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:58,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:58,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:51:58,207 INFO L87 Difference]: Start difference. First operand 30079 states and 160377 transitions. Second operand 5 states. [2020-04-18 15:51:58,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:58,642 INFO L93 Difference]: Finished difference Result 53630 states and 274420 transitions. [2020-04-18 15:51:58,642 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:51:58,643 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2020-04-18 15:51:58,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:58,822 INFO L225 Difference]: With dead ends: 53630 [2020-04-18 15:51:58,822 INFO L226 Difference]: Without dead ends: 53567 [2020-04-18 15:51:58,822 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:51:59,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53567 states. [2020-04-18 15:52:00,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53567 to 37992. [2020-04-18 15:52:00,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37992 states. [2020-04-18 15:52:00,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37992 states to 37992 states and 202246 transitions. [2020-04-18 15:52:00,462 INFO L78 Accepts]: Start accepts. Automaton has 37992 states and 202246 transitions. Word has length 25 [2020-04-18 15:52:00,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:00,463 INFO L479 AbstractCegarLoop]: Abstraction has 37992 states and 202246 transitions. [2020-04-18 15:52:00,463 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:52:00,463 INFO L276 IsEmpty]: Start isEmpty. Operand 37992 states and 202246 transitions. [2020-04-18 15:52:00,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:00,467 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:00,468 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:00,468 INFO L427 AbstractCegarLoop]: === Iteration 17 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:00,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:00,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1444696671, now seen corresponding path program 1 times [2020-04-18 15:52:00,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:00,468 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1643074140] [2020-04-18 15:52:00,469 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:00,471 INFO L259 McrAutomatonBuilder]: Finished intersection with 124 states and 255 transitions. [2020-04-18 15:52:00,471 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states. [2020-04-18 15:52:00,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:00,472 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:00,472 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:00,472 INFO L82 PathProgramCache]: Analyzing trace with hash 2033040719, now seen corresponding path program 2 times [2020-04-18 15:52:00,472 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:00,472 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733743171] [2020-04-18 15:52:00,472 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:00,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:00,482 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:00,483 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733743171] [2020-04-18 15:52:00,483 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:00,483 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:00,483 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:00,485 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:00,497 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 158 transitions. [2020-04-18 15:52:00,498 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:00,500 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:00,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:00,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:00,501 INFO L87 Difference]: Start difference. First operand 124 states. Second operand 3 states. [2020-04-18 15:52:00,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:00,508 INFO L93 Difference]: Finished difference Result 145 states and 275 transitions. [2020-04-18 15:52:00,508 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 275 transitions. [2020-04-18 15:52:00,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:00,508 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:00,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:00,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1444956951, now seen corresponding path program 3 times [2020-04-18 15:52:00,509 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:00,509 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814163834] [2020-04-18 15:52:00,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:00,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:00,536 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:00,537 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814163834] [2020-04-18 15:52:00,537 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:00,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:52:00,537 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:00,540 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:00,552 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 64 transitions. [2020-04-18 15:52:00,552 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:00,563 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:52:00,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:00,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:00,564 INFO L87 Difference]: Start difference. First operand 145 states and 275 transitions. Second operand 5 states. [2020-04-18 15:52:00,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:00,600 INFO L93 Difference]: Finished difference Result 152 states and 280 transitions. [2020-04-18 15:52:00,600 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 280 transitions. [2020-04-18 15:52:00,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:00,600 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:00,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:00,601 INFO L82 PathProgramCache]: Analyzing trace with hash -1444958001, now seen corresponding path program 4 times [2020-04-18 15:52:00,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:00,601 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1917723996] [2020-04-18 15:52:00,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:00,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:00,626 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:00,626 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1917723996] [2020-04-18 15:52:00,626 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [329191277] [2020-04-18 15:52:00,626 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:00,716 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:00,716 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:00,717 INFO L264 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:00,718 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:00,720 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:00,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:00,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:52:00,720 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:00,722 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:00,731 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 64 transitions. [2020-04-18 15:52:00,731 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:00,738 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:52:00,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:00,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:52:00,739 INFO L87 Difference]: Start difference. First operand 152 states and 280 transitions. Second operand 5 states. [2020-04-18 15:52:00,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:00,769 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:00,769 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:00,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:00,770 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:00,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:00,770 INFO L82 PathProgramCache]: Analyzing trace with hash -1444696671, now seen corresponding path program 5 times [2020-04-18 15:52:00,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:00,770 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1673684192] [2020-04-18 15:52:00,770 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:00,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:00,802 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:00,803 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1673684192] [2020-04-18 15:52:00,803 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1792632179] [2020-04-18 15:52:00,803 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:00,895 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2020-04-18 15:52:00,895 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:00,896 INFO L264 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:00,897 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:00,899 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:00,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:00,900 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:00,900 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:00,901 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:00,908 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 91 transitions. [2020-04-18 15:52:00,909 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:01,033 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:52:01,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:52:01,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=179, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:52:01,034 INFO L87 Difference]: Start difference. First operand 159 states and 284 transitions. Second operand 12 states. [2020-04-18 15:52:01,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:01,145 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:01,145 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:01,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:01,145 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:01,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:01,146 INFO L82 PathProgramCache]: Analyzing trace with hash -639654315, now seen corresponding path program 6 times [2020-04-18 15:52:01,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:01,146 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [759228962] [2020-04-18 15:52:01,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:01,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:01,175 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:01,176 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [759228962] [2020-04-18 15:52:01,176 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:01,176 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:52:01,176 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:01,177 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:01,182 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 27 transitions. [2020-04-18 15:52:01,182 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:01,192 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:01,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:01,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=348, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:52:01,192 INFO L87 Difference]: Start difference. First operand 159 states and 284 transitions. Second operand 7 states. [2020-04-18 15:52:01,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:01,278 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:01,278 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:01,279 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:52:01,279 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1643074140] [2020-04-18 15:52:01,279 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:52:01,280 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:52:01,280 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1643074140] [2020-04-18 15:52:01,280 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2020-04-18 15:52:01,280 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:52:01,280 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:52:01,280 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=226, Invalid=530, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:52:01,280 INFO L87 Difference]: Start difference. First operand 37992 states and 202246 transitions. Second operand 14 states. [2020-04-18 15:52:02,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:02,695 INFO L93 Difference]: Finished difference Result 106781 states and 495616 transitions. [2020-04-18 15:52:02,695 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:52:02,695 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2020-04-18 15:52:02,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:03,027 INFO L225 Difference]: With dead ends: 106781 [2020-04-18 15:52:03,027 INFO L226 Difference]: Without dead ends: 106582 [2020-04-18 15:52:03,027 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 197 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=430, Invalid=1130, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:52:04,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106582 states. [2020-04-18 15:52:06,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106582 to 38476. [2020-04-18 15:52:06,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38476 states. [2020-04-18 15:52:06,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38476 states to 38476 states and 204312 transitions. [2020-04-18 15:52:06,372 INFO L78 Accepts]: Start accepts. Automaton has 38476 states and 204312 transitions. Word has length 27 [2020-04-18 15:52:06,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:06,372 INFO L479 AbstractCegarLoop]: Abstraction has 38476 states and 204312 transitions. [2020-04-18 15:52:06,372 INFO L480 AbstractCegarLoop]: Interpolant automaton has 14 states. [2020-04-18 15:52:06,372 INFO L276 IsEmpty]: Start isEmpty. Operand 38476 states and 204312 transitions. [2020-04-18 15:52:06,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:06,377 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:06,377 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:06,777 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 89 z3 -smt2 -in SMTLIB2_COMPLIANT=true,90 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:06,778 INFO L427 AbstractCegarLoop]: === Iteration 18 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:06,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:06,778 INFO L82 PathProgramCache]: Analyzing trace with hash -1707919879, now seen corresponding path program 1 times [2020-04-18 15:52:06,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:06,779 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [810231120] [2020-04-18 15:52:06,780 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:06,790 INFO L259 McrAutomatonBuilder]: Finished intersection with 484 states and 1539 transitions. [2020-04-18 15:52:06,792 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states. [2020-04-18 15:52:06,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:06,793 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:06,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:06,794 INFO L82 PathProgramCache]: Analyzing trace with hash -961346275, now seen corresponding path program 2 times [2020-04-18 15:52:06,794 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:06,794 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920775434] [2020-04-18 15:52:06,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:06,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:06,802 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:06,803 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920775434] [2020-04-18 15:52:06,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:06,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:06,803 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:06,804 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:06,822 INFO L259 McrAutomatonBuilder]: Finished intersection with 121 states and 244 transitions. [2020-04-18 15:52:06,822 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:06,824 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:06,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:06,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:06,825 INFO L87 Difference]: Start difference. First operand 484 states. Second operand 3 states. [2020-04-18 15:52:06,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:06,841 INFO L93 Difference]: Finished difference Result 649 states and 1927 transitions. [2020-04-18 15:52:06,841 INFO L276 IsEmpty]: Start isEmpty. Operand 649 states and 1927 transitions. [2020-04-18 15:52:06,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:06,842 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:06,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:06,843 INFO L82 PathProgramCache]: Analyzing trace with hash -437619671, now seen corresponding path program 3 times [2020-04-18 15:52:06,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:06,843 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938584563] [2020-04-18 15:52:06,843 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:06,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:06,861 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:06,862 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938584563] [2020-04-18 15:52:06,862 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1527567896] [2020-04-18 15:52:06,862 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:06,959 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:52:06,959 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:06,960 INFO L264 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:06,961 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:06,962 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:06,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:06,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:52:06,963 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:06,964 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:06,977 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 186 transitions. [2020-04-18 15:52:06,978 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:06,987 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:52:06,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:06,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:06,988 INFO L87 Difference]: Start difference. First operand 649 states and 1927 transitions. Second operand 5 states. [2020-04-18 15:52:07,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:07,058 INFO L93 Difference]: Finished difference Result 922 states and 2584 transitions. [2020-04-18 15:52:07,058 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 2584 transitions. [2020-04-18 15:52:07,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:07,060 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:07,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:07,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1223947389, now seen corresponding path program 4 times [2020-04-18 15:52:07,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:07,060 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619560809] [2020-04-18 15:52:07,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:07,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:07,093 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:07,094 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619560809] [2020-04-18 15:52:07,094 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1500898955] [2020-04-18 15:52:07,094 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:07,190 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:07,190 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:07,191 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:07,192 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:07,194 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:07,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:07,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:52:07,195 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:07,196 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:07,208 INFO L259 McrAutomatonBuilder]: Finished intersection with 93 states and 162 transitions. [2020-04-18 15:52:07,209 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:07,222 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 9 times. [2020-04-18 15:52:07,222 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:07,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:52:07,222 INFO L87 Difference]: Start difference. First operand 922 states and 2584 transitions. Second operand 7 states. [2020-04-18 15:52:07,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:07,464 INFO L93 Difference]: Finished difference Result 1322 states and 3426 transitions. [2020-04-18 15:52:07,464 INFO L276 IsEmpty]: Start isEmpty. Operand 1322 states and 3426 transitions. [2020-04-18 15:52:07,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:07,466 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:07,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:07,467 INFO L82 PathProgramCache]: Analyzing trace with hash 218326747, now seen corresponding path program 5 times [2020-04-18 15:52:07,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:07,467 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542189186] [2020-04-18 15:52:07,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:07,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:07,511 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:07,511 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [542189186] [2020-04-18 15:52:07,512 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1373040583] [2020-04-18 15:52:07,512 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:07,607 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:07,607 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:07,608 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:07,608 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:07,611 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:07,611 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:07,611 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:52:07,611 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:07,612 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:07,625 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 142 transitions. [2020-04-18 15:52:07,625 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:07,645 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:52:07,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:07,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=186, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:52:07,646 INFO L87 Difference]: Start difference. First operand 1322 states and 3426 transitions. Second operand 9 states. [2020-04-18 15:52:08,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:08,309 INFO L93 Difference]: Finished difference Result 1581 states and 3887 transitions. [2020-04-18 15:52:08,309 INFO L276 IsEmpty]: Start isEmpty. Operand 1581 states and 3887 transitions. [2020-04-18 15:52:08,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:08,311 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:08,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:08,311 INFO L82 PathProgramCache]: Analyzing trace with hash 218325697, now seen corresponding path program 6 times [2020-04-18 15:52:08,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:08,312 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540875570] [2020-04-18 15:52:08,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:08,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:08,343 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:08,343 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1540875570] [2020-04-18 15:52:08,343 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [249638061] [2020-04-18 15:52:08,343 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:08,441 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:52:08,442 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:08,442 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:08,443 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:08,445 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:08,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:08,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:52:08,446 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:08,448 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:08,461 INFO L259 McrAutomatonBuilder]: Finished intersection with 93 states and 160 transitions. [2020-04-18 15:52:08,462 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:08,554 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 13 times. [2020-04-18 15:52:08,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:08,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=1027, Unknown=0, NotChecked=0, Total=1332 [2020-04-18 15:52:08,554 INFO L87 Difference]: Start difference. First operand 1581 states and 3887 transitions. Second operand 9 states. [2020-04-18 15:52:08,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:08,719 INFO L93 Difference]: Finished difference Result 2422 states and 5388 transitions. [2020-04-18 15:52:08,719 INFO L276 IsEmpty]: Start isEmpty. Operand 2422 states and 5388 transitions. [2020-04-18 15:52:08,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:08,721 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:52:08,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:08,721 INFO L82 PathProgramCache]: Analyzing trace with hash 218978557, now seen corresponding path program 7 times [2020-04-18 15:52:08,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:08,721 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711979216] [2020-04-18 15:52:08,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:08,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:08,751 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:08,752 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [711979216] [2020-04-18 15:52:08,752 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1743980435] [2020-04-18 15:52:08,752 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:08,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:08,855 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:08,856 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:08,857 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:08,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:08,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:08,858 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:08,859 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:08,874 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 135 transitions. [2020-04-18 15:52:08,874 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:08,887 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:52:08,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:08,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1234, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:52:08,888 INFO L87 Difference]: Start difference. First operand 2422 states and 5388 transitions. Second operand 9 states. [2020-04-18 15:52:09,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:09,245 INFO L93 Difference]: Finished difference Result 2894 states and 6143 transitions. [2020-04-18 15:52:09,245 INFO L276 IsEmpty]: Start isEmpty. Operand 2894 states and 6143 transitions. [2020-04-18 15:52:09,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:09,247 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:52:09,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:09,248 INFO L82 PathProgramCache]: Analyzing trace with hash 1828442715, now seen corresponding path program 8 times [2020-04-18 15:52:09,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:09,248 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487444750] [2020-04-18 15:52:09,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:09,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:09,286 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:09,287 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487444750] [2020-04-18 15:52:09,287 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [52562406] [2020-04-18 15:52:09,287 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:09,383 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:52:09,383 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:09,384 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:09,385 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:09,388 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:09,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:09,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:52:09,388 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:09,390 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:09,403 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 106 transitions. [2020-04-18 15:52:09,403 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:09,416 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:52:09,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:09,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=414, Invalid=1748, Unknown=0, NotChecked=0, Total=2162 [2020-04-18 15:52:09,417 INFO L87 Difference]: Start difference. First operand 2894 states and 6143 transitions. Second operand 9 states. [2020-04-18 15:52:10,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:10,180 INFO L93 Difference]: Finished difference Result 3077 states and 6384 transitions. [2020-04-18 15:52:10,181 INFO L276 IsEmpty]: Start isEmpty. Operand 3077 states and 6384 transitions. [2020-04-18 15:52:10,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:10,183 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:52:10,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,184 INFO L82 PathProgramCache]: Analyzing trace with hash 1827968295, now seen corresponding path program 9 times [2020-04-18 15:52:10,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:10,184 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526771623] [2020-04-18 15:52:10,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:10,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:10,212 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,212 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526771623] [2020-04-18 15:52:10,212 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [806499057] [2020-04-18 15:52:10,212 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:10,307 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:52:10,307 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:10,308 INFO L264 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:10,309 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:10,312 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:10,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:10,313 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:10,314 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,334 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 143 transitions. [2020-04-18 15:52:10,334 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:10,433 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 22 times. [2020-04-18 15:52:10,434 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:52:10,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=855, Invalid=3975, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 15:52:10,435 INFO L87 Difference]: Start difference. First operand 3077 states and 6384 transitions. Second operand 15 states. [2020-04-18 15:52:11,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:11,023 INFO L93 Difference]: Finished difference Result 3704 states and 7396 transitions. [2020-04-18 15:52:11,023 INFO L276 IsEmpty]: Start isEmpty. Operand 3704 states and 7396 transitions. [2020-04-18 15:52:11,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:11,026 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:52:11,027 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:11,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1839600541, now seen corresponding path program 10 times [2020-04-18 15:52:11,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:11,027 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135403691] [2020-04-18 15:52:11,027 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:11,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:11,069 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:11,069 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [135403691] [2020-04-18 15:52:11,069 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1011569388] [2020-04-18 15:52:11,070 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:11,166 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:11,166 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:11,167 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:11,167 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:11,170 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:11,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:11,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:11,171 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:11,172 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:11,183 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 106 transitions. [2020-04-18 15:52:11,183 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:11,184 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:52:11,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:52:11,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=919, Invalid=4483, Unknown=0, NotChecked=0, Total=5402 [2020-04-18 15:52:11,185 INFO L87 Difference]: Start difference. First operand 3704 states and 7396 transitions. Second operand 11 states. [2020-04-18 15:52:12,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:12,046 INFO L93 Difference]: Finished difference Result 3735 states and 7427 transitions. [2020-04-18 15:52:12,046 INFO L276 IsEmpty]: Start isEmpty. Operand 3735 states and 7427 transitions. [2020-04-18 15:52:12,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:12,050 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:52:12,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:12,050 INFO L82 PathProgramCache]: Analyzing trace with hash -1803561181, now seen corresponding path program 11 times [2020-04-18 15:52:12,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:12,050 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391033337] [2020-04-18 15:52:12,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:12,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:12,093 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:12,093 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1391033337] [2020-04-18 15:52:12,094 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [804271659] [2020-04-18 15:52:12,094 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:12,191 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:12,191 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:12,192 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:12,193 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:12,195 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:12,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:12,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:12,195 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:12,196 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:12,209 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 142 transitions. [2020-04-18 15:52:12,209 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:12,212 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 15 times. [2020-04-18 15:52:12,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:52:12,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1087, Invalid=5719, Unknown=0, NotChecked=0, Total=6806 [2020-04-18 15:52:12,213 INFO L87 Difference]: Start difference. First operand 3735 states and 7427 transitions. Second operand 15 states. Received shutdown request... [2020-04-18 15:52:16,489 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 92 z3 -smt2 -in SMTLIB2_COMPLIANT=true,97 z3 -smt2 -in SMTLIB2_COMPLIANT=true,94 z3 -smt2 -in SMTLIB2_COMPLIANT=true,91 z3 -smt2 -in SMTLIB2_COMPLIANT=true,98 z3 -smt2 -in SMTLIB2_COMPLIANT=true,93 z3 -smt2 -in SMTLIB2_COMPLIANT=true,96 z3 -smt2 -in SMTLIB2_COMPLIANT=true,95 z3 -smt2 -in SMTLIB2_COMPLIANT=true,99 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:16,491 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:128) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.isCorrect(StrategyModuleMcr.java:64) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:242) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:166) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:75) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:511) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:436) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:370) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopResult.iterate(CegarLoopResult.java:142) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterateNew(TraceAbstractionStarter.java:352) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:127) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:120) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:317) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1067) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:966) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:187) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:115) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.Mcr.exploreInterleavings(Mcr.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.Mcr.(Mcr.java:86) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:126) ... 23 more [2020-04-18 15:52:16,495 INFO L168 Benchmark]: Toolchain (without parser) took 241963.12 ms. Allocated memory was 134.7 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 98.3 MB in the beginning and 2.6 GB in the end (delta: -2.5 GB). Peak memory consumption was 523.9 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,495 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 134.7 MB. Free memory was 117.9 MB in the beginning and 117.7 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,496 INFO L168 Benchmark]: CACSL2BoogieTranslator took 669.99 ms. Allocated memory was 134.7 MB in the beginning and 199.2 MB in the end (delta: 64.5 MB). Free memory was 96.3 MB in the beginning and 155.5 MB in the end (delta: -59.2 MB). Peak memory consumption was 23.9 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,496 INFO L168 Benchmark]: Boogie Procedure Inliner took 47.74 ms. Allocated memory is still 199.2 MB. Free memory was 155.5 MB in the beginning and 153.3 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,496 INFO L168 Benchmark]: Boogie Preprocessor took 25.28 ms. Allocated memory is still 199.2 MB. Free memory was 153.3 MB in the beginning and 151.9 MB in the end (delta: 1.5 MB). Peak memory consumption was 1.5 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,497 INFO L168 Benchmark]: RCFGBuilder took 400.34 ms. Allocated memory is still 199.2 MB. Free memory was 151.9 MB in the beginning and 132.5 MB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,497 INFO L168 Benchmark]: TraceAbstraction took 240791.46 ms. Allocated memory was 199.2 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 132.5 MB in the beginning and 2.6 GB in the end (delta: -2.5 GB). Peak memory consumption was 493.6 MB. Max. memory is 7.1 GB. [2020-04-18 15:52:16,499 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 134.7 MB. Free memory was 117.9 MB in the beginning and 117.7 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 669.99 ms. Allocated memory was 134.7 MB in the beginning and 199.2 MB in the end (delta: 64.5 MB). Free memory was 96.3 MB in the beginning and 155.5 MB in the end (delta: -59.2 MB). Peak memory consumption was 23.9 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 47.74 ms. Allocated memory is still 199.2 MB. Free memory was 155.5 MB in the beginning and 153.3 MB in the end (delta: 2.2 MB). Peak memory consumption was 2.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 25.28 ms. Allocated memory is still 199.2 MB. Free memory was 153.3 MB in the beginning and 151.9 MB in the end (delta: 1.5 MB). Peak memory consumption was 1.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 400.34 ms. Allocated memory is still 199.2 MB. Free memory was 151.9 MB in the beginning and 132.5 MB in the end (delta: 19.4 MB). Peak memory consumption was 19.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 240791.46 ms. Allocated memory was 199.2 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 132.5 MB in the beginning and 2.6 GB in the end (delta: -2.5 GB). Peak memory consumption was 493.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.3s, 55 ProgramPointsBefore, 18 ProgramPointsAfterwards, 51 TransitionsBefore, 12 TransitionsAfterwards, 692 CoEnabledTransitionPairs, 6 FixpointIterations, 13 TrivialSequentialCompositions, 27 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 5 ConcurrentYvCompositions, 2 ChoiceCompositions, 389 VarBasedMoverChecksPositive, 4 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 576 CheckedPairsTotal, 45 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.3s, 76 ProgramPointsBefore, 31 ProgramPointsAfterwards, 69 TransitionsBefore, 21 TransitionsAfterwards, 1108 CoEnabledTransitionPairs, 6 FixpointIterations, 25 TrivialSequentialCompositions, 27 ConcurrentSequentialCompositions, 2 TrivialYvCompositions, 5 ConcurrentYvCompositions, 3 ChoiceCompositions, 577 VarBasedMoverChecksPositive, 8 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 964 CheckedPairsTotal, 59 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.5s, 97 ProgramPointsBefore, 41 ProgramPointsAfterwards, 87 TransitionsBefore, 27 TransitionsAfterwards, 1608 CoEnabledTransitionPairs, 6 FixpointIterations, 32 TrivialSequentialCompositions, 30 ConcurrentSequentialCompositions, 7 TrivialYvCompositions, 4 ConcurrentYvCompositions, 4 ChoiceCompositions, 781 VarBasedMoverChecksPositive, 14 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 1796 CheckedPairsTotal, 73 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.8s, 118 ProgramPointsBefore, 51 ProgramPointsAfterwards, 105 TransitionsBefore, 33 TransitionsAfterwards, 2192 CoEnabledTransitionPairs, 6 FixpointIterations, 43 TrivialSequentialCompositions, 34 ConcurrentSequentialCompositions, 10 TrivialYvCompositions, 5 ConcurrentYvCompositions, 5 ChoiceCompositions, 1100 VarBasedMoverChecksPositive, 20 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 2240 CheckedPairsTotal, 92 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.9s, 139 ProgramPointsBefore, 61 ProgramPointsAfterwards, 123 TransitionsBefore, 39 TransitionsAfterwards, 2860 CoEnabledTransitionPairs, 6 FixpointIterations, 59 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 11 TrivialYvCompositions, 5 ConcurrentYvCompositions, 6 ChoiceCompositions, 1387 VarBasedMoverChecksPositive, 25 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 3096 CheckedPairsTotal, 115 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.1s, 160 ProgramPointsBefore, 71 ProgramPointsAfterwards, 141 TransitionsBefore, 45 TransitionsAfterwards, 3612 CoEnabledTransitionPairs, 6 FixpointIterations, 66 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 12 TrivialYvCompositions, 4 ConcurrentYvCompositions, 7 ChoiceCompositions, 1785 VarBasedMoverChecksPositive, 33 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 4226 CheckedPairsTotal, 127 TotalNumberOfCompositions - ExceptionOrErrorResult: RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user.: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:128) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown