/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-McrStrategy.epf -i ../../../trunk/examples/svcomp/pthread-lit/fkp2013-2.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-b981219 [2020-04-18 15:49:06,452 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-04-18 15:49:06,454 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-04-18 15:49:06,466 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-04-18 15:49:06,467 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-04-18 15:49:06,468 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-04-18 15:49:06,469 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-04-18 15:49:06,472 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-04-18 15:49:06,474 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-04-18 15:49:06,475 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-04-18 15:49:06,476 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-04-18 15:49:06,477 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-04-18 15:49:06,477 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-04-18 15:49:06,478 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-04-18 15:49:06,479 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-04-18 15:49:06,480 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-04-18 15:49:06,481 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-04-18 15:49:06,482 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-04-18 15:49:06,483 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-04-18 15:49:06,485 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-04-18 15:49:06,487 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-04-18 15:49:06,488 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-04-18 15:49:06,489 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-04-18 15:49:06,489 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-04-18 15:49:06,491 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-04-18 15:49:06,492 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-04-18 15:49:06,492 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-04-18 15:49:06,493 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-04-18 15:49:06,493 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-04-18 15:49:06,494 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-04-18 15:49:06,494 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-04-18 15:49:06,496 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-04-18 15:49:06,497 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-04-18 15:49:06,498 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-04-18 15:49:06,500 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-04-18 15:49:06,501 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-04-18 15:49:06,502 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-04-18 15:49:06,502 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-04-18 15:49:06,502 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-04-18 15:49:06,503 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-04-18 15:49:06,503 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-04-18 15:49:06,506 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-McrStrategy.epf [2020-04-18 15:49:06,531 INFO L113 SettingsManager]: Loading preferences was successful [2020-04-18 15:49:06,532 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-04-18 15:49:06,533 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-04-18 15:49:06,534 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-04-18 15:49:06,534 INFO L138 SettingsManager]: * Use SBE=true [2020-04-18 15:49:06,534 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-04-18 15:49:06,534 INFO L138 SettingsManager]: * sizeof long=4 [2020-04-18 15:49:06,534 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-04-18 15:49:06,535 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-04-18 15:49:06,535 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-04-18 15:49:06,536 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2020-04-18 15:49:06,536 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2020-04-18 15:49:06,536 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2020-04-18 15:49:06,537 INFO L138 SettingsManager]: * sizeof long double=12 [2020-04-18 15:49:06,537 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-04-18 15:49:06,537 INFO L138 SettingsManager]: * Use constant arrays=true [2020-04-18 15:49:06,537 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2020-04-18 15:49:06,538 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-04-18 15:49:06,538 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-04-18 15:49:06,538 INFO L138 SettingsManager]: * To the following directory=./dump/ [2020-04-18 15:49:06,538 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2020-04-18 15:49:06,538 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 15:49:06,539 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-04-18 15:49:06,539 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2020-04-18 15:49:06,539 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-04-18 15:49:06,539 INFO L138 SettingsManager]: * Trace refinement strategy=MCR [2020-04-18 15:49:06,539 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2020-04-18 15:49:06,539 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=VARIABLE_BASED_MOVER_CHECK [2020-04-18 15:49:06,540 INFO L138 SettingsManager]: * Trace refinement strategy used in MCR=CAMEL [2020-04-18 15:49:06,540 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-04-18 15:49:06,541 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2020-04-18 15:49:06,811 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-04-18 15:49:06,824 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-04-18 15:49:06,827 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-04-18 15:49:06,829 INFO L271 PluginConnector]: Initializing CDTParser... [2020-04-18 15:49:06,829 INFO L275 PluginConnector]: CDTParser initialized [2020-04-18 15:49:06,830 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-lit/fkp2013-2.i [2020-04-18 15:49:06,907 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7cefe6770/58fcb9f70d3d41fe9afd69b58ce9e30c/FLAGa3cef94be [2020-04-18 15:49:07,394 INFO L306 CDTParser]: Found 1 translation units. [2020-04-18 15:49:07,402 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-lit/fkp2013-2.i [2020-04-18 15:49:07,417 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7cefe6770/58fcb9f70d3d41fe9afd69b58ce9e30c/FLAGa3cef94be [2020-04-18 15:49:07,645 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7cefe6770/58fcb9f70d3d41fe9afd69b58ce9e30c [2020-04-18 15:49:07,656 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-04-18 15:49:07,679 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2020-04-18 15:49:07,680 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-04-18 15:49:07,681 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-04-18 15:49:07,684 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-04-18 15:49:07,685 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 03:49:07" (1/1) ... [2020-04-18 15:49:07,688 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@e43482 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:07, skipping insertion in model container [2020-04-18 15:49:07,688 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 03:49:07" (1/1) ... [2020-04-18 15:49:07,696 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-04-18 15:49:07,739 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-04-18 15:49:08,183 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 15:49:08,197 INFO L203 MainTranslator]: Completed pre-run [2020-04-18 15:49:08,279 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 15:49:08,349 INFO L208 MainTranslator]: Completed translation [2020-04-18 15:49:08,349 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08 WrapperNode [2020-04-18 15:49:08,350 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-04-18 15:49:08,350 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-04-18 15:49:08,351 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-04-18 15:49:08,351 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2020-04-18 15:49:08,360 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,376 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,401 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-04-18 15:49:08,401 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-04-18 15:49:08,402 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-04-18 15:49:08,402 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-04-18 15:49:08,411 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,411 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,429 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,429 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,440 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,451 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,455 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... [2020-04-18 15:49:08,461 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-04-18 15:49:08,464 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-04-18 15:49:08,465 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-04-18 15:49:08,465 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-04-18 15:49:08,466 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 15:49:08,531 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2020-04-18 15:49:08,531 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2020-04-18 15:49:08,531 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2020-04-18 15:49:08,532 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2020-04-18 15:49:08,532 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2020-04-18 15:49:08,532 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2020-04-18 15:49:08,532 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2020-04-18 15:49:08,532 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-04-18 15:49:08,533 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-04-18 15:49:08,534 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2020-04-18 15:49:08,877 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-04-18 15:49:08,877 INFO L295 CfgBuilder]: Removed 7 assume(true) statements. [2020-04-18 15:49:08,881 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 03:49:08 BoogieIcfgContainer [2020-04-18 15:49:08,881 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-04-18 15:49:08,883 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-04-18 15:49:08,883 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-04-18 15:49:08,886 INFO L275 PluginConnector]: TraceAbstraction initialized [2020-04-18 15:49:08,886 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.04 03:49:07" (1/3) ... [2020-04-18 15:49:08,887 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e90f5d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 03:49:08, skipping insertion in model container [2020-04-18 15:49:08,887 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 03:49:08" (2/3) ... [2020-04-18 15:49:08,888 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e90f5d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 03:49:08, skipping insertion in model container [2020-04-18 15:49:08,888 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 03:49:08" (3/3) ... [2020-04-18 15:49:08,890 INFO L109 eAbstractionObserver]: Analyzing ICFG fkp2013-2.i [2020-04-18 15:49:08,898 WARN L146 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2020-04-18 15:49:08,898 INFO L157 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2020-04-18 15:49:08,905 INFO L169 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2020-04-18 15:49:08,906 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2020-04-18 15:49:08,929 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,930 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,930 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,931 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,931 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,931 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,931 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,932 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,932 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,933 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,933 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,933 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,933 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,934 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,934 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,934 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,934 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,935 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,935 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,935 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,936 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,940 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,940 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,941 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,941 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,941 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,947 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,947 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,947 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,947 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,948 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,948 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of1ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:08,973 INFO L251 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2020-04-18 15:49:08,992 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:08,992 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:08,992 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:08,992 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:08,993 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:08,993 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:08,993 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:08,993 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:09,007 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 55 places, 51 transitions, 112 flow [2020-04-18 15:49:09,009 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 55 places, 51 transitions, 112 flow [2020-04-18 15:49:09,049 INFO L129 PetriNetUnfolder]: 3/61 cut-off events. [2020-04-18 15:49:09,049 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2020-04-18 15:49:09,055 INFO L80 FinitePrefix]: Finished finitePrefix Result has 69 conditions, 61 events. 3/61 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 100 event pairs, 0 based on Foata normal form. 0/55 useless extension candidates. Maximal degree in co-relation 49. Up to 4 conditions per place. [2020-04-18 15:49:09,057 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 55 places, 51 transitions, 112 flow [2020-04-18 15:49:09,076 INFO L129 PetriNetUnfolder]: 3/61 cut-off events. [2020-04-18 15:49:09,076 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2020-04-18 15:49:09,077 INFO L80 FinitePrefix]: Finished finitePrefix Result has 69 conditions, 61 events. 3/61 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 100 event pairs, 0 based on Foata normal form. 0/55 useless extension candidates. Maximal degree in co-relation 49. Up to 4 conditions per place. [2020-04-18 15:49:09,079 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 692 [2020-04-18 15:49:09,080 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:10,258 WARN L192 SmtUtils]: Spent 165.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 62 [2020-04-18 15:49:10,337 INFO L206 etLargeBlockEncoding]: Checked pairs total: 576 [2020-04-18 15:49:10,337 INFO L214 etLargeBlockEncoding]: Total number of compositions: 45 [2020-04-18 15:49:10,342 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 18 places, 12 transitions, 34 flow [2020-04-18 15:49:10,354 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 44 states. [2020-04-18 15:49:10,356 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states. [2020-04-18 15:49:10,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:10,365 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:10,366 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:10,366 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:10,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,374 INFO L82 PathProgramCache]: Analyzing trace with hash 208056, now seen corresponding path program 1 times [2020-04-18 15:49:10,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:10,383 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1686920420] [2020-04-18 15:49:10,400 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,413 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:10,416 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:10,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:10,417 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:10,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,419 INFO L82 PathProgramCache]: Analyzing trace with hash 208056, now seen corresponding path program 2 times [2020-04-18 15:49:10,423 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:10,424 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356144663] [2020-04-18 15:49:10,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:10,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:10,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:10,619 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1356144663] [2020-04-18 15:49:10,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:10,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:10,624 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:10,625 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,626 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:10,627 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:10,639 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:10,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:10,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:10,646 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:10,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:10,650 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:10,650 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:10,651 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:10,652 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1686920420] [2020-04-18 15:49:10,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:10,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:10,653 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1686920420] [2020-04-18 15:49:10,654 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:10,655 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:10,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:10,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:10,661 INFO L87 Difference]: Start difference. First operand 44 states. Second operand 3 states. [2020-04-18 15:49:10,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:10,686 INFO L93 Difference]: Finished difference Result 35 states and 59 transitions. [2020-04-18 15:49:10,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:10,691 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:10,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:10,717 INFO L225 Difference]: With dead ends: 35 [2020-04-18 15:49:10,717 INFO L226 Difference]: Without dead ends: 31 [2020-04-18 15:49:10,719 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:10,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2020-04-18 15:49:10,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2020-04-18 15:49:10,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2020-04-18 15:49:10,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 51 transitions. [2020-04-18 15:49:10,775 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 51 transitions. Word has length 3 [2020-04-18 15:49:10,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:10,787 INFO L479 AbstractCegarLoop]: Abstraction has 31 states and 51 transitions. [2020-04-18 15:49:10,787 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:10,788 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 51 transitions. [2020-04-18 15:49:10,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:49:10,788 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:10,789 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:10,789 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:10,790 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,790 INFO L82 PathProgramCache]: Analyzing trace with hash -1139052385, now seen corresponding path program 1 times [2020-04-18 15:49:10,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:10,790 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1155232635] [2020-04-18 15:49:10,795 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,801 INFO L259 McrAutomatonBuilder]: Finished intersection with 12 states and 15 transitions. [2020-04-18 15:49:10,804 INFO L276 IsEmpty]: Start isEmpty. Operand 12 states. [2020-04-18 15:49:10,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:49:10,805 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:10,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,806 INFO L82 PathProgramCache]: Analyzing trace with hash -1124688655, now seen corresponding path program 2 times [2020-04-18 15:49:10,806 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:10,807 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [637262039] [2020-04-18 15:49:10,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:10,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:10,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:10,908 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [637262039] [2020-04-18 15:49:10,908 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:10,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:10,909 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:10,909 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:10,914 INFO L259 McrAutomatonBuilder]: Finished intersection with 11 states and 13 transitions. [2020-04-18 15:49:10,915 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:10,920 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:10,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:10,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:10,920 INFO L87 Difference]: Start difference. First operand 12 states. Second operand 3 states. [2020-04-18 15:49:10,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:10,925 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2020-04-18 15:49:10,925 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2020-04-18 15:49:10,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2020-04-18 15:49:10,926 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:10,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:10,926 INFO L82 PathProgramCache]: Analyzing trace with hash -1139052385, now seen corresponding path program 3 times [2020-04-18 15:49:10,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:10,927 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1685941007] [2020-04-18 15:49:10,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:10,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:10,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:10,998 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1685941007] [2020-04-18 15:49:10,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:10,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:10,998 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:10,999 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:11,002 INFO L259 McrAutomatonBuilder]: Finished intersection with 8 states and 7 transitions. [2020-04-18 15:49:11,002 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:11,007 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:11,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 15:49:11,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:49:11,008 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. Second operand 4 states. [2020-04-18 15:49:11,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:11,015 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2020-04-18 15:49:11,015 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 15 transitions. [2020-04-18 15:49:11,015 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:11,016 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1155232635] [2020-04-18 15:49:11,016 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:11,016 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2] total 2 [2020-04-18 15:49:11,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1155232635] [2020-04-18 15:49:11,017 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2020-04-18 15:49:11,018 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:11,018 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 15:49:11,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:49:11,018 INFO L87 Difference]: Start difference. First operand 31 states and 51 transitions. Second operand 4 states. [2020-04-18 15:49:11,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:11,036 INFO L93 Difference]: Finished difference Result 26 states and 42 transitions. [2020-04-18 15:49:11,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2020-04-18 15:49:11,038 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 7 [2020-04-18 15:49:11,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:11,039 INFO L225 Difference]: With dead ends: 26 [2020-04-18 15:49:11,039 INFO L226 Difference]: Without dead ends: 24 [2020-04-18 15:49:11,040 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2020-04-18 15:49:11,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2020-04-18 15:49:11,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2020-04-18 15:49:11,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2020-04-18 15:49:11,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 39 transitions. [2020-04-18 15:49:11,045 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 39 transitions. Word has length 7 [2020-04-18 15:49:11,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:11,046 INFO L479 AbstractCegarLoop]: Abstraction has 24 states and 39 transitions. [2020-04-18 15:49:11,046 INFO L480 AbstractCegarLoop]: Interpolant automaton has 4 states. [2020-04-18 15:49:11,046 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 39 transitions. [2020-04-18 15:49:11,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2020-04-18 15:49:11,047 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:11,047 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:11,047 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:11,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:11,048 INFO L82 PathProgramCache]: Analyzing trace with hash -950894116, now seen corresponding path program 1 times [2020-04-18 15:49:11,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:11,048 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1879921032] [2020-04-18 15:49:11,048 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:11,049 INFO L259 McrAutomatonBuilder]: Finished intersection with 9 states and 8 transitions. [2020-04-18 15:49:11,049 INFO L276 IsEmpty]: Start isEmpty. Operand 9 states. [2020-04-18 15:49:11,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2020-04-18 15:49:11,050 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:11,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:11,050 INFO L82 PathProgramCache]: Analyzing trace with hash -950894116, now seen corresponding path program 2 times [2020-04-18 15:49:11,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:11,051 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786562346] [2020-04-18 15:49:11,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:11,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:11,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:11,118 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:49:11,118 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:49:11,118 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:49:11,119 WARN L363 ceAbstractionStarter]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:49:11,120 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 2 thread instances. [2020-04-18 15:49:11,131 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,131 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,131 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,132 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,132 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,132 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,132 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,133 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,133 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,135 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,135 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,135 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,135 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,136 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,136 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,136 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,137 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,137 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,137 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,138 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,139 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,139 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,139 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,139 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,139 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,140 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,140 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,141 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,141 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,141 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,141 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,142 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,142 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,142 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,142 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,143 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,143 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,143 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,144 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,144 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,144 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,144 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,160 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,160 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,160 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of2ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,161 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,161 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of2ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,163 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,164 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,164 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,164 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,164 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,164 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,167 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,168 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,168 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,168 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,168 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of2ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,168 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of2ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:11,170 INFO L251 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2020-04-18 15:49:11,170 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:11,170 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:11,170 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:11,171 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:11,171 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:11,171 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:11,171 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:11,171 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:11,176 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 76 places, 69 transitions, 162 flow [2020-04-18 15:49:11,177 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 76 places, 69 transitions, 162 flow [2020-04-18 15:49:11,212 INFO L129 PetriNetUnfolder]: 4/83 cut-off events. [2020-04-18 15:49:11,213 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2020-04-18 15:49:11,217 INFO L80 FinitePrefix]: Finished finitePrefix Result has 97 conditions, 83 events. 4/83 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 141 event pairs, 0 based on Foata normal form. 0/75 useless extension candidates. Maximal degree in co-relation 92. Up to 6 conditions per place. [2020-04-18 15:49:11,220 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 76 places, 69 transitions, 162 flow [2020-04-18 15:49:11,236 INFO L129 PetriNetUnfolder]: 4/83 cut-off events. [2020-04-18 15:49:11,237 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2020-04-18 15:49:11,238 INFO L80 FinitePrefix]: Finished finitePrefix Result has 97 conditions, 83 events. 4/83 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 141 event pairs, 0 based on Foata normal form. 0/75 useless extension candidates. Maximal degree in co-relation 92. Up to 6 conditions per place. [2020-04-18 15:49:11,240 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 1108 [2020-04-18 15:49:11,240 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:12,460 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:49:12,527 INFO L206 etLargeBlockEncoding]: Checked pairs total: 964 [2020-04-18 15:49:12,528 INFO L214 etLargeBlockEncoding]: Total number of compositions: 59 [2020-04-18 15:49:12,528 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 31 places, 21 transitions, 66 flow [2020-04-18 15:49:12,539 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 224 states. [2020-04-18 15:49:12,540 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states. [2020-04-18 15:49:12,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:12,540 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:12,540 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:12,541 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:12,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,541 INFO L82 PathProgramCache]: Analyzing trace with hash 354555, now seen corresponding path program 1 times [2020-04-18 15:49:12,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:12,541 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [998463748] [2020-04-18 15:49:12,542 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,542 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:12,542 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:12,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:12,543 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:12,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,543 INFO L82 PathProgramCache]: Analyzing trace with hash 354555, now seen corresponding path program 2 times [2020-04-18 15:49:12,543 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:12,544 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455843618] [2020-04-18 15:49:12,544 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:12,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:12,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:12,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455843618] [2020-04-18 15:49:12,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:12,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:12,583 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:12,583 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,583 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:12,584 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:12,587 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:12,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:12,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:12,587 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:12,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,588 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:12,589 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:12,589 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:12,589 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [998463748] [2020-04-18 15:49:12,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:12,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:12,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [998463748] [2020-04-18 15:49:12,591 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:12,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:12,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:12,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:12,592 INFO L87 Difference]: Start difference. First operand 224 states. Second operand 3 states. [2020-04-18 15:49:12,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,622 INFO L93 Difference]: Finished difference Result 185 states and 459 transitions. [2020-04-18 15:49:12,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:12,623 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:12,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:12,628 INFO L225 Difference]: With dead ends: 185 [2020-04-18 15:49:12,628 INFO L226 Difference]: Without dead ends: 171 [2020-04-18 15:49:12,629 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:12,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2020-04-18 15:49:12,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2020-04-18 15:49:12,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2020-04-18 15:49:12,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 418 transitions. [2020-04-18 15:49:12,658 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 418 transitions. Word has length 3 [2020-04-18 15:49:12,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:12,658 INFO L479 AbstractCegarLoop]: Abstraction has 171 states and 418 transitions. [2020-04-18 15:49:12,658 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:12,659 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 418 transitions. [2020-04-18 15:49:12,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:12,662 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:12,662 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:12,663 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:12,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1106209149, now seen corresponding path program 1 times [2020-04-18 15:49:12,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:12,664 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [661098101] [2020-04-18 15:49:12,666 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,667 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:49:12,667 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:49:12,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:12,668 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:12,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,668 INFO L82 PathProgramCache]: Analyzing trace with hash -1106209149, now seen corresponding path program 2 times [2020-04-18 15:49:12,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:12,671 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [953598310] [2020-04-18 15:49:12,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:12,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:12,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:12,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [953598310] [2020-04-18 15:49:12,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:12,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:12,731 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:12,731 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,732 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:49:12,733 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:12,742 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:12,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:12,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:12,743 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 5 states. [2020-04-18 15:49:12,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,759 INFO L93 Difference]: Finished difference Result 16 states and 21 transitions. [2020-04-18 15:49:12,759 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states and 21 transitions. [2020-04-18 15:49:12,759 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:12,760 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [661098101] [2020-04-18 15:49:12,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:12,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:12,761 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [661098101] [2020-04-18 15:49:12,761 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:12,761 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:12,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:12,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:12,762 INFO L87 Difference]: Start difference. First operand 171 states and 418 transitions. Second operand 5 states. [2020-04-18 15:49:12,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,814 INFO L93 Difference]: Finished difference Result 205 states and 460 transitions. [2020-04-18 15:49:12,815 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:12,815 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:49:12,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:12,818 INFO L225 Difference]: With dead ends: 205 [2020-04-18 15:49:12,818 INFO L226 Difference]: Without dead ends: 201 [2020-04-18 15:49:12,818 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:12,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2020-04-18 15:49:12,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 162. [2020-04-18 15:49:12,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2020-04-18 15:49:12,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 399 transitions. [2020-04-18 15:49:12,834 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 399 transitions. Word has length 9 [2020-04-18 15:49:12,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:12,835 INFO L479 AbstractCegarLoop]: Abstraction has 162 states and 399 transitions. [2020-04-18 15:49:12,835 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:12,835 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 399 transitions. [2020-04-18 15:49:12,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:12,836 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:12,836 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:12,836 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:12,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,837 INFO L82 PathProgramCache]: Analyzing trace with hash 583411714, now seen corresponding path program 1 times [2020-04-18 15:49:12,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:12,837 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1413874982] [2020-04-18 15:49:12,838 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,839 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:49:12,839 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:49:12,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:12,840 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:12,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:12,840 INFO L82 PathProgramCache]: Analyzing trace with hash 583411714, now seen corresponding path program 2 times [2020-04-18 15:49:12,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:12,840 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630320866] [2020-04-18 15:49:12,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:12,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:12,896 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:12,896 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630320866] [2020-04-18 15:49:12,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:12,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:12,897 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:12,898 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:12,900 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:49:12,900 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:12,912 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:12,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:12,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:12,913 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 5 states. [2020-04-18 15:49:12,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,930 INFO L93 Difference]: Finished difference Result 24 states and 33 transitions. [2020-04-18 15:49:12,930 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 33 transitions. [2020-04-18 15:49:12,931 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:12,931 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1413874982] [2020-04-18 15:49:12,931 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:12,931 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:12,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1413874982] [2020-04-18 15:49:12,932 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:12,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:12,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:12,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:12,933 INFO L87 Difference]: Start difference. First operand 162 states and 399 transitions. Second operand 5 states. [2020-04-18 15:49:12,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:12,989 INFO L93 Difference]: Finished difference Result 189 states and 423 transitions. [2020-04-18 15:49:12,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:12,990 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:49:12,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:12,991 INFO L225 Difference]: With dead ends: 189 [2020-04-18 15:49:12,991 INFO L226 Difference]: Without dead ends: 185 [2020-04-18 15:49:12,992 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:12,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2020-04-18 15:49:13,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 153. [2020-04-18 15:49:13,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2020-04-18 15:49:13,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 367 transitions. [2020-04-18 15:49:13,003 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 367 transitions. Word has length 13 [2020-04-18 15:49:13,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:13,005 INFO L479 AbstractCegarLoop]: Abstraction has 153 states and 367 transitions. [2020-04-18 15:49:13,005 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:13,005 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 367 transitions. [2020-04-18 15:49:13,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2020-04-18 15:49:13,006 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:13,006 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:13,007 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:13,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:13,007 INFO L82 PathProgramCache]: Analyzing trace with hash 903154619, now seen corresponding path program 1 times [2020-04-18 15:49:13,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:13,007 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1718900396] [2020-04-18 15:49:13,008 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:13,009 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 14 transitions. [2020-04-18 15:49:13,009 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states. [2020-04-18 15:49:13,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2020-04-18 15:49:13,010 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:13,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:13,011 INFO L82 PathProgramCache]: Analyzing trace with hash 903154619, now seen corresponding path program 2 times [2020-04-18 15:49:13,011 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:13,011 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1438376362] [2020-04-18 15:49:13,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:13,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:13,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:13,072 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:49:13,072 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:49:13,073 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:49:13,073 WARN L363 ceAbstractionStarter]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:49:13,074 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 3 thread instances. [2020-04-18 15:49:13,084 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,084 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,084 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,084 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,085 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,085 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,085 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,085 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,085 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,086 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,087 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,088 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,088 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,088 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,088 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,088 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,089 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,090 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,091 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,091 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,091 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,091 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,091 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,092 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,093 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,094 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,095 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,095 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,095 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,095 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,095 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,096 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,097 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,097 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,097 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,097 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,099 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,099 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of3ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,099 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,099 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,099 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of3ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,101 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,103 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of3ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,105 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of3ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:13,107 INFO L251 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2020-04-18 15:49:13,107 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:13,107 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:13,107 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:13,107 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:13,107 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:13,108 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:13,108 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:13,108 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:13,110 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 97 places, 87 transitions, 216 flow [2020-04-18 15:49:13,110 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 97 places, 87 transitions, 216 flow [2020-04-18 15:49:13,126 INFO L129 PetriNetUnfolder]: 5/105 cut-off events. [2020-04-18 15:49:13,126 INFO L130 PetriNetUnfolder]: For 7/7 co-relation queries the response was YES. [2020-04-18 15:49:13,128 INFO L80 FinitePrefix]: Finished finitePrefix Result has 126 conditions, 105 events. 5/105 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 187 event pairs, 0 based on Foata normal form. 0/95 useless extension candidates. Maximal degree in co-relation 119. Up to 8 conditions per place. [2020-04-18 15:49:13,130 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 97 places, 87 transitions, 216 flow [2020-04-18 15:49:13,143 INFO L129 PetriNetUnfolder]: 5/105 cut-off events. [2020-04-18 15:49:13,143 INFO L130 PetriNetUnfolder]: For 7/7 co-relation queries the response was YES. [2020-04-18 15:49:13,145 INFO L80 FinitePrefix]: Finished finitePrefix Result has 126 conditions, 105 events. 5/105 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 187 event pairs, 0 based on Foata normal form. 0/95 useless extension candidates. Maximal degree in co-relation 119. Up to 8 conditions per place. [2020-04-18 15:49:13,147 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 1608 [2020-04-18 15:49:13,148 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:14,555 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2020-04-18 15:49:14,746 INFO L206 etLargeBlockEncoding]: Checked pairs total: 1796 [2020-04-18 15:49:14,746 INFO L214 etLargeBlockEncoding]: Total number of compositions: 73 [2020-04-18 15:49:14,746 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 41 places, 27 transitions, 96 flow [2020-04-18 15:49:14,777 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 683 states. [2020-04-18 15:49:14,777 INFO L276 IsEmpty]: Start isEmpty. Operand 683 states. [2020-04-18 15:49:14,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:14,778 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:14,778 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:14,778 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:14,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,778 INFO L82 PathProgramCache]: Analyzing trace with hash 535749, now seen corresponding path program 1 times [2020-04-18 15:49:14,779 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:14,779 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1382966991] [2020-04-18 15:49:14,779 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:14,780 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:14,780 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:14,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:14,781 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:14,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,781 INFO L82 PathProgramCache]: Analyzing trace with hash 535749, now seen corresponding path program 2 times [2020-04-18 15:49:14,781 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:14,781 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [735389056] [2020-04-18 15:49:14,782 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:14,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:14,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:14,813 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [735389056] [2020-04-18 15:49:14,813 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:14,813 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:14,814 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:14,814 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:14,814 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:14,815 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:14,821 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:14,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:14,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:14,822 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:14,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:14,823 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:14,823 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:14,823 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:14,824 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1382966991] [2020-04-18 15:49:14,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:14,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:14,824 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1382966991] [2020-04-18 15:49:14,824 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:14,825 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:14,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:14,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:14,825 INFO L87 Difference]: Start difference. First operand 683 states. Second operand 3 states. [2020-04-18 15:49:14,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:14,854 INFO L93 Difference]: Finished difference Result 600 states and 1886 transitions. [2020-04-18 15:49:14,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:14,858 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:14,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:14,865 INFO L225 Difference]: With dead ends: 600 [2020-04-18 15:49:14,865 INFO L226 Difference]: Without dead ends: 559 [2020-04-18 15:49:14,866 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:14,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 559 states. [2020-04-18 15:49:14,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 559 to 559. [2020-04-18 15:49:14,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 559 states. [2020-04-18 15:49:14,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 559 states to 559 states and 1737 transitions. [2020-04-18 15:49:14,944 INFO L78 Accepts]: Start accepts. Automaton has 559 states and 1737 transitions. Word has length 3 [2020-04-18 15:49:14,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:14,945 INFO L479 AbstractCegarLoop]: Abstraction has 559 states and 1737 transitions. [2020-04-18 15:49:14,945 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:14,945 INFO L276 IsEmpty]: Start isEmpty. Operand 559 states and 1737 transitions. [2020-04-18 15:49:14,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:14,946 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:14,946 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:14,948 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:14,948 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,948 INFO L82 PathProgramCache]: Analyzing trace with hash -404806880, now seen corresponding path program 1 times [2020-04-18 15:49:14,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:14,949 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2053183109] [2020-04-18 15:49:14,949 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:14,950 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:49:14,950 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:49:14,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:14,951 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:14,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,951 INFO L82 PathProgramCache]: Analyzing trace with hash -1142033206, now seen corresponding path program 2 times [2020-04-18 15:49:14,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:14,952 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593284608] [2020-04-18 15:49:14,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:14,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:14,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:14,985 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593284608] [2020-04-18 15:49:14,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:14,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:14,986 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:14,987 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:14,988 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:49:14,989 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:14,992 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:14,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:14,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:14,992 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:49:14,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:14,996 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:14,996 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:14,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:14,997 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:14,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:14,997 INFO L82 PathProgramCache]: Analyzing trace with hash -404806880, now seen corresponding path program 3 times [2020-04-18 15:49:14,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:14,998 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1790556703] [2020-04-18 15:49:14,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:15,060 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1790556703] [2020-04-18 15:49:15,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:15,063 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,063 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,065 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:49:15,065 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,076 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:15,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:15,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:15,077 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:49:15,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,096 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:15,096 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:15,097 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:15,097 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2053183109] [2020-04-18 15:49:15,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:15,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:15,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2053183109] [2020-04-18 15:49:15,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:15,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:15,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:15,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:15,098 INFO L87 Difference]: Start difference. First operand 559 states and 1737 transitions. Second operand 5 states. [2020-04-18 15:49:15,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,161 INFO L93 Difference]: Finished difference Result 817 states and 2317 transitions. [2020-04-18 15:49:15,161 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:15,161 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:49:15,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:15,168 INFO L225 Difference]: With dead ends: 817 [2020-04-18 15:49:15,168 INFO L226 Difference]: Without dead ends: 812 [2020-04-18 15:49:15,169 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:15,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 812 states. [2020-04-18 15:49:15,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 812 to 585. [2020-04-18 15:49:15,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 585 states. [2020-04-18 15:49:15,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 585 states to 585 states and 1832 transitions. [2020-04-18 15:49:15,215 INFO L78 Accepts]: Start accepts. Automaton has 585 states and 1832 transitions. Word has length 9 [2020-04-18 15:49:15,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:15,215 INFO L479 AbstractCegarLoop]: Abstraction has 585 states and 1832 transitions. [2020-04-18 15:49:15,216 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:15,216 INFO L276 IsEmpty]: Start isEmpty. Operand 585 states and 1832 transitions. [2020-04-18 15:49:15,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:15,216 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:15,216 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:15,217 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:15,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,217 INFO L82 PathProgramCache]: Analyzing trace with hash -669323978, now seen corresponding path program 1 times [2020-04-18 15:49:15,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:15,217 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [320281741] [2020-04-18 15:49:15,218 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,219 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:49:15,219 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:49:15,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:15,219 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:15,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1586901388, now seen corresponding path program 2 times [2020-04-18 15:49:15,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,220 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1185694488] [2020-04-18 15:49:15,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,245 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:15,245 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1185694488] [2020-04-18 15:49:15,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,246 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:15,246 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,247 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,249 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:49:15,250 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,253 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:15,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:15,254 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:15,254 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:49:15,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,261 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:15,262 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:15,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:15,262 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:15,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,262 INFO L82 PathProgramCache]: Analyzing trace with hash -669323978, now seen corresponding path program 3 times [2020-04-18 15:49:15,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,263 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434035537] [2020-04-18 15:49:15,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:15,333 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434035537] [2020-04-18 15:49:15,333 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:15,334 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,335 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,339 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:49:15,339 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,356 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:15,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:15,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:15,357 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:49:15,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,380 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:15,380 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:15,380 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:15,380 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [320281741] [2020-04-18 15:49:15,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:15,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:15,381 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [320281741] [2020-04-18 15:49:15,381 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:15,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:15,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:15,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:15,382 INFO L87 Difference]: Start difference. First operand 585 states and 1832 transitions. Second operand 5 states. [2020-04-18 15:49:15,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,445 INFO L93 Difference]: Finished difference Result 843 states and 2406 transitions. [2020-04-18 15:49:15,445 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:15,446 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:49:15,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:15,453 INFO L225 Difference]: With dead ends: 843 [2020-04-18 15:49:15,453 INFO L226 Difference]: Without dead ends: 836 [2020-04-18 15:49:15,453 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:15,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 836 states. [2020-04-18 15:49:15,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 836 to 611. [2020-04-18 15:49:15,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 611 states. [2020-04-18 15:49:15,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 611 states to 611 states and 1906 transitions. [2020-04-18 15:49:15,484 INFO L78 Accepts]: Start accepts. Automaton has 611 states and 1906 transitions. Word has length 13 [2020-04-18 15:49:15,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:15,485 INFO L479 AbstractCegarLoop]: Abstraction has 611 states and 1906 transitions. [2020-04-18 15:49:15,485 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:15,485 INFO L276 IsEmpty]: Start isEmpty. Operand 611 states and 1906 transitions. [2020-04-18 15:49:15,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:15,486 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:15,486 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:15,486 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:15,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,486 INFO L82 PathProgramCache]: Analyzing trace with hash -56737855, now seen corresponding path program 1 times [2020-04-18 15:49:15,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:15,487 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1977027812] [2020-04-18 15:49:15,488 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,489 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:49:15,489 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:49:15,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:15,491 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:15,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1442093623, now seen corresponding path program 2 times [2020-04-18 15:49:15,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,492 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990637709] [2020-04-18 15:49:15,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,519 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:15,520 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990637709] [2020-04-18 15:49:15,520 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,520 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:15,520 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,522 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,527 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:49:15,528 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,534 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:15,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:15,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:15,535 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:49:15,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,543 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:49:15,543 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:49:15,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:15,544 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:15,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,544 INFO L82 PathProgramCache]: Analyzing trace with hash -2771455, now seen corresponding path program 3 times [2020-04-18 15:49:15,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,545 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517433851] [2020-04-18 15:49:15,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,588 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:15,588 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [517433851] [2020-04-18 15:49:15,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:15,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:15,589 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,590 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,598 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:49:15,599 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,612 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:15,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:15,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:15,613 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:49:15,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,646 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:49:15,646 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:49:15,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:15,647 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:15,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,647 INFO L82 PathProgramCache]: Analyzing trace with hash -56737855, now seen corresponding path program 4 times [2020-04-18 15:49:15,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,648 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35217126] [2020-04-18 15:49:15,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:15,693 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:15,693 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35217126] [2020-04-18 15:49:15,693 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [779447442] [2020-04-18 15:49:15,694 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:15,766 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:15,767 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:15,769 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:15,771 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:15,806 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:15,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:15,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:15,807 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:15,808 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:15,813 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:49:15,814 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:15,842 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:15,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:15,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:15,843 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:49:15,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:15,946 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:49:15,946 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:49:15,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:15,946 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:15,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:15,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1024744543, now seen corresponding path program 5 times [2020-04-18 15:49:15,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:15,947 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296058813] [2020-04-18 15:49:15,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:15,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:16,013 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:16,013 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296058813] [2020-04-18 15:49:16,014 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:16,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:16,014 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:16,017 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,022 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:49:16,023 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:16,048 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:16,051 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:16,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:16,052 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:49:16,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,167 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:49:16,167 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:49:16,168 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:16,168 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1977027812] [2020-04-18 15:49:16,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:16,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:16,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1977027812] [2020-04-18 15:49:16,169 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:16,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:16,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:16,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:16,171 INFO L87 Difference]: Start difference. First operand 611 states and 1906 transitions. Second operand 11 states. [2020-04-18 15:49:16,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,391 INFO L93 Difference]: Finished difference Result 1142 states and 2948 transitions. [2020-04-18 15:49:16,391 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:16,391 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:49:16,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:16,399 INFO L225 Difference]: With dead ends: 1142 [2020-04-18 15:49:16,400 INFO L226 Difference]: Without dead ends: 1127 [2020-04-18 15:49:16,400 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:16,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1127 states. [2020-04-18 15:49:16,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1127 to 536. [2020-04-18 15:49:16,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2020-04-18 15:49:16,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 1688 transitions. [2020-04-18 15:49:16,456 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 1688 transitions. Word has length 15 [2020-04-18 15:49:16,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:16,457 INFO L479 AbstractCegarLoop]: Abstraction has 536 states and 1688 transitions. [2020-04-18 15:49:16,457 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:16,457 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 1688 transitions. [2020-04-18 15:49:16,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:16,458 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:16,458 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:16,670 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:16,671 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:16,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,671 INFO L82 PathProgramCache]: Analyzing trace with hash 68174732, now seen corresponding path program 1 times [2020-04-18 15:49:16,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:16,672 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2105823450] [2020-04-18 15:49:16,672 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,674 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:49:16,674 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:49:16,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:16,675 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:16,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1382437854, now seen corresponding path program 2 times [2020-04-18 15:49:16,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:16,675 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218866785] [2020-04-18 15:49:16,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:16,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:16,692 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:16,692 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218866785] [2020-04-18 15:49:16,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:16,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:16,693 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:16,694 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,697 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:49:16,697 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:16,701 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:16,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:16,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:16,702 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:49:16,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,705 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:16,705 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:16,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:16,706 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:16,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,706 INFO L82 PathProgramCache]: Analyzing trace with hash 68174732, now seen corresponding path program 3 times [2020-04-18 15:49:16,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:16,706 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845490365] [2020-04-18 15:49:16,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:16,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:16,739 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:16,740 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845490365] [2020-04-18 15:49:16,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:16,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:16,740 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:16,742 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,744 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:49:16,744 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:16,753 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:16,753 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:16,753 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:16,754 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:49:16,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,770 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:16,770 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:16,770 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:16,771 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2105823450] [2020-04-18 15:49:16,771 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:16,771 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:16,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2105823450] [2020-04-18 15:49:16,771 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:16,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:16,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:16,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:16,772 INFO L87 Difference]: Start difference. First operand 536 states and 1688 transitions. Second operand 5 states. [2020-04-18 15:49:16,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:16,826 INFO L93 Difference]: Finished difference Result 736 states and 2123 transitions. [2020-04-18 15:49:16,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:16,826 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:49:16,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:16,832 INFO L225 Difference]: With dead ends: 736 [2020-04-18 15:49:16,832 INFO L226 Difference]: Without dead ends: 728 [2020-04-18 15:49:16,832 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:16,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 728 states. [2020-04-18 15:49:16,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 728 to 549. [2020-04-18 15:49:16,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 549 states. [2020-04-18 15:49:16,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 549 states to 549 states and 1684 transitions. [2020-04-18 15:49:16,855 INFO L78 Accepts]: Start accepts. Automaton has 549 states and 1684 transitions. Word has length 17 [2020-04-18 15:49:16,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:16,855 INFO L479 AbstractCegarLoop]: Abstraction has 549 states and 1684 transitions. [2020-04-18 15:49:16,856 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:16,856 INFO L276 IsEmpty]: Start isEmpty. Operand 549 states and 1684 transitions. [2020-04-18 15:49:16,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2020-04-18 15:49:16,857 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:16,857 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:16,857 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:16,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,858 INFO L82 PathProgramCache]: Analyzing trace with hash 2109628021, now seen corresponding path program 1 times [2020-04-18 15:49:16,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:16,858 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1662054630] [2020-04-18 15:49:16,858 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:16,859 INFO L259 McrAutomatonBuilder]: Finished intersection with 19 states and 18 transitions. [2020-04-18 15:49:16,859 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states. [2020-04-18 15:49:16,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2020-04-18 15:49:16,860 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:16,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:16,860 INFO L82 PathProgramCache]: Analyzing trace with hash 2109628021, now seen corresponding path program 2 times [2020-04-18 15:49:16,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:16,860 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62296420] [2020-04-18 15:49:16,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:16,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:16,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:16,885 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:49:16,886 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:49:16,886 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:49:16,886 WARN L363 ceAbstractionStarter]: 3 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:49:16,887 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 4 thread instances. [2020-04-18 15:49:16,898 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,899 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,899 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,899 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,899 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,899 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,900 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,901 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,902 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,903 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,904 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,905 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,906 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,907 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,908 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,909 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,909 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,909 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,909 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,909 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,910 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,911 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,911 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,911 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,911 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,911 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,912 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,912 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,912 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,912 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,913 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,914 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,914 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,914 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,914 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,925 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,926 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,926 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,926 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,926 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,928 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,929 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,929 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,929 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of4ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,929 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of4ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,931 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,932 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,932 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,932 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,932 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,932 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,934 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,935 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,935 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,935 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,937 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,938 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,938 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,938 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,938 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,940 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,941 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,941 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,941 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of4ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,941 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of4ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:16,943 INFO L251 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2020-04-18 15:49:16,944 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:16,944 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:16,944 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:16,944 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:16,944 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:16,944 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:16,944 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:16,944 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:16,946 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 118 places, 105 transitions, 274 flow [2020-04-18 15:49:16,947 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 118 places, 105 transitions, 274 flow [2020-04-18 15:49:16,964 INFO L129 PetriNetUnfolder]: 6/127 cut-off events. [2020-04-18 15:49:16,965 INFO L130 PetriNetUnfolder]: For 16/16 co-relation queries the response was YES. [2020-04-18 15:49:16,966 INFO L80 FinitePrefix]: Finished finitePrefix Result has 156 conditions, 127 events. 6/127 cut-off events. For 16/16 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 211 event pairs, 0 based on Foata normal form. 0/115 useless extension candidates. Maximal degree in co-relation 147. Up to 10 conditions per place. [2020-04-18 15:49:16,970 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 118 places, 105 transitions, 274 flow [2020-04-18 15:49:16,987 INFO L129 PetriNetUnfolder]: 6/127 cut-off events. [2020-04-18 15:49:16,988 INFO L130 PetriNetUnfolder]: For 16/16 co-relation queries the response was YES. [2020-04-18 15:49:16,989 INFO L80 FinitePrefix]: Finished finitePrefix Result has 156 conditions, 127 events. 6/127 cut-off events. For 16/16 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 211 event pairs, 0 based on Foata normal form. 0/115 useless extension candidates. Maximal degree in co-relation 147. Up to 10 conditions per place. [2020-04-18 15:49:16,993 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 2192 [2020-04-18 15:49:16,993 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:18,633 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2020-04-18 15:49:18,697 INFO L206 etLargeBlockEncoding]: Checked pairs total: 2240 [2020-04-18 15:49:18,697 INFO L214 etLargeBlockEncoding]: Total number of compositions: 92 [2020-04-18 15:49:18,697 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 51 places, 33 transitions, 130 flow [2020-04-18 15:49:18,811 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 2060 states. [2020-04-18 15:49:18,812 INFO L276 IsEmpty]: Start isEmpty. Operand 2060 states. [2020-04-18 15:49:18,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:18,812 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:18,812 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:18,812 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:18,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:18,813 INFO L82 PathProgramCache]: Analyzing trace with hash 753552, now seen corresponding path program 1 times [2020-04-18 15:49:18,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:18,813 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1297994181] [2020-04-18 15:49:18,813 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:18,814 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:18,814 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:18,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:18,814 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:18,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:18,814 INFO L82 PathProgramCache]: Analyzing trace with hash 753552, now seen corresponding path program 2 times [2020-04-18 15:49:18,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:18,815 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050541218] [2020-04-18 15:49:18,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:18,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:18,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:18,830 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050541218] [2020-04-18 15:49:18,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:18,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:18,830 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:18,830 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:18,831 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:18,831 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:18,833 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:18,834 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:18,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:18,834 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:18,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:18,834 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:18,834 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:18,835 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:18,835 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1297994181] [2020-04-18 15:49:18,835 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:18,835 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:18,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1297994181] [2020-04-18 15:49:18,836 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:18,836 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:18,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:18,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:18,836 INFO L87 Difference]: Start difference. First operand 2060 states. Second operand 3 states. [2020-04-18 15:49:18,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:18,871 INFO L93 Difference]: Finished difference Result 1889 states and 7217 transitions. [2020-04-18 15:49:18,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:18,872 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:18,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:18,888 INFO L225 Difference]: With dead ends: 1889 [2020-04-18 15:49:18,888 INFO L226 Difference]: Without dead ends: 1767 [2020-04-18 15:49:18,888 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:18,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1767 states. [2020-04-18 15:49:18,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1767 to 1767. [2020-04-18 15:49:18,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1767 states. [2020-04-18 15:49:19,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1767 states to 1767 states and 6690 transitions. [2020-04-18 15:49:19,004 INFO L78 Accepts]: Start accepts. Automaton has 1767 states and 6690 transitions. Word has length 3 [2020-04-18 15:49:19,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:19,004 INFO L479 AbstractCegarLoop]: Abstraction has 1767 states and 6690 transitions. [2020-04-18 15:49:19,004 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:19,004 INFO L276 IsEmpty]: Start isEmpty. Operand 1767 states and 6690 transitions. [2020-04-18 15:49:19,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:19,005 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:19,005 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:19,005 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:19,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,005 INFO L82 PathProgramCache]: Analyzing trace with hash -260829075, now seen corresponding path program 1 times [2020-04-18 15:49:19,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:19,006 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1696404549] [2020-04-18 15:49:19,006 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,007 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:49:19,007 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:49:19,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:19,007 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:19,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,008 INFO L82 PathProgramCache]: Analyzing trace with hash 773468699, now seen corresponding path program 2 times [2020-04-18 15:49:19,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,008 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [688339203] [2020-04-18 15:49:19,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:19,023 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [688339203] [2020-04-18 15:49:19,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:19,023 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,024 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,025 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:49:19,025 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,031 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:19,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:19,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:19,031 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:49:19,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,035 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:19,036 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:19,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:19,036 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:19,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,036 INFO L82 PathProgramCache]: Analyzing trace with hash -260829075, now seen corresponding path program 3 times [2020-04-18 15:49:19,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,037 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [852001030] [2020-04-18 15:49:19,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:19,064 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [852001030] [2020-04-18 15:49:19,064 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,065 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:19,065 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,065 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,066 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:49:19,066 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,082 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:19,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:19,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:19,082 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:49:19,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,097 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:19,097 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:19,097 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:19,097 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1696404549] [2020-04-18 15:49:19,098 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:19,098 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:19,098 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1696404549] [2020-04-18 15:49:19,098 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:19,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:19,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:19,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:19,099 INFO L87 Difference]: Start difference. First operand 1767 states and 6690 transitions. Second operand 5 states. [2020-04-18 15:49:19,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,175 INFO L93 Difference]: Finished difference Result 2905 states and 10138 transitions. [2020-04-18 15:49:19,175 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:19,175 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:49:19,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:19,200 INFO L225 Difference]: With dead ends: 2905 [2020-04-18 15:49:19,200 INFO L226 Difference]: Without dead ends: 2899 [2020-04-18 15:49:19,201 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:19,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2899 states. [2020-04-18 15:49:19,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2899 to 1966. [2020-04-18 15:49:19,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1966 states. [2020-04-18 15:49:19,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1966 states to 1966 states and 7503 transitions. [2020-04-18 15:49:19,311 INFO L78 Accepts]: Start accepts. Automaton has 1966 states and 7503 transitions. Word has length 9 [2020-04-18 15:49:19,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:19,312 INFO L479 AbstractCegarLoop]: Abstraction has 1966 states and 7503 transitions. [2020-04-18 15:49:19,312 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:19,312 INFO L276 IsEmpty]: Start isEmpty. Operand 1966 states and 7503 transitions. [2020-04-18 15:49:19,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:19,312 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:19,312 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:19,313 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:19,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,313 INFO L82 PathProgramCache]: Analyzing trace with hash -1408743431, now seen corresponding path program 1 times [2020-04-18 15:49:19,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:19,313 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2124239184] [2020-04-18 15:49:19,314 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,314 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:49:19,314 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:49:19,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:19,315 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:19,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1718911887, now seen corresponding path program 2 times [2020-04-18 15:49:19,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,316 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634124463] [2020-04-18 15:49:19,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,334 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:19,335 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634124463] [2020-04-18 15:49:19,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:19,335 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,336 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,338 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:49:19,338 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,341 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:19,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:19,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:19,341 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:49:19,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,344 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:19,344 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:19,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:19,345 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:19,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,345 INFO L82 PathProgramCache]: Analyzing trace with hash -1408743431, now seen corresponding path program 3 times [2020-04-18 15:49:19,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,345 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1209175489] [2020-04-18 15:49:19,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,389 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:19,390 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1209175489] [2020-04-18 15:49:19,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:19,390 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,391 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,392 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:49:19,393 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,401 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:19,401 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:19,401 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:19,402 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:49:19,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,418 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:19,418 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:19,418 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:19,418 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2124239184] [2020-04-18 15:49:19,418 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:19,419 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:19,419 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2124239184] [2020-04-18 15:49:19,419 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:19,419 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:19,419 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:19,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:19,420 INFO L87 Difference]: Start difference. First operand 1966 states and 7503 transitions. Second operand 5 states. [2020-04-18 15:49:19,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,506 INFO L93 Difference]: Finished difference Result 3204 states and 11312 transitions. [2020-04-18 15:49:19,507 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:19,507 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:49:19,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:19,534 INFO L225 Difference]: With dead ends: 3204 [2020-04-18 15:49:19,534 INFO L226 Difference]: Without dead ends: 3194 [2020-04-18 15:49:19,534 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:19,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3194 states. [2020-04-18 15:49:19,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3194 to 2200. [2020-04-18 15:49:19,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2200 states. [2020-04-18 15:49:19,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2200 states to 2200 states and 8453 transitions. [2020-04-18 15:49:19,644 INFO L78 Accepts]: Start accepts. Automaton has 2200 states and 8453 transitions. Word has length 13 [2020-04-18 15:49:19,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:19,644 INFO L479 AbstractCegarLoop]: Abstraction has 2200 states and 8453 transitions. [2020-04-18 15:49:19,644 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:19,645 INFO L276 IsEmpty]: Start isEmpty. Operand 2200 states and 8453 transitions. [2020-04-18 15:49:19,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:19,645 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:19,645 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:19,645 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:19,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,646 INFO L82 PathProgramCache]: Analyzing trace with hash 1555768808, now seen corresponding path program 1 times [2020-04-18 15:49:19,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:19,646 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [117976438] [2020-04-18 15:49:19,647 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,647 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:49:19,648 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:49:19,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:19,648 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:19,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,649 INFO L82 PathProgramCache]: Analyzing trace with hash 746064128, now seen corresponding path program 2 times [2020-04-18 15:49:19,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,649 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585813042] [2020-04-18 15:49:19,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,667 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:19,667 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585813042] [2020-04-18 15:49:19,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:19,668 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,669 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,672 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:49:19,672 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,675 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:19,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:19,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:19,676 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:49:19,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,683 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:49:19,683 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:49:19,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:19,684 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:19,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1842869288, now seen corresponding path program 3 times [2020-04-18 15:49:19,684 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,684 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2140591476] [2020-04-18 15:49:19,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,731 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:19,731 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2140591476] [2020-04-18 15:49:19,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:19,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:19,732 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,733 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,736 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:49:19,736 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:19,751 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:19,751 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:19,751 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:19,751 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:49:19,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:19,786 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:49:19,786 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:49:19,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:19,786 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:19,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:19,787 INFO L82 PathProgramCache]: Analyzing trace with hash 1555768808, now seen corresponding path program 4 times [2020-04-18 15:49:19,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:19,787 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020622897] [2020-04-18 15:49:19,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:19,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:19,830 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:19,830 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020622897] [2020-04-18 15:49:19,831 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1708262406] [2020-04-18 15:49:19,831 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:19,967 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:19,967 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:19,968 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:19,969 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:19,985 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:19,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:19,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:19,986 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:19,987 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:19,990 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:49:19,990 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:20,016 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:20,016 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:20,016 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:20,017 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:49:20,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:20,111 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:49:20,111 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:49:20,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:20,112 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:20,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:20,113 INFO L82 PathProgramCache]: Analyzing trace with hash -887756896, now seen corresponding path program 5 times [2020-04-18 15:49:20,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:20,113 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114347350] [2020-04-18 15:49:20,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:20,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:20,170 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:20,170 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114347350] [2020-04-18 15:49:20,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:20,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:20,171 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:20,172 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:20,173 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:49:20,174 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:20,196 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:20,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:20,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:20,197 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:49:20,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:20,328 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:49:20,328 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:49:20,329 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:20,329 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [117976438] [2020-04-18 15:49:20,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:20,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:20,330 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [117976438] [2020-04-18 15:49:20,330 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:20,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:20,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:20,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:20,331 INFO L87 Difference]: Start difference. First operand 2200 states and 8453 transitions. Second operand 11 states. [2020-04-18 15:49:20,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:20,588 INFO L93 Difference]: Finished difference Result 5101 states and 16214 transitions. [2020-04-18 15:49:20,588 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:20,588 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:49:20,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:20,625 INFO L225 Difference]: With dead ends: 5101 [2020-04-18 15:49:20,626 INFO L226 Difference]: Without dead ends: 5080 [2020-04-18 15:49:20,626 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:20,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5080 states. [2020-04-18 15:49:20,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5080 to 2035. [2020-04-18 15:49:20,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2035 states. [2020-04-18 15:49:20,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2035 states to 2035 states and 7845 transitions. [2020-04-18 15:49:20,750 INFO L78 Accepts]: Start accepts. Automaton has 2035 states and 7845 transitions. Word has length 15 [2020-04-18 15:49:20,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:20,750 INFO L479 AbstractCegarLoop]: Abstraction has 2035 states and 7845 transitions. [2020-04-18 15:49:20,750 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:20,751 INFO L276 IsEmpty]: Start isEmpty. Operand 2035 states and 7845 transitions. [2020-04-18 15:49:20,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:20,751 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:20,752 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:20,956 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:20,957 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:20,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:20,958 INFO L82 PathProgramCache]: Analyzing trace with hash 695111130, now seen corresponding path program 1 times [2020-04-18 15:49:20,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:20,958 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1616185631] [2020-04-18 15:49:20,959 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:20,960 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:49:20,960 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:49:20,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:20,960 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:20,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:20,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1378740238, now seen corresponding path program 2 times [2020-04-18 15:49:20,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:20,961 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155032806] [2020-04-18 15:49:20,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:20,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:20,983 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:20,984 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155032806] [2020-04-18 15:49:20,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:20,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:20,984 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:20,985 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:20,988 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:49:20,988 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:20,991 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:20,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:20,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:20,991 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:49:20,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:20,995 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:20,995 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:20,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:20,996 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:20,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:20,996 INFO L82 PathProgramCache]: Analyzing trace with hash 695111130, now seen corresponding path program 3 times [2020-04-18 15:49:20,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:20,996 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308428772] [2020-04-18 15:49:20,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:21,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:21,026 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:21,027 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308428772] [2020-04-18 15:49:21,027 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:21,027 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:21,027 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:21,028 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,030 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:49:21,031 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:21,039 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:21,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:21,040 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:21,040 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:49:21,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,056 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:21,056 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:21,056 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:21,056 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1616185631] [2020-04-18 15:49:21,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:21,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:21,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1616185631] [2020-04-18 15:49:21,057 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:21,057 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:21,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:21,058 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:21,058 INFO L87 Difference]: Start difference. First operand 2035 states and 7845 transitions. Second operand 5 states. [2020-04-18 15:49:21,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,129 INFO L93 Difference]: Finished difference Result 3265 states and 11681 transitions. [2020-04-18 15:49:21,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:21,129 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:49:21,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:21,149 INFO L225 Difference]: With dead ends: 3265 [2020-04-18 15:49:21,150 INFO L226 Difference]: Without dead ends: 3250 [2020-04-18 15:49:21,150 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:21,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3250 states. [2020-04-18 15:49:21,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3250 to 2281. [2020-04-18 15:49:21,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2281 states. [2020-04-18 15:49:21,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 2281 states and 8755 transitions. [2020-04-18 15:49:21,309 INFO L78 Accepts]: Start accepts. Automaton has 2281 states and 8755 transitions. Word has length 17 [2020-04-18 15:49:21,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:21,310 INFO L479 AbstractCegarLoop]: Abstraction has 2281 states and 8755 transitions. [2020-04-18 15:49:21,310 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:21,310 INFO L276 IsEmpty]: Start isEmpty. Operand 2281 states and 8755 transitions. [2020-04-18 15:49:21,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:21,311 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:21,311 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:21,312 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:21,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:21,312 INFO L82 PathProgramCache]: Analyzing trace with hash 1754455113, now seen corresponding path program 1 times [2020-04-18 15:49:21,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:21,312 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [176141379] [2020-04-18 15:49:21,313 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,314 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:49:21,315 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:49:21,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:21,315 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:21,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:21,316 INFO L82 PathProgramCache]: Analyzing trace with hash -1222685441, now seen corresponding path program 2 times [2020-04-18 15:49:21,316 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:21,316 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74998660] [2020-04-18 15:49:21,316 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:21,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:21,331 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:21,332 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74998660] [2020-04-18 15:49:21,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:21,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:21,332 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:21,334 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,339 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 101 transitions. [2020-04-18 15:49:21,339 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:21,343 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:21,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:21,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:21,343 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:49:21,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,351 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:49:21,351 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:49:21,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:21,351 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:21,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:21,352 INFO L82 PathProgramCache]: Analyzing trace with hash -320724009, now seen corresponding path program 3 times [2020-04-18 15:49:21,352 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:21,352 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261052574] [2020-04-18 15:49:21,352 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:21,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:21,401 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:21,401 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261052574] [2020-04-18 15:49:21,401 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:21,402 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:21,402 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:21,403 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,407 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 15:49:21,408 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:21,416 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:21,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:21,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:21,416 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:49:21,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,448 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:49:21,448 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:49:21,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:21,449 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:21,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:21,449 INFO L82 PathProgramCache]: Analyzing trace with hash 1754455113, now seen corresponding path program 4 times [2020-04-18 15:49:21,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:21,450 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845880517] [2020-04-18 15:49:21,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:21,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:21,496 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:21,496 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [845880517] [2020-04-18 15:49:21,497 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [296032553] [2020-04-18 15:49:21,497 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:21,572 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:21,572 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:21,573 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:21,574 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:21,592 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:21,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:21,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:21,593 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:21,595 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,599 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:49:21,600 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:21,628 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:21,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:21,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:21,629 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 9 states. [2020-04-18 15:49:21,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,712 INFO L93 Difference]: Finished difference Result 97 states and 168 transitions. [2020-04-18 15:49:21,712 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 168 transitions. [2020-04-18 15:49:21,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:21,713 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:21,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:21,713 INFO L82 PathProgramCache]: Analyzing trace with hash -2013120191, now seen corresponding path program 5 times [2020-04-18 15:49:21,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:21,713 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745061892] [2020-04-18 15:49:21,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:21,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:21,764 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:21,765 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745061892] [2020-04-18 15:49:21,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:21,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:21,765 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:21,767 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:21,769 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:49:21,770 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:21,789 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:21,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:21,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:21,790 INFO L87 Difference]: Start difference. First operand 97 states and 168 transitions. Second operand 7 states. [2020-04-18 15:49:21,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:21,885 INFO L93 Difference]: Finished difference Result 100 states and 171 transitions. [2020-04-18 15:49:21,885 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 171 transitions. [2020-04-18 15:49:21,886 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:21,886 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [176141379] [2020-04-18 15:49:21,886 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:21,886 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:21,886 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [176141379] [2020-04-18 15:49:21,886 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:21,887 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:21,887 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:21,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:21,887 INFO L87 Difference]: Start difference. First operand 2281 states and 8755 transitions. Second operand 11 states. [2020-04-18 15:49:22,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:22,120 INFO L93 Difference]: Finished difference Result 5387 states and 17317 transitions. [2020-04-18 15:49:22,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:22,121 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:49:22,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:22,138 INFO L225 Difference]: With dead ends: 5387 [2020-04-18 15:49:22,138 INFO L226 Difference]: Without dead ends: 5358 [2020-04-18 15:49:22,139 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:22,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5358 states. [2020-04-18 15:49:22,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5358 to 2153. [2020-04-18 15:49:22,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2153 states. [2020-04-18 15:49:22,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2153 states to 2153 states and 8255 transitions. [2020-04-18 15:49:22,250 INFO L78 Accepts]: Start accepts. Automaton has 2153 states and 8255 transitions. Word has length 19 [2020-04-18 15:49:22,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:22,251 INFO L479 AbstractCegarLoop]: Abstraction has 2153 states and 8255 transitions. [2020-04-18 15:49:22,251 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:22,251 INFO L276 IsEmpty]: Start isEmpty. Operand 2153 states and 8255 transitions. [2020-04-18 15:49:22,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:22,252 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:22,252 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:22,456 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 4 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:22,456 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:22,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:22,456 INFO L82 PathProgramCache]: Analyzing trace with hash -131464925, now seen corresponding path program 1 times [2020-04-18 15:49:22,457 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:22,457 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1392393735] [2020-04-18 15:49:22,457 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:22,458 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:49:22,459 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:49:22,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:22,459 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:22,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:22,460 INFO L82 PathProgramCache]: Analyzing trace with hash -1006426907, now seen corresponding path program 2 times [2020-04-18 15:49:22,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:22,460 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466723380] [2020-04-18 15:49:22,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:22,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:22,477 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:22,477 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466723380] [2020-04-18 15:49:22,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:22,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:22,478 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:22,480 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:22,484 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 73 transitions. [2020-04-18 15:49:22,484 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:22,488 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:22,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:22,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:22,488 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:49:22,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:22,496 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:49:22,496 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:49:22,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:22,497 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:22,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:22,497 INFO L82 PathProgramCache]: Analyzing trace with hash 764819305, now seen corresponding path program 3 times [2020-04-18 15:49:22,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:22,497 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78300288] [2020-04-18 15:49:22,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:22,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:22,593 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:22,594 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [78300288] [2020-04-18 15:49:22,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:22,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:22,594 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:22,595 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:22,599 INFO L259 McrAutomatonBuilder]: Finished intersection with 33 states and 45 transitions. [2020-04-18 15:49:22,599 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:22,609 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:22,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:22,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:22,609 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 5 states. [2020-04-18 15:49:22,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:22,640 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:49:22,640 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:49:22,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:22,641 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:22,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:22,641 INFO L82 PathProgramCache]: Analyzing trace with hash -131464925, now seen corresponding path program 4 times [2020-04-18 15:49:22,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:22,642 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023831529] [2020-04-18 15:49:22,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:22,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:22,706 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:22,706 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023831529] [2020-04-18 15:49:22,706 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2036582943] [2020-04-18 15:49:22,706 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:22,776 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:22,776 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:22,777 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:22,778 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:22,797 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:22,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:22,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:22,798 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:22,799 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:22,803 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:49:22,803 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:22,833 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:22,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:22,833 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:22,833 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 9 states. [2020-04-18 15:49:22,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:22,924 INFO L93 Difference]: Finished difference Result 77 states and 124 transitions. [2020-04-18 15:49:22,924 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 124 transitions. [2020-04-18 15:49:22,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:22,925 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:22,925 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:22,925 INFO L82 PathProgramCache]: Analyzing trace with hash -2013113743, now seen corresponding path program 5 times [2020-04-18 15:49:22,925 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:22,925 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109918953] [2020-04-18 15:49:22,925 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:22,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:22,967 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:22,967 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109918953] [2020-04-18 15:49:22,967 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:22,967 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:22,968 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:22,969 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:22,971 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:49:22,972 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:22,990 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:22,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:22,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:22,991 INFO L87 Difference]: Start difference. First operand 77 states and 124 transitions. Second operand 7 states. [2020-04-18 15:49:23,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,097 INFO L93 Difference]: Finished difference Result 80 states and 127 transitions. [2020-04-18 15:49:23,097 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 127 transitions. [2020-04-18 15:49:23,098 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:23,098 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1392393735] [2020-04-18 15:49:23,098 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:23,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:23,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1392393735] [2020-04-18 15:49:23,099 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:23,099 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:23,099 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:23,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:23,100 INFO L87 Difference]: Start difference. First operand 2153 states and 8255 transitions. Second operand 11 states. [2020-04-18 15:49:23,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,319 INFO L93 Difference]: Finished difference Result 5272 states and 17008 transitions. [2020-04-18 15:49:23,319 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:23,320 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:49:23,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:23,335 INFO L225 Difference]: With dead ends: 5272 [2020-04-18 15:49:23,336 INFO L226 Difference]: Without dead ends: 5238 [2020-04-18 15:49:23,336 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:23,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5238 states. [2020-04-18 15:49:23,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5238 to 2150. [2020-04-18 15:49:23,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2150 states. [2020-04-18 15:49:23,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2150 states to 2150 states and 8243 transitions. [2020-04-18 15:49:23,441 INFO L78 Accepts]: Start accepts. Automaton has 2150 states and 8243 transitions. Word has length 19 [2020-04-18 15:49:23,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:23,441 INFO L479 AbstractCegarLoop]: Abstraction has 2150 states and 8243 transitions. [2020-04-18 15:49:23,441 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:23,442 INFO L276 IsEmpty]: Start isEmpty. Operand 2150 states and 8243 transitions. [2020-04-18 15:49:23,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:23,443 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:23,443 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:23,647 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:23,648 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:23,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,648 INFO L82 PathProgramCache]: Analyzing trace with hash -9146414, now seen corresponding path program 1 times [2020-04-18 15:49:23,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:23,648 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2050984251] [2020-04-18 15:49:23,649 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,650 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:49:23,651 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:49:23,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:23,652 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:23,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,653 INFO L82 PathProgramCache]: Analyzing trace with hash -1305538154, now seen corresponding path program 2 times [2020-04-18 15:49:23,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,653 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995072037] [2020-04-18 15:49:23,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,666 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:23,667 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995072037] [2020-04-18 15:49:23,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:23,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:23,667 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,669 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,677 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 119 transitions. [2020-04-18 15:49:23,677 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,680 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:23,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:23,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:23,681 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:49:23,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,691 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:49:23,691 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:49:23,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:23,692 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:23,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,692 INFO L82 PathProgramCache]: Analyzing trace with hash -2103995794, now seen corresponding path program 3 times [2020-04-18 15:49:23,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,693 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [886063648] [2020-04-18 15:49:23,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,717 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:23,717 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [886063648] [2020-04-18 15:49:23,718 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:23,718 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:23,718 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,720 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,726 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 99 transitions. [2020-04-18 15:49:23,726 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,735 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:23,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:23,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:23,735 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:49:23,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:23,784 INFO L93 Difference]: Finished difference Result 266 states and 576 transitions. [2020-04-18 15:49:23,784 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 576 transitions. [2020-04-18 15:49:23,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:23,785 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:23,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:23,785 INFO L82 PathProgramCache]: Analyzing trace with hash 887137816, now seen corresponding path program 4 times [2020-04-18 15:49:23,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:23,786 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355418033] [2020-04-18 15:49:23,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:23,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:23,827 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:23,827 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355418033] [2020-04-18 15:49:23,827 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1960362861] [2020-04-18 15:49:23,827 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:23,899 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:23,900 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:23,901 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:23,902 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:23,923 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:23,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:23,923 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:49:23,924 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:23,925 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:23,933 INFO L259 McrAutomatonBuilder]: Finished intersection with 51 states and 79 transitions. [2020-04-18 15:49:23,934 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:23,965 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:23,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:23,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:23,966 INFO L87 Difference]: Start difference. First operand 266 states and 576 transitions. Second operand 9 states. [2020-04-18 15:49:24,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:24,235 INFO L93 Difference]: Finished difference Result 312 states and 632 transitions. [2020-04-18 15:49:24,236 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 632 transitions. [2020-04-18 15:49:24,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:24,237 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:24,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:24,237 INFO L82 PathProgramCache]: Analyzing trace with hash -9146414, now seen corresponding path program 5 times [2020-04-18 15:49:24,238 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:24,239 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93776598] [2020-04-18 15:49:24,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:24,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:24,310 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:24,310 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93776598] [2020-04-18 15:49:24,310 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1143307348] [2020-04-18 15:49:24,311 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:24,387 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:49:24,387 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:24,388 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:24,389 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:24,414 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:24,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:24,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:24,415 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:24,417 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:24,425 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:49:24,425 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:24,447 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:24,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:24,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=238, Unknown=0, NotChecked=0, Total=342 [2020-04-18 15:49:24,448 INFO L87 Difference]: Start difference. First operand 312 states and 632 transitions. Second operand 11 states. [2020-04-18 15:49:24,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:24,902 INFO L93 Difference]: Finished difference Result 329 states and 643 transitions. [2020-04-18 15:49:24,902 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 643 transitions. [2020-04-18 15:49:24,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:24,903 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:24,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:24,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1890795232, now seen corresponding path program 6 times [2020-04-18 15:49:24,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:24,905 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694286067] [2020-04-18 15:49:24,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:24,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:25,081 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:25,081 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694286067] [2020-04-18 15:49:25,082 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1513254553] [2020-04-18 15:49:25,082 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:25,152 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 2 check-sat command(s) [2020-04-18 15:49:25,152 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:25,153 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:25,154 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:25,194 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:25,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:25,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:25,194 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:25,196 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:25,200 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:49:25,201 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:25,221 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:25,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:25,222 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=888, Unknown=0, NotChecked=0, Total=1190 [2020-04-18 15:49:25,222 INFO L87 Difference]: Start difference. First operand 329 states and 643 transitions. Second operand 11 states. [2020-04-18 15:49:25,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:25,730 INFO L93 Difference]: Finished difference Result 358 states and 677 transitions. [2020-04-18 15:49:25,730 INFO L276 IsEmpty]: Start isEmpty. Operand 358 states and 677 transitions. [2020-04-18 15:49:25,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:25,731 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:49:25,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:25,732 INFO L82 PathProgramCache]: Analyzing trace with hash 1077008290, now seen corresponding path program 7 times [2020-04-18 15:49:25,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:25,732 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190801966] [2020-04-18 15:49:25,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:25,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:25,777 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:25,778 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190801966] [2020-04-18 15:49:25,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:25,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:49:25,778 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:25,780 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:25,785 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 63 transitions. [2020-04-18 15:49:25,785 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:25,815 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:49:25,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:25,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=644, Invalid=2436, Unknown=0, NotChecked=0, Total=3080 [2020-04-18 15:49:25,816 INFO L87 Difference]: Start difference. First operand 358 states and 677 transitions. Second operand 7 states. [2020-04-18 15:49:26,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:26,073 INFO L93 Difference]: Finished difference Result 403 states and 735 transitions. [2020-04-18 15:49:26,073 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 735 transitions. [2020-04-18 15:49:26,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:26,075 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:49:26,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:26,075 INFO L82 PathProgramCache]: Analyzing trace with hash 180724060, now seen corresponding path program 8 times [2020-04-18 15:49:26,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:26,075 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035845985] [2020-04-18 15:49:26,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:26,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:26,136 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:26,137 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035845985] [2020-04-18 15:49:26,137 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [252890566] [2020-04-18 15:49:26,137 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:26,211 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:49:26,211 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:26,212 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:26,214 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:26,236 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:26,236 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:26,236 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:26,237 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:26,238 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:26,244 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:49:26,244 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:26,265 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:49:26,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:26,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=774, Invalid=3386, Unknown=0, NotChecked=0, Total=4160 [2020-04-18 15:49:26,267 INFO L87 Difference]: Start difference. First operand 403 states and 735 transitions. Second operand 11 states. [2020-04-18 15:49:26,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:26,727 INFO L93 Difference]: Finished difference Result 406 states and 736 transitions. [2020-04-18 15:49:26,727 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 736 transitions. [2020-04-18 15:49:26,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:26,729 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:49:26,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:26,729 INFO L82 PathProgramCache]: Analyzing trace with hash -1783759286, now seen corresponding path program 9 times [2020-04-18 15:49:26,730 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:26,730 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616439416] [2020-04-18 15:49:26,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:26,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:26,805 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:26,805 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616439416] [2020-04-18 15:49:26,806 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1987359377] [2020-04-18 15:49:26,806 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:26,885 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:49:26,885 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:26,886 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:26,888 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:26,924 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2020-04-18 15:49:26,925 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:26,925 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:26,925 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:26,927 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:26,931 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:49:26,931 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:26,945 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:26,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:26,946 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=4925, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:49:26,947 INFO L87 Difference]: Start difference. First operand 406 states and 736 transitions. Second operand 11 states. [2020-04-18 15:49:27,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:27,473 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:49:27,473 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:49:27,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:27,475 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:49:27,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:27,475 INFO L82 PathProgramCache]: Analyzing trace with hash -1873231848, now seen corresponding path program 10 times [2020-04-18 15:49:27,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:27,476 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183882145] [2020-04-18 15:49:27,476 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:27,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:27,551 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:27,551 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [183882145] [2020-04-18 15:49:27,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:27,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:27,552 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:27,554 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:27,557 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:27,558 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:27,579 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:27,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:27,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1516, Invalid=7604, Unknown=0, NotChecked=0, Total=9120 [2020-04-18 15:49:27,583 INFO L87 Difference]: Start difference. First operand 441 states and 773 transitions. Second operand 9 states. [2020-04-18 15:49:28,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:28,125 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:49:28,125 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:49:28,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:28,127 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:49:28,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:28,128 INFO L82 PathProgramCache]: Analyzing trace with hash -1867041768, now seen corresponding path program 11 times [2020-04-18 15:49:28,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:28,128 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871094109] [2020-04-18 15:49:28,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:28,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:28,190 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:28,190 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871094109] [2020-04-18 15:49:28,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:28,191 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:28,191 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:28,192 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:28,196 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:28,196 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:28,197 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:28,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:28,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1930, Invalid=10726, Unknown=0, NotChecked=0, Total=12656 [2020-04-18 15:49:28,200 INFO L87 Difference]: Start difference. First operand 441 states and 773 transitions. Second operand 9 states. [2020-04-18 15:49:28,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:28,622 INFO L93 Difference]: Finished difference Result 441 states and 773 transitions. [2020-04-18 15:49:28,622 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 773 transitions. [2020-04-18 15:49:28,623 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:28,624 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2050984251] [2020-04-18 15:49:28,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:28,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:49:28,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2050984251] [2020-04-18 15:49:28,625 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2020-04-18 15:49:28,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:28,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 15:49:28,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2359, Invalid=13897, Unknown=0, NotChecked=0, Total=16256 [2020-04-18 15:49:28,629 INFO L87 Difference]: Start difference. First operand 2150 states and 8243 transitions. Second operand 18 states. [2020-04-18 15:49:30,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:30,052 INFO L93 Difference]: Finished difference Result 8475 states and 24418 transitions. [2020-04-18 15:49:30,052 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2020-04-18 15:49:30,052 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 21 [2020-04-18 15:49:30,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:30,091 INFO L225 Difference]: With dead ends: 8475 [2020-04-18 15:49:30,091 INFO L226 Difference]: Without dead ends: 8417 [2020-04-18 15:49:30,098 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 536 GetRequests, 370 SyntacticMatches, 0 SemanticMatches, 166 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11609 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=4181, Invalid=23875, Unknown=0, NotChecked=0, Total=28056 [2020-04-18 15:49:30,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8417 states. [2020-04-18 15:49:30,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8417 to 1800. [2020-04-18 15:49:30,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1800 states. [2020-04-18 15:49:30,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1800 states to 1800 states and 6961 transitions. [2020-04-18 15:49:30,292 INFO L78 Accepts]: Start accepts. Automaton has 1800 states and 6961 transitions. Word has length 21 [2020-04-18 15:49:30,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:30,293 INFO L479 AbstractCegarLoop]: Abstraction has 1800 states and 6961 transitions. [2020-04-18 15:49:30,293 INFO L480 AbstractCegarLoop]: Interpolant automaton has 18 states. [2020-04-18 15:49:30,293 INFO L276 IsEmpty]: Start isEmpty. Operand 1800 states and 6961 transitions. [2020-04-18 15:49:30,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:30,294 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:30,294 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:31,298 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 z3 -smt2 -in SMTLIB2_COMPLIANT=true,6 z3 -smt2 -in SMTLIB2_COMPLIANT=true,8 z3 -smt2 -in SMTLIB2_COMPLIANT=true,10 z3 -smt2 -in SMTLIB2_COMPLIANT=true,7 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:31,299 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:31,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:31,300 INFO L82 PathProgramCache]: Analyzing trace with hash -964809789, now seen corresponding path program 1 times [2020-04-18 15:49:31,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:31,300 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [73074148] [2020-04-18 15:49:31,302 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:31,303 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:49:31,303 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:49:31,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:31,304 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:31,304 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:31,304 INFO L82 PathProgramCache]: Analyzing trace with hash 603296645, now seen corresponding path program 2 times [2020-04-18 15:49:31,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:31,305 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686874638] [2020-04-18 15:49:31,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:31,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:31,318 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:31,319 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [686874638] [2020-04-18 15:49:31,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:31,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:31,319 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:31,322 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:31,325 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:49:31,326 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:31,328 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:31,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:31,329 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:31,329 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:49:31,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:31,331 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:31,332 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:31,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:31,332 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:31,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:31,332 INFO L82 PathProgramCache]: Analyzing trace with hash -964809789, now seen corresponding path program 3 times [2020-04-18 15:49:31,333 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:31,333 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910521292] [2020-04-18 15:49:31,333 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:31,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:31,356 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:31,356 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910521292] [2020-04-18 15:49:31,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:31,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:31,357 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:31,358 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:31,361 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:31,361 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:31,368 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:31,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:31,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:31,369 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:49:31,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:31,381 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:31,381 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:31,381 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:31,382 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [73074148] [2020-04-18 15:49:31,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:31,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:31,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [73074148] [2020-04-18 15:49:31,382 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:31,383 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:31,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:31,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:31,383 INFO L87 Difference]: Start difference. First operand 1800 states and 6961 transitions. Second operand 5 states. [2020-04-18 15:49:31,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:31,438 INFO L93 Difference]: Finished difference Result 2762 states and 9976 transitions. [2020-04-18 15:49:31,438 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:31,438 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:49:31,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:31,446 INFO L225 Difference]: With dead ends: 2762 [2020-04-18 15:49:31,447 INFO L226 Difference]: Without dead ends: 2746 [2020-04-18 15:49:31,449 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:31,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2746 states. [2020-04-18 15:49:31,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2746 to 1965. [2020-04-18 15:49:31,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1965 states. [2020-04-18 15:49:31,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1965 states to 1965 states and 7429 transitions. [2020-04-18 15:49:31,512 INFO L78 Accepts]: Start accepts. Automaton has 1965 states and 7429 transitions. Word has length 21 [2020-04-18 15:49:31,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:31,513 INFO L479 AbstractCegarLoop]: Abstraction has 1965 states and 7429 transitions. [2020-04-18 15:49:31,513 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:31,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1965 states and 7429 transitions. [2020-04-18 15:49:31,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 15:49:31,515 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:31,515 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:31,515 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION]=== [2020-04-18 15:49:31,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:31,515 INFO L82 PathProgramCache]: Analyzing trace with hash 150840888, now seen corresponding path program 1 times [2020-04-18 15:49:31,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:31,516 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [862400626] [2020-04-18 15:49:31,516 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:31,517 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 22 transitions. [2020-04-18 15:49:31,517 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states. [2020-04-18 15:49:31,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 15:49:31,518 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:31,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:31,519 INFO L82 PathProgramCache]: Analyzing trace with hash 150840888, now seen corresponding path program 2 times [2020-04-18 15:49:31,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:31,519 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591512137] [2020-04-18 15:49:31,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:31,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:31,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:49:31,556 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:49:31,556 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:49:31,557 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:49:31,558 WARN L363 ceAbstractionStarter]: 4 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:49:31,558 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 5 thread instances. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,572 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,573 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,574 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,575 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,576 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,577 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,578 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,579 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,580 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,581 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,581 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,581 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,582 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,583 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,583 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,583 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,583 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,584 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,585 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,585 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,585 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,585 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,585 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,586 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,587 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,588 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,588 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,588 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,588 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,589 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,589 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,589 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,590 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,590 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,591 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,591 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,591 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,591 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,591 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,592 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,592 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,592 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,593 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,593 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,594 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,594 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of5ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,594 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of5ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,596 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,596 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,596 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,597 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,597 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,597 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,598 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,599 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,600 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,600 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,600 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,600 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,601 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,601 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,601 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,602 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,602 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,602 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of5ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,602 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,602 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of5ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:49:31,603 INFO L251 AbstractCegarLoop]: Starting to check reachability of 8 error locations. [2020-04-18 15:49:31,603 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:49:31,603 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:49:31,603 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:49:31,603 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:49:31,604 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:49:31,604 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:49:31,604 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:49:31,604 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:49:31,607 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 139 places, 123 transitions, 336 flow [2020-04-18 15:49:31,608 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 139 places, 123 transitions, 336 flow [2020-04-18 15:49:31,632 INFO L129 PetriNetUnfolder]: 7/149 cut-off events. [2020-04-18 15:49:31,632 INFO L130 PetriNetUnfolder]: For 30/30 co-relation queries the response was YES. [2020-04-18 15:49:31,633 INFO L80 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 149 events. 7/149 cut-off events. For 30/30 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 256 event pairs, 0 based on Foata normal form. 0/135 useless extension candidates. Maximal degree in co-relation 176. Up to 12 conditions per place. [2020-04-18 15:49:31,638 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 139 places, 123 transitions, 336 flow [2020-04-18 15:49:31,656 INFO L129 PetriNetUnfolder]: 7/149 cut-off events. [2020-04-18 15:49:31,656 INFO L130 PetriNetUnfolder]: For 30/30 co-relation queries the response was YES. [2020-04-18 15:49:31,657 INFO L80 FinitePrefix]: Finished finitePrefix Result has 187 conditions, 149 events. 7/149 cut-off events. For 30/30 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 256 event pairs, 0 based on Foata normal form. 0/135 useless extension candidates. Maximal degree in co-relation 176. Up to 12 conditions per place. [2020-04-18 15:49:31,662 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 2860 [2020-04-18 15:49:31,662 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:49:33,501 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:49:33,571 INFO L206 etLargeBlockEncoding]: Checked pairs total: 3096 [2020-04-18 15:49:33,572 INFO L214 etLargeBlockEncoding]: Total number of compositions: 115 [2020-04-18 15:49:33,572 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 61 places, 39 transitions, 168 flow [2020-04-18 15:49:33,909 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 6191 states. [2020-04-18 15:49:33,909 INFO L276 IsEmpty]: Start isEmpty. Operand 6191 states. [2020-04-18 15:49:33,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:33,909 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:33,909 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:49:33,909 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:33,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:33,910 INFO L82 PathProgramCache]: Analyzing trace with hash 1011964, now seen corresponding path program 1 times [2020-04-18 15:49:33,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:33,910 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [402474380] [2020-04-18 15:49:33,910 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:33,911 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:33,911 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:49:33,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:49:33,911 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:33,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:33,911 INFO L82 PathProgramCache]: Analyzing trace with hash 1011964, now seen corresponding path program 2 times [2020-04-18 15:49:33,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:33,912 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561461081] [2020-04-18 15:49:33,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:33,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:33,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:33,933 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [561461081] [2020-04-18 15:49:33,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:33,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:49:33,934 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:33,934 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:33,934 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:49:33,934 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:33,936 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:33,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:33,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:33,937 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:49:33,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:33,937 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:49:33,937 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:49:33,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:33,937 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [402474380] [2020-04-18 15:49:33,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:33,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:49:33,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [402474380] [2020-04-18 15:49:33,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:49:33,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:33,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:33,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:33,939 INFO L87 Difference]: Start difference. First operand 6191 states. Second operand 3 states. [2020-04-18 15:49:34,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:34,021 INFO L93 Difference]: Finished difference Result 5844 states and 26316 transitions. [2020-04-18 15:49:34,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:49:34,022 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:49:34,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:34,041 INFO L225 Difference]: With dead ends: 5844 [2020-04-18 15:49:34,041 INFO L226 Difference]: Without dead ends: 5479 [2020-04-18 15:49:34,042 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:34,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5479 states. [2020-04-18 15:49:34,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5479 to 5479. [2020-04-18 15:49:34,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5479 states. [2020-04-18 15:49:34,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5479 states to 5479 states and 24493 transitions. [2020-04-18 15:49:34,281 INFO L78 Accepts]: Start accepts. Automaton has 5479 states and 24493 transitions. Word has length 3 [2020-04-18 15:49:34,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:34,282 INFO L479 AbstractCegarLoop]: Abstraction has 5479 states and 24493 transitions. [2020-04-18 15:49:34,282 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:49:34,282 INFO L276 IsEmpty]: Start isEmpty. Operand 5479 states and 24493 transitions. [2020-04-18 15:49:34,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:34,282 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:34,282 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:34,282 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:34,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,283 INFO L82 PathProgramCache]: Analyzing trace with hash 1084774388, now seen corresponding path program 1 times [2020-04-18 15:49:34,283 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:34,283 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2130671891] [2020-04-18 15:49:34,283 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:34,284 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:49:34,284 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:49:34,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:34,284 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:34,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,285 INFO L82 PathProgramCache]: Analyzing trace with hash -1529479740, now seen corresponding path program 2 times [2020-04-18 15:49:34,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:34,285 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128932473] [2020-04-18 15:49:34,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:34,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:34,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:34,301 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2128932473] [2020-04-18 15:49:34,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:34,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:34,302 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:34,302 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:34,303 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:49:34,303 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:34,306 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:34,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:34,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:34,306 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:49:34,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:34,309 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:34,309 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:34,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:49:34,309 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:34,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1084774388, now seen corresponding path program 3 times [2020-04-18 15:49:34,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:34,310 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150180672] [2020-04-18 15:49:34,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:34,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:34,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:34,341 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150180672] [2020-04-18 15:49:34,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:34,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:34,341 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:34,342 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:34,342 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:49:34,342 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:34,350 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:34,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:34,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:34,351 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:49:34,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:34,370 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:49:34,370 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:49:34,370 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:34,371 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2130671891] [2020-04-18 15:49:34,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:34,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:34,372 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2130671891] [2020-04-18 15:49:34,372 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:34,372 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:34,372 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:34,372 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:34,373 INFO L87 Difference]: Start difference. First operand 5479 states and 24493 transitions. Second operand 5 states. [2020-04-18 15:49:34,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:34,480 INFO L93 Difference]: Finished difference Result 9673 states and 40333 transitions. [2020-04-18 15:49:34,480 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:34,481 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:49:34,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:34,504 INFO L225 Difference]: With dead ends: 9673 [2020-04-18 15:49:34,504 INFO L226 Difference]: Without dead ends: 9666 [2020-04-18 15:49:34,505 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:34,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9666 states. [2020-04-18 15:49:34,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9666 to 6331. [2020-04-18 15:49:34,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6331 states. [2020-04-18 15:49:34,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6331 states to 6331 states and 28544 transitions. [2020-04-18 15:49:34,927 INFO L78 Accepts]: Start accepts. Automaton has 6331 states and 28544 transitions. Word has length 9 [2020-04-18 15:49:34,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:34,927 INFO L479 AbstractCegarLoop]: Abstraction has 6331 states and 28544 transitions. [2020-04-18 15:49:34,928 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:34,928 INFO L276 IsEmpty]: Start isEmpty. Operand 6331 states and 28544 transitions. [2020-04-18 15:49:34,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:34,928 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:34,929 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:34,929 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:34,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,930 INFO L82 PathProgramCache]: Analyzing trace with hash 2112403116, now seen corresponding path program 1 times [2020-04-18 15:49:34,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:34,930 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1111101482] [2020-04-18 15:49:34,931 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:34,931 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:49:34,932 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:49:34,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:34,932 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:34,933 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,933 INFO L82 PathProgramCache]: Analyzing trace with hash -372579188, now seen corresponding path program 2 times [2020-04-18 15:49:34,933 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:34,934 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661202488] [2020-04-18 15:49:34,934 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:34,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:34,950 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:34,951 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661202488] [2020-04-18 15:49:34,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:34,951 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:34,952 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:34,953 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:34,955 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:49:34,955 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:34,959 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:34,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:34,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:34,960 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:49:34,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:34,964 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:34,964 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:34,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:49:34,965 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:34,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:34,965 INFO L82 PathProgramCache]: Analyzing trace with hash 2112403116, now seen corresponding path program 3 times [2020-04-18 15:49:34,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:34,966 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628385990] [2020-04-18 15:49:34,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:34,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:34,997 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:34,998 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628385990] [2020-04-18 15:49:34,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:34,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:34,999 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,000 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,003 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:49:35,004 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,017 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:35,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:35,018 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:35,018 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:49:35,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,038 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:49:35,039 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:49:35,039 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:35,039 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1111101482] [2020-04-18 15:49:35,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:35,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:35,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1111101482] [2020-04-18 15:49:35,040 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:35,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:35,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:35,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:35,041 INFO L87 Difference]: Start difference. First operand 6331 states and 28544 transitions. Second operand 5 states. [2020-04-18 15:49:35,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,209 INFO L93 Difference]: Finished difference Result 11081 states and 46826 transitions. [2020-04-18 15:49:35,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:35,210 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:49:35,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:35,246 INFO L225 Difference]: With dead ends: 11081 [2020-04-18 15:49:35,247 INFO L226 Difference]: Without dead ends: 11068 [2020-04-18 15:49:35,248 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:35,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11068 states. [2020-04-18 15:49:35,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11068 to 7391. [2020-04-18 15:49:35,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7391 states. [2020-04-18 15:49:35,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7391 states to 7391 states and 33694 transitions. [2020-04-18 15:49:35,576 INFO L78 Accepts]: Start accepts. Automaton has 7391 states and 33694 transitions. Word has length 13 [2020-04-18 15:49:35,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:35,577 INFO L479 AbstractCegarLoop]: Abstraction has 7391 states and 33694 transitions. [2020-04-18 15:49:35,577 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:35,577 INFO L276 IsEmpty]: Start isEmpty. Operand 7391 states and 33694 transitions. [2020-04-18 15:49:35,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:35,579 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:35,579 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:35,579 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:35,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,580 INFO L82 PathProgramCache]: Analyzing trace with hash -28983895, now seen corresponding path program 1 times [2020-04-18 15:49:35,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:35,580 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1907825695] [2020-04-18 15:49:35,581 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,581 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:49:35,582 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:49:35,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:35,582 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:35,582 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,583 INFO L82 PathProgramCache]: Analyzing trace with hash 975024175, now seen corresponding path program 2 times [2020-04-18 15:49:35,583 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,583 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519653670] [2020-04-18 15:49:35,583 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,595 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:35,596 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519653670] [2020-04-18 15:49:35,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:35,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:35,596 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,599 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,601 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:49:35,602 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,604 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:35,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:35,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:35,605 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:49:35,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,611 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:49:35,611 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:49:35,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:35,612 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:35,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,612 INFO L82 PathProgramCache]: Analyzing trace with hash 208643679, now seen corresponding path program 3 times [2020-04-18 15:49:35,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,613 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [348757542] [2020-04-18 15:49:35,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,638 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:35,638 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [348757542] [2020-04-18 15:49:35,638 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:35,638 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:35,639 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,640 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,642 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:49:35,642 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,650 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:35,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:35,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:35,651 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 5 states. [2020-04-18 15:49:35,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,679 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:49:35,679 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:49:35,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:35,679 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:35,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,680 INFO L82 PathProgramCache]: Analyzing trace with hash -28983895, now seen corresponding path program 4 times [2020-04-18 15:49:35,680 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,680 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873125410] [2020-04-18 15:49:35,680 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,718 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:35,718 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873125410] [2020-04-18 15:49:35,719 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [777630710] [2020-04-18 15:49:35,719 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:35,807 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:35,807 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:35,808 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:35,809 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:35,827 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:35,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:35,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:35,828 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:35,829 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:35,832 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:49:35,832 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:35,864 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:35,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:35,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:35,865 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:49:35,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:35,955 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:49:35,956 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:49:35,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:49:35,956 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:35,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:35,957 INFO L82 PathProgramCache]: Analyzing trace with hash -1500121559, now seen corresponding path program 5 times [2020-04-18 15:49:35,957 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:35,957 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [915972439] [2020-04-18 15:49:35,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:35,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:35,999 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:36,000 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [915972439] [2020-04-18 15:49:36,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:36,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:36,000 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:36,002 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:36,004 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:49:36,004 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:36,023 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:36,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:36,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:36,024 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:49:36,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:36,764 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:49:36,764 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:49:36,765 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:36,765 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1907825695] [2020-04-18 15:49:36,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:36,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:36,766 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1907825695] [2020-04-18 15:49:36,766 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:36,766 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:36,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:36,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:36,766 INFO L87 Difference]: Start difference. First operand 7391 states and 33694 transitions. Second operand 11 states. [2020-04-18 15:49:37,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,083 INFO L93 Difference]: Finished difference Result 19072 states and 73298 transitions. [2020-04-18 15:49:37,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:37,083 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 15 [2020-04-18 15:49:37,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:37,125 INFO L225 Difference]: With dead ends: 19072 [2020-04-18 15:49:37,125 INFO L226 Difference]: Without dead ends: 19045 [2020-04-18 15:49:37,125 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:37,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19045 states. [2020-04-18 15:49:37,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19045 to 7048. [2020-04-18 15:49:37,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7048 states. [2020-04-18 15:49:37,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7048 states to 7048 states and 32136 transitions. [2020-04-18 15:49:37,433 INFO L78 Accepts]: Start accepts. Automaton has 7048 states and 32136 transitions. Word has length 15 [2020-04-18 15:49:37,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:37,433 INFO L479 AbstractCegarLoop]: Abstraction has 7048 states and 32136 transitions. [2020-04-18 15:49:37,433 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:37,433 INFO L276 IsEmpty]: Start isEmpty. Operand 7048 states and 32136 transitions. [2020-04-18 15:49:37,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:37,433 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:37,433 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:37,634 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:37,635 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:37,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,635 INFO L82 PathProgramCache]: Analyzing trace with hash -1891696605, now seen corresponding path program 1 times [2020-04-18 15:49:37,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:37,636 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1259183161] [2020-04-18 15:49:37,636 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,637 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:49:37,637 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:49:37,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:37,637 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:37,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,638 INFO L82 PathProgramCache]: Analyzing trace with hash 1671417013, now seen corresponding path program 2 times [2020-04-18 15:49:37,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:37,638 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061769270] [2020-04-18 15:49:37,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:37,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:37,649 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061769270] [2020-04-18 15:49:37,649 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:37,649 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:37,649 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:37,650 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,653 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:49:37,653 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:37,655 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:37,656 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:37,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:37,656 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:49:37,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,658 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:37,658 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:37,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:49:37,659 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:37,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:37,659 INFO L82 PathProgramCache]: Analyzing trace with hash -1891696605, now seen corresponding path program 3 times [2020-04-18 15:49:37,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:37,659 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411800331] [2020-04-18 15:49:37,660 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:37,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:37,680 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:37,681 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411800331] [2020-04-18 15:49:37,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:37,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:37,681 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:37,682 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:37,684 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:49:37,684 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:37,691 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:37,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:37,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:37,692 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:49:37,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,704 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:49:37,704 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:49:37,705 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:37,705 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1259183161] [2020-04-18 15:49:37,705 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:37,705 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:37,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1259183161] [2020-04-18 15:49:37,706 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:37,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:37,706 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:37,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:37,706 INFO L87 Difference]: Start difference. First operand 7048 states and 32136 transitions. Second operand 5 states. [2020-04-18 15:49:37,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:37,854 INFO L93 Difference]: Finished difference Result 12234 states and 52488 transitions. [2020-04-18 15:49:37,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:37,854 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:49:37,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:37,904 INFO L225 Difference]: With dead ends: 12234 [2020-04-18 15:49:37,904 INFO L226 Difference]: Without dead ends: 12212 [2020-04-18 15:49:37,905 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:38,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12212 states. [2020-04-18 15:49:38,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12212 to 8342. [2020-04-18 15:49:38,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8342 states. [2020-04-18 15:49:38,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8342 states to 8342 states and 38278 transitions. [2020-04-18 15:49:38,440 INFO L78 Accepts]: Start accepts. Automaton has 8342 states and 38278 transitions. Word has length 17 [2020-04-18 15:49:38,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:38,440 INFO L479 AbstractCegarLoop]: Abstraction has 8342 states and 38278 transitions. [2020-04-18 15:49:38,441 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:38,441 INFO L276 IsEmpty]: Start isEmpty. Operand 8342 states and 38278 transitions. [2020-04-18 15:49:38,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:38,441 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:38,441 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:38,442 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:38,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,442 INFO L82 PathProgramCache]: Analyzing trace with hash -74039136, now seen corresponding path program 1 times [2020-04-18 15:49:38,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:38,442 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1494821762] [2020-04-18 15:49:38,443 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,444 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:49:38,445 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:49:38,445 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:38,445 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:38,445 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,446 INFO L82 PathProgramCache]: Analyzing trace with hash 1888358104, now seen corresponding path program 2 times [2020-04-18 15:49:38,446 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:38,446 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929427755] [2020-04-18 15:49:38,446 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:38,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:38,459 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:38,459 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929427755] [2020-04-18 15:49:38,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:38,459 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:38,460 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:38,461 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,466 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 101 transitions. [2020-04-18 15:49:38,466 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:38,470 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:38,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:38,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:38,471 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:49:38,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:38,479 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:49:38,479 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:49:38,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:38,480 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:38,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1067019528, now seen corresponding path program 3 times [2020-04-18 15:49:38,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:38,480 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853008966] [2020-04-18 15:49:38,481 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:38,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:38,502 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:38,502 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853008966] [2020-04-18 15:49:38,502 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:38,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:38,502 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:38,504 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,509 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 15:49:38,509 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:38,517 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:38,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:38,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:38,518 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:49:38,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:38,546 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:49:38,546 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:49:38,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:38,547 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:38,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,547 INFO L82 PathProgramCache]: Analyzing trace with hash -74039136, now seen corresponding path program 4 times [2020-04-18 15:49:38,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:38,547 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1027704823] [2020-04-18 15:49:38,548 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:38,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:38,583 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:38,583 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1027704823] [2020-04-18 15:49:38,583 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1695583248] [2020-04-18 15:49:38,583 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:38,659 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:38,659 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:38,660 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:38,662 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:38,686 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:38,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:38,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:38,687 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:38,688 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,692 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:49:38,692 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:38,717 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:38,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:38,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:38,718 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 9 states. [2020-04-18 15:49:38,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:38,804 INFO L93 Difference]: Finished difference Result 97 states and 168 transitions. [2020-04-18 15:49:38,804 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 168 transitions. [2020-04-18 15:49:38,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:38,805 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:38,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:38,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1149256224, now seen corresponding path program 5 times [2020-04-18 15:49:38,806 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:38,806 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86992029] [2020-04-18 15:49:38,806 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:38,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:38,837 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:38,837 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [86992029] [2020-04-18 15:49:38,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:38,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:38,838 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:38,839 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:38,842 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:49:38,842 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:38,856 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:38,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:38,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:38,857 INFO L87 Difference]: Start difference. First operand 97 states and 168 transitions. Second operand 7 states. [2020-04-18 15:49:38,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:38,960 INFO L93 Difference]: Finished difference Result 100 states and 171 transitions. [2020-04-18 15:49:38,960 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 171 transitions. [2020-04-18 15:49:38,960 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:38,961 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1494821762] [2020-04-18 15:49:38,961 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:38,961 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:38,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1494821762] [2020-04-18 15:49:38,961 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:38,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:38,962 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:38,962 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:38,962 INFO L87 Difference]: Start difference. First operand 8342 states and 38278 transitions. Second operand 11 states. [2020-04-18 15:49:39,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:39,309 INFO L93 Difference]: Finished difference Result 21543 states and 84183 transitions. [2020-04-18 15:49:39,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:39,310 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 19 [2020-04-18 15:49:39,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:39,357 INFO L225 Difference]: With dead ends: 21543 [2020-04-18 15:49:39,357 INFO L226 Difference]: Without dead ends: 21500 [2020-04-18 15:49:39,357 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:39,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21500 states. [2020-04-18 15:49:39,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21500 to 8129. [2020-04-18 15:49:39,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8129 states. [2020-04-18 15:49:39,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8129 states to 8129 states and 37298 transitions. [2020-04-18 15:49:39,897 INFO L78 Accepts]: Start accepts. Automaton has 8129 states and 37298 transitions. Word has length 19 [2020-04-18 15:49:39,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:39,897 INFO L479 AbstractCegarLoop]: Abstraction has 8129 states and 37298 transitions. [2020-04-18 15:49:39,897 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:39,897 INFO L276 IsEmpty]: Start isEmpty. Operand 8129 states and 37298 transitions. [2020-04-18 15:49:39,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:39,898 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:39,898 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:40,101 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:40,102 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:40,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,103 INFO L82 PathProgramCache]: Analyzing trace with hash -274460668, now seen corresponding path program 1 times [2020-04-18 15:49:40,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:40,103 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [755859153] [2020-04-18 15:49:40,105 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,106 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:49:40,107 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:49:40,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:40,107 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:40,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,108 INFO L82 PathProgramCache]: Analyzing trace with hash 496442822, now seen corresponding path program 2 times [2020-04-18 15:49:40,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,109 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1141688173] [2020-04-18 15:49:40,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,133 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:40,133 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1141688173] [2020-04-18 15:49:40,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:40,134 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:40,134 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,137 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,142 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 74 transitions. [2020-04-18 15:49:40,142 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,145 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:40,145 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:40,146 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:40,146 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:49:40,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:40,153 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:49:40,154 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:49:40,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:40,154 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:40,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,154 INFO L82 PathProgramCache]: Analyzing trace with hash -273739378, now seen corresponding path program 3 times [2020-04-18 15:49:40,155 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,155 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314265882] [2020-04-18 15:49:40,155 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,178 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:40,178 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1314265882] [2020-04-18 15:49:40,179 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [687410103] [2020-04-18 15:49:40,179 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:40,252 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:49:40,252 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:40,253 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:40,254 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:40,278 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:40,278 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:40,279 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2020-04-18 15:49:40,279 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,281 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,287 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 32 transitions. [2020-04-18 15:49:40,288 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,317 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:40,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:40,317 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:40,318 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 7 states. [2020-04-18 15:49:40,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:40,380 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:49:40,380 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:49:40,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:40,380 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:40,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,381 INFO L82 PathProgramCache]: Analyzing trace with hash -273739918, now seen corresponding path program 4 times [2020-04-18 15:49:40,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,381 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443022158] [2020-04-18 15:49:40,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,416 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:40,416 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443022158] [2020-04-18 15:49:40,417 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:40,417 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:40,417 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,420 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,426 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 32 transitions. [2020-04-18 15:49:40,426 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,438 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:40,438 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:40,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:40,439 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 5 states. [2020-04-18 15:49:40,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:40,490 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:49:40,490 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:49:40,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:40,491 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:40,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,492 INFO L82 PathProgramCache]: Analyzing trace with hash -274460668, now seen corresponding path program 5 times [2020-04-18 15:49:40,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,492 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447489977] [2020-04-18 15:49:40,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:40,553 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:40,554 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447489977] [2020-04-18 15:49:40,554 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [100459427] [2020-04-18 15:49:40,555 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:40,679 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:49:40,680 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:40,681 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:40,683 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:40,715 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:40,715 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:40,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:40,716 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:40,719 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:40,722 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:49:40,723 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:40,782 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:40,782 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:40,782 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:49:40,783 INFO L87 Difference]: Start difference. First operand 83 states and 128 transitions. Second operand 11 states. [2020-04-18 15:49:40,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:40,931 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:49:40,931 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:49:40,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:49:40,932 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:40,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:40,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1149271290, now seen corresponding path program 6 times [2020-04-18 15:49:40,932 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:40,933 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32306558] [2020-04-18 15:49:40,933 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:40,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:41,000 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:41,000 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32306558] [2020-04-18 15:49:41,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:41,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:41,001 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:41,003 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:41,007 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:49:41,008 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:41,023 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:41,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:41,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:49:41,024 INFO L87 Difference]: Start difference. First operand 83 states and 128 transitions. Second operand 7 states. [2020-04-18 15:49:41,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:41,111 INFO L93 Difference]: Finished difference Result 83 states and 128 transitions. [2020-04-18 15:49:41,111 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 128 transitions. [2020-04-18 15:49:41,112 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:41,112 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [755859153] [2020-04-18 15:49:41,112 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:41,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:41,112 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [755859153] [2020-04-18 15:49:41,113 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:49:41,113 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:41,113 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:41,113 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=505, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:49:41,113 INFO L87 Difference]: Start difference. First operand 8129 states and 37298 transitions. Second operand 13 states. [2020-04-18 15:49:41,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:41,678 INFO L93 Difference]: Finished difference Result 23663 states and 90455 transitions. [2020-04-18 15:49:41,679 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:49:41,679 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2020-04-18 15:49:41,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:41,730 INFO L225 Difference]: With dead ends: 23663 [2020-04-18 15:49:41,731 INFO L226 Difference]: Without dead ends: 23589 [2020-04-18 15:49:41,731 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 408 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=383, Invalid=1099, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:49:41,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23589 states. [2020-04-18 15:49:42,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23589 to 8317. [2020-04-18 15:49:42,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8317 states. [2020-04-18 15:49:42,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8317 states to 8317 states and 38184 transitions. [2020-04-18 15:49:42,250 INFO L78 Accepts]: Start accepts. Automaton has 8317 states and 38184 transitions. Word has length 19 [2020-04-18 15:49:42,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:42,250 INFO L479 AbstractCegarLoop]: Abstraction has 8317 states and 38184 transitions. [2020-04-18 15:49:42,250 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:49:42,250 INFO L276 IsEmpty]: Start isEmpty. Operand 8317 states and 38184 transitions. [2020-04-18 15:49:42,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:42,251 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:42,251 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:42,653 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 z3 -smt2 -in SMTLIB2_COMPLIANT=true,13 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:42,653 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:42,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,654 INFO L82 PathProgramCache]: Analyzing trace with hash -1557322431, now seen corresponding path program 1 times [2020-04-18 15:49:42,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:42,654 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1900855057] [2020-04-18 15:49:42,655 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,658 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:49:42,658 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:49:42,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:42,659 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:42,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,659 INFO L82 PathProgramCache]: Analyzing trace with hash -1963684983, now seen corresponding path program 2 times [2020-04-18 15:49:42,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:42,659 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533509494] [2020-04-18 15:49:42,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:42,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:42,671 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:42,671 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533509494] [2020-04-18 15:49:42,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:42,672 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:42,672 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:42,673 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,679 INFO L259 McrAutomatonBuilder]: Finished intersection with 65 states and 115 transitions. [2020-04-18 15:49:42,679 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:42,681 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:42,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:42,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:42,682 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:49:42,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:42,706 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:49:42,706 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:49:42,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:42,706 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:42,707 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,707 INFO L82 PathProgramCache]: Analyzing trace with hash -508954823, now seen corresponding path program 3 times [2020-04-18 15:49:42,707 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:42,707 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070775601] [2020-04-18 15:49:42,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:42,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:42,727 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:42,727 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070775601] [2020-04-18 15:49:42,727 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:42,728 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:42,728 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:42,729 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,736 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 100 transitions. [2020-04-18 15:49:42,737 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:42,745 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:42,746 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:42,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:42,746 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:49:42,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:42,795 INFO L93 Difference]: Finished difference Result 266 states and 576 transitions. [2020-04-18 15:49:42,795 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 576 transitions. [2020-04-18 15:49:42,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:42,796 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:42,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:42,796 INFO L82 PathProgramCache]: Analyzing trace with hash -1556585781, now seen corresponding path program 4 times [2020-04-18 15:49:42,796 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:42,796 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1545135327] [2020-04-18 15:49:42,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:42,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:42,840 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:42,840 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1545135327] [2020-04-18 15:49:42,840 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1884844911] [2020-04-18 15:49:42,841 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:42,931 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:42,932 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:42,933 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:42,934 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:42,958 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:42,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:42,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:49:42,959 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:42,961 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:42,967 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 66 transitions. [2020-04-18 15:49:42,967 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:42,993 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:42,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:42,994 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:42,994 INFO L87 Difference]: Start difference. First operand 266 states and 576 transitions. Second operand 9 states. [2020-04-18 15:49:43,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:43,182 INFO L93 Difference]: Finished difference Result 308 states and 628 transitions. [2020-04-18 15:49:43,182 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 628 transitions. [2020-04-18 15:49:43,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:43,183 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:43,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:43,183 INFO L82 PathProgramCache]: Analyzing trace with hash -1556586801, now seen corresponding path program 5 times [2020-04-18 15:49:43,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:43,184 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998265973] [2020-04-18 15:49:43,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:43,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:43,226 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:43,226 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998265973] [2020-04-18 15:49:43,226 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1074730653] [2020-04-18 15:49:43,226 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:43,304 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:49:43,304 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:43,305 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:43,306 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:43,331 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:43,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:43,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:43,332 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:43,334 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:43,340 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 66 transitions. [2020-04-18 15:49:43,341 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:43,350 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:43,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:43,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:43,351 INFO L87 Difference]: Start difference. First operand 308 states and 628 transitions. Second operand 9 states. [2020-04-18 15:49:43,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:43,540 INFO L93 Difference]: Finished difference Result 361 states and 682 transitions. [2020-04-18 15:49:43,540 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 682 transitions. [2020-04-18 15:49:43,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:43,541 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:43,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:43,541 INFO L82 PathProgramCache]: Analyzing trace with hash -1557322431, now seen corresponding path program 6 times [2020-04-18 15:49:43,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:43,541 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [440961877] [2020-04-18 15:49:43,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:43,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:43,585 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:43,586 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [440961877] [2020-04-18 15:49:43,586 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [679937101] [2020-04-18 15:49:43,586 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:43,665 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:49:43,665 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:43,667 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:43,667 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:43,723 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:49:43,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:43,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:43,724 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:43,725 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:43,730 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:49:43,730 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:43,798 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:43,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:43,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=549, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:49:43,799 INFO L87 Difference]: Start difference. First operand 361 states and 682 transitions. Second operand 13 states. [2020-04-18 15:49:44,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:44,317 INFO L93 Difference]: Finished difference Result 368 states and 687 transitions. [2020-04-18 15:49:44,318 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 687 transitions. [2020-04-18 15:49:44,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:44,318 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:49:44,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:44,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1862834243, now seen corresponding path program 7 times [2020-04-18 15:49:44,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:44,319 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635566600] [2020-04-18 15:49:44,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:44,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:44,404 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:44,404 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635566600] [2020-04-18 15:49:44,405 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [872695476] [2020-04-18 15:49:44,405 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:44,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:44,478 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:44,480 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:44,498 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:49:44,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:44,499 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:44,500 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:44,502 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:44,506 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:49:44,506 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:44,516 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:44,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:44,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1371, Unknown=0, NotChecked=0, Total=1806 [2020-04-18 15:49:44,517 INFO L87 Difference]: Start difference. First operand 368 states and 687 transitions. Second operand 11 states. [2020-04-18 15:49:45,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:45,005 INFO L93 Difference]: Finished difference Result 375 states and 692 transitions. [2020-04-18 15:49:45,005 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 692 transitions. [2020-04-18 15:49:45,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:45,006 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:49:45,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:45,007 INFO L82 PathProgramCache]: Analyzing trace with hash -1056201999, now seen corresponding path program 8 times [2020-04-18 15:49:45,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:45,007 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022486310] [2020-04-18 15:49:45,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:45,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:45,042 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:45,043 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022486310] [2020-04-18 15:49:45,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:45,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:49:45,043 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:45,045 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:45,050 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 37 transitions. [2020-04-18 15:49:45,050 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:45,087 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:45,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:45,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=728, Invalid=2694, Unknown=0, NotChecked=0, Total=3422 [2020-04-18 15:49:45,091 INFO L87 Difference]: Start difference. First operand 375 states and 692 transitions. Second operand 7 states. [2020-04-18 15:49:45,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:45,333 INFO L93 Difference]: Finished difference Result 411 states and 727 transitions. [2020-04-18 15:49:45,333 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 727 transitions. [2020-04-18 15:49:45,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:45,334 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:49:45,334 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:45,335 INFO L82 PathProgramCache]: Analyzing trace with hash -1056741489, now seen corresponding path program 9 times [2020-04-18 15:49:45,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:45,335 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311016069] [2020-04-18 15:49:45,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:45,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:45,385 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:45,386 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311016069] [2020-04-18 15:49:45,386 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1804469309] [2020-04-18 15:49:45,386 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:45,516 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:49:45,516 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:45,517 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:45,518 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:45,561 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:45,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:45,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:45,562 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:45,564 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:45,571 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 37 transitions. [2020-04-18 15:49:45,571 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:45,660 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:49:45,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:45,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=870, Invalid=3822, Unknown=0, NotChecked=0, Total=4692 [2020-04-18 15:49:45,661 INFO L87 Difference]: Start difference. First operand 411 states and 727 transitions. Second operand 9 states. [2020-04-18 15:49:46,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:46,023 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:49:46,023 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:49:46,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:46,024 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:49:46,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:46,024 INFO L82 PathProgramCache]: Analyzing trace with hash -1769991039, now seen corresponding path program 10 times [2020-04-18 15:49:46,024 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:46,024 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308962041] [2020-04-18 15:49:46,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:46,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:46,074 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:46,074 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [308962041] [2020-04-18 15:49:46,075 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1247280010] [2020-04-18 15:49:46,075 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:46,180 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:46,180 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:46,181 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:46,182 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:46,219 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:46,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:46,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:46,220 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:46,225 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:46,233 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:49:46,233 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:46,341 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:49:46,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:49:46,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1121, Invalid=5041, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:49:46,343 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 17 states. [2020-04-18 15:49:46,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:46,988 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:49:46,988 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:49:46,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:46,989 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:49:46,989 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:46,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1763681919, now seen corresponding path program 11 times [2020-04-18 15:49:46,990 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:46,990 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764567483] [2020-04-18 15:49:46,990 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:46,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:47,044 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:47,044 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764567483] [2020-04-18 15:49:47,045 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2105964075] [2020-04-18 15:49:47,045 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:47,142 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:49:47,143 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:47,143 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:49:47,144 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:47,164 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:49:47,165 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:47,165 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:49:47,165 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:47,167 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:47,172 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:49:47,172 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:47,193 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:49:47,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:49:47,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=6887, Unknown=0, NotChecked=0, Total=8372 [2020-04-18 15:49:47,194 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 13 states. [2020-04-18 15:49:47,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:47,847 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:49:47,848 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:49:47,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:47,848 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:49:47,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:47,849 INFO L82 PathProgramCache]: Analyzing trace with hash -628636285, now seen corresponding path program 12 times [2020-04-18 15:49:47,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:47,849 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1246312267] [2020-04-18 15:49:47,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:47,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:47,890 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:47,891 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1246312267] [2020-04-18 15:49:47,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:47,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:47,891 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:47,893 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:47,896 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:47,896 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:47,896 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:47,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:47,897 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1970, Invalid=9802, Unknown=0, NotChecked=0, Total=11772 [2020-04-18 15:49:47,898 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 9 states. [2020-04-18 15:49:48,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:48,317 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:49:48,317 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:49:48,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:48,318 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:49:48,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:48,318 INFO L82 PathProgramCache]: Analyzing trace with hash -643099645, now seen corresponding path program 13 times [2020-04-18 15:49:48,318 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:48,319 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310667330] [2020-04-18 15:49:48,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:48,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:48,384 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:49:48,384 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310667330] [2020-04-18 15:49:48,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:48,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:49:48,385 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:48,387 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:48,390 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:48,390 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:48,391 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:48,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:48,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2330, Invalid=12190, Unknown=0, NotChecked=0, Total=14520 [2020-04-18 15:49:48,393 INFO L87 Difference]: Start difference. First operand 466 states and 792 transitions. Second operand 9 states. [2020-04-18 15:49:48,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:48,902 INFO L93 Difference]: Finished difference Result 466 states and 792 transitions. [2020-04-18 15:49:48,902 INFO L276 IsEmpty]: Start isEmpty. Operand 466 states and 792 transitions. [2020-04-18 15:49:48,903 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:48,904 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1900855057] [2020-04-18 15:49:48,904 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:48,904 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:49:48,904 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1900855057] [2020-04-18 15:49:48,904 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2020-04-18 15:49:48,905 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:48,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-04-18 15:49:48,907 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2794, Invalid=15566, Unknown=0, NotChecked=0, Total=18360 [2020-04-18 15:49:48,907 INFO L87 Difference]: Start difference. First operand 8317 states and 38184 transitions. Second operand 24 states. [2020-04-18 15:49:53,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:53,182 INFO L93 Difference]: Finished difference Result 44264 states and 150047 transitions. [2020-04-18 15:49:53,182 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:49:53,182 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 21 [2020-04-18 15:49:53,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:53,273 INFO L225 Difference]: With dead ends: 44264 [2020-04-18 15:49:53,273 INFO L226 Difference]: Without dead ends: 44119 [2020-04-18 15:49:53,278 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 713 GetRequests, 465 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26620 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=8309, Invalid=53941, Unknown=0, NotChecked=0, Total=62250 [2020-04-18 15:49:53,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44119 states. [2020-04-18 15:49:53,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44119 to 7221. [2020-04-18 15:49:53,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7221 states. [2020-04-18 15:49:53,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7221 states to 7221 states and 33268 transitions. [2020-04-18 15:49:53,932 INFO L78 Accepts]: Start accepts. Automaton has 7221 states and 33268 transitions. Word has length 21 [2020-04-18 15:49:53,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:53,932 INFO L479 AbstractCegarLoop]: Abstraction has 7221 states and 33268 transitions. [2020-04-18 15:49:53,932 INFO L480 AbstractCegarLoop]: Interpolant automaton has 24 states. [2020-04-18 15:49:53,932 INFO L276 IsEmpty]: Start isEmpty. Operand 7221 states and 33268 transitions. [2020-04-18 15:49:53,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:53,933 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:53,933 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:55,340 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 z3 -smt2 -in SMTLIB2_COMPLIANT=true,19 z3 -smt2 -in SMTLIB2_COMPLIANT=true,18 z3 -smt2 -in SMTLIB2_COMPLIANT=true,16 z3 -smt2 -in SMTLIB2_COMPLIANT=true,20 z3 -smt2 -in SMTLIB2_COMPLIANT=true,17 z3 -smt2 -in SMTLIB2_COMPLIANT=true,15 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:55,342 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:55,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,342 INFO L82 PathProgramCache]: Analyzing trace with hash 1774143127, now seen corresponding path program 1 times [2020-04-18 15:49:55,342 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:55,343 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1087003226] [2020-04-18 15:49:55,343 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,345 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:49:55,345 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:49:55,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:55,346 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:55,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1956013121, now seen corresponding path program 2 times [2020-04-18 15:49:55,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:55,346 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [665995557] [2020-04-18 15:49:55,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:55,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:55,358 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:55,359 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [665995557] [2020-04-18 15:49:55,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:55,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:55,359 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:55,361 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,365 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:49:55,365 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:55,368 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:55,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:55,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:55,369 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:49:55,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:55,371 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:55,371 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:55,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:49:55,371 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:55,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1774143127, now seen corresponding path program 3 times [2020-04-18 15:49:55,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:55,372 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146691092] [2020-04-18 15:49:55,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:55,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:55,400 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:55,401 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146691092] [2020-04-18 15:49:55,401 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:55,401 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:49:55,401 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:55,403 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,405 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:49:55,406 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:55,413 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:55,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:55,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:55,414 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:49:55,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:55,428 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:49:55,428 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:49:55,428 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:55,429 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1087003226] [2020-04-18 15:49:55,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:55,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:49:55,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1087003226] [2020-04-18 15:49:55,429 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:49:55,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:55,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:55,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:55,430 INFO L87 Difference]: Start difference. First operand 7221 states and 33268 transitions. Second operand 5 states. [2020-04-18 15:49:55,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:55,538 INFO L93 Difference]: Finished difference Result 12418 states and 54012 transitions. [2020-04-18 15:49:55,539 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:49:55,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:49:55,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:55,568 INFO L225 Difference]: With dead ends: 12418 [2020-04-18 15:49:55,568 INFO L226 Difference]: Without dead ends: 12387 [2020-04-18 15:49:55,568 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:49:55,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12387 states. [2020-04-18 15:49:55,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12387 to 8573. [2020-04-18 15:49:55,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8573 states. [2020-04-18 15:49:55,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8573 states to 8573 states and 39353 transitions. [2020-04-18 15:49:55,807 INFO L78 Accepts]: Start accepts. Automaton has 8573 states and 39353 transitions. Word has length 21 [2020-04-18 15:49:55,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:55,807 INFO L479 AbstractCegarLoop]: Abstraction has 8573 states and 39353 transitions. [2020-04-18 15:49:55,807 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:49:55,807 INFO L276 IsEmpty]: Start isEmpty. Operand 8573 states and 39353 transitions. [2020-04-18 15:49:55,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:55,808 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:55,808 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:55,808 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:55,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1599602836, now seen corresponding path program 1 times [2020-04-18 15:49:55,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:55,809 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [167000287] [2020-04-18 15:49:55,810 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,813 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 203 transitions. [2020-04-18 15:49:55,813 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states. [2020-04-18 15:49:55,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:55,814 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:55,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,814 INFO L82 PathProgramCache]: Analyzing trace with hash -25109276, now seen corresponding path program 2 times [2020-04-18 15:49:55,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:55,814 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599958681] [2020-04-18 15:49:55,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:55,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:55,822 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:55,822 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599958681] [2020-04-18 15:49:55,823 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:55,823 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:55,823 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:55,825 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,832 INFO L259 McrAutomatonBuilder]: Finished intersection with 77 states and 141 transitions. [2020-04-18 15:49:55,832 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:55,834 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:55,835 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:55,835 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:55,835 INFO L87 Difference]: Start difference. First operand 100 states. Second operand 3 states. [2020-04-18 15:49:55,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:55,840 INFO L93 Difference]: Finished difference Result 117 states and 219 transitions. [2020-04-18 15:49:55,841 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 219 transitions. [2020-04-18 15:49:55,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:55,841 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:55,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,841 INFO L82 PathProgramCache]: Analyzing trace with hash 2136056596, now seen corresponding path program 3 times [2020-04-18 15:49:55,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:55,842 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1712024578] [2020-04-18 15:49:55,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:55,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:55,862 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:55,862 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1712024578] [2020-04-18 15:49:55,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:55,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:55,863 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:55,864 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:55,872 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 97 transitions. [2020-04-18 15:49:55,872 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:55,880 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:55,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:55,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:55,880 INFO L87 Difference]: Start difference. First operand 117 states and 219 transitions. Second operand 5 states. [2020-04-18 15:49:55,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:55,908 INFO L93 Difference]: Finished difference Result 124 states and 224 transitions. [2020-04-18 15:49:55,908 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 224 transitions. [2020-04-18 15:49:55,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:55,908 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:55,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:55,909 INFO L82 PathProgramCache]: Analyzing trace with hash 1599602836, now seen corresponding path program 4 times [2020-04-18 15:49:55,909 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:55,909 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1959653473] [2020-04-18 15:49:55,909 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:55,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:55,944 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:55,944 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1959653473] [2020-04-18 15:49:55,945 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1070546048] [2020-04-18 15:49:55,945 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:56,035 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:56,036 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:56,036 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:56,037 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:56,063 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:49:56,063 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:56,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:56,063 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:56,065 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:56,072 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 71 transitions. [2020-04-18 15:49:56,072 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:56,098 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:56,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:49:56,099 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:49:56,099 INFO L87 Difference]: Start difference. First operand 124 states and 224 transitions. Second operand 9 states. [2020-04-18 15:49:56,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:56,180 INFO L93 Difference]: Finished difference Result 125 states and 224 transitions. [2020-04-18 15:49:56,180 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 224 transitions. [2020-04-18 15:49:56,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:56,180 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:56,181 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:56,181 INFO L82 PathProgramCache]: Analyzing trace with hash -150456492, now seen corresponding path program 5 times [2020-04-18 15:49:56,181 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:56,181 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497221975] [2020-04-18 15:49:56,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:56,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:56,215 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:56,215 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497221975] [2020-04-18 15:49:56,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:56,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:56,216 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:56,217 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:56,222 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:49:56,222 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:56,249 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:56,249 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:56,249 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=213, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:49:56,249 INFO L87 Difference]: Start difference. First operand 125 states and 224 transitions. Second operand 7 states. [2020-04-18 15:49:56,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:56,345 INFO L93 Difference]: Finished difference Result 128 states and 227 transitions. [2020-04-18 15:49:56,345 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 227 transitions. [2020-04-18 15:49:56,345 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:56,345 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [167000287] [2020-04-18 15:49:56,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:56,346 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:56,346 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [167000287] [2020-04-18 15:49:56,346 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-04-18 15:49:56,346 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:56,346 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:49:56,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2020-04-18 15:49:56,346 INFO L87 Difference]: Start difference. First operand 8573 states and 39353 transitions. Second operand 11 states. [2020-04-18 15:49:56,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:56,789 INFO L93 Difference]: Finished difference Result 22356 states and 88808 transitions. [2020-04-18 15:49:56,790 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:49:56,790 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2020-04-18 15:49:56,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:56,836 INFO L225 Difference]: With dead ends: 22356 [2020-04-18 15:49:56,837 INFO L226 Difference]: Without dead ends: 22295 [2020-04-18 15:49:56,837 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=241, Invalid=629, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:49:56,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22295 states. [2020-04-18 15:49:57,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22295 to 8496. [2020-04-18 15:49:57,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8496 states. [2020-04-18 15:49:57,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8496 states to 8496 states and 38896 transitions. [2020-04-18 15:49:57,167 INFO L78 Accepts]: Start accepts. Automaton has 8496 states and 38896 transitions. Word has length 23 [2020-04-18 15:49:57,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:57,167 INFO L479 AbstractCegarLoop]: Abstraction has 8496 states and 38896 transitions. [2020-04-18 15:49:57,167 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-04-18 15:49:57,167 INFO L276 IsEmpty]: Start isEmpty. Operand 8496 states and 38896 transitions. [2020-04-18 15:49:57,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,169 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:57,169 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:57,369 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:57,370 INFO L427 AbstractCegarLoop]: === Iteration 11 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:57,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,370 INFO L82 PathProgramCache]: Analyzing trace with hash 72758744, now seen corresponding path program 1 times [2020-04-18 15:49:57,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:57,371 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [642052544] [2020-04-18 15:49:57,372 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,374 INFO L259 McrAutomatonBuilder]: Finished intersection with 84 states and 163 transitions. [2020-04-18 15:49:57,375 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states. [2020-04-18 15:49:57,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,375 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:57,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,376 INFO L82 PathProgramCache]: Analyzing trace with hash -905639014, now seen corresponding path program 2 times [2020-04-18 15:49:57,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,376 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [362570431] [2020-04-18 15:49:57,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,389 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:57,390 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [362570431] [2020-04-18 15:49:57,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:57,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:57,390 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,392 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,399 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 106 transitions. [2020-04-18 15:49:57,399 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,402 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:57,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:57,403 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:57,403 INFO L87 Difference]: Start difference. First operand 84 states. Second operand 3 states. [2020-04-18 15:49:57,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,409 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2020-04-18 15:49:57,409 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2020-04-18 15:49:57,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,410 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:57,410 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,410 INFO L82 PathProgramCache]: Analyzing trace with hash 72985754, now seen corresponding path program 3 times [2020-04-18 15:49:57,410 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,410 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006864381] [2020-04-18 15:49:57,411 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,433 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:57,433 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006864381] [2020-04-18 15:49:57,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:57,433 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:57,434 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,436 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,447 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 44 transitions. [2020-04-18 15:49:57,447 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,460 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:57,460 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:57,460 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:57,460 INFO L87 Difference]: Start difference. First operand 97 states and 175 transitions. Second operand 5 states. [2020-04-18 15:49:57,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,486 INFO L93 Difference]: Finished difference Result 104 states and 180 transitions. [2020-04-18 15:49:57,486 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 180 transitions. [2020-04-18 15:49:57,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,487 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:57,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,487 INFO L82 PathProgramCache]: Analyzing trace with hash 72984734, now seen corresponding path program 4 times [2020-04-18 15:49:57,487 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,487 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493126495] [2020-04-18 15:49:57,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,512 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:57,513 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493126495] [2020-04-18 15:49:57,513 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [302806398] [2020-04-18 15:49:57,513 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:57,597 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:57,598 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:57,598 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:57,599 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:57,613 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:57,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:57,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:49:57,613 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,616 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,621 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 44 transitions. [2020-04-18 15:49:57,621 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,648 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:57,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:57,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:57,649 INFO L87 Difference]: Start difference. First operand 104 states and 180 transitions. Second operand 7 states. [2020-04-18 15:49:57,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,690 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:57,690 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:57,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,691 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:57,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,692 INFO L82 PathProgramCache]: Analyzing trace with hash 72758744, now seen corresponding path program 5 times [2020-04-18 15:49:57,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,692 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154120873] [2020-04-18 15:49:57,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:57,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:57,730 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:57,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154120873] [2020-04-18 15:49:57,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1236171672] [2020-04-18 15:49:57,731 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:57,801 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:49:57,801 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:57,802 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:49:57,803 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:57,815 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:49:57,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:57,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:49:57,816 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:57,818 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:57,823 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 55 transitions. [2020-04-18 15:49:57,823 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:57,889 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:49:57,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:49:57,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=187, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:49:57,890 INFO L87 Difference]: Start difference. First operand 111 states and 184 transitions. Second operand 12 states. [2020-04-18 15:49:57,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:57,998 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:57,998 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:57,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:57,998 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:49:57,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:57,999 INFO L82 PathProgramCache]: Analyzing trace with hash -150471558, now seen corresponding path program 6 times [2020-04-18 15:49:57,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:57,999 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923766770] [2020-04-18 15:49:57,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:58,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:58,045 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:58,046 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1923766770] [2020-04-18 15:49:58,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:58,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:49:58,046 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:58,048 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:58,051 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:49:58,052 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:58,071 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:58,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:58,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=356, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:49:58,072 INFO L87 Difference]: Start difference. First operand 111 states and 184 transitions. Second operand 7 states. [2020-04-18 15:49:58,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:58,151 INFO L93 Difference]: Finished difference Result 111 states and 184 transitions. [2020-04-18 15:49:58,151 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 184 transitions. [2020-04-18 15:49:58,152 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:49:58,152 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [642052544] [2020-04-18 15:49:58,152 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:49:58,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:49:58,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [642052544] [2020-04-18 15:49:58,153 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2020-04-18 15:49:58,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:49:58,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:49:58,154 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=542, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:49:58,154 INFO L87 Difference]: Start difference. First operand 8496 states and 38896 transitions. Second operand 14 states. [2020-04-18 15:49:58,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:58,700 INFO L93 Difference]: Finished difference Result 24945 states and 96342 transitions. [2020-04-18 15:49:58,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:49:58,701 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 23 [2020-04-18 15:49:58,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:49:58,753 INFO L225 Difference]: With dead ends: 24945 [2020-04-18 15:49:58,753 INFO L226 Difference]: Without dead ends: 24844 [2020-04-18 15:49:58,753 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 163 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=409, Invalid=1151, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:49:58,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24844 states. [2020-04-18 15:49:59,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24844 to 8914. [2020-04-18 15:49:59,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8914 states. [2020-04-18 15:49:59,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8914 states to 8914 states and 40728 transitions. [2020-04-18 15:49:59,125 INFO L78 Accepts]: Start accepts. Automaton has 8914 states and 40728 transitions. Word has length 23 [2020-04-18 15:49:59,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:49:59,125 INFO L479 AbstractCegarLoop]: Abstraction has 8914 states and 40728 transitions. [2020-04-18 15:49:59,126 INFO L480 AbstractCegarLoop]: Interpolant automaton has 14 states. [2020-04-18 15:49:59,126 INFO L276 IsEmpty]: Start isEmpty. Operand 8914 states and 40728 transitions. [2020-04-18 15:49:59,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:59,127 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:49:59,127 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:49:59,531 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 24 z3 -smt2 -in SMTLIB2_COMPLIANT=true,23 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:59,531 INFO L427 AbstractCegarLoop]: === Iteration 12 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:49:59,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:59,532 INFO L82 PathProgramCache]: Analyzing trace with hash -328675496, now seen corresponding path program 1 times [2020-04-18 15:49:59,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:49:59,532 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [829869587] [2020-04-18 15:49:59,534 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:59,535 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 123 transitions. [2020-04-18 15:49:59,536 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states. [2020-04-18 15:49:59,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:59,536 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:49:59,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:59,536 INFO L82 PathProgramCache]: Analyzing trace with hash -1334245862, now seen corresponding path program 2 times [2020-04-18 15:49:59,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:59,536 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505391477] [2020-04-18 15:49:59,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:59,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:59,544 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:59,544 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505391477] [2020-04-18 15:49:59,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:59,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:49:59,544 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:59,546 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:59,551 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 86 transitions. [2020-04-18 15:49:59,551 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:59,554 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:49:59,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:49:59,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:49:59,555 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 3 states. [2020-04-18 15:49:59,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:59,561 INFO L93 Difference]: Finished difference Result 77 states and 131 transitions. [2020-04-18 15:49:59,561 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 131 transitions. [2020-04-18 15:49:59,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:59,562 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:49:59,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:59,562 INFO L82 PathProgramCache]: Analyzing trace with hash -328925126, now seen corresponding path program 3 times [2020-04-18 15:49:59,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:59,563 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734826777] [2020-04-18 15:49:59,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:59,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:59,589 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:49:59,589 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734826777] [2020-04-18 15:49:59,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:49:59,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:49:59,590 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:59,724 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:59,727 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 36 transitions. [2020-04-18 15:49:59,727 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:59,734 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:49:59,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:49:59,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:49:59,735 INFO L87 Difference]: Start difference. First operand 77 states and 131 transitions. Second operand 5 states. [2020-04-18 15:49:59,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:59,765 INFO L93 Difference]: Finished difference Result 84 states and 136 transitions. [2020-04-18 15:49:59,765 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 136 transitions. [2020-04-18 15:49:59,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:59,766 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:49:59,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:59,766 INFO L82 PathProgramCache]: Analyzing trace with hash -328925666, now seen corresponding path program 4 times [2020-04-18 15:49:59,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:59,767 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552570304] [2020-04-18 15:49:59,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:59,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:49:59,798 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:59,799 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552570304] [2020-04-18 15:49:59,799 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [394742992] [2020-04-18 15:49:59,799 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:49:59,878 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:49:59,878 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:49:59,879 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:49:59,879 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:49:59,889 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:49:59,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:49:59,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:49:59,890 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:49:59,891 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:49:59,894 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 36 transitions. [2020-04-18 15:49:59,895 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:49:59,912 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:49:59,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:49:59,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:49:59,913 INFO L87 Difference]: Start difference. First operand 84 states and 136 transitions. Second operand 7 states. [2020-04-18 15:49:59,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:49:59,955 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:49:59,955 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:49:59,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:49:59,956 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:49:59,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:49:59,958 INFO L82 PathProgramCache]: Analyzing trace with hash -328675496, now seen corresponding path program 5 times [2020-04-18 15:49:59,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:49:59,958 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132500655] [2020-04-18 15:49:59,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:49:59,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:00,003 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:00,003 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132500655] [2020-04-18 15:50:00,003 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1858162863] [2020-04-18 15:50:00,004 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:00,086 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:00,087 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:00,087 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:00,088 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:00,101 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:00,102 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:00,102 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:00,102 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:00,104 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:00,108 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 39 transitions. [2020-04-18 15:50:00,108 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:00,137 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:50:00,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:00,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=166, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:50:00,138 INFO L87 Difference]: Start difference. First operand 91 states and 140 transitions. Second operand 11 states. [2020-04-18 15:50:00,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:00,234 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:50:00,234 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:50:00,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:50:00,235 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:00,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:00,235 INFO L82 PathProgramCache]: Analyzing trace with hash -150449920, now seen corresponding path program 6 times [2020-04-18 15:50:00,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:00,236 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [389520675] [2020-04-18 15:50:00,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:00,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:00,283 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:00,283 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [389520675] [2020-04-18 15:50:00,284 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:00,284 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:00,284 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:00,285 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:00,289 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:50:00,289 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:00,304 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:00,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:00,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=326, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:50:00,304 INFO L87 Difference]: Start difference. First operand 91 states and 140 transitions. Second operand 7 states. [2020-04-18 15:50:00,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:00,377 INFO L93 Difference]: Finished difference Result 91 states and 140 transitions. [2020-04-18 15:50:00,377 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 140 transitions. [2020-04-18 15:50:00,377 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:00,378 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [829869587] [2020-04-18 15:50:00,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:00,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:00,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [829869587] [2020-04-18 15:50:00,379 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:50:00,379 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:00,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:00,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=505, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:50:00,379 INFO L87 Difference]: Start difference. First operand 8914 states and 40728 transitions. Second operand 13 states. [2020-04-18 15:50:00,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:00,933 INFO L93 Difference]: Finished difference Result 25403 states and 98232 transitions. [2020-04-18 15:50:00,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:50:00,934 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2020-04-18 15:50:00,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:00,987 INFO L225 Difference]: With dead ends: 25403 [2020-04-18 15:50:00,987 INFO L226 Difference]: Without dead ends: 25289 [2020-04-18 15:50:00,987 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 411 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=383, Invalid=1099, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:50:01,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25289 states. [2020-04-18 15:50:01,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25289 to 9426. [2020-04-18 15:50:01,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9426 states. [2020-04-18 15:50:01,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9426 states to 9426 states and 43057 transitions. [2020-04-18 15:50:01,366 INFO L78 Accepts]: Start accepts. Automaton has 9426 states and 43057 transitions. Word has length 23 [2020-04-18 15:50:01,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:01,366 INFO L479 AbstractCegarLoop]: Abstraction has 9426 states and 43057 transitions. [2020-04-18 15:50:01,366 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:50:01,366 INFO L276 IsEmpty]: Start isEmpty. Operand 9426 states and 43057 transitions. [2020-04-18 15:50:01,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:01,368 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:01,368 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:01,769 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 z3 -smt2 -in SMTLIB2_COMPLIANT=true,25 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:01,770 INFO L427 AbstractCegarLoop]: === Iteration 13 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:01,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:01,770 INFO L82 PathProgramCache]: Analyzing trace with hash -156736363, now seen corresponding path program 1 times [2020-04-18 15:50:01,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:01,771 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [757036779] [2020-04-18 15:50:01,772 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:01,778 INFO L259 McrAutomatonBuilder]: Finished intersection with 232 states and 609 transitions. [2020-04-18 15:50:01,779 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states. [2020-04-18 15:50:01,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:01,780 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:01,780 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:01,780 INFO L82 PathProgramCache]: Analyzing trace with hash 825478653, now seen corresponding path program 2 times [2020-04-18 15:50:01,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:01,780 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1118869927] [2020-04-18 15:50:01,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:01,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:01,789 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:01,790 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1118869927] [2020-04-18 15:50:01,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:01,790 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:01,790 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:01,792 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:01,802 INFO L259 McrAutomatonBuilder]: Finished intersection with 89 states and 163 transitions. [2020-04-18 15:50:01,802 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:01,804 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:01,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:01,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:01,805 INFO L87 Difference]: Start difference. First operand 232 states. Second operand 3 states. [2020-04-18 15:50:01,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:01,816 INFO L93 Difference]: Finished difference Result 295 states and 715 transitions. [2020-04-18 15:50:01,817 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 715 transitions. [2020-04-18 15:50:01,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:01,817 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:01,818 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:01,818 INFO L82 PathProgramCache]: Analyzing trace with hash 783331315, now seen corresponding path program 3 times [2020-04-18 15:50:01,818 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:01,818 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [15949421] [2020-04-18 15:50:01,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:01,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:01,835 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:01,836 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [15949421] [2020-04-18 15:50:01,836 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:01,836 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:01,836 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:01,838 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:01,847 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 148 transitions. [2020-04-18 15:50:01,847 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:01,855 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:01,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:01,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:01,856 INFO L87 Difference]: Start difference. First operand 295 states and 715 transitions. Second operand 5 states. [2020-04-18 15:50:01,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:01,909 INFO L93 Difference]: Finished difference Result 386 states and 864 transitions. [2020-04-18 15:50:01,910 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 864 transitions. [2020-04-18 15:50:01,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:01,911 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:01,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:01,911 INFO L82 PathProgramCache]: Analyzing trace with hash 145278167, now seen corresponding path program 4 times [2020-04-18 15:50:01,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:01,912 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1512984426] [2020-04-18 15:50:01,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:01,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:01,951 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:01,951 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1512984426] [2020-04-18 15:50:01,951 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1329822451] [2020-04-18 15:50:01,951 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:02,026 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:02,026 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:02,026 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:02,027 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:02,046 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:02,046 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:02,046 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:50:02,047 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,048 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,055 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 94 transitions. [2020-04-18 15:50:02,056 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,076 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:02,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:02,077 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:50:02,077 INFO L87 Difference]: Start difference. First operand 386 states and 864 transitions. Second operand 9 states. [2020-04-18 15:50:02,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,273 INFO L93 Difference]: Finished difference Result 428 states and 916 transitions. [2020-04-18 15:50:02,273 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 916 transitions. [2020-04-18 15:50:02,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:02,274 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:02,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,274 INFO L82 PathProgramCache]: Analyzing trace with hash 145277147, now seen corresponding path program 5 times [2020-04-18 15:50:02,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,274 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830192705] [2020-04-18 15:50:02,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,304 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:02,304 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830192705] [2020-04-18 15:50:02,304 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1350448581] [2020-04-18 15:50:02,305 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:02,379 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:02,380 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:02,380 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:02,381 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:02,393 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:02,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:02,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:02,394 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,395 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,404 INFO L259 McrAutomatonBuilder]: Finished intersection with 61 states and 94 transitions. [2020-04-18 15:50:02,404 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:02,411 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:02,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:02,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:50:02,412 INFO L87 Difference]: Start difference. First operand 428 states and 916 transitions. Second operand 9 states. [2020-04-18 15:50:02,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:02,614 INFO L93 Difference]: Finished difference Result 485 states and 974 transitions. [2020-04-18 15:50:02,614 INFO L276 IsEmpty]: Start isEmpty. Operand 485 states and 974 transitions. [2020-04-18 15:50:02,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:02,615 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:02,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:02,615 INFO L82 PathProgramCache]: Analyzing trace with hash 145051157, now seen corresponding path program 6 times [2020-04-18 15:50:02,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:02,616 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245904530] [2020-04-18 15:50:02,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:02,662 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:02,662 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245904530] [2020-04-18 15:50:02,663 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [870998541] [2020-04-18 15:50:02,663 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:02,742 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:50:02,742 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:02,743 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:02,743 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:02,758 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:50:02,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:02,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:02,759 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:02,761 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:02,771 INFO L259 McrAutomatonBuilder]: Finished intersection with 66 states and 105 transitions. [2020-04-18 15:50:02,771 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:03,032 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 9 times. [2020-04-18 15:50:03,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:50:03,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=227, Invalid=585, Unknown=0, NotChecked=0, Total=812 [2020-04-18 15:50:03,033 INFO L87 Difference]: Start difference. First operand 485 states and 974 transitions. Second operand 14 states. [2020-04-18 15:50:03,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:03,548 INFO L93 Difference]: Finished difference Result 492 states and 979 transitions. [2020-04-18 15:50:03,548 INFO L276 IsEmpty]: Start isEmpty. Operand 492 states and 979 transitions. [2020-04-18 15:50:03,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:03,549 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:50:03,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:03,549 INFO L82 PathProgramCache]: Analyzing trace with hash -78179145, now seen corresponding path program 7 times [2020-04-18 15:50:03,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:03,550 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395534278] [2020-04-18 15:50:03,550 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:03,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:03,593 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:03,593 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395534278] [2020-04-18 15:50:03,593 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [312309796] [2020-04-18 15:50:03,593 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:03,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:03,668 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:03,668 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:03,691 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:03,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:03,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:03,692 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:03,694 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:03,704 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:50:03,704 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:03,715 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:03,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:03,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:50:03,716 INFO L87 Difference]: Start difference. First operand 492 states and 979 transitions. Second operand 11 states. [2020-04-18 15:50:04,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:04,169 INFO L93 Difference]: Finished difference Result 499 states and 984 transitions. [2020-04-18 15:50:04,169 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 984 transitions. [2020-04-18 15:50:04,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:04,170 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:50:04,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:04,170 INFO L82 PathProgramCache]: Analyzing trace with hash 1419407101, now seen corresponding path program 8 times [2020-04-18 15:50:04,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:04,171 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [864079245] [2020-04-18 15:50:04,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:04,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:04,200 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:04,200 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [864079245] [2020-04-18 15:50:04,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:04,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:50:04,201 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:04,202 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:04,208 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:50:04,208 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:04,232 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:04,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:04,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=764, Invalid=2776, Unknown=0, NotChecked=0, Total=3540 [2020-04-18 15:50:04,233 INFO L87 Difference]: Start difference. First operand 499 states and 984 transitions. Second operand 7 states. [2020-04-18 15:50:04,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:04,418 INFO L93 Difference]: Finished difference Result 535 states and 1019 transitions. [2020-04-18 15:50:04,418 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1019 transitions. [2020-04-18 15:50:04,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:04,419 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:50:04,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:04,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1418867611, now seen corresponding path program 9 times [2020-04-18 15:50:04,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:04,420 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63861692] [2020-04-18 15:50:04,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:04,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:04,453 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:04,453 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63861692] [2020-04-18 15:50:04,453 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [526013892] [2020-04-18 15:50:04,453 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:04,529 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2020-04-18 15:50:04,529 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:04,530 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:04,530 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:04,541 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:04,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:04,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:04,541 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:04,543 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:04,548 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:50:04,549 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:04,584 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:04,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:04,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=913, Invalid=3917, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 15:50:04,585 INFO L87 Difference]: Start difference. First operand 535 states and 1019 transitions. Second operand 9 states. [2020-04-18 15:50:04,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:04,790 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:50:04,790 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:50:04,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:04,791 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:50:04,791 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:04,791 INFO L82 PathProgramCache]: Analyzing trace with hash 1211690581, now seen corresponding path program 10 times [2020-04-18 15:50:04,791 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:04,792 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911566480] [2020-04-18 15:50:04,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:04,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:04,855 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:04,856 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911566480] [2020-04-18 15:50:04,856 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1018778638] [2020-04-18 15:50:04,856 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:04,928 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:04,928 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:04,929 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:04,929 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:04,943 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:04,944 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:04,944 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:04,944 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:04,945 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:04,954 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:50:04,954 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:05,107 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 24 times. [2020-04-18 15:50:05,108 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2020-04-18 15:50:05,109 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1251, Invalid=5391, Unknown=0, NotChecked=0, Total=6642 [2020-04-18 15:50:05,109 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 20 states. [2020-04-18 15:50:05,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:05,864 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:50:05,864 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:50:05,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:05,865 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:50:05,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:05,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1201691221, now seen corresponding path program 11 times [2020-04-18 15:50:05,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:05,867 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571244329] [2020-04-18 15:50:05,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:05,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:05,908 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:05,908 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571244329] [2020-04-18 15:50:05,909 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2076927898] [2020-04-18 15:50:05,909 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:05,985 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:05,985 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:05,986 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:05,987 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:06,001 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:06,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:06,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:06,001 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:06,003 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:06,011 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:50:06,011 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:06,043 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:06,043 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:50:06,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1635, Invalid=7295, Unknown=0, NotChecked=0, Total=8930 [2020-04-18 15:50:06,044 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 14 states. [2020-04-18 15:50:06,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:06,731 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:50:06,732 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:50:06,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:06,733 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:50:06,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:06,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1440199159, now seen corresponding path program 12 times [2020-04-18 15:50:06,733 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:06,733 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587336437] [2020-04-18 15:50:06,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:06,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:06,803 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:06,804 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [587336437] [2020-04-18 15:50:06,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:06,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:06,804 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:06,807 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:06,813 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:06,814 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:06,814 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:06,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:06,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2139, Invalid=10293, Unknown=0, NotChecked=0, Total=12432 [2020-04-18 15:50:06,816 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 9 states. [2020-04-18 15:50:07,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:07,203 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:50:07,203 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:50:07,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:07,204 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:50:07,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:07,205 INFO L82 PathProgramCache]: Analyzing trace with hash 1425735799, now seen corresponding path program 13 times [2020-04-18 15:50:07,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:07,205 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494161669] [2020-04-18 15:50:07,205 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:07,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:07,250 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:07,250 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1494161669] [2020-04-18 15:50:07,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:07,251 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:07,251 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:07,253 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:07,258 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:07,258 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:07,258 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:07,258 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:07,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2519, Invalid=12733, Unknown=0, NotChecked=0, Total=15252 [2020-04-18 15:50:07,260 INFO L87 Difference]: Start difference. First operand 602 states and 1108 transitions. Second operand 9 states. [2020-04-18 15:50:07,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:07,741 INFO L93 Difference]: Finished difference Result 602 states and 1108 transitions. [2020-04-18 15:50:07,741 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 1108 transitions. [2020-04-18 15:50:07,742 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:07,743 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [757036779] [2020-04-18 15:50:07,743 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:07,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:50:07,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [757036779] [2020-04-18 15:50:07,744 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2020-04-18 15:50:07,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:07,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-04-18 15:50:07,746 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3000, Invalid=16182, Unknown=0, NotChecked=0, Total=19182 [2020-04-18 15:50:07,746 INFO L87 Difference]: Start difference. First operand 9426 states and 43057 transitions. Second operand 27 states. [2020-04-18 15:50:12,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:12,427 INFO L93 Difference]: Finished difference Result 48582 states and 167110 transitions. [2020-04-18 15:50:12,428 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:50:12,428 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 25 [2020-04-18 15:50:12,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:12,563 INFO L225 Difference]: With dead ends: 48582 [2020-04-18 15:50:12,564 INFO L226 Difference]: Without dead ends: 48341 [2020-04-18 15:50:12,569 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 812 GetRequests, 556 SyntacticMatches, 5 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27287 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=8784, Invalid=54972, Unknown=0, NotChecked=0, Total=63756 [2020-04-18 15:50:12,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48341 states. [2020-04-18 15:50:13,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48341 to 8476. [2020-04-18 15:50:13,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8476 states. [2020-04-18 15:50:13,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8476 states to 8476 states and 38671 transitions. [2020-04-18 15:50:13,428 INFO L78 Accepts]: Start accepts. Automaton has 8476 states and 38671 transitions. Word has length 25 [2020-04-18 15:50:13,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:13,428 INFO L479 AbstractCegarLoop]: Abstraction has 8476 states and 38671 transitions. [2020-04-18 15:50:13,428 INFO L480 AbstractCegarLoop]: Interpolant automaton has 27 states. [2020-04-18 15:50:13,428 INFO L276 IsEmpty]: Start isEmpty. Operand 8476 states and 38671 transitions. [2020-04-18 15:50:13,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:13,430 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:13,430 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:14,832 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 33 z3 -smt2 -in SMTLIB2_COMPLIANT=true,28 z3 -smt2 -in SMTLIB2_COMPLIANT=true,30 z3 -smt2 -in SMTLIB2_COMPLIANT=true,32 z3 -smt2 -in SMTLIB2_COMPLIANT=true,27 z3 -smt2 -in SMTLIB2_COMPLIANT=true,29 z3 -smt2 -in SMTLIB2_COMPLIANT=true,31 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:14,834 INFO L427 AbstractCegarLoop]: === Iteration 14 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:14,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:14,834 INFO L82 PathProgramCache]: Analyzing trace with hash -558170603, now seen corresponding path program 1 times [2020-04-18 15:50:14,835 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:14,835 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [855277545] [2020-04-18 15:50:14,836 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:14,840 INFO L259 McrAutomatonBuilder]: Finished intersection with 184 states and 457 transitions. [2020-04-18 15:50:14,841 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states. [2020-04-18 15:50:14,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:14,841 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:14,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:14,841 INFO L82 PathProgramCache]: Analyzing trace with hash 1772610045, now seen corresponding path program 2 times [2020-04-18 15:50:14,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:14,842 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1291456492] [2020-04-18 15:50:14,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:14,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:14,849 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:14,849 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1291456492] [2020-04-18 15:50:14,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:14,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:14,850 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:14,851 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:14,861 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 155 transitions. [2020-04-18 15:50:14,861 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:14,863 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:14,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:14,863 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:14,864 INFO L87 Difference]: Start difference. First operand 184 states. Second operand 3 states. [2020-04-18 15:50:14,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:14,874 INFO L93 Difference]: Finished difference Result 231 states and 531 transitions. [2020-04-18 15:50:14,875 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 531 transitions. [2020-04-18 15:50:14,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:14,875 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:14,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:14,876 INFO L82 PathProgramCache]: Analyzing trace with hash -111158227, now seen corresponding path program 3 times [2020-04-18 15:50:14,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:14,876 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780886756] [2020-04-18 15:50:14,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:14,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:14,913 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:14,913 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780886756] [2020-04-18 15:50:14,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:14,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:14,914 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:14,916 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:14,927 INFO L259 McrAutomatonBuilder]: Finished intersection with 75 states and 128 transitions. [2020-04-18 15:50:14,928 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:14,941 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:14,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:14,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:14,942 INFO L87 Difference]: Start difference. First operand 231 states and 531 transitions. Second operand 5 states. [2020-04-18 15:50:14,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:14,995 INFO L93 Difference]: Finished difference Result 294 states and 632 transitions. [2020-04-18 15:50:14,995 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 632 transitions. [2020-04-18 15:50:14,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:14,996 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:14,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:14,997 INFO L82 PathProgramCache]: Analyzing trace with hash -558420233, now seen corresponding path program 4 times [2020-04-18 15:50:14,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:14,997 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375572414] [2020-04-18 15:50:14,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,048 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:15,048 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375572414] [2020-04-18 15:50:15,049 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1137639645] [2020-04-18 15:50:15,049 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:15,169 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:15,169 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:15,170 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:15,171 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:15,211 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:15,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:15,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:50:15,212 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,216 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,233 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 86 transitions. [2020-04-18 15:50:15,233 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,269 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:15,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:15,270 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=73, Unknown=0, NotChecked=0, Total=110 [2020-04-18 15:50:15,270 INFO L87 Difference]: Start difference. First operand 294 states and 632 transitions. Second operand 9 states. [2020-04-18 15:50:15,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,519 INFO L93 Difference]: Finished difference Result 336 states and 684 transitions. [2020-04-18 15:50:15,519 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 684 transitions. [2020-04-18 15:50:15,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:15,521 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:15,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,521 INFO L82 PathProgramCache]: Analyzing trace with hash -558420773, now seen corresponding path program 5 times [2020-04-18 15:50:15,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,522 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388217239] [2020-04-18 15:50:15,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,582 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:15,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388217239] [2020-04-18 15:50:15,583 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1332128758] [2020-04-18 15:50:15,583 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:15,699 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:15,700 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:15,701 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:15,701 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:15,731 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:15,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:15,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:15,732 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:15,734 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:15,746 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 86 transitions. [2020-04-18 15:50:15,746 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:15,759 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:15,759 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:15,759 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:50:15,759 INFO L87 Difference]: Start difference. First operand 336 states and 684 transitions. Second operand 9 states. [2020-04-18 15:50:15,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:15,946 INFO L93 Difference]: Finished difference Result 389 states and 738 transitions. [2020-04-18 15:50:15,946 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 738 transitions. [2020-04-18 15:50:15,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:15,947 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:15,947 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:15,947 INFO L82 PathProgramCache]: Analyzing trace with hash -558170603, now seen corresponding path program 6 times [2020-04-18 15:50:15,947 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:15,947 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972920769] [2020-04-18 15:50:15,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:15,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:15,994 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:15,994 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1972920769] [2020-04-18 15:50:15,994 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1672291842] [2020-04-18 15:50:15,995 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:16,075 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:50:16,075 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:16,076 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:16,077 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:16,090 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:16,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:16,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:16,091 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:16,092 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:16,100 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:50:16,101 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:16,149 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:50:16,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:16,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=207, Invalid=549, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:50:16,150 INFO L87 Difference]: Start difference. First operand 389 states and 738 transitions. Second operand 13 states. [2020-04-18 15:50:16,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:16,651 INFO L93 Difference]: Finished difference Result 396 states and 743 transitions. [2020-04-18 15:50:16,651 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 743 transitions. [2020-04-18 15:50:16,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:16,652 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:50:16,652 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:16,653 INFO L82 PathProgramCache]: Analyzing trace with hash -379945027, now seen corresponding path program 7 times [2020-04-18 15:50:16,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:16,653 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088109834] [2020-04-18 15:50:16,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:16,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:16,695 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:16,695 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088109834] [2020-04-18 15:50:16,695 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1766154360] [2020-04-18 15:50:16,696 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:16,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:16,777 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:16,778 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:16,793 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:50:16,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:16,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:16,794 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:16,795 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:16,803 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:50:16,803 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:16,812 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:16,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:16,812 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=1371, Unknown=0, NotChecked=0, Total=1806 [2020-04-18 15:50:16,813 INFO L87 Difference]: Start difference. First operand 396 states and 743 transitions. Second operand 11 states. [2020-04-18 15:50:17,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:17,253 INFO L93 Difference]: Finished difference Result 403 states and 748 transitions. [2020-04-18 15:50:17,253 INFO L276 IsEmpty]: Start isEmpty. Operand 403 states and 748 transitions. [2020-04-18 15:50:17,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:17,254 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:50:17,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:17,255 INFO L82 PathProgramCache]: Analyzing trace with hash 1730092701, now seen corresponding path program 8 times [2020-04-18 15:50:17,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:17,255 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120929044] [2020-04-18 15:50:17,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:17,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:17,314 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:17,314 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120929044] [2020-04-18 15:50:17,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:17,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:50:17,315 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:17,318 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:17,324 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:50:17,325 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:17,363 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:17,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:17,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=728, Invalid=2694, Unknown=0, NotChecked=0, Total=3422 [2020-04-18 15:50:17,364 INFO L87 Difference]: Start difference. First operand 403 states and 748 transitions. Second operand 7 states. [2020-04-18 15:50:17,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:17,574 INFO L93 Difference]: Finished difference Result 439 states and 783 transitions. [2020-04-18 15:50:17,574 INFO L276 IsEmpty]: Start isEmpty. Operand 439 states and 783 transitions. [2020-04-18 15:50:17,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:17,575 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:50:17,575 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:17,575 INFO L82 PathProgramCache]: Analyzing trace with hash 1730029851, now seen corresponding path program 9 times [2020-04-18 15:50:17,575 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:17,576 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414154971] [2020-04-18 15:50:17,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:17,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:17,615 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:17,615 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414154971] [2020-04-18 15:50:17,615 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1083052295] [2020-04-18 15:50:17,616 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:17,697 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:17,698 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:17,699 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:17,700 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:17,734 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:17,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:17,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:17,735 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:17,737 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:17,745 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:50:17,745 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:17,784 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:50:17,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:17,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=870, Invalid=3822, Unknown=0, NotChecked=0, Total=4692 [2020-04-18 15:50:17,785 INFO L87 Difference]: Start difference. First operand 439 states and 783 transitions. Second operand 9 states. [2020-04-18 15:50:17,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:17,965 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:50:17,965 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:50:17,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:17,966 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:50:17,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:17,966 INFO L82 PathProgramCache]: Analyzing trace with hash 1980442581, now seen corresponding path program 10 times [2020-04-18 15:50:17,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:17,966 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [209394409] [2020-04-18 15:50:17,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:17,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:18,007 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:18,007 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [209394409] [2020-04-18 15:50:18,007 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1386937744] [2020-04-18 15:50:18,008 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:18,081 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:18,081 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:18,082 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:18,082 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:18,099 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:18,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:18,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:18,100 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:18,101 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:18,107 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:50:18,108 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:18,204 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 14 times. [2020-04-18 15:50:18,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:50:18,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1121, Invalid=5041, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:50:18,205 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 17 states. [2020-04-18 15:50:18,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:18,851 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:50:18,851 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:50:18,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:18,852 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:50:18,853 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:18,853 INFO L82 PathProgramCache]: Analyzing trace with hash 1970443221, now seen corresponding path program 11 times [2020-04-18 15:50:18,853 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:18,854 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370581508] [2020-04-18 15:50:18,854 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:18,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:18,895 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:18,895 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370581508] [2020-04-18 15:50:18,896 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [856036597] [2020-04-18 15:50:18,896 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:18,969 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:18,969 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:18,969 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:18,970 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:18,982 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:18,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:18,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:18,983 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:18,984 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:18,990 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:50:18,990 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:19,004 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:50:19,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:19,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=6887, Unknown=0, NotChecked=0, Total=8372 [2020-04-18 15:50:19,005 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 13 states. [2020-04-18 15:50:19,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:19,617 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:50:19,617 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:50:19,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:19,619 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:50:19,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:19,619 INFO L82 PathProgramCache]: Analyzing trace with hash 1440220797, now seen corresponding path program 12 times [2020-04-18 15:50:19,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:19,620 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233696811] [2020-04-18 15:50:19,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:19,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:19,679 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:19,679 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233696811] [2020-04-18 15:50:19,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:19,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:19,680 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:19,682 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:19,688 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:19,688 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:19,688 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:19,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:19,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1970, Invalid=9802, Unknown=0, NotChecked=0, Total=11772 [2020-04-18 15:50:19,690 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 9 states. [2020-04-18 15:50:20,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:20,206 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:50:20,206 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:50:20,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:20,207 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:50:20,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:20,207 INFO L82 PathProgramCache]: Analyzing trace with hash 1446529917, now seen corresponding path program 13 times [2020-04-18 15:50:20,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:20,208 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [5712626] [2020-04-18 15:50:20,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:20,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:20,249 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:20,250 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [5712626] [2020-04-18 15:50:20,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:20,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:20,250 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:20,252 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:20,258 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:20,258 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:20,258 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:20,259 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:20,259 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2330, Invalid=12190, Unknown=0, NotChecked=0, Total=14520 [2020-04-18 15:50:20,260 INFO L87 Difference]: Start difference. First operand 494 states and 848 transitions. Second operand 9 states. [2020-04-18 15:50:20,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:20,929 INFO L93 Difference]: Finished difference Result 494 states and 848 transitions. [2020-04-18 15:50:20,930 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 848 transitions. [2020-04-18 15:50:20,931 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:20,932 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [855277545] [2020-04-18 15:50:20,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:20,933 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:50:20,933 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [855277545] [2020-04-18 15:50:20,934 INFO L459 AbstractCegarLoop]: Interpolant automaton has 24 states [2020-04-18 15:50:20,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:20,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2020-04-18 15:50:20,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2794, Invalid=15566, Unknown=0, NotChecked=0, Total=18360 [2020-04-18 15:50:20,936 INFO L87 Difference]: Start difference. First operand 8476 states and 38671 transitions. Second operand 24 states. [2020-04-18 15:50:24,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:24,966 INFO L93 Difference]: Finished difference Result 46283 states and 159277 transitions. [2020-04-18 15:50:24,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:50:24,967 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 25 [2020-04-18 15:50:24,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:25,063 INFO L225 Difference]: With dead ends: 46283 [2020-04-18 15:50:25,064 INFO L226 Difference]: Without dead ends: 46035 [2020-04-18 15:50:25,067 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 797 GetRequests, 549 SyntacticMatches, 0 SemanticMatches, 248 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26371 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=8309, Invalid=53941, Unknown=0, NotChecked=0, Total=62250 [2020-04-18 15:50:25,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46035 states. [2020-04-18 15:50:25,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46035 to 7590. [2020-04-18 15:50:25,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7590 states. [2020-04-18 15:50:25,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7590 states to 7590 states and 34684 transitions. [2020-04-18 15:50:25,770 INFO L78 Accepts]: Start accepts. Automaton has 7590 states and 34684 transitions. Word has length 25 [2020-04-18 15:50:25,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:25,771 INFO L479 AbstractCegarLoop]: Abstraction has 7590 states and 34684 transitions. [2020-04-18 15:50:25,771 INFO L480 AbstractCegarLoop]: Interpolant automaton has 24 states. [2020-04-18 15:50:25,771 INFO L276 IsEmpty]: Start isEmpty. Operand 7590 states and 34684 transitions. [2020-04-18 15:50:25,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:25,773 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:25,773 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:27,176 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 z3 -smt2 -in SMTLIB2_COMPLIANT=true,38 z3 -smt2 -in SMTLIB2_COMPLIANT=true,37 z3 -smt2 -in SMTLIB2_COMPLIANT=true,40 z3 -smt2 -in SMTLIB2_COMPLIANT=true,34 z3 -smt2 -in SMTLIB2_COMPLIANT=true,39 z3 -smt2 -in SMTLIB2_COMPLIANT=true,36 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:27,178 INFO L427 AbstractCegarLoop]: === Iteration 15 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:27,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1201697793, now seen corresponding path program 1 times [2020-04-18 15:50:27,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:27,179 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [64594067] [2020-04-18 15:50:27,180 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,184 INFO L259 McrAutomatonBuilder]: Finished intersection with 168 states and 417 transitions. [2020-04-18 15:50:27,185 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states. [2020-04-18 15:50:27,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:27,185 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:27,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1380847073, now seen corresponding path program 2 times [2020-04-18 15:50:27,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:27,186 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329532631] [2020-04-18 15:50:27,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:27,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:27,196 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:27,196 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329532631] [2020-04-18 15:50:27,196 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:27,196 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:27,196 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:27,198 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,211 INFO L259 McrAutomatonBuilder]: Finished intersection with 89 states and 182 transitions. [2020-04-18 15:50:27,211 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:27,214 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:27,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:27,215 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:27,215 INFO L87 Difference]: Start difference. First operand 168 states. Second operand 3 states. [2020-04-18 15:50:27,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:27,224 INFO L93 Difference]: Finished difference Result 211 states and 487 transitions. [2020-04-18 15:50:27,224 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 487 transitions. [2020-04-18 15:50:27,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:27,225 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:27,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,225 INFO L82 PathProgramCache]: Analyzing trace with hash 181846743, now seen corresponding path program 3 times [2020-04-18 15:50:27,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:27,225 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [444897724] [2020-04-18 15:50:27,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:27,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:27,255 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:27,256 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [444897724] [2020-04-18 15:50:27,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:27,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:50:27,256 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:27,258 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,267 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:50:27,268 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:27,276 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:27,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:27,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:27,276 INFO L87 Difference]: Start difference. First operand 211 states and 487 transitions. Second operand 5 states. [2020-04-18 15:50:27,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:27,326 INFO L93 Difference]: Finished difference Result 246 states and 540 transitions. [2020-04-18 15:50:27,326 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 540 transitions. [2020-04-18 15:50:27,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:27,327 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:27,327 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,328 INFO L82 PathProgramCache]: Analyzing trace with hash 181830003, now seen corresponding path program 4 times [2020-04-18 15:50:27,328 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:27,328 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466202379] [2020-04-18 15:50:27,328 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:27,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:27,347 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:27,347 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466202379] [2020-04-18 15:50:27,347 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1176377550] [2020-04-18 15:50:27,347 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:27,421 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:27,421 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:27,422 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:27,422 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:27,435 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:27,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:27,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 6 [2020-04-18 15:50:27,436 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:27,438 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,445 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:50:27,445 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:27,464 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:50:27,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:27,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2020-04-18 15:50:27,465 INFO L87 Difference]: Start difference. First operand 246 states and 540 transitions. Second operand 7 states. [2020-04-18 15:50:27,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:27,541 INFO L93 Difference]: Finished difference Result 331 states and 661 transitions. [2020-04-18 15:50:27,541 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 661 transitions. [2020-04-18 15:50:27,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:27,542 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:27,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,542 INFO L82 PathProgramCache]: Analyzing trace with hash 181828983, now seen corresponding path program 5 times [2020-04-18 15:50:27,543 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:27,543 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621097461] [2020-04-18 15:50:27,543 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:27,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:27,561 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:27,561 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621097461] [2020-04-18 15:50:27,561 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [795549946] [2020-04-18 15:50:27,561 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:27,635 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:27,635 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:27,636 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:27,636 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:27,645 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:27,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:27,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 5 [2020-04-18 15:50:27,646 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:27,648 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,655 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 82 transitions. [2020-04-18 15:50:27,655 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:27,670 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:27,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:27,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2020-04-18 15:50:27,670 INFO L87 Difference]: Start difference. First operand 331 states and 661 transitions. Second operand 7 states. [2020-04-18 15:50:27,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:27,742 INFO L93 Difference]: Finished difference Result 442 states and 794 transitions. [2020-04-18 15:50:27,742 INFO L276 IsEmpty]: Start isEmpty. Operand 442 states and 794 transitions. [2020-04-18 15:50:27,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:27,743 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:50:27,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:27,743 INFO L82 PathProgramCache]: Analyzing trace with hash 189585273, now seen corresponding path program 6 times [2020-04-18 15:50:27,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:27,743 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1420830805] [2020-04-18 15:50:27,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:27,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:27,771 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:27,772 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1420830805] [2020-04-18 15:50:27,772 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [471891910] [2020-04-18 15:50:27,772 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:27,846 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:50:27,846 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:27,846 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:27,847 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:27,857 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:27,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:27,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2020-04-18 15:50:27,858 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:27,859 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:27,867 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 93 transitions. [2020-04-18 15:50:27,867 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:27,913 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:27,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:27,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:50:27,913 INFO L87 Difference]: Start difference. First operand 442 states and 794 transitions. Second operand 11 states. [2020-04-18 15:50:28,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:28,177 INFO L93 Difference]: Finished difference Result 457 states and 806 transitions. [2020-04-18 15:50:28,177 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 806 transitions. [2020-04-18 15:50:28,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:28,178 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:50:28,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:28,178 INFO L82 PathProgramCache]: Analyzing trace with hash 189358263, now seen corresponding path program 7 times [2020-04-18 15:50:28,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:28,179 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342626192] [2020-04-18 15:50:28,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:28,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:28,226 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:28,226 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [342626192] [2020-04-18 15:50:28,226 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2011094393] [2020-04-18 15:50:28,226 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:28,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:28,302 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:28,303 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:28,314 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:28,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:28,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:28,315 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:28,317 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:28,328 INFO L259 McrAutomatonBuilder]: Finished intersection with 59 states and 93 transitions. [2020-04-18 15:50:28,328 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:28,330 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:50:28,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:50:28,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=491, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:50:28,331 INFO L87 Difference]: Start difference. First operand 457 states and 806 transitions. Second operand 11 states. [2020-04-18 15:50:28,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:28,662 INFO L93 Difference]: Finished difference Result 468 states and 813 transitions. [2020-04-18 15:50:28,662 INFO L276 IsEmpty]: Start isEmpty. Operand 468 states and 813 transitions. [2020-04-18 15:50:28,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:28,663 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:50:28,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:28,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1419610833, now seen corresponding path program 8 times [2020-04-18 15:50:28,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:28,665 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754808264] [2020-04-18 15:50:28,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:28,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:28,707 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:28,708 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754808264] [2020-04-18 15:50:28,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:28,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:50:28,709 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:28,712 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:28,724 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:50:28,724 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:28,740 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:50:28,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:28,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=717, Unknown=0, NotChecked=0, Total=930 [2020-04-18 15:50:28,741 INFO L87 Difference]: Start difference. First operand 468 states and 813 transitions. Second operand 7 states. [2020-04-18 15:50:28,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:28,967 INFO L93 Difference]: Finished difference Result 483 states and 825 transitions. [2020-04-18 15:50:28,967 INFO L276 IsEmpty]: Start isEmpty. Operand 483 states and 825 transitions. [2020-04-18 15:50:28,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:28,968 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:50:28,969 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:28,969 INFO L82 PathProgramCache]: Analyzing trace with hash 1418874183, now seen corresponding path program 9 times [2020-04-18 15:50:28,969 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:28,969 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186387485] [2020-04-18 15:50:28,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:28,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:29,012 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:29,013 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186387485] [2020-04-18 15:50:29,013 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490187676] [2020-04-18 15:50:29,013 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:29,125 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2020-04-18 15:50:29,125 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:29,126 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:29,127 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:29,149 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:29,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:29,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:29,150 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:29,152 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:29,159 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 49 transitions. [2020-04-18 15:50:29,160 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:29,161 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:29,161 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:29,161 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=282, Invalid=1050, Unknown=0, NotChecked=0, Total=1332 [2020-04-18 15:50:29,161 INFO L87 Difference]: Start difference. First operand 483 states and 825 transitions. Second operand 9 states. [2020-04-18 15:50:29,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:29,342 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:50:29,342 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:50:29,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:29,343 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:50:29,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:29,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1201697793, now seen corresponding path program 10 times [2020-04-18 15:50:29,343 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:29,344 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084544774] [2020-04-18 15:50:29,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:29,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:29,392 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:29,392 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084544774] [2020-04-18 15:50:29,392 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1608462552] [2020-04-18 15:50:29,392 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:29,468 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:29,469 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:29,469 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:29,470 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:29,485 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:29,486 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:29,486 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:29,486 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:29,488 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:29,496 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:50:29,496 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:29,556 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:29,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:50:29,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=398, Invalid=1494, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:50:29,556 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 14 states. [2020-04-18 15:50:30,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:30,141 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:50:30,141 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:50:30,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:30,142 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:50:30,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:30,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1218006273, now seen corresponding path program 11 times [2020-04-18 15:50:30,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:30,143 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273030915] [2020-04-18 15:50:30,143 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:30,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:30,192 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:30,192 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [273030915] [2020-04-18 15:50:30,192 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1518048223] [2020-04-18 15:50:30,193 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:30,268 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:50:30,269 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:30,269 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:30,270 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:30,285 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2020-04-18 15:50:30,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:30,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:30,286 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:30,287 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:30,295 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:50:30,295 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:30,389 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:50:30,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 15:50:30,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=791, Invalid=3115, Unknown=0, NotChecked=0, Total=3906 [2020-04-18 15:50:30,389 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 18 states. [2020-04-18 15:50:31,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:31,119 INFO L93 Difference]: Finished difference Result 494 states and 831 transitions. [2020-04-18 15:50:31,120 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 831 transitions. [2020-04-18 15:50:31,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:31,121 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:50:31,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:31,121 INFO L82 PathProgramCache]: Analyzing trace with hash 1729639995, now seen corresponding path program 12 times [2020-04-18 15:50:31,121 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:31,121 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [677794091] [2020-04-18 15:50:31,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:31,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:31,150 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:31,150 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [677794091] [2020-04-18 15:50:31,150 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:31,150 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:31,150 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:31,152 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:31,158 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:50:31,158 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:31,209 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:50:31,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:31,210 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1147, Invalid=4859, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:50:31,210 INFO L87 Difference]: Start difference. First operand 494 states and 831 transitions. Second operand 7 states. [2020-04-18 15:50:31,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:31,392 INFO L93 Difference]: Finished difference Result 509 states and 842 transitions. [2020-04-18 15:50:31,393 INFO L276 IsEmpty]: Start isEmpty. Operand 509 states and 842 transitions. [2020-04-18 15:50:31,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:31,393 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:50:31,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:31,394 INFO L82 PathProgramCache]: Analyzing trace with hash 1730014785, now seen corresponding path program 13 times [2020-04-18 15:50:31,394 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:31,394 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [897624427] [2020-04-18 15:50:31,394 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:31,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:31,423 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:31,423 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [897624427] [2020-04-18 15:50:31,423 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1235743283] [2020-04-18 15:50:31,424 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:31,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:31,502 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:31,502 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:31,515 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:31,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:31,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2020-04-18 15:50:31,516 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:31,518 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:31,525 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 41 transitions. [2020-04-18 15:50:31,525 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:31,526 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:50:31,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:31,527 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1260, Invalid=5712, Unknown=0, NotChecked=0, Total=6972 [2020-04-18 15:50:31,527 INFO L87 Difference]: Start difference. First operand 509 states and 842 transitions. Second operand 9 states. [2020-04-18 15:50:31,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:31,769 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:50:31,769 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:50:31,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:31,770 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:50:31,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:31,770 INFO L82 PathProgramCache]: Analyzing trace with hash 1965964155, now seen corresponding path program 14 times [2020-04-18 15:50:31,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:31,771 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235226458] [2020-04-18 15:50:31,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:31,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:31,812 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:31,813 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235226458] [2020-04-18 15:50:31,813 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1665772260] [2020-04-18 15:50:31,813 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:31,888 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:50:31,888 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:31,890 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:31,891 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:31,906 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:31,906 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:31,906 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:31,907 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:31,908 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:31,914 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:50:31,914 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:31,955 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 14 times. [2020-04-18 15:50:31,955 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:50:31,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1422, Invalid=6588, Unknown=0, NotChecked=0, Total=8010 [2020-04-18 15:50:31,956 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 17 states. [2020-04-18 15:50:32,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:32,765 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:50:32,765 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:50:32,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:32,766 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:50:32,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:32,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1970428155, now seen corresponding path program 15 times [2020-04-18 15:50:32,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:32,766 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097327955] [2020-04-18 15:50:32,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:32,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:32,807 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:32,807 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097327955] [2020-04-18 15:50:32,807 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1034183797] [2020-04-18 15:50:32,807 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:32,883 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:32,883 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:32,884 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:50:32,884 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:32,897 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2020-04-18 15:50:32,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:32,898 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2020-04-18 15:50:32,898 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:32,899 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:32,904 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:50:32,904 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:32,919 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:50:32,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:32,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1817, Invalid=8689, Unknown=0, NotChecked=0, Total=10506 [2020-04-18 15:50:32,921 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 13 states. [2020-04-18 15:50:33,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:33,487 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:50:33,487 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:50:33,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:33,488 INFO L105 Mcr]: ---- MCR iteration 14 ---- [2020-04-18 15:50:33,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:33,488 INFO L82 PathProgramCache]: Analyzing trace with hash 1425742371, now seen corresponding path program 16 times [2020-04-18 15:50:33,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:33,489 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902139408] [2020-04-18 15:50:33,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:33,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:33,529 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:33,529 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902139408] [2020-04-18 15:50:33,529 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:33,529 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:33,529 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:33,531 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:33,534 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:33,535 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:33,535 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:33,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:33,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2233, Invalid=11339, Unknown=0, NotChecked=0, Total=13572 [2020-04-18 15:50:33,536 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 9 states. [2020-04-18 15:50:33,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:33,944 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:50:33,944 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:50:33,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:33,945 INFO L105 Mcr]: ---- MCR iteration 15 ---- [2020-04-18 15:50:33,945 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:33,945 INFO L82 PathProgramCache]: Analyzing trace with hash 1446514851, now seen corresponding path program 17 times [2020-04-18 15:50:33,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:33,946 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862613110] [2020-04-18 15:50:33,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:33,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:33,984 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:50:33,985 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862613110] [2020-04-18 15:50:33,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:33,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:50:33,985 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:33,986 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:33,990 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:33,990 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:33,991 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:33,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:33,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2608, Invalid=13904, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:50:33,992 INFO L87 Difference]: Start difference. First operand 520 states and 848 transitions. Second operand 9 states. [2020-04-18 15:50:34,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:34,409 INFO L93 Difference]: Finished difference Result 520 states and 848 transitions. [2020-04-18 15:50:34,409 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 848 transitions. [2020-04-18 15:50:34,410 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:34,411 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [64594067] [2020-04-18 15:50:34,411 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:34,411 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:50:34,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [64594067] [2020-04-18 15:50:34,412 INFO L459 AbstractCegarLoop]: Interpolant automaton has 27 states [2020-04-18 15:50:34,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:34,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2020-04-18 15:50:34,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=16735, Unknown=0, NotChecked=0, Total=19740 [2020-04-18 15:50:34,414 INFO L87 Difference]: Start difference. First operand 7590 states and 34684 transitions. Second operand 27 states. [2020-04-18 15:50:40,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:40,024 INFO L93 Difference]: Finished difference Result 45221 states and 154374 transitions. [2020-04-18 15:50:40,025 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 185 states. [2020-04-18 15:50:40,025 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 25 [2020-04-18 15:50:40,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:40,126 INFO L225 Difference]: With dead ends: 45221 [2020-04-18 15:50:40,126 INFO L226 Difference]: Without dead ends: 44954 [2020-04-18 15:50:40,129 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 1057 GetRequests, 775 SyntacticMatches, 2 SemanticMatches, 280 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33574 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=10400, Invalid=68842, Unknown=0, NotChecked=0, Total=79242 [2020-04-18 15:50:40,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44954 states. [2020-04-18 15:50:40,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44954 to 7269. [2020-04-18 15:50:40,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7269 states. [2020-04-18 15:50:40,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7269 states to 7269 states and 33154 transitions. [2020-04-18 15:50:40,637 INFO L78 Accepts]: Start accepts. Automaton has 7269 states and 33154 transitions. Word has length 25 [2020-04-18 15:50:40,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:40,637 INFO L479 AbstractCegarLoop]: Abstraction has 7269 states and 33154 transitions. [2020-04-18 15:50:40,637 INFO L480 AbstractCegarLoop]: Interpolant automaton has 27 states. [2020-04-18 15:50:40,637 INFO L276 IsEmpty]: Start isEmpty. Operand 7269 states and 33154 transitions. [2020-04-18 15:50:40,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:40,640 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:40,640 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:42,647 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 47 z3 -smt2 -in SMTLIB2_COMPLIANT=true,45 z3 -smt2 -in SMTLIB2_COMPLIANT=true,42 z3 -smt2 -in SMTLIB2_COMPLIANT=true,50 z3 -smt2 -in SMTLIB2_COMPLIANT=true,49 z3 -smt2 -in SMTLIB2_COMPLIANT=true,46 z3 -smt2 -in SMTLIB2_COMPLIANT=true,44 z3 -smt2 -in SMTLIB2_COMPLIANT=true,43 z3 -smt2 -in SMTLIB2_COMPLIANT=true,41 z3 -smt2 -in SMTLIB2_COMPLIANT=true,48 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:42,649 INFO L427 AbstractCegarLoop]: === Iteration 16 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:42,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:42,650 INFO L82 PathProgramCache]: Analyzing trace with hash -1943046054, now seen corresponding path program 1 times [2020-04-18 15:50:42,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:42,650 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [314230781] [2020-04-18 15:50:42,651 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:42,653 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 69 transitions. [2020-04-18 15:50:42,653 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states. [2020-04-18 15:50:42,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:42,653 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:42,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:42,654 INFO L82 PathProgramCache]: Analyzing trace with hash -1874285922, now seen corresponding path program 2 times [2020-04-18 15:50:42,654 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:42,654 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1693065579] [2020-04-18 15:50:42,654 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:42,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:42,663 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:50:42,663 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1693065579] [2020-04-18 15:50:42,663 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:42,663 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:42,664 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:42,665 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:42,671 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:50:42,671 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:42,673 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:42,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:42,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:42,674 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 3 states. [2020-04-18 15:50:42,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:42,676 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:50:42,676 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:50:42,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:50:42,677 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:42,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:42,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1943046054, now seen corresponding path program 3 times [2020-04-18 15:50:42,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:42,678 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825731153] [2020-04-18 15:50:42,678 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:42,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:42,697 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:50:42,698 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825731153] [2020-04-18 15:50:42,698 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:42,698 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:42,698 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:42,700 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:42,704 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:50:42,705 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:42,712 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:42,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:42,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:42,712 INFO L87 Difference]: Start difference. First operand 49 states and 69 transitions. Second operand 5 states. [2020-04-18 15:50:42,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:42,725 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:50:42,725 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:50:42,726 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:42,726 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [314230781] [2020-04-18 15:50:42,726 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:42,726 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:42,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [314230781] [2020-04-18 15:50:42,727 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:42,727 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:42,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:42,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:42,727 INFO L87 Difference]: Start difference. First operand 7269 states and 33154 transitions. Second operand 5 states. [2020-04-18 15:50:42,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:42,858 INFO L93 Difference]: Finished difference Result 11919 states and 51979 transitions. [2020-04-18 15:50:42,859 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:42,859 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2020-04-18 15:50:42,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:42,905 INFO L225 Difference]: With dead ends: 11919 [2020-04-18 15:50:42,906 INFO L226 Difference]: Without dead ends: 11887 [2020-04-18 15:50:42,906 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:43,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11887 states. [2020-04-18 15:50:43,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11887 to 8560. [2020-04-18 15:50:43,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8560 states. [2020-04-18 15:50:43,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8560 states to 8560 states and 38495 transitions. [2020-04-18 15:50:43,399 INFO L78 Accepts]: Start accepts. Automaton has 8560 states and 38495 transitions. Word has length 25 [2020-04-18 15:50:43,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:43,399 INFO L479 AbstractCegarLoop]: Abstraction has 8560 states and 38495 transitions. [2020-04-18 15:50:43,399 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:43,399 INFO L276 IsEmpty]: Start isEmpty. Operand 8560 states and 38495 transitions. [2020-04-18 15:50:43,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2020-04-18 15:50:43,404 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:43,404 INFO L425 BasicCegarLoop]: trace histogram [6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:43,404 INFO L427 AbstractCegarLoop]: === Iteration 17 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:43,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:43,405 INFO L82 PathProgramCache]: Analyzing trace with hash -110415564, now seen corresponding path program 1 times [2020-04-18 15:50:43,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:43,405 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [22096085] [2020-04-18 15:50:43,406 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:43,407 INFO L259 McrAutomatonBuilder]: Finished intersection with 27 states and 26 transitions. [2020-04-18 15:50:43,408 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2020-04-18 15:50:43,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2020-04-18 15:50:43,408 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:43,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:43,409 INFO L82 PathProgramCache]: Analyzing trace with hash -110415564, now seen corresponding path program 2 times [2020-04-18 15:50:43,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:43,409 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137985330] [2020-04-18 15:50:43,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:43,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:50:43,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-04-18 15:50:43,427 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-04-18 15:50:43,427 INFO L174 FreeRefinementEngine]: Strategy MCR found a feasible trace [2020-04-18 15:50:43,428 INFO L523 BasicCegarLoop]: Counterexample might be feasible [2020-04-18 15:50:43,428 WARN L363 ceAbstractionStarter]: 5 thread instances were not sufficient, I will increase this number and restart the analysis [2020-04-18 15:50:43,428 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 6 thread instances. [2020-04-18 15:50:43,450 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,451 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,452 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,453 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,453 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,453 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,453 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,454 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,454 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,454 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,454 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,454 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,455 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,455 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,455 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,455 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,455 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,456 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,457 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,458 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,459 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,460 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,461 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,462 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,463 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,463 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,463 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,464 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,464 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,464 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,465 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,465 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,465 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,465 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,466 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,466 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,466 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,466 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,466 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,467 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,467 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,467 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,467 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,467 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,468 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,468 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,468 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,468 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,469 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,469 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,469 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,469 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,469 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,470 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,470 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,470 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,470 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,471 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,471 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,471 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,471 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,471 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,472 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,473 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,473 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,473 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,474 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread1of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,474 WARN L315 ript$VariableManager]: TermVariabe thr2Thread1of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,476 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,477 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread2of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,477 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,477 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,477 WARN L315 ript$VariableManager]: TermVariabe thr2Thread2of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,479 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,480 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,480 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,480 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread3of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,480 WARN L315 ript$VariableManager]: TermVariabe thr2Thread3of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,481 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,482 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,482 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,482 WARN L315 ript$VariableManager]: TermVariabe thr2Thread4of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,482 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread4of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,484 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,484 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,484 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread5of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,484 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,484 WARN L315 ript$VariableManager]: TermVariabe thr2Thread5of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,486 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,486 WARN L315 ript$VariableManager]: TermVariabe |thr2Thread6of6ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,487 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~t~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,487 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,487 WARN L315 ript$VariableManager]: TermVariabe thr2Thread6of6ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,488 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,489 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,489 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread1of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,489 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,489 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,490 WARN L315 ript$VariableManager]: TermVariabe thr1Thread1of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,491 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,492 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,492 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,492 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,492 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread2of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,493 WARN L315 ript$VariableManager]: TermVariabe thr1Thread2of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,494 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,494 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,495 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,495 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,495 WARN L315 ript$VariableManager]: TermVariabe thr1Thread3of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,495 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread3of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,497 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,497 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,497 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,497 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,498 WARN L315 ript$VariableManager]: TermVariabe thr1Thread4of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,498 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread4of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,499 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,500 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,500 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,500 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,500 WARN L315 ript$VariableManager]: TermVariabe thr1Thread5of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,501 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread5of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,502 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1___VERIFIER_assert_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,502 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,503 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,503 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,503 WARN L315 ript$VariableManager]: TermVariabe thr1Thread6of6ForFork1___VERIFIER_assert_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,503 WARN L315 ript$VariableManager]: TermVariabe |thr1Thread6of6ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 15:50:43,505 INFO L251 AbstractCegarLoop]: Starting to check reachability of 9 error locations. [2020-04-18 15:50:43,505 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 15:50:43,505 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 15:50:43,505 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 15:50:43,506 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 15:50:43,506 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 15:50:43,506 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 15:50:43,506 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 15:50:43,506 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 15:50:43,508 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 160 places, 141 transitions, 402 flow [2020-04-18 15:50:43,509 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 160 places, 141 transitions, 402 flow [2020-04-18 15:50:43,537 INFO L129 PetriNetUnfolder]: 8/171 cut-off events. [2020-04-18 15:50:43,537 INFO L130 PetriNetUnfolder]: For 50/50 co-relation queries the response was YES. [2020-04-18 15:50:43,539 INFO L80 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 171 events. 8/171 cut-off events. For 50/50 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 310 event pairs, 0 based on Foata normal form. 0/155 useless extension candidates. Maximal degree in co-relation 206. Up to 14 conditions per place. [2020-04-18 15:50:43,549 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 160 places, 141 transitions, 402 flow [2020-04-18 15:50:43,572 INFO L129 PetriNetUnfolder]: 8/171 cut-off events. [2020-04-18 15:50:43,572 INFO L130 PetriNetUnfolder]: For 50/50 co-relation queries the response was YES. [2020-04-18 15:50:43,574 INFO L80 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 171 events. 8/171 cut-off events. For 50/50 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 310 event pairs, 0 based on Foata normal form. 0/155 useless extension candidates. Maximal degree in co-relation 206. Up to 14 conditions per place. [2020-04-18 15:50:43,584 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 3612 [2020-04-18 15:50:43,584 INFO L182 etLargeBlockEncoding]: Variable Check. [2020-04-18 15:50:45,340 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 60 [2020-04-18 15:50:45,599 INFO L206 etLargeBlockEncoding]: Checked pairs total: 4226 [2020-04-18 15:50:45,599 INFO L214 etLargeBlockEncoding]: Total number of compositions: 127 [2020-04-18 15:50:45,599 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 71 places, 45 transitions, 210 flow [2020-04-18 15:50:47,007 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 18584 states. [2020-04-18 15:50:47,007 INFO L276 IsEmpty]: Start isEmpty. Operand 18584 states. [2020-04-18 15:50:47,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:50:47,007 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:47,008 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1] [2020-04-18 15:50:47,008 INFO L427 AbstractCegarLoop]: === Iteration 1 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:47,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1291919, now seen corresponding path program 1 times [2020-04-18 15:50:47,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:47,008 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1221649902] [2020-04-18 15:50:47,009 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,009 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:50:47,009 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states. [2020-04-18 15:50:47,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2020-04-18 15:50:47,009 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:47,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,009 INFO L82 PathProgramCache]: Analyzing trace with hash 1291919, now seen corresponding path program 2 times [2020-04-18 15:50:47,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:47,009 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474984151] [2020-04-18 15:50:47,009 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:47,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:47,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:47,017 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474984151] [2020-04-18 15:50:47,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:47,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 15:50:47,017 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:47,017 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,018 INFO L259 McrAutomatonBuilder]: Finished intersection with 4 states and 3 transitions. [2020-04-18 15:50:47,018 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:47,019 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:47,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:47,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:47,020 INFO L87 Difference]: Start difference. First operand 4 states. Second operand 3 states. [2020-04-18 15:50:47,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,020 INFO L93 Difference]: Finished difference Result 4 states and 3 transitions. [2020-04-18 15:50:47,020 INFO L276 IsEmpty]: Start isEmpty. Operand 4 states and 3 transitions. [2020-04-18 15:50:47,020 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:47,020 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1221649902] [2020-04-18 15:50:47,020 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:47,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 15:50:47,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1221649902] [2020-04-18 15:50:47,021 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 15:50:47,021 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:47,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:47,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:47,021 INFO L87 Difference]: Start difference. First operand 18584 states. Second operand 3 states. [2020-04-18 15:50:47,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,147 INFO L93 Difference]: Finished difference Result 17885 states and 92755 transitions. [2020-04-18 15:50:47,148 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 15:50:47,148 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2020-04-18 15:50:47,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:47,195 INFO L225 Difference]: With dead ends: 17885 [2020-04-18 15:50:47,195 INFO L226 Difference]: Without dead ends: 16791 [2020-04-18 15:50:47,196 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:47,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16791 states. [2020-04-18 15:50:47,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16791 to 16791. [2020-04-18 15:50:47,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16791 states. [2020-04-18 15:50:47,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16791 states to 16791 states and 86558 transitions. [2020-04-18 15:50:47,940 INFO L78 Accepts]: Start accepts. Automaton has 16791 states and 86558 transitions. Word has length 3 [2020-04-18 15:50:47,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:47,940 INFO L479 AbstractCegarLoop]: Abstraction has 16791 states and 86558 transitions. [2020-04-18 15:50:47,940 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 15:50:47,940 INFO L276 IsEmpty]: Start isEmpty. Operand 16791 states and 86558 transitions. [2020-04-18 15:50:47,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:50:47,940 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:47,940 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:47,940 INFO L427 AbstractCegarLoop]: === Iteration 2 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:47,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,941 INFO L82 PathProgramCache]: Analyzing trace with hash -1124534846, now seen corresponding path program 1 times [2020-04-18 15:50:47,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:47,941 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [35824741] [2020-04-18 15:50:47,941 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,942 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 21 transitions. [2020-04-18 15:50:47,942 INFO L276 IsEmpty]: Start isEmpty. Operand 16 states. [2020-04-18 15:50:47,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:50:47,942 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:47,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,942 INFO L82 PathProgramCache]: Analyzing trace with hash -838148292, now seen corresponding path program 2 times [2020-04-18 15:50:47,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:47,942 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [880839823] [2020-04-18 15:50:47,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:47,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:47,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:47,951 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [880839823] [2020-04-18 15:50:47,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:47,951 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:47,951 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:47,951 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,952 INFO L259 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2020-04-18 15:50:47,952 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:47,953 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:47,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:47,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:47,954 INFO L87 Difference]: Start difference. First operand 16 states. Second operand 3 states. [2020-04-18 15:50:47,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:47,956 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:50:47,956 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:50:47,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2020-04-18 15:50:47,956 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:47,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:47,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1124534846, now seen corresponding path program 3 times [2020-04-18 15:50:47,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:47,956 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754766701] [2020-04-18 15:50:47,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:47,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:47,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:47,997 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754766701] [2020-04-18 15:50:47,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:47,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:47,998 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:47,998 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:47,998 INFO L259 McrAutomatonBuilder]: Finished intersection with 10 states and 9 transitions. [2020-04-18 15:50:47,999 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:48,005 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:48,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:48,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:48,005 INFO L87 Difference]: Start difference. First operand 17 states and 21 transitions. Second operand 5 states. [2020-04-18 15:50:48,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:48,021 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2020-04-18 15:50:48,021 INFO L276 IsEmpty]: Start isEmpty. Operand 17 states and 21 transitions. [2020-04-18 15:50:48,022 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:48,022 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [35824741] [2020-04-18 15:50:48,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:48,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:48,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [35824741] [2020-04-18 15:50:48,023 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:48,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:48,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:48,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:48,023 INFO L87 Difference]: Start difference. First operand 16791 states and 86558 transitions. Second operand 5 states. [2020-04-18 15:50:48,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:48,235 INFO L93 Difference]: Finished difference Result 30985 states and 150574 transitions. [2020-04-18 15:50:48,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:48,235 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 9 [2020-04-18 15:50:48,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:48,317 INFO L225 Difference]: With dead ends: 30985 [2020-04-18 15:50:48,317 INFO L226 Difference]: Without dead ends: 30977 [2020-04-18 15:50:48,317 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:48,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30977 states. [2020-04-18 15:50:50,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30977 to 19868. [2020-04-18 15:50:50,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19868 states. [2020-04-18 15:50:51,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19868 states to 19868 states and 103363 transitions. [2020-04-18 15:50:51,015 INFO L78 Accepts]: Start accepts. Automaton has 19868 states and 103363 transitions. Word has length 9 [2020-04-18 15:50:51,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:51,016 INFO L479 AbstractCegarLoop]: Abstraction has 19868 states and 103363 transitions. [2020-04-18 15:50:51,016 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:51,016 INFO L276 IsEmpty]: Start isEmpty. Operand 19868 states and 103363 transitions. [2020-04-18 15:50:51,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:50:51,016 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:51,016 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:51,016 INFO L427 AbstractCegarLoop]: === Iteration 3 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:51,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,017 INFO L82 PathProgramCache]: Analyzing trace with hash -696216523, now seen corresponding path program 1 times [2020-04-18 15:50:51,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:51,017 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [674357011] [2020-04-18 15:50:51,017 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,017 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 33 transitions. [2020-04-18 15:50:51,018 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states. [2020-04-18 15:50:51,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:50:51,018 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:51,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1465956375, now seen corresponding path program 2 times [2020-04-18 15:50:51,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,018 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860388433] [2020-04-18 15:50:51,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,025 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:51,026 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860388433] [2020-04-18 15:50:51,026 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,026 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:51,026 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,027 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,028 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 31 transitions. [2020-04-18 15:50:51,028 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,030 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:51,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:51,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:51,031 INFO L87 Difference]: Start difference. First operand 24 states. Second operand 3 states. [2020-04-18 15:50:51,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,033 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:50:51,033 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:50:51,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 15:50:51,034 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:51,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:51,034 INFO L82 PathProgramCache]: Analyzing trace with hash -696216523, now seen corresponding path program 3 times [2020-04-18 15:50:51,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:51,035 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [38612505] [2020-04-18 15:50:51,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:51,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:51,051 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:51,051 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [38612505] [2020-04-18 15:50:51,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:51,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:51,052 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:51,053 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:51,054 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 15:50:51,054 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:51,061 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:51,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:51,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:51,061 INFO L87 Difference]: Start difference. First operand 25 states and 33 transitions. Second operand 5 states. [2020-04-18 15:50:51,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,077 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2020-04-18 15:50:51,077 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 33 transitions. [2020-04-18 15:50:51,077 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:51,077 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [674357011] [2020-04-18 15:50:51,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:51,078 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:51,078 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [674357011] [2020-04-18 15:50:51,078 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:51,078 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:51,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:51,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:51,079 INFO L87 Difference]: Start difference. First operand 19868 states and 103363 transitions. Second operand 5 states. [2020-04-18 15:50:51,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:51,320 INFO L93 Difference]: Finished difference Result 36296 states and 178836 transitions. [2020-04-18 15:50:51,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:51,320 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 13 [2020-04-18 15:50:51,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:51,423 INFO L225 Difference]: With dead ends: 36296 [2020-04-18 15:50:51,423 INFO L226 Difference]: Without dead ends: 36280 [2020-04-18 15:50:51,423 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:52,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36280 states. [2020-04-18 15:50:52,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36280 to 23806. [2020-04-18 15:50:52,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23806 states. [2020-04-18 15:50:52,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23806 states to 23806 states and 125455 transitions. [2020-04-18 15:50:52,562 INFO L78 Accepts]: Start accepts. Automaton has 23806 states and 125455 transitions. Word has length 13 [2020-04-18 15:50:52,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:52,562 INFO L479 AbstractCegarLoop]: Abstraction has 23806 states and 125455 transitions. [2020-04-18 15:50:52,562 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:50:52,562 INFO L276 IsEmpty]: Start isEmpty. Operand 23806 states and 125455 transitions. [2020-04-18 15:50:52,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:52,562 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:52,562 INFO L425 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:52,563 INFO L427 AbstractCegarLoop]: === Iteration 4 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:52,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:52,563 INFO L82 PathProgramCache]: Analyzing trace with hash -2123666531, now seen corresponding path program 1 times [2020-04-18 15:50:52,563 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:52,563 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2135719660] [2020-04-18 15:50:52,564 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:52,564 INFO L259 McrAutomatonBuilder]: Finished intersection with 52 states and 99 transitions. [2020-04-18 15:50:52,565 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states. [2020-04-18 15:50:52,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:52,565 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:52,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:52,565 INFO L82 PathProgramCache]: Analyzing trace with hash 835890241, now seen corresponding path program 2 times [2020-04-18 15:50:52,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:52,566 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238455724] [2020-04-18 15:50:52,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:52,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:52,573 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:52,573 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238455724] [2020-04-18 15:50:52,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:52,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:52,573 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:52,574 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:52,576 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 61 transitions. [2020-04-18 15:50:52,576 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:52,578 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:52,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:52,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:52,578 INFO L87 Difference]: Start difference. First operand 52 states. Second operand 3 states. [2020-04-18 15:50:52,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:52,584 INFO L93 Difference]: Finished difference Result 61 states and 107 transitions. [2020-04-18 15:50:52,585 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 107 transitions. [2020-04-18 15:50:52,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:52,585 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:52,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:52,585 INFO L82 PathProgramCache]: Analyzing trace with hash -2123648201, now seen corresponding path program 3 times [2020-04-18 15:50:52,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:52,586 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648996718] [2020-04-18 15:50:52,586 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:52,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:52,603 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:52,603 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648996718] [2020-04-18 15:50:52,603 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1222359908] [2020-04-18 15:50:52,604 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:52,683 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:50:52,684 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:52,684 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:50:52,684 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:52,685 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:52,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:52,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:50:52,686 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:52,686 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:52,688 INFO L259 McrAutomatonBuilder]: Finished intersection with 29 states and 41 transitions. [2020-04-18 15:50:52,688 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:52,728 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:50:52,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:52,729 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:50:52,729 INFO L87 Difference]: Start difference. First operand 61 states and 107 transitions. Second operand 9 states. [2020-04-18 15:50:52,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:52,797 INFO L93 Difference]: Finished difference Result 68 states and 112 transitions. [2020-04-18 15:50:52,798 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 112 transitions. [2020-04-18 15:50:52,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:52,798 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:50:52,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:52,798 INFO L82 PathProgramCache]: Analyzing trace with hash -2123666531, now seen corresponding path program 4 times [2020-04-18 15:50:52,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:52,799 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196682078] [2020-04-18 15:50:52,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:52,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:52,828 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:52,829 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1196682078] [2020-04-18 15:50:52,829 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2063884155] [2020-04-18 15:50:52,829 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:52,914 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:50:52,915 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:50:52,915 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:50:52,916 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:50:52,917 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 15:50:52,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:50:52,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:50:52,917 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:52,917 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:52,919 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 31 transitions. [2020-04-18 15:50:52,919 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:52,936 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:50:52,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:50:52,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2020-04-18 15:50:52,937 INFO L87 Difference]: Start difference. First operand 68 states and 112 transitions. Second operand 9 states. [2020-04-18 15:50:53,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:53,031 INFO L93 Difference]: Finished difference Result 69 states and 112 transitions. [2020-04-18 15:50:53,031 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 112 transitions. [2020-04-18 15:50:53,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2020-04-18 15:50:53,031 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:50:53,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:53,032 INFO L82 PathProgramCache]: Analyzing trace with hash 950817645, now seen corresponding path program 5 times [2020-04-18 15:50:53,032 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:53,032 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361847428] [2020-04-18 15:50:53,032 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:53,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:53,062 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2020-04-18 15:50:53,062 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1361847428] [2020-04-18 15:50:53,062 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:53,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:50:53,062 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:53,063 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:53,064 INFO L259 McrAutomatonBuilder]: Finished intersection with 16 states and 15 transitions. [2020-04-18 15:50:53,064 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:53,077 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:53,077 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:50:53,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=277, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:50:53,078 INFO L87 Difference]: Start difference. First operand 69 states and 112 transitions. Second operand 7 states. [2020-04-18 15:50:53,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:53,170 INFO L93 Difference]: Finished difference Result 72 states and 115 transitions. [2020-04-18 15:50:53,171 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 115 transitions. [2020-04-18 15:50:53,171 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:53,171 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2135719660] [2020-04-18 15:50:53,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:53,172 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:50:53,172 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2135719660] [2020-04-18 15:50:53,172 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:50:53,172 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:53,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:50:53,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=183, Invalid=519, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:50:53,173 INFO L87 Difference]: Start difference. First operand 23806 states and 125455 transitions. Second operand 13 states. [2020-04-18 15:50:56,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:56,123 INFO L93 Difference]: Finished difference Result 65163 states and 295360 transitions. [2020-04-18 15:50:56,123 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:50:56,123 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 15 [2020-04-18 15:50:56,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:56,301 INFO L225 Difference]: With dead ends: 65163 [2020-04-18 15:50:56,301 INFO L226 Difference]: Without dead ends: 65130 [2020-04-18 15:50:56,302 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 627 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=539, Invalid=1717, Unknown=0, NotChecked=0, Total=2256 [2020-04-18 15:50:57,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65130 states. [2020-04-18 15:50:57,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65130 to 23109. [2020-04-18 15:50:57,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23109 states. [2020-04-18 15:50:57,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23109 states to 23109 states and 121651 transitions. [2020-04-18 15:50:57,741 INFO L78 Accepts]: Start accepts. Automaton has 23109 states and 121651 transitions. Word has length 15 [2020-04-18 15:50:57,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:50:57,741 INFO L479 AbstractCegarLoop]: Abstraction has 23109 states and 121651 transitions. [2020-04-18 15:50:57,741 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:50:57,741 INFO L276 IsEmpty]: Start isEmpty. Operand 23109 states and 121651 transitions. [2020-04-18 15:50:57,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:57,741 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:50:57,741 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:50:58,142 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 52 z3 -smt2 -in SMTLIB2_COMPLIANT=true,51 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:50:58,143 INFO L427 AbstractCegarLoop]: === Iteration 5 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:50:58,143 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:58,144 INFO L82 PathProgramCache]: Analyzing trace with hash -2120658652, now seen corresponding path program 1 times [2020-04-18 15:50:58,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:50:58,144 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [106538448] [2020-04-18 15:50:58,145 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:58,146 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 45 transitions. [2020-04-18 15:50:58,146 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2020-04-18 15:50:58,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:58,147 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:50:58,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:58,147 INFO L82 PathProgramCache]: Analyzing trace with hash -1298525542, now seen corresponding path program 2 times [2020-04-18 15:50:58,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:58,148 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684679289] [2020-04-18 15:50:58,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:58,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:58,163 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:58,163 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684679289] [2020-04-18 15:50:58,163 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:58,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:50:58,164 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:58,164 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:58,167 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 43 transitions. [2020-04-18 15:50:58,167 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:58,169 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:58,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:50:58,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:50:58,169 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2020-04-18 15:50:58,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:58,172 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:50:58,172 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:50:58,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 15:50:58,172 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:50:58,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:50:58,172 INFO L82 PathProgramCache]: Analyzing trace with hash -2120658652, now seen corresponding path program 3 times [2020-04-18 15:50:58,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:50:58,173 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1614086983] [2020-04-18 15:50:58,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:50:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:50:58,194 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:50:58,195 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1614086983] [2020-04-18 15:50:58,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:50:58,195 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:50:58,195 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:50:58,196 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:50:58,198 INFO L259 McrAutomatonBuilder]: Finished intersection with 18 states and 17 transitions. [2020-04-18 15:50:58,198 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:50:58,206 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:50:58,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:58,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:50:58,206 INFO L87 Difference]: Start difference. First operand 33 states and 45 transitions. Second operand 5 states. [2020-04-18 15:50:58,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:58,222 INFO L93 Difference]: Finished difference Result 33 states and 45 transitions. [2020-04-18 15:50:58,222 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 45 transitions. [2020-04-18 15:50:58,222 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:50:58,222 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [106538448] [2020-04-18 15:50:58,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:50:58,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:50:58,223 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [106538448] [2020-04-18 15:50:58,223 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:50:58,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:50:58,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:50:58,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:58,224 INFO L87 Difference]: Start difference. First operand 23109 states and 121651 transitions. Second operand 5 states. [2020-04-18 15:50:58,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:50:58,489 INFO L93 Difference]: Finished difference Result 41885 states and 209629 transitions. [2020-04-18 15:50:58,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:50:58,489 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2020-04-18 15:50:58,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:50:58,605 INFO L225 Difference]: With dead ends: 41885 [2020-04-18 15:50:58,605 INFO L226 Difference]: Without dead ends: 41856 [2020-04-18 15:50:58,605 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:50:59,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41856 states. [2020-04-18 15:51:00,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41856 to 28237. [2020-04-18 15:51:00,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28237 states. [2020-04-18 15:51:00,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28237 states to 28237 states and 150261 transitions. [2020-04-18 15:51:00,386 INFO L78 Accepts]: Start accepts. Automaton has 28237 states and 150261 transitions. Word has length 17 [2020-04-18 15:51:00,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:00,386 INFO L479 AbstractCegarLoop]: Abstraction has 28237 states and 150261 transitions. [2020-04-18 15:51:00,386 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:51:00,386 INFO L276 IsEmpty]: Start isEmpty. Operand 28237 states and 150261 transitions. [2020-04-18 15:51:00,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,387 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:00,387 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:00,387 INFO L427 AbstractCegarLoop]: === Iteration 6 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:00,387 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,387 INFO L82 PathProgramCache]: Analyzing trace with hash 269605662, now seen corresponding path program 1 times [2020-04-18 15:51:00,387 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:00,388 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [53312334] [2020-04-18 15:51:00,388 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,389 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 151 transitions. [2020-04-18 15:51:00,389 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states. [2020-04-18 15:51:00,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,389 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:00,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,390 INFO L82 PathProgramCache]: Analyzing trace with hash -2126269866, now seen corresponding path program 2 times [2020-04-18 15:51:00,390 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,390 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585670001] [2020-04-18 15:51:00,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,396 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:00,396 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [585670001] [2020-04-18 15:51:00,397 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:00,397 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:00,397 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,398 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,403 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 94 transitions. [2020-04-18 15:51:00,403 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,405 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:00,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:00,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:00,405 INFO L87 Difference]: Start difference. First operand 76 states. Second operand 3 states. [2020-04-18 15:51:00,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,411 INFO L93 Difference]: Finished difference Result 89 states and 163 transitions. [2020-04-18 15:51:00,412 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 163 transitions. [2020-04-18 15:51:00,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,412 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:00,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,412 INFO L82 PathProgramCache]: Analyzing trace with hash 269417922, now seen corresponding path program 3 times [2020-04-18 15:51:00,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,413 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1819935244] [2020-04-18 15:51:00,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,449 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:00,450 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1819935244] [2020-04-18 15:51:00,450 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:00,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:00,450 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,451 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,456 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 40 transitions. [2020-04-18 15:51:00,457 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,466 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:00,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:00,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:00,466 INFO L87 Difference]: Start difference. First operand 89 states and 163 transitions. Second operand 5 states. [2020-04-18 15:51:00,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,500 INFO L93 Difference]: Finished difference Result 96 states and 168 transitions. [2020-04-18 15:51:00,500 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 168 transitions. [2020-04-18 15:51:00,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,501 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:00,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,501 INFO L82 PathProgramCache]: Analyzing trace with hash 269416872, now seen corresponding path program 4 times [2020-04-18 15:51:00,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,501 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483870962] [2020-04-18 15:51:00,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,521 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:00,521 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483870962] [2020-04-18 15:51:00,522 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [608329870] [2020-04-18 15:51:00,522 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:00,614 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:00,615 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:00,615 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:00,616 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:00,617 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:00,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:00,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:51:00,618 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,618 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,621 INFO L259 McrAutomatonBuilder]: Finished intersection with 31 states and 40 transitions. [2020-04-18 15:51:00,621 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,627 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:00,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:00,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:51:00,627 INFO L87 Difference]: Start difference. First operand 96 states and 168 transitions. Second operand 5 states. [2020-04-18 15:51:00,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,660 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:51:00,660 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:51:00,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,660 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:00,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,660 INFO L82 PathProgramCache]: Analyzing trace with hash 269605662, now seen corresponding path program 5 times [2020-04-18 15:51:00,660 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,660 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910224526] [2020-04-18 15:51:00,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,702 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:00,702 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910224526] [2020-04-18 15:51:00,703 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [305678854] [2020-04-18 15:51:00,703 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:00,789 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:51:00,789 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:00,790 INFO L264 TraceCheckSpWp]: Trace formula consists of 106 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:00,790 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:00,793 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:00,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:00,793 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:00,793 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,794 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,797 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 15:51:00,797 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,856 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:00,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:51:00,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=140, Unknown=0, NotChecked=0, Total=210 [2020-04-18 15:51:00,857 INFO L87 Difference]: Start difference. First operand 103 states and 172 transitions. Second operand 10 states. [2020-04-18 15:51:00,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:00,951 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:51:00,951 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:51:00,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:00,951 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:00,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:00,952 INFO L82 PathProgramCache]: Analyzing trace with hash -2138468196, now seen corresponding path program 6 times [2020-04-18 15:51:00,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:00,952 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1987454701] [2020-04-18 15:51:00,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:00,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:00,984 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:00,985 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1987454701] [2020-04-18 15:51:00,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:00,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:00,985 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:00,986 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:00,988 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:51:00,988 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:00,994 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:00,994 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:00,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2020-04-18 15:51:00,995 INFO L87 Difference]: Start difference. First operand 103 states and 172 transitions. Second operand 7 states. [2020-04-18 15:51:01,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:01,072 INFO L93 Difference]: Finished difference Result 103 states and 172 transitions. [2020-04-18 15:51:01,072 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 172 transitions. [2020-04-18 15:51:01,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:01,073 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [53312334] [2020-04-18 15:51:01,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:01,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:51:01,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [53312334] [2020-04-18 15:51:01,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 12 states [2020-04-18 15:51:01,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:01,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:51:01,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=459, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:51:01,074 INFO L87 Difference]: Start difference. First operand 28237 states and 150261 transitions. Second operand 12 states. [2020-04-18 15:51:01,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:01,927 INFO L93 Difference]: Finished difference Result 83516 states and 377086 transitions. [2020-04-18 15:51:01,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:51:01,927 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 19 [2020-04-18 15:51:01,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:02,147 INFO L225 Difference]: With dead ends: 83516 [2020-04-18 15:51:02,147 INFO L226 Difference]: Without dead ends: 83431 [2020-04-18 15:51:02,147 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 137 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 395 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=377, Invalid=1029, Unknown=0, NotChecked=0, Total=1406 [2020-04-18 15:51:03,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83431 states. [2020-04-18 15:51:04,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83431 to 28061. [2020-04-18 15:51:04,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28061 states. [2020-04-18 15:51:04,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28061 states to 28061 states and 149307 transitions. [2020-04-18 15:51:04,611 INFO L78 Accepts]: Start accepts. Automaton has 28061 states and 149307 transitions. Word has length 19 [2020-04-18 15:51:04,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:04,611 INFO L479 AbstractCegarLoop]: Abstraction has 28061 states and 149307 transitions. [2020-04-18 15:51:04,611 INFO L480 AbstractCegarLoop]: Interpolant automaton has 12 states. [2020-04-18 15:51:04,611 INFO L276 IsEmpty]: Start isEmpty. Operand 28061 states and 149307 transitions. [2020-04-18 15:51:04,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:04,611 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:04,612 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:05,012 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 z3 -smt2 -in SMTLIB2_COMPLIANT=true,53 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:05,013 INFO L427 AbstractCegarLoop]: === Iteration 7 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:05,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,014 INFO L82 PathProgramCache]: Analyzing trace with hash -2138444729, now seen corresponding path program 1 times [2020-04-18 15:51:05,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:05,014 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1694061080] [2020-04-18 15:51:05,015 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,016 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 111 transitions. [2020-04-18 15:51:05,016 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states. [2020-04-18 15:51:05,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:05,017 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:05,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1952477143, now seen corresponding path program 2 times [2020-04-18 15:51:05,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,017 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799762600] [2020-04-18 15:51:05,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,024 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:05,024 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799762600] [2020-04-18 15:51:05,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:05,025 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,025 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,028 INFO L259 McrAutomatonBuilder]: Finished intersection with 33 states and 45 transitions. [2020-04-18 15:51:05,028 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,030 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:05,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:05,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:05,030 INFO L87 Difference]: Start difference. First operand 60 states. Second operand 3 states. [2020-04-18 15:51:05,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:05,037 INFO L93 Difference]: Finished difference Result 69 states and 119 transitions. [2020-04-18 15:51:05,037 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 119 transitions. [2020-04-18 15:51:05,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:05,038 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:05,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,038 INFO L82 PathProgramCache]: Analyzing trace with hash -2138426399, now seen corresponding path program 3 times [2020-04-18 15:51:05,039 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,039 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1585016912] [2020-04-18 15:51:05,039 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,055 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:05,055 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1585016912] [2020-04-18 15:51:05,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:05,056 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,057 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,059 INFO L259 McrAutomatonBuilder]: Finished intersection with 21 states and 21 transitions. [2020-04-18 15:51:05,059 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,066 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:05,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:05,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:05,067 INFO L87 Difference]: Start difference. First operand 69 states and 119 transitions. Second operand 5 states. [2020-04-18 15:51:05,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:05,099 INFO L93 Difference]: Finished difference Result 76 states and 124 transitions. [2020-04-18 15:51:05,100 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 124 transitions. [2020-04-18 15:51:05,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:05,100 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:05,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,100 INFO L82 PathProgramCache]: Analyzing trace with hash -2138444729, now seen corresponding path program 4 times [2020-04-18 15:51:05,101 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,101 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1134478630] [2020-04-18 15:51:05,101 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,136 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:05,136 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1134478630] [2020-04-18 15:51:05,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:05,137 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,138 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,140 INFO L259 McrAutomatonBuilder]: Finished intersection with 20 states and 19 transitions. [2020-04-18 15:51:05,140 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,156 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:05,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:05,156 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:05,157 INFO L87 Difference]: Start difference. First operand 76 states and 124 transitions. Second operand 7 states. [2020-04-18 15:51:05,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:05,221 INFO L93 Difference]: Finished difference Result 77 states and 124 transitions. [2020-04-18 15:51:05,221 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 124 transitions. [2020-04-18 15:51:05,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 15:51:05,222 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:05,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:05,222 INFO L82 PathProgramCache]: Analyzing trace with hash -2117255609, now seen corresponding path program 5 times [2020-04-18 15:51:05,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:05,223 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592414665] [2020-04-18 15:51:05,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:05,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:05,262 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:05,262 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592414665] [2020-04-18 15:51:05,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:05,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:05,263 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:05,263 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:05,267 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 15:51:05,267 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:05,331 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:05,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:05,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=278, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:51:05,332 INFO L87 Difference]: Start difference. First operand 77 states and 124 transitions. Second operand 11 states. [2020-04-18 15:51:05,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:05,454 INFO L93 Difference]: Finished difference Result 80 states and 127 transitions. [2020-04-18 15:51:05,454 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 127 transitions. [2020-04-18 15:51:05,454 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:05,455 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1694061080] [2020-04-18 15:51:05,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:05,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:51:05,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1694061080] [2020-04-18 15:51:05,455 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:51:05,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:05,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:05,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=510, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:51:05,456 INFO L87 Difference]: Start difference. First operand 28061 states and 149307 transitions. Second operand 13 states. [2020-04-18 15:51:06,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:06,637 INFO L93 Difference]: Finished difference Result 89447 states and 400291 transitions. [2020-04-18 15:51:06,637 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:51:06,637 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 19 [2020-04-18 15:51:06,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:06,882 INFO L225 Difference]: With dead ends: 89447 [2020-04-18 15:51:06,882 INFO L226 Difference]: Without dead ends: 89337 [2020-04-18 15:51:06,882 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 79 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 637 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=526, Invalid=1636, Unknown=0, NotChecked=0, Total=2162 [2020-04-18 15:51:07,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89337 states. [2020-04-18 15:51:11,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89337 to 29094. [2020-04-18 15:51:11,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29094 states. [2020-04-18 15:51:11,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29094 states to 29094 states and 154883 transitions. [2020-04-18 15:51:11,391 INFO L78 Accepts]: Start accepts. Automaton has 29094 states and 154883 transitions. Word has length 19 [2020-04-18 15:51:11,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:11,392 INFO L479 AbstractCegarLoop]: Abstraction has 29094 states and 154883 transitions. [2020-04-18 15:51:11,392 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:51:11,392 INFO L276 IsEmpty]: Start isEmpty. Operand 29094 states and 154883 transitions. [2020-04-18 15:51:11,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,392 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:11,392 INFO L425 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:11,393 INFO L427 AbstractCegarLoop]: === Iteration 8 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:11,393 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,393 INFO L82 PathProgramCache]: Analyzing trace with hash 1393024961, now seen corresponding path program 1 times [2020-04-18 15:51:11,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:11,393 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1429132245] [2020-04-18 15:51:11,393 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:11,395 INFO L259 McrAutomatonBuilder]: Finished intersection with 160 states and 405 transitions. [2020-04-18 15:51:11,396 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states. [2020-04-18 15:51:11,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,396 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:11,397 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,397 INFO L82 PathProgramCache]: Analyzing trace with hash 1059131539, now seen corresponding path program 2 times [2020-04-18 15:51:11,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:11,397 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2126807971] [2020-04-18 15:51:11,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:11,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:11,404 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:11,404 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2126807971] [2020-04-18 15:51:11,404 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:11,404 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:11,404 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:11,405 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:11,410 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 99 transitions. [2020-04-18 15:51:11,411 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:11,413 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:11,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:11,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:11,413 INFO L87 Difference]: Start difference. First operand 160 states. Second operand 3 states. [2020-04-18 15:51:11,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:11,422 INFO L93 Difference]: Finished difference Result 203 states and 475 transitions. [2020-04-18 15:51:11,423 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 475 transitions. [2020-04-18 15:51:11,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,423 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:11,423 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1212625151, now seen corresponding path program 3 times [2020-04-18 15:51:11,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:11,424 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [214854007] [2020-04-18 15:51:11,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:11,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:11,444 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:11,444 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [214854007] [2020-04-18 15:51:11,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:11,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:11,445 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:11,446 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:11,450 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 46 transitions. [2020-04-18 15:51:11,450 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:11,458 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:11,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:11,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:11,459 INFO L87 Difference]: Start difference. First operand 203 states and 475 transitions. Second operand 5 states. [2020-04-18 15:51:11,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:11,509 INFO L93 Difference]: Finished difference Result 238 states and 528 transitions. [2020-04-18 15:51:11,510 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 528 transitions. [2020-04-18 15:51:11,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,510 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:11,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1211616101, now seen corresponding path program 4 times [2020-04-18 15:51:11,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:11,512 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240286157] [2020-04-18 15:51:11,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:11,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:11,529 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:11,530 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240286157] [2020-04-18 15:51:11,530 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [416772728] [2020-04-18 15:51:11,531 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:11,621 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:11,622 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:11,622 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:11,623 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:11,624 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:11,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:11,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:51:11,624 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:11,625 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:11,629 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 49 transitions. [2020-04-18 15:51:11,629 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:11,633 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:11,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:11,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:51:11,634 INFO L87 Difference]: Start difference. First operand 238 states and 528 transitions. Second operand 5 states. [2020-04-18 15:51:11,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:11,684 INFO L93 Difference]: Finished difference Result 323 states and 649 transitions. [2020-04-18 15:51:11,684 INFO L276 IsEmpty]: Start isEmpty. Operand 323 states and 649 transitions. [2020-04-18 15:51:11,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,685 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:11,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,686 INFO L82 PathProgramCache]: Analyzing trace with hash 1211597771, now seen corresponding path program 5 times [2020-04-18 15:51:11,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:11,686 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532868070] [2020-04-18 15:51:11,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:11,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:11,714 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:11,715 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532868070] [2020-04-18 15:51:11,715 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [662673988] [2020-04-18 15:51:11,716 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:11,805 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 3 check-sat command(s) [2020-04-18 15:51:11,805 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:11,806 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:11,806 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:11,808 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:11,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:11,808 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:11,808 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:11,809 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:11,812 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 45 transitions. [2020-04-18 15:51:11,812 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:11,826 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:11,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:11,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2020-04-18 15:51:11,827 INFO L87 Difference]: Start difference. First operand 323 states and 649 transitions. Second operand 7 states. [2020-04-18 15:51:11,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:11,989 INFO L93 Difference]: Finished difference Result 382 states and 708 transitions. [2020-04-18 15:51:11,989 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 708 transitions. [2020-04-18 15:51:11,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:11,990 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:11,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:11,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1212072191, now seen corresponding path program 6 times [2020-04-18 15:51:11,991 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:11,991 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989312786] [2020-04-18 15:51:11,991 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:11,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:12,038 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:12,038 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989312786] [2020-04-18 15:51:12,038 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:12,039 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:12,039 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:12,040 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:12,045 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 45 transitions. [2020-04-18 15:51:12,045 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:12,046 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:12,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:12,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2020-04-18 15:51:12,046 INFO L87 Difference]: Start difference. First operand 382 states and 708 transitions. Second operand 7 states. [2020-04-18 15:51:12,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:12,189 INFO L93 Difference]: Finished difference Result 452 states and 797 transitions. [2020-04-18 15:51:12,189 INFO L276 IsEmpty]: Start isEmpty. Operand 452 states and 797 transitions. [2020-04-18 15:51:12,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:12,190 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:51:12,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:12,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1393043291, now seen corresponding path program 7 times [2020-04-18 15:51:12,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:12,191 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884988833] [2020-04-18 15:51:12,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:12,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:12,222 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:12,222 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884988833] [2020-04-18 15:51:12,222 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1844099210] [2020-04-18 15:51:12,222 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:12,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:12,308 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:12,308 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:12,311 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:12,311 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:12,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:51:12,311 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:12,312 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:12,316 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:51:12,317 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:12,381 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:12,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:51:12,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=172, Invalid=478, Unknown=0, NotChecked=0, Total=650 [2020-04-18 15:51:12,382 INFO L87 Difference]: Start difference. First operand 452 states and 797 transitions. Second operand 10 states. [2020-04-18 15:51:12,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:12,641 INFO L93 Difference]: Finished difference Result 467 states and 808 transitions. [2020-04-18 15:51:12,642 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 808 transitions. [2020-04-18 15:51:12,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:12,642 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:51:12,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:12,643 INFO L82 PathProgramCache]: Analyzing trace with hash 1393024961, now seen corresponding path program 8 times [2020-04-18 15:51:12,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:12,643 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539093715] [2020-04-18 15:51:12,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:12,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:12,682 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:12,683 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539093715] [2020-04-18 15:51:12,683 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2128276725] [2020-04-18 15:51:12,683 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:12,774 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:51:12,774 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:12,775 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:12,775 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:12,777 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:12,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:12,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:12,778 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:12,778 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:12,782 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:51:12,782 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:12,811 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:12,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:51:12,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=853, Unknown=0, NotChecked=0, Total=1122 [2020-04-18 15:51:12,811 INFO L87 Difference]: Start difference. First operand 467 states and 808 transitions. Second operand 12 states. [2020-04-18 15:51:13,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:13,287 INFO L93 Difference]: Finished difference Result 467 states and 808 transitions. [2020-04-18 15:51:13,287 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 808 transitions. [2020-04-18 15:51:13,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:13,288 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:51:13,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:13,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1414214081, now seen corresponding path program 9 times [2020-04-18 15:51:13,288 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:13,288 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768763576] [2020-04-18 15:51:13,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:13,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:13,365 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:13,365 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768763576] [2020-04-18 15:51:13,365 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1747586249] [2020-04-18 15:51:13,365 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:13,456 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:51:13,457 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:13,457 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:13,458 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:13,460 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2020-04-18 15:51:13,460 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:13,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:13,461 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:13,461 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:13,466 INFO L259 McrAutomatonBuilder]: Finished intersection with 46 states and 69 transitions. [2020-04-18 15:51:13,466 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:13,573 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:51:13,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-04-18 15:51:13,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=600, Invalid=2156, Unknown=0, NotChecked=0, Total=2756 [2020-04-18 15:51:13,574 INFO L87 Difference]: Start difference. First operand 467 states and 808 transitions. Second operand 16 states. [2020-04-18 15:51:14,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:14,220 INFO L93 Difference]: Finished difference Result 474 states and 813 transitions. [2020-04-18 15:51:14,220 INFO L276 IsEmpty]: Start isEmpty. Operand 474 states and 813 transitions. [2020-04-18 15:51:14,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:14,221 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:51:14,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:14,221 INFO L82 PathProgramCache]: Analyzing trace with hash -2073528999, now seen corresponding path program 10 times [2020-04-18 15:51:14,221 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:14,222 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63595429] [2020-04-18 15:51:14,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:14,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:14,281 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:14,282 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63595429] [2020-04-18 15:51:14,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:14,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:14,282 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:14,283 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:14,286 INFO L259 McrAutomatonBuilder]: Finished intersection with 23 states and 23 transitions. [2020-04-18 15:51:14,287 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:14,306 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:14,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:14,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=928, Invalid=3628, Unknown=0, NotChecked=0, Total=4556 [2020-04-18 15:51:14,307 INFO L87 Difference]: Start difference. First operand 474 states and 813 transitions. Second operand 7 states. [2020-04-18 15:51:14,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:14,473 INFO L93 Difference]: Finished difference Result 489 states and 824 transitions. [2020-04-18 15:51:14,473 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 824 transitions. [2020-04-18 15:51:14,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:14,474 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:51:14,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:14,474 INFO L82 PathProgramCache]: Analyzing trace with hash -2073547329, now seen corresponding path program 11 times [2020-04-18 15:51:14,475 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:14,475 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862435709] [2020-04-18 15:51:14,475 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:14,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:14,512 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:14,512 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862435709] [2020-04-18 15:51:14,512 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:14,512 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:14,512 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:14,513 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:14,516 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:51:14,516 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:14,516 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:14,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:14,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1039, Invalid=4363, Unknown=0, NotChecked=0, Total=5402 [2020-04-18 15:51:14,517 INFO L87 Difference]: Start difference. First operand 489 states and 824 transitions. Second operand 9 states. [2020-04-18 15:51:14,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:14,900 INFO L93 Difference]: Finished difference Result 489 states and 824 transitions. [2020-04-18 15:51:14,900 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 824 transitions. [2020-04-18 15:51:14,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:14,901 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:51:14,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:14,901 INFO L82 PathProgramCache]: Analyzing trace with hash -2051019009, now seen corresponding path program 12 times [2020-04-18 15:51:14,901 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:14,902 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431624110] [2020-04-18 15:51:14,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:14,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:14,947 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:14,947 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431624110] [2020-04-18 15:51:14,948 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:14,948 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:14,948 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:14,948 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:14,951 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:51:14,951 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:14,963 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:14,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:14,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1375, Invalid=6107, Unknown=0, NotChecked=0, Total=7482 [2020-04-18 15:51:14,964 INFO L87 Difference]: Start difference. First operand 489 states and 824 transitions. Second operand 9 states. [2020-04-18 15:51:15,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:15,390 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:51:15,390 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:51:15,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:15,390 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:51:15,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:15,391 INFO L82 PathProgramCache]: Analyzing trace with hash 1130516927, now seen corresponding path program 13 times [2020-04-18 15:51:15,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:15,391 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [154661275] [2020-04-18 15:51:15,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:15,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:15,429 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:15,429 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [154661275] [2020-04-18 15:51:15,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:15,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:15,430 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:15,430 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:15,434 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 53 transitions. [2020-04-18 15:51:15,435 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:15,529 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:51:15,529 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:51:15,530 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1869, Invalid=9261, Unknown=0, NotChecked=0, Total=11130 [2020-04-18 15:51:15,531 INFO L87 Difference]: Start difference. First operand 496 states and 828 transitions. Second operand 17 states. [2020-04-18 15:51:16,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:16,257 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:51:16,257 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:51:16,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:16,258 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:51:16,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:16,259 INFO L82 PathProgramCache]: Analyzing trace with hash 1131856127, now seen corresponding path program 14 times [2020-04-18 15:51:16,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:16,259 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560192221] [2020-04-18 15:51:16,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:16,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:16,296 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:16,296 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560192221] [2020-04-18 15:51:16,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:16,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:16,296 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:16,297 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:16,579 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 37 transitions. [2020-04-18 15:51:16,580 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:16,581 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:16,581 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:16,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2403, Invalid=12603, Unknown=0, NotChecked=0, Total=15006 [2020-04-18 15:51:16,582 INFO L87 Difference]: Start difference. First operand 496 states and 828 transitions. Second operand 13 states. [2020-04-18 15:51:17,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:17,169 INFO L93 Difference]: Finished difference Result 496 states and 828 transitions. [2020-04-18 15:51:17,169 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 828 transitions. [2020-04-18 15:51:17,170 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:17,171 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1429132245] [2020-04-18 15:51:17,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:17,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:51:17,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1429132245] [2020-04-18 15:51:17,171 INFO L459 AbstractCegarLoop]: Interpolant automaton has 26 states [2020-04-18 15:51:17,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:17,172 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2020-04-18 15:51:17,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2913, Invalid=15993, Unknown=0, NotChecked=0, Total=18906 [2020-04-18 15:51:17,173 INFO L87 Difference]: Start difference. First operand 29094 states and 154883 transitions. Second operand 26 states. [2020-04-18 15:51:26,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:26,750 INFO L93 Difference]: Finished difference Result 184065 states and 731893 transitions. [2020-04-18 15:51:26,750 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 232 states. [2020-04-18 15:51:26,750 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 21 [2020-04-18 15:51:26,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:27,215 INFO L225 Difference]: With dead ends: 184065 [2020-04-18 15:51:27,215 INFO L226 Difference]: Without dead ends: 183845 [2020-04-18 15:51:27,218 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 807 GetRequests, 479 SyntacticMatches, 3 SemanticMatches, 325 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47645 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=13393, Invalid=93209, Unknown=0, NotChecked=0, Total=106602 [2020-04-18 15:51:28,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183845 states. [2020-04-18 15:51:30,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183845 to 25744. [2020-04-18 15:51:30,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25744 states. [2020-04-18 15:51:30,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25744 states to 25744 states and 137181 transitions. [2020-04-18 15:51:30,532 INFO L78 Accepts]: Start accepts. Automaton has 25744 states and 137181 transitions. Word has length 21 [2020-04-18 15:51:30,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:30,532 INFO L479 AbstractCegarLoop]: Abstraction has 25744 states and 137181 transitions. [2020-04-18 15:51:30,532 INFO L480 AbstractCegarLoop]: Interpolant automaton has 26 states. [2020-04-18 15:51:30,532 INFO L276 IsEmpty]: Start isEmpty. Operand 25744 states and 137181 transitions. [2020-04-18 15:51:30,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:30,533 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:30,533 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:31,537 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 z3 -smt2 -in SMTLIB2_COMPLIANT=true,55 z3 -smt2 -in SMTLIB2_COMPLIANT=true,57 z3 -smt2 -in SMTLIB2_COMPLIANT=true,56 z3 -smt2 -in SMTLIB2_COMPLIANT=true,58 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:31,538 INFO L427 AbstractCegarLoop]: === Iteration 9 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:31,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:31,539 INFO L82 PathProgramCache]: Analyzing trace with hash 102150333, now seen corresponding path program 1 times [2020-04-18 15:51:31,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:31,539 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1004606355] [2020-04-18 15:51:31,540 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:31,540 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 57 transitions. [2020-04-18 15:51:31,541 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states. [2020-04-18 15:51:31,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:31,541 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:31,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:31,541 INFO L82 PathProgramCache]: Analyzing trace with hash 2131721569, now seen corresponding path program 2 times [2020-04-18 15:51:31,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:31,541 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1888691432] [2020-04-18 15:51:31,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:31,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:31,548 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:31,549 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1888691432] [2020-04-18 15:51:31,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:31,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:31,549 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:31,550 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:31,553 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 55 transitions. [2020-04-18 15:51:31,554 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:31,561 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:31,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:31,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:31,562 INFO L87 Difference]: Start difference. First operand 40 states. Second operand 3 states. [2020-04-18 15:51:31,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:31,564 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:51:31,564 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:51:31,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2020-04-18 15:51:31,564 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:31,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:31,564 INFO L82 PathProgramCache]: Analyzing trace with hash 102150333, now seen corresponding path program 3 times [2020-04-18 15:51:31,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:31,565 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035105148] [2020-04-18 15:51:31,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:31,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:31,581 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:31,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035105148] [2020-04-18 15:51:31,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:31,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:51:31,582 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:31,583 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:31,585 INFO L259 McrAutomatonBuilder]: Finished intersection with 22 states and 21 transitions. [2020-04-18 15:51:31,586 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:31,592 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:31,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:31,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:31,592 INFO L87 Difference]: Start difference. First operand 41 states and 57 transitions. Second operand 5 states. [2020-04-18 15:51:31,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:31,608 INFO L93 Difference]: Finished difference Result 41 states and 57 transitions. [2020-04-18 15:51:31,608 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 57 transitions. [2020-04-18 15:51:31,608 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:31,608 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1004606355] [2020-04-18 15:51:31,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:31,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:51:31,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1004606355] [2020-04-18 15:51:31,609 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:51:31,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:31,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:31,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:51:31,609 INFO L87 Difference]: Start difference. First operand 25744 states and 137181 transitions. Second operand 5 states. [2020-04-18 15:51:31,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:31,936 INFO L93 Difference]: Finished difference Result 46463 states and 236107 transitions. [2020-04-18 15:51:31,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:51:31,936 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2020-04-18 15:51:31,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:32,071 INFO L225 Difference]: With dead ends: 46463 [2020-04-18 15:51:32,071 INFO L226 Difference]: Without dead ends: 46417 [2020-04-18 15:51:32,071 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:51:32,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46417 states. [2020-04-18 15:51:33,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46417 to 31960. [2020-04-18 15:51:33,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31960 states. [2020-04-18 15:51:33,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31960 states to 31960 states and 171209 transitions. [2020-04-18 15:51:33,436 INFO L78 Accepts]: Start accepts. Automaton has 31960 states and 171209 transitions. Word has length 21 [2020-04-18 15:51:33,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:33,436 INFO L479 AbstractCegarLoop]: Abstraction has 31960 states and 171209 transitions. [2020-04-18 15:51:33,436 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:51:33,436 INFO L276 IsEmpty]: Start isEmpty. Operand 31960 states and 171209 transitions. [2020-04-18 15:51:33,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:33,437 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:33,437 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:33,438 INFO L427 AbstractCegarLoop]: === Iteration 10 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:33,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:33,438 INFO L82 PathProgramCache]: Analyzing trace with hash -1106577557, now seen corresponding path program 1 times [2020-04-18 15:51:33,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:33,438 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1926543100] [2020-04-18 15:51:33,438 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:33,440 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 203 transitions. [2020-04-18 15:51:33,440 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states. [2020-04-18 15:51:33,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:33,441 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:33,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:33,441 INFO L82 PathProgramCache]: Analyzing trace with hash 2086035311, now seen corresponding path program 2 times [2020-04-18 15:51:33,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:33,441 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529833626] [2020-04-18 15:51:33,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:33,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:33,449 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:33,449 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529833626] [2020-04-18 15:51:33,449 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:33,450 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:33,450 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:33,450 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:33,456 INFO L259 McrAutomatonBuilder]: Finished intersection with 69 states and 126 transitions. [2020-04-18 15:51:33,457 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:33,459 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:33,459 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:33,459 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:33,459 INFO L87 Difference]: Start difference. First operand 100 states. Second operand 3 states. [2020-04-18 15:51:33,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:33,466 INFO L93 Difference]: Finished difference Result 117 states and 219 transitions. [2020-04-18 15:51:33,466 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 219 transitions. [2020-04-18 15:51:33,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:33,466 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:33,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:33,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1107229367, now seen corresponding path program 3 times [2020-04-18 15:51:33,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:33,467 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1006829438] [2020-04-18 15:51:33,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:33,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:33,484 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:33,484 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1006829438] [2020-04-18 15:51:33,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:33,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:33,485 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:33,486 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:33,491 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 52 transitions. [2020-04-18 15:51:33,491 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:33,497 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:33,498 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:33,498 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:33,498 INFO L87 Difference]: Start difference. First operand 117 states and 219 transitions. Second operand 5 states. [2020-04-18 15:51:33,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:33,529 INFO L93 Difference]: Finished difference Result 124 states and 224 transitions. [2020-04-18 15:51:33,529 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 224 transitions. [2020-04-18 15:51:33,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:33,530 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:33,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:33,530 INFO L82 PathProgramCache]: Analyzing trace with hash -1107230417, now seen corresponding path program 4 times [2020-04-18 15:51:33,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:33,531 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84558291] [2020-04-18 15:51:33,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:33,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:33,545 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:33,545 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84558291] [2020-04-18 15:51:33,546 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [909752136] [2020-04-18 15:51:33,546 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:33,630 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:33,630 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:33,631 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:33,632 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:33,633 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:33,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:33,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:51:33,633 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:33,634 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:33,638 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 52 transitions. [2020-04-18 15:51:33,638 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:33,642 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:33,643 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:33,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:51:33,643 INFO L87 Difference]: Start difference. First operand 124 states and 224 transitions. Second operand 5 states. [2020-04-18 15:51:33,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:33,691 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:51:33,691 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:51:33,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:33,691 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:33,691 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:33,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1106577557, now seen corresponding path program 5 times [2020-04-18 15:51:33,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:33,692 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150642957] [2020-04-18 15:51:33,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:33,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:33,730 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:33,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150642957] [2020-04-18 15:51:33,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [311254250] [2020-04-18 15:51:33,731 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:33,826 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:33,826 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:33,827 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:33,828 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:33,830 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:33,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:33,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:33,830 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:33,831 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:33,838 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 71 transitions. [2020-04-18 15:51:33,839 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:33,906 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:51:33,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:33,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=159, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:51:33,906 INFO L87 Difference]: Start difference. First operand 131 states and 228 transitions. Second operand 11 states. [2020-04-18 15:51:34,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:34,661 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:51:34,661 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:51:34,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:34,662 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:34,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:34,662 INFO L82 PathProgramCache]: Analyzing trace with hash -617779723, now seen corresponding path program 6 times [2020-04-18 15:51:34,662 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:34,663 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728487599] [2020-04-18 15:51:34,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:34,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:34,687 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:34,688 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1728487599] [2020-04-18 15:51:34,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:34,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:34,688 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:34,689 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:34,692 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:51:34,692 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:34,698 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:34,699 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:34,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=319, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:51:34,699 INFO L87 Difference]: Start difference. First operand 131 states and 228 transitions. Second operand 7 states. [2020-04-18 15:51:34,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:34,775 INFO L93 Difference]: Finished difference Result 131 states and 228 transitions. [2020-04-18 15:51:34,776 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 228 transitions. [2020-04-18 15:51:34,776 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:34,776 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1926543100] [2020-04-18 15:51:34,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:34,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:51:34,777 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1926543100] [2020-04-18 15:51:34,777 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 15:51:34,777 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:34,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:34,778 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=494, Unknown=0, NotChecked=0, Total=702 [2020-04-18 15:51:34,778 INFO L87 Difference]: Start difference. First operand 31960 states and 171209 transitions. Second operand 13 states. [2020-04-18 15:51:35,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:35,807 INFO L93 Difference]: Finished difference Result 94350 states and 432647 transitions. [2020-04-18 15:51:35,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:51:35,808 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 23 [2020-04-18 15:51:35,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:36,060 INFO L225 Difference]: With dead ends: 94350 [2020-04-18 15:51:36,060 INFO L226 Difference]: Without dead ends: 94208 [2020-04-18 15:51:36,060 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 167 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 414 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=403, Invalid=1079, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 15:51:37,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94208 states. [2020-04-18 15:51:38,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94208 to 32410. [2020-04-18 15:51:38,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32410 states. [2020-04-18 15:51:39,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32410 states to 32410 states and 173487 transitions. [2020-04-18 15:51:39,181 INFO L78 Accepts]: Start accepts. Automaton has 32410 states and 173487 transitions. Word has length 23 [2020-04-18 15:51:39,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:39,182 INFO L479 AbstractCegarLoop]: Abstraction has 32410 states and 173487 transitions. [2020-04-18 15:51:39,182 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 15:51:39,182 INFO L276 IsEmpty]: Start isEmpty. Operand 32410 states and 173487 transitions. [2020-04-18 15:51:39,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:39,183 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:39,183 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:39,584 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 61 z3 -smt2 -in SMTLIB2_COMPLIANT=true,60 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:39,584 INFO L427 AbstractCegarLoop]: === Iteration 11 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:39,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,585 INFO L82 PathProgramCache]: Analyzing trace with hash 1026706248, now seen corresponding path program 1 times [2020-04-18 15:51:39,585 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:39,586 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1667640822] [2020-04-18 15:51:39,587 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,588 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 123 transitions. [2020-04-18 15:51:39,588 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states. [2020-04-18 15:51:39,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:39,589 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:39,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1724453322, now seen corresponding path program 2 times [2020-04-18 15:51:39,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,589 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796479289] [2020-04-18 15:51:39,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,596 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:39,596 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796479289] [2020-04-18 15:51:39,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:39,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:39,596 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:39,597 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,601 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 85 transitions. [2020-04-18 15:51:39,601 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:39,603 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:39,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:39,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:39,604 INFO L87 Difference]: Start difference. First operand 68 states. Second operand 3 states. [2020-04-18 15:51:39,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:39,610 INFO L93 Difference]: Finished difference Result 77 states and 131 transitions. [2020-04-18 15:51:39,610 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 131 transitions. [2020-04-18 15:51:39,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:39,610 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:39,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,611 INFO L82 PathProgramCache]: Analyzing trace with hash 1118728608, now seen corresponding path program 3 times [2020-04-18 15:51:39,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,611 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695198001] [2020-04-18 15:51:39,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,627 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:39,628 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1695198001] [2020-04-18 15:51:39,628 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1531088162] [2020-04-18 15:51:39,628 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:39,711 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:51:39,711 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:39,712 INFO L264 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:39,712 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:39,714 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:39,714 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:39,714 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:51:39,714 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:39,715 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,718 INFO L259 McrAutomatonBuilder]: Finished intersection with 37 states and 49 transitions. [2020-04-18 15:51:39,718 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:39,726 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:51:39,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:39,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:39,726 INFO L87 Difference]: Start difference. First operand 77 states and 131 transitions. Second operand 5 states. [2020-04-18 15:51:39,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:39,757 INFO L93 Difference]: Finished difference Result 84 states and 136 transitions. [2020-04-18 15:51:39,757 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 136 transitions. [2020-04-18 15:51:39,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:39,757 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:39,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,758 INFO L82 PathProgramCache]: Analyzing trace with hash 1026706248, now seen corresponding path program 4 times [2020-04-18 15:51:39,758 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,758 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941858639] [2020-04-18 15:51:39,758 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,787 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:39,787 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941858639] [2020-04-18 15:51:39,787 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [461316659] [2020-04-18 15:51:39,788 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:39,873 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:39,873 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:39,873 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:39,874 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:39,875 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:39,876 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:39,876 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:39,876 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:39,877 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,880 INFO L259 McrAutomatonBuilder]: Finished intersection with 32 states and 39 transitions. [2020-04-18 15:51:39,880 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:39,892 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:39,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:39,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:39,893 INFO L87 Difference]: Start difference. First operand 84 states and 136 transitions. Second operand 7 states. [2020-04-18 15:51:39,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:39,964 INFO L93 Difference]: Finished difference Result 85 states and 136 transitions. [2020-04-18 15:51:39,964 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 136 transitions. [2020-04-18 15:51:39,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:39,965 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:39,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:39,965 INFO L82 PathProgramCache]: Analyzing trace with hash -617778328, now seen corresponding path program 5 times [2020-04-18 15:51:39,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:39,965 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814088036] [2020-04-18 15:51:39,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:39,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:39,994 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:39,994 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1814088036] [2020-04-18 15:51:39,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:39,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:39,995 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:39,996 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:39,999 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:51:39,999 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:40,014 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:40,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:40,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2020-04-18 15:51:40,015 INFO L87 Difference]: Start difference. First operand 85 states and 136 transitions. Second operand 7 states. [2020-04-18 15:51:40,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:40,104 INFO L93 Difference]: Finished difference Result 88 states and 139 transitions. [2020-04-18 15:51:40,104 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 139 transitions. [2020-04-18 15:51:40,104 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:40,104 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1667640822] [2020-04-18 15:51:40,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:40,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:51:40,105 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1667640822] [2020-04-18 15:51:40,105 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-04-18 15:51:40,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:40,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:40,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=360, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:51:40,106 INFO L87 Difference]: Start difference. First operand 32410 states and 173487 transitions. Second operand 9 states. [2020-04-18 15:51:40,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:40,782 INFO L93 Difference]: Finished difference Result 89551 states and 421651 transitions. [2020-04-18 15:51:40,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-04-18 15:51:40,782 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 23 [2020-04-18 15:51:40,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:41,031 INFO L225 Difference]: With dead ends: 89551 [2020-04-18 15:51:41,031 INFO L226 Difference]: Without dead ends: 89454 [2020-04-18 15:51:41,032 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 141 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 194 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=216, Invalid=540, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:51:41,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89454 states. [2020-04-18 15:51:45,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89454 to 34508. [2020-04-18 15:51:45,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34508 states. [2020-04-18 15:51:46,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34508 states to 34508 states and 184670 transitions. [2020-04-18 15:51:46,054 INFO L78 Accepts]: Start accepts. Automaton has 34508 states and 184670 transitions. Word has length 23 [2020-04-18 15:51:46,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:46,055 INFO L479 AbstractCegarLoop]: Abstraction has 34508 states and 184670 transitions. [2020-04-18 15:51:46,055 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-04-18 15:51:46,055 INFO L276 IsEmpty]: Start isEmpty. Operand 34508 states and 184670 transitions. [2020-04-18 15:51:46,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:46,056 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:46,056 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:46,457 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 63 z3 -smt2 -in SMTLIB2_COMPLIANT=true,62 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:46,457 INFO L427 AbstractCegarLoop]: === Iteration 12 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:46,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:46,458 INFO L82 PathProgramCache]: Analyzing trace with hash -617756256, now seen corresponding path program 1 times [2020-04-18 15:51:46,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:46,458 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [589589850] [2020-04-18 15:51:46,459 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:46,461 INFO L259 McrAutomatonBuilder]: Finished intersection with 84 states and 163 transitions. [2020-04-18 15:51:46,462 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states. [2020-04-18 15:51:46,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:46,462 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:46,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:46,462 INFO L82 PathProgramCache]: Analyzing trace with hash -114932514, now seen corresponding path program 2 times [2020-04-18 15:51:46,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:46,462 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466269315] [2020-04-18 15:51:46,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:46,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:46,469 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:46,469 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466269315] [2020-04-18 15:51:46,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:46,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:46,470 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:46,470 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:46,474 INFO L259 McrAutomatonBuilder]: Finished intersection with 41 states and 57 transitions. [2020-04-18 15:51:46,474 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:46,476 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:46,476 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:46,476 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:46,476 INFO L87 Difference]: Start difference. First operand 84 states. Second operand 3 states. [2020-04-18 15:51:46,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:46,483 INFO L93 Difference]: Finished difference Result 97 states and 175 transitions. [2020-04-18 15:51:46,483 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 175 transitions. [2020-04-18 15:51:46,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:46,483 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:46,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:46,484 INFO L82 PathProgramCache]: Analyzing trace with hash -617737926, now seen corresponding path program 3 times [2020-04-18 15:51:46,484 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:46,484 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104172708] [2020-04-18 15:51:46,484 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:46,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:46,503 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:46,504 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104172708] [2020-04-18 15:51:46,504 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:46,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:51:46,504 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:46,505 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:46,509 INFO L259 McrAutomatonBuilder]: Finished intersection with 25 states and 25 transitions. [2020-04-18 15:51:46,509 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:46,518 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:46,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:46,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:46,519 INFO L87 Difference]: Start difference. First operand 97 states and 175 transitions. Second operand 5 states. [2020-04-18 15:51:46,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:46,550 INFO L93 Difference]: Finished difference Result 104 states and 180 transitions. [2020-04-18 15:51:46,551 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 180 transitions. [2020-04-18 15:51:46,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:46,551 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:46,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:46,551 INFO L82 PathProgramCache]: Analyzing trace with hash -617756256, now seen corresponding path program 4 times [2020-04-18 15:51:46,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:46,552 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938433374] [2020-04-18 15:51:46,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:46,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:46,582 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:46,582 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938433374] [2020-04-18 15:51:46,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:46,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:46,583 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:46,584 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:46,587 INFO L259 McrAutomatonBuilder]: Finished intersection with 24 states and 23 transitions. [2020-04-18 15:51:46,587 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:46,598 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:46,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:46,599 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:46,599 INFO L87 Difference]: Start difference. First operand 104 states and 180 transitions. Second operand 7 states. [2020-04-18 15:51:46,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:46,672 INFO L93 Difference]: Finished difference Result 105 states and 180 transitions. [2020-04-18 15:51:46,672 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 180 transitions. [2020-04-18 15:51:46,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 15:51:46,673 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:46,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:46,673 INFO L82 PathProgramCache]: Analyzing trace with hash -581716896, now seen corresponding path program 5 times [2020-04-18 15:51:46,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:46,673 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921356675] [2020-04-18 15:51:46,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:46,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:46,719 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:46,719 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921356675] [2020-04-18 15:51:46,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:46,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:51:46,720 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:46,721 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:46,729 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 55 transitions. [2020-04-18 15:51:46,729 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:46,855 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:51:46,856 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:46,856 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=344, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:51:46,856 INFO L87 Difference]: Start difference. First operand 105 states and 180 transitions. Second operand 13 states. [2020-04-18 15:51:46,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:46,980 INFO L93 Difference]: Finished difference Result 108 states and 183 transitions. [2020-04-18 15:51:46,980 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 183 transitions. [2020-04-18 15:51:46,981 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:46,981 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [589589850] [2020-04-18 15:51:46,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:46,981 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:51:46,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [589589850] [2020-04-18 15:51:46,982 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2020-04-18 15:51:46,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:46,982 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:51:46,982 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=594, Unknown=0, NotChecked=0, Total=812 [2020-04-18 15:51:46,982 INFO L87 Difference]: Start difference. First operand 34508 states and 184670 transitions. Second operand 15 states. [2020-04-18 15:51:48,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:48,124 INFO L93 Difference]: Finished difference Result 107380 states and 487761 transitions. [2020-04-18 15:51:48,125 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2020-04-18 15:51:48,125 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 23 [2020-04-18 15:51:48,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:51:48,445 INFO L225 Difference]: With dead ends: 107380 [2020-04-18 15:51:48,445 INFO L226 Difference]: Without dead ends: 107189 [2020-04-18 15:51:48,446 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 703 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=585, Invalid=1767, Unknown=0, NotChecked=0, Total=2352 [2020-04-18 15:51:49,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107189 states. [2020-04-18 15:51:51,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107189 to 37062. [2020-04-18 15:51:51,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37062 states. [2020-04-18 15:51:51,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37062 states to 37062 states and 198528 transitions. [2020-04-18 15:51:51,239 INFO L78 Accepts]: Start accepts. Automaton has 37062 states and 198528 transitions. Word has length 23 [2020-04-18 15:51:51,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:51:51,240 INFO L479 AbstractCegarLoop]: Abstraction has 37062 states and 198528 transitions. [2020-04-18 15:51:51,240 INFO L480 AbstractCegarLoop]: Interpolant automaton has 15 states. [2020-04-18 15:51:51,240 INFO L276 IsEmpty]: Start isEmpty. Operand 37062 states and 198528 transitions. [2020-04-18 15:51:51,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:51,242 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:51:51,242 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:51:51,243 INFO L427 AbstractCegarLoop]: === Iteration 13 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:51:51,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:51,243 INFO L82 PathProgramCache]: Analyzing trace with hash 1745706838, now seen corresponding path program 1 times [2020-04-18 15:51:51,243 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:51:51,243 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [937225744] [2020-04-18 15:51:51,243 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:51,246 INFO L259 McrAutomatonBuilder]: Finished intersection with 184 states and 457 transitions. [2020-04-18 15:51:51,247 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states. [2020-04-18 15:51:51,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:51,247 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:51:51,247 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:51,248 INFO L82 PathProgramCache]: Analyzing trace with hash 574724282, now seen corresponding path program 2 times [2020-04-18 15:51:51,248 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:51,248 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945388820] [2020-04-18 15:51:51,248 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:51,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:51,256 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:51,256 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [945388820] [2020-04-18 15:51:51,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:51,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:51:51,257 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:51,258 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:51,269 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 203 transitions. [2020-04-18 15:51:51,269 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:51,271 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:51,271 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:51:51,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:51:51,272 INFO L87 Difference]: Start difference. First operand 184 states. Second operand 3 states. [2020-04-18 15:51:51,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:51,281 INFO L93 Difference]: Finished difference Result 231 states and 531 transitions. [2020-04-18 15:51:51,281 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 531 transitions. [2020-04-18 15:51:51,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:51,282 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:51:51,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:51,282 INFO L82 PathProgramCache]: Analyzing trace with hash -899589434, now seen corresponding path program 3 times [2020-04-18 15:51:51,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:51,283 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390024731] [2020-04-18 15:51:51,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:51,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:51,301 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:51,301 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390024731] [2020-04-18 15:51:51,301 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [933216938] [2020-04-18 15:51:51,302 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:51,384 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:51:51,384 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:51,384 INFO L264 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:51,385 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:51,386 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:51,386 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:51,386 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:51:51,387 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:51,387 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:51,395 INFO L259 McrAutomatonBuilder]: Finished intersection with 73 states and 121 transitions. [2020-04-18 15:51:51,395 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:51,402 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:51:51,402 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:51:51,402 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:51:51,403 INFO L87 Difference]: Start difference. First operand 231 states and 531 transitions. Second operand 5 states. [2020-04-18 15:51:51,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:51,453 INFO L93 Difference]: Finished difference Result 294 states and 632 transitions. [2020-04-18 15:51:51,453 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 632 transitions. [2020-04-18 15:51:51,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:51,454 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:51:51,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:51,454 INFO L82 PathProgramCache]: Analyzing trace with hash 542684702, now seen corresponding path program 4 times [2020-04-18 15:51:51,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:51,455 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299821398] [2020-04-18 15:51:51,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:51,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:51,492 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:51,492 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [299821398] [2020-04-18 15:51:51,493 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [272909811] [2020-04-18 15:51:51,493 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:51,580 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:51,580 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:51,581 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:51,581 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:51,584 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:51,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:51,585 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:51:51,585 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:51,586 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:51,594 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 101 transitions. [2020-04-18 15:51:51,594 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:51,606 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:51:51,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:51,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:51:51,607 INFO L87 Difference]: Start difference. First operand 294 states and 632 transitions. Second operand 7 states. [2020-04-18 15:51:51,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:51,764 INFO L93 Difference]: Finished difference Result 336 states and 684 transitions. [2020-04-18 15:51:51,765 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 684 transitions. [2020-04-18 15:51:51,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:51,765 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:51:51,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:51,766 INFO L82 PathProgramCache]: Analyzing trace with hash 542683652, now seen corresponding path program 5 times [2020-04-18 15:51:51,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:51,766 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883235505] [2020-04-18 15:51:51,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:51,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:51,784 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:51,785 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [883235505] [2020-04-18 15:51:51,785 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [446322163] [2020-04-18 15:51:51,785 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:51,870 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:51,871 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:51,872 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:51:51,872 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:51,874 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:51,874 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:51,874 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:51:51,874 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:51,875 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:51,883 INFO L259 McrAutomatonBuilder]: Finished intersection with 68 states and 110 transitions. [2020-04-18 15:51:51,884 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:51,932 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 11 times. [2020-04-18 15:51:51,932 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:51,932 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=279, Unknown=0, NotChecked=0, Total=380 [2020-04-18 15:51:51,933 INFO L87 Difference]: Start difference. First operand 336 states and 684 transitions. Second operand 9 states. [2020-04-18 15:51:52,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:52,054 INFO L93 Difference]: Finished difference Result 434 states and 804 transitions. [2020-04-18 15:51:52,054 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 804 transitions. [2020-04-18 15:51:52,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:52,055 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:51:52,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:52,055 INFO L82 PathProgramCache]: Analyzing trace with hash 543336512, now seen corresponding path program 6 times [2020-04-18 15:51:52,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:52,056 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [600382873] [2020-04-18 15:51:52,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:52,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:52,084 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:52,085 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [600382873] [2020-04-18 15:51:52,085 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [405650806] [2020-04-18 15:51:52,086 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:52,178 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:51:52,179 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:52,180 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:52,180 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:52,182 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:52,182 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:52,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:52,182 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:52,183 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:52,190 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 101 transitions. [2020-04-18 15:51:52,191 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:52,192 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:51:52,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:52,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=345, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:51:52,192 INFO L87 Difference]: Start difference. First operand 434 states and 804 transitions. Second operand 9 states. [2020-04-18 15:51:52,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:52,399 INFO L93 Difference]: Finished difference Result 480 states and 853 transitions. [2020-04-18 15:51:52,399 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 853 transitions. [2020-04-18 15:51:52,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:52,400 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:51:52,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:52,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1103270398, now seen corresponding path program 7 times [2020-04-18 15:51:52,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:52,401 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619930900] [2020-04-18 15:51:52,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:52,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:52,426 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:52,426 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619930900] [2020-04-18 15:51:52,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:52,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:51:52,427 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:52,428 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:52,434 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:52,434 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:52,455 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:51:52,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:52,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=588, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:51:52,456 INFO L87 Difference]: Start difference. First operand 480 states and 853 transitions. Second operand 7 states. [2020-04-18 15:51:52,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:52,638 INFO L93 Difference]: Finished difference Result 499 states and 867 transitions. [2020-04-18 15:51:52,639 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 867 transitions. [2020-04-18 15:51:52,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:52,639 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:51:52,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:52,640 INFO L82 PathProgramCache]: Analyzing trace with hash 1103458138, now seen corresponding path program 8 times [2020-04-18 15:51:52,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:52,640 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227648592] [2020-04-18 15:51:52,640 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:52,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:52,666 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:52,667 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227648592] [2020-04-18 15:51:52,667 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [365145437] [2020-04-18 15:51:52,667 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:52,755 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:51:52,755 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:52,756 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:52,757 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:52,759 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:52,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:52,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:52,759 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:52,760 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:52,765 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:51:52,766 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:52,766 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:52,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:52,767 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=256, Invalid=1004, Unknown=0, NotChecked=0, Total=1260 [2020-04-18 15:51:52,767 INFO L87 Difference]: Start difference. First operand 499 states and 867 transitions. Second operand 7 states. [2020-04-18 15:51:52,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:52,919 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:52,919 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:52,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:52,920 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:51:52,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:52,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1730856598, now seen corresponding path program 9 times [2020-04-18 15:51:52,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:52,921 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376031091] [2020-04-18 15:51:52,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:52,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:52,987 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:52,987 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376031091] [2020-04-18 15:51:52,987 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1240167472] [2020-04-18 15:51:52,988 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:53,076 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:51:53,076 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:53,077 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:53,077 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:53,079 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:53,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:53,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:53,079 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:53,080 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:53,086 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:51:53,086 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:53,161 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:51:53,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:51:53,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=391, Invalid=1501, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 15:51:53,162 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 13 states. [2020-04-18 15:51:53,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:53,738 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:53,738 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:53,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:53,739 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:51:53,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:53,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1745706838, now seen corresponding path program 10 times [2020-04-18 15:51:53,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:53,740 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137043940] [2020-04-18 15:51:53,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:53,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:53,777 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:53,777 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137043940] [2020-04-18 15:51:53,777 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [277698688] [2020-04-18 15:51:53,777 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:54,225 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:51:54,226 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:54,226 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:54,227 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:54,228 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:51:54,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:54,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:54,229 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:54,230 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:54,237 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:51:54,237 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:54,348 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 20 times. [2020-04-18 15:51:54,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 15:51:54,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=3126, Unknown=0, NotChecked=0, Total=3906 [2020-04-18 15:51:54,349 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 17 states. [2020-04-18 15:51:55,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:55,031 INFO L93 Difference]: Finished difference Result 510 states and 873 transitions. [2020-04-18 15:51:55,031 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 873 transitions. [2020-04-18 15:51:55,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:55,032 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:51:55,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:55,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1848455064, now seen corresponding path program 11 times [2020-04-18 15:51:55,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:55,033 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719947068] [2020-04-18 15:51:55,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:55,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:55,071 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:55,071 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719947068] [2020-04-18 15:51:55,072 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1306208643] [2020-04-18 15:51:55,072 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:55,160 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:51:55,161 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:55,162 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:51:55,162 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:55,163 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:55,164 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:55,164 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:51:55,164 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:55,165 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:55,170 INFO L259 McrAutomatonBuilder]: Finished intersection with 41 states and 54 transitions. [2020-04-18 15:51:55,170 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:55,184 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:51:55,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:51:55,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1129, Invalid=4877, Unknown=0, NotChecked=0, Total=6006 [2020-04-18 15:51:55,185 INFO L87 Difference]: Start difference. First operand 510 states and 873 transitions. Second operand 7 states. [2020-04-18 15:51:55,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:55,357 INFO L93 Difference]: Finished difference Result 525 states and 884 transitions. [2020-04-18 15:51:55,357 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 884 transitions. [2020-04-18 15:51:55,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:55,358 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:51:55,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:55,358 INFO L82 PathProgramCache]: Analyzing trace with hash 1849107924, now seen corresponding path program 12 times [2020-04-18 15:51:55,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:55,359 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1288323072] [2020-04-18 15:51:55,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:55,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:55,397 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:55,397 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1288323072] [2020-04-18 15:51:55,398 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1568810142] [2020-04-18 15:51:55,398 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:55,481 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:51:55,481 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:51:55,482 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:55,482 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:55,484 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:55,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:55,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:55,484 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:55,485 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:55,491 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:51:55,491 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:55,492 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:51:55,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:51:55,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1251, Invalid=5721, Unknown=0, NotChecked=0, Total=6972 [2020-04-18 15:51:55,493 INFO L87 Difference]: Start difference. First operand 525 states and 884 transitions. Second operand 11 states. [2020-04-18 15:51:55,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:55,964 INFO L93 Difference]: Finished difference Result 525 states and 884 transitions. [2020-04-18 15:51:55,964 INFO L276 IsEmpty]: Start isEmpty. Operand 525 states and 884 transitions. [2020-04-18 15:51:55,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:55,965 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:51:55,966 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:55,966 INFO L82 PathProgramCache]: Analyzing trace with hash -1177775680, now seen corresponding path program 13 times [2020-04-18 15:51:55,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:55,967 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [250449232] [2020-04-18 15:51:55,967 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:55,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:56,006 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:56,006 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [250449232] [2020-04-18 15:51:56,006 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1465571620] [2020-04-18 15:51:56,007 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:51:56,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:56,093 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:51:56,094 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:51:56,096 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:51:56,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:51:56,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:51:56,097 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:56,098 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:56,104 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:51:56,105 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:56,135 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:51:56,136 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:56,136 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1608, Invalid=7704, Unknown=0, NotChecked=0, Total=9312 [2020-04-18 15:51:56,137 INFO L87 Difference]: Start difference. First operand 525 states and 884 transitions. Second operand 9 states. [2020-04-18 15:51:56,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:56,567 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:56,567 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:56,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:56,568 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:51:56,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:56,569 INFO L82 PathProgramCache]: Analyzing trace with hash -980827488, now seen corresponding path program 14 times [2020-04-18 15:51:56,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:56,569 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581500631] [2020-04-18 15:51:56,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:56,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:56,607 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:56,608 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581500631] [2020-04-18 15:51:56,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:56,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:56,608 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:56,610 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:56,615 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:56,616 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:56,616 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:56,616 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:56,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2003, Invalid=10207, Unknown=0, NotChecked=0, Total=12210 [2020-04-18 15:51:56,617 INFO L87 Difference]: Start difference. First operand 532 states and 888 transitions. Second operand 9 states. [2020-04-18 15:51:57,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:57,065 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:57,066 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:57,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:51:57,067 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:51:57,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:51:57,067 INFO L82 PathProgramCache]: Analyzing trace with hash -979488288, now seen corresponding path program 15 times [2020-04-18 15:51:57,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:51:57,067 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834164435] [2020-04-18 15:51:57,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:51:57,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:51:57,147 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:51:57,147 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834164435] [2020-04-18 15:51:57,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:51:57,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:51:57,149 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:51:57,151 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:51:57,157 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:51:57,157 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:51:57,157 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:51:57,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:51:57,159 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2446, Invalid=13304, Unknown=0, NotChecked=0, Total=15750 [2020-04-18 15:51:57,159 INFO L87 Difference]: Start difference. First operand 532 states and 888 transitions. Second operand 9 states. [2020-04-18 15:51:57,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:51:57,600 INFO L93 Difference]: Finished difference Result 532 states and 888 transitions. [2020-04-18 15:51:57,600 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 888 transitions. [2020-04-18 15:51:57,601 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:51:57,602 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [937225744] [2020-04-18 15:51:57,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:51:57,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:51:57,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [937225744] [2020-04-18 15:51:57,603 INFO L459 AbstractCegarLoop]: Interpolant automaton has 25 states [2020-04-18 15:51:57,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:51:57,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2020-04-18 15:51:57,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2844, Invalid=16062, Unknown=0, NotChecked=0, Total=18906 [2020-04-18 15:51:57,605 INFO L87 Difference]: Start difference. First operand 37062 states and 198528 transitions. Second operand 25 states. [2020-04-18 15:52:03,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:03,799 INFO L93 Difference]: Finished difference Result 181501 states and 778700 transitions. [2020-04-18 15:52:03,799 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:52:03,799 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 25 [2020-04-18 15:52:03,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:04,293 INFO L225 Difference]: With dead ends: 181501 [2020-04-18 15:52:04,294 INFO L226 Difference]: Without dead ends: 181305 [2020-04-18 15:52:04,295 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 969 GetRequests, 716 SyntacticMatches, 4 SemanticMatches, 249 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26029 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=8756, Invalid=53994, Unknown=0, NotChecked=0, Total=62750 [2020-04-18 15:52:05,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181305 states. [2020-04-18 15:52:08,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181305 to 33875. [2020-04-18 15:52:08,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33875 states. [2020-04-18 15:52:08,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33875 states to 33875 states and 181202 transitions. [2020-04-18 15:52:08,242 INFO L78 Accepts]: Start accepts. Automaton has 33875 states and 181202 transitions. Word has length 25 [2020-04-18 15:52:08,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:08,242 INFO L479 AbstractCegarLoop]: Abstraction has 33875 states and 181202 transitions. [2020-04-18 15:52:08,242 INFO L480 AbstractCegarLoop]: Interpolant automaton has 25 states. [2020-04-18 15:52:08,242 INFO L276 IsEmpty]: Start isEmpty. Operand 33875 states and 181202 transitions. [2020-04-18 15:52:08,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:08,245 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:08,245 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:10,251 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 66 z3 -smt2 -in SMTLIB2_COMPLIANT=true,71 z3 -smt2 -in SMTLIB2_COMPLIANT=true,69 z3 -smt2 -in SMTLIB2_COMPLIANT=true,67 z3 -smt2 -in SMTLIB2_COMPLIANT=true,65 z3 -smt2 -in SMTLIB2_COMPLIANT=true,73 z3 -smt2 -in SMTLIB2_COMPLIANT=true,72 z3 -smt2 -in SMTLIB2_COMPLIANT=true,70 z3 -smt2 -in SMTLIB2_COMPLIANT=true,68 z3 -smt2 -in SMTLIB2_COMPLIANT=true,64 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:10,253 INFO L427 AbstractCegarLoop]: === Iteration 14 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:10,253 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1730878670, now seen corresponding path program 1 times [2020-04-18 15:52:10,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:10,254 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1732967228] [2020-04-18 15:52:10,255 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,259 INFO L259 McrAutomatonBuilder]: Finished intersection with 232 states and 609 transitions. [2020-04-18 15:52:10,260 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states. [2020-04-18 15:52:10,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:10,261 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:10,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,261 INFO L82 PathProgramCache]: Analyzing trace with hash -290393454, now seen corresponding path program 2 times [2020-04-18 15:52:10,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:10,261 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161391804] [2020-04-18 15:52:10,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:10,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:10,268 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:10,268 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161391804] [2020-04-18 15:52:10,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:10,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:10,269 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:10,269 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,283 INFO L259 McrAutomatonBuilder]: Finished intersection with 129 states and 275 transitions. [2020-04-18 15:52:10,283 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:10,285 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:10,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:10,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:10,286 INFO L87 Difference]: Start difference. First operand 232 states. Second operand 3 states. [2020-04-18 15:52:10,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:10,296 INFO L93 Difference]: Finished difference Result 295 states and 715 transitions. [2020-04-18 15:52:10,296 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 715 transitions. [2020-04-18 15:52:10,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:10,297 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:10,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1948435474, now seen corresponding path program 3 times [2020-04-18 15:52:10,298 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:10,298 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651863128] [2020-04-18 15:52:10,298 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:10,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:10,330 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,331 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651863128] [2020-04-18 15:52:10,331 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:10,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:52:10,331 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:10,332 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,342 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 181 transitions. [2020-04-18 15:52:10,343 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:10,349 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:52:10,349 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:10,349 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:10,349 INFO L87 Difference]: Start difference. First operand 295 states and 715 transitions. Second operand 5 states. [2020-04-18 15:52:10,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:10,401 INFO L93 Difference]: Finished difference Result 386 states and 864 transitions. [2020-04-18 15:52:10,401 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 864 transitions. [2020-04-18 15:52:10,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:10,402 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:10,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,405 INFO L82 PathProgramCache]: Analyzing trace with hash -506161338, now seen corresponding path program 4 times [2020-04-18 15:52:10,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:10,405 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1934353156] [2020-04-18 15:52:10,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:10,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:10,450 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,450 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1934353156] [2020-04-18 15:52:10,450 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1926417509] [2020-04-18 15:52:10,451 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:10,541 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:10,542 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:10,542 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:10,543 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:10,544 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,544 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:10,544 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:52:10,545 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:10,545 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,555 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 145 transitions. [2020-04-18 15:52:10,555 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:10,565 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:52:10,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:10,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:52:10,566 INFO L87 Difference]: Start difference. First operand 386 states and 864 transitions. Second operand 7 states. [2020-04-18 15:52:10,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:10,721 INFO L93 Difference]: Finished difference Result 428 states and 916 transitions. [2020-04-18 15:52:10,721 INFO L276 IsEmpty]: Start isEmpty. Operand 428 states and 916 transitions. [2020-04-18 15:52:10,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:10,722 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:10,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:10,722 INFO L82 PathProgramCache]: Analyzing trace with hash -506162388, now seen corresponding path program 5 times [2020-04-18 15:52:10,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:10,722 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1254315450] [2020-04-18 15:52:10,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:10,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:10,738 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,739 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1254315450] [2020-04-18 15:52:10,739 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1819927739] [2020-04-18 15:52:10,739 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:10,827 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:10,828 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:10,828 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:10,829 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:10,830 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:10,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:10,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:52:10,831 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:10,831 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:10,842 INFO L259 McrAutomatonBuilder]: Finished intersection with 92 states and 162 transitions. [2020-04-18 15:52:10,842 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:10,939 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 19 times. [2020-04-18 15:52:10,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:52:10,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=343, Unknown=0, NotChecked=0, Total=462 [2020-04-18 15:52:10,940 INFO L87 Difference]: Start difference. First operand 428 states and 916 transitions. Second operand 11 states. [2020-04-18 15:52:11,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:11,095 INFO L93 Difference]: Finished difference Result 554 states and 1080 transitions. [2020-04-18 15:52:11,095 INFO L276 IsEmpty]: Start isEmpty. Operand 554 states and 1080 transitions. [2020-04-18 15:52:11,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:11,096 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:11,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:11,096 INFO L82 PathProgramCache]: Analyzing trace with hash -505509528, now seen corresponding path program 6 times [2020-04-18 15:52:11,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:11,097 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984991208] [2020-04-18 15:52:11,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:11,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:11,124 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:11,124 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984991208] [2020-04-18 15:52:11,124 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [507994900] [2020-04-18 15:52:11,124 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:11,214 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:52:11,215 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:11,215 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:11,216 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:11,217 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:11,217 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:11,217 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:11,217 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:11,218 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:11,228 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 145 transitions. [2020-04-18 15:52:11,228 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:11,239 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:52:11,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 15:52:11,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2020-04-18 15:52:11,240 INFO L87 Difference]: Start difference. First operand 554 states and 1080 transitions. Second operand 10 states. [2020-04-18 15:52:13,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:13,323 INFO L93 Difference]: Finished difference Result 600 states and 1129 transitions. [2020-04-18 15:52:13,324 INFO L276 IsEmpty]: Start isEmpty. Operand 600 states and 1129 transitions. [2020-04-18 15:52:13,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:13,325 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:52:13,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:13,325 INFO L82 PathProgramCache]: Analyzing trace with hash 1103954630, now seen corresponding path program 7 times [2020-04-18 15:52:13,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:13,325 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311357735] [2020-04-18 15:52:13,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:13,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:13,351 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:13,351 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311357735] [2020-04-18 15:52:13,352 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:13,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:52:13,352 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:13,353 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:13,360 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:52:13,360 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:13,379 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:52:13,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:13,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=680, Unknown=0, NotChecked=0, Total=870 [2020-04-18 15:52:13,380 INFO L87 Difference]: Start difference. First operand 600 states and 1129 transitions. Second operand 7 states. [2020-04-18 15:52:13,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:13,564 INFO L93 Difference]: Finished difference Result 619 states and 1143 transitions. [2020-04-18 15:52:13,565 INFO L276 IsEmpty]: Start isEmpty. Operand 619 states and 1143 transitions. [2020-04-18 15:52:13,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:13,566 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:52:13,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:13,566 INFO L82 PathProgramCache]: Analyzing trace with hash 1103480210, now seen corresponding path program 8 times [2020-04-18 15:52:13,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:13,566 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [414625314] [2020-04-18 15:52:13,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:13,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:13,590 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:13,591 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [414625314] [2020-04-18 15:52:13,591 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1836899099] [2020-04-18 15:52:13,591 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:13,678 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:52:13,678 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:13,679 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:13,679 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:13,682 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:13,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:13,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:13,682 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:13,684 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:13,690 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 57 transitions. [2020-04-18 15:52:13,690 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:13,691 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:52:13,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:13,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=1123, Unknown=0, NotChecked=0, Total=1406 [2020-04-18 15:52:13,692 INFO L87 Difference]: Start difference. First operand 619 states and 1143 transitions. Second operand 7 states. [2020-04-18 15:52:13,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:13,844 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:52:13,844 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:52:13,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:13,845 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:52:13,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:13,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1730878670, now seen corresponding path program 9 times [2020-04-18 15:52:13,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:13,846 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905922206] [2020-04-18 15:52:13,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:13,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:13,888 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:13,888 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905922206] [2020-04-18 15:52:13,889 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1440850966] [2020-04-18 15:52:13,889 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:13,973 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:52:13,973 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:13,974 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:13,975 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:13,976 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:13,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:13,976 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:13,977 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:13,978 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:13,984 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:52:13,984 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:14,044 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 15:52:14,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 15:52:14,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1583, Unknown=0, NotChecked=0, Total=1980 [2020-04-18 15:52:14,045 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 13 states. [2020-04-18 15:52:14,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:14,613 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:52:14,613 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:52:14,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:14,614 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:52:14,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:14,615 INFO L82 PathProgramCache]: Analyzing trace with hash 1766918030, now seen corresponding path program 10 times [2020-04-18 15:52:14,615 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:14,615 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191788360] [2020-04-18 15:52:14,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:14,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:14,652 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:14,652 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191788360] [2020-04-18 15:52:14,652 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [153490224] [2020-04-18 15:52:14,653 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:14,741 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:14,741 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:14,742 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:14,742 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:14,744 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:14,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:14,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:14,745 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:14,745 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:14,754 INFO L259 McrAutomatonBuilder]: Finished intersection with 66 states and 105 transitions. [2020-04-18 15:52:14,754 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:14,950 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 28 times. [2020-04-18 15:52:14,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 15:52:14,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=854, Invalid=3436, Unknown=0, NotChecked=0, Total=4290 [2020-04-18 15:52:14,951 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 19 states. [2020-04-18 15:52:15,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:15,749 INFO L93 Difference]: Finished difference Result 630 states and 1149 transitions. [2020-04-18 15:52:15,749 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 1149 transitions. [2020-04-18 15:52:15,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:15,750 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:52:15,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:15,751 INFO L82 PathProgramCache]: Analyzing trace with hash -601001104, now seen corresponding path program 11 times [2020-04-18 15:52:15,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:15,751 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766220425] [2020-04-18 15:52:15,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:15,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:15,777 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:15,777 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766220425] [2020-04-18 15:52:15,778 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [973504295] [2020-04-18 15:52:15,778 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:15,869 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:15,870 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:15,870 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:15,871 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:15,873 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:15,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:15,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:15,874 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:15,875 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:15,884 INFO L259 McrAutomatonBuilder]: Finished intersection with 53 states and 78 transitions. [2020-04-18 15:52:15,885 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:15,911 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:52:15,911 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:15,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1219, Invalid=5261, Unknown=0, NotChecked=0, Total=6480 [2020-04-18 15:52:15,912 INFO L87 Difference]: Start difference. First operand 630 states and 1149 transitions. Second operand 7 states. [2020-04-18 15:52:16,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:16,092 INFO L93 Difference]: Finished difference Result 645 states and 1160 transitions. [2020-04-18 15:52:16,092 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 1160 transitions. [2020-04-18 15:52:16,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:16,093 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:52:16,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:16,093 INFO L82 PathProgramCache]: Analyzing trace with hash -600348244, now seen corresponding path program 12 times [2020-04-18 15:52:16,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:16,094 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233732182] [2020-04-18 15:52:16,094 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:16,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:16,139 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:16,139 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233732182] [2020-04-18 15:52:16,139 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [945956675] [2020-04-18 15:52:16,139 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:16,225 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:52:16,225 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:16,226 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:16,227 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:16,230 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:16,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:16,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:16,230 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:16,231 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:16,238 INFO L259 McrAutomatonBuilder]: Finished intersection with 58 states and 89 transitions. [2020-04-18 15:52:16,238 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:16,266 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 17 times. [2020-04-18 15:52:16,266 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:52:16,267 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1350, Invalid=6132, Unknown=0, NotChecked=0, Total=7482 [2020-04-18 15:52:16,267 INFO L87 Difference]: Start difference. First operand 645 states and 1160 transitions. Second operand 12 states. [2020-04-18 15:52:16,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:16,762 INFO L93 Difference]: Finished difference Result 645 states and 1160 transitions. [2020-04-18 15:52:16,762 INFO L276 IsEmpty]: Start isEmpty. Operand 645 states and 1160 transitions. [2020-04-18 15:52:16,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:16,764 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:52:16,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:16,764 INFO L82 PathProgramCache]: Analyzing trace with hash 667735448, now seen corresponding path program 13 times [2020-04-18 15:52:16,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:16,765 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824734512] [2020-04-18 15:52:16,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:16,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:16,833 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:16,833 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [824734512] [2020-04-18 15:52:16,833 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1579102929] [2020-04-18 15:52:16,833 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 82 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:16,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:16,922 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:16,922 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:16,924 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:16,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:16,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:16,924 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:16,925 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:16,931 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:52:16,931 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:16,948 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:52:16,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:16,949 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1722, Invalid=8178, Unknown=0, NotChecked=0, Total=9900 [2020-04-18 15:52:16,950 INFO L87 Difference]: Start difference. First operand 645 states and 1160 transitions. Second operand 9 states. [2020-04-18 15:52:17,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:17,378 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:52:17,378 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:52:17,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:17,379 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:52:17,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:17,380 INFO L82 PathProgramCache]: Analyzing trace with hash -980805416, now seen corresponding path program 14 times [2020-04-18 15:52:17,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:17,380 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257969571] [2020-04-18 15:52:17,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:17,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:17,414 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:17,415 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257969571] [2020-04-18 15:52:17,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:17,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:52:17,415 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:17,416 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:17,420 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:52:17,420 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:17,421 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:17,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:17,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2133, Invalid=10749, Unknown=0, NotChecked=0, Total=12882 [2020-04-18 15:52:17,422 INFO L87 Difference]: Start difference. First operand 652 states and 1164 transitions. Second operand 9 states. [2020-04-18 15:52:17,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:17,888 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:52:17,888 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:52:17,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:17,889 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:52:17,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:17,890 INFO L82 PathProgramCache]: Analyzing trace with hash -958277096, now seen corresponding path program 15 times [2020-04-18 15:52:17,890 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:17,890 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894094339] [2020-04-18 15:52:17,890 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:17,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:17,937 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:17,937 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894094339] [2020-04-18 15:52:17,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:17,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:52:17,938 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:17,938 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:17,942 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:52:17,942 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:17,943 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:17,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:17,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2586, Invalid=13926, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:52:17,944 INFO L87 Difference]: Start difference. First operand 652 states and 1164 transitions. Second operand 9 states. [2020-04-18 15:52:18,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:18,357 INFO L93 Difference]: Finished difference Result 652 states and 1164 transitions. [2020-04-18 15:52:18,357 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 1164 transitions. [2020-04-18 15:52:18,358 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:52:18,359 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1732967228] [2020-04-18 15:52:18,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:52:18,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:52:18,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1732967228] [2020-04-18 15:52:18,359 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2020-04-18 15:52:18,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:52:18,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2020-04-18 15:52:18,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2999, Invalid=16741, Unknown=0, NotChecked=0, Total=19740 [2020-04-18 15:52:18,362 INFO L87 Difference]: Start difference. First operand 33875 states and 181202 transitions. Second operand 28 states. [2020-04-18 15:52:23,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:23,246 INFO L93 Difference]: Finished difference Result 176501 states and 756208 transitions. [2020-04-18 15:52:23,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 155 states. [2020-04-18 15:52:23,247 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 25 [2020-04-18 15:52:23,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:23,744 INFO L225 Difference]: With dead ends: 176501 [2020-04-18 15:52:23,744 INFO L226 Difference]: Without dead ends: 176298 [2020-04-18 15:52:23,747 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 992 GetRequests, 730 SyntacticMatches, 10 SemanticMatches, 252 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26407 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=9190, Invalid=55072, Unknown=0, NotChecked=0, Total=64262 [2020-04-18 15:52:25,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176298 states. [2020-04-18 15:52:27,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176298 to 30886. [2020-04-18 15:52:27,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30886 states. [2020-04-18 15:52:27,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30886 states to 30886 states and 165408 transitions. [2020-04-18 15:52:27,450 INFO L78 Accepts]: Start accepts. Automaton has 30886 states and 165408 transitions. Word has length 25 [2020-04-18 15:52:27,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:27,451 INFO L479 AbstractCegarLoop]: Abstraction has 30886 states and 165408 transitions. [2020-04-18 15:52:27,451 INFO L480 AbstractCegarLoop]: Interpolant automaton has 28 states. [2020-04-18 15:52:27,451 INFO L276 IsEmpty]: Start isEmpty. Operand 30886 states and 165408 transitions. [2020-04-18 15:52:27,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:27,453 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:27,453 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:29,255 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 78 z3 -smt2 -in SMTLIB2_COMPLIANT=true,75 z3 -smt2 -in SMTLIB2_COMPLIANT=true,81 z3 -smt2 -in SMTLIB2_COMPLIANT=true,79 z3 -smt2 -in SMTLIB2_COMPLIANT=true,77 z3 -smt2 -in SMTLIB2_COMPLIANT=true,82 z3 -smt2 -in SMTLIB2_COMPLIANT=true,76 z3 -smt2 -in SMTLIB2_COMPLIANT=true,74 z3 -smt2 -in SMTLIB2_COMPLIANT=true,80 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:29,256 INFO L427 AbstractCegarLoop]: === Iteration 15 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:29,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:29,257 INFO L82 PathProgramCache]: Analyzing trace with hash -1177752213, now seen corresponding path program 1 times [2020-04-18 15:52:29,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:29,258 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [709327008] [2020-04-18 15:52:29,258 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:29,261 INFO L259 McrAutomatonBuilder]: Finished intersection with 168 states and 417 transitions. [2020-04-18 15:52:29,262 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states. [2020-04-18 15:52:29,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:29,263 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:29,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:29,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1256748813, now seen corresponding path program 2 times [2020-04-18 15:52:29,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:29,263 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747320463] [2020-04-18 15:52:29,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:29,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:29,270 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:29,270 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747320463] [2020-04-18 15:52:29,270 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:29,270 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:29,271 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:29,271 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:29,278 INFO L259 McrAutomatonBuilder]: Finished intersection with 63 states and 103 transitions. [2020-04-18 15:52:29,278 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:29,280 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:29,281 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:29,281 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:29,281 INFO L87 Difference]: Start difference. First operand 168 states. Second operand 3 states. [2020-04-18 15:52:29,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:29,290 INFO L93 Difference]: Finished difference Result 211 states and 487 transitions. [2020-04-18 15:52:29,290 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 487 transitions. [2020-04-18 15:52:29,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:29,291 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:29,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:29,291 INFO L82 PathProgramCache]: Analyzing trace with hash -558114339, now seen corresponding path program 3 times [2020-04-18 15:52:29,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:29,291 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [783086192] [2020-04-18 15:52:29,292 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:29,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:29,311 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:29,311 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [783086192] [2020-04-18 15:52:29,311 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [816006286] [2020-04-18 15:52:29,312 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 83 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:29,396 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:52:29,397 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:29,397 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:29,398 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:29,400 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:29,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:29,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:52:29,401 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:29,402 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:29,407 INFO L259 McrAutomatonBuilder]: Finished intersection with 51 states and 79 transitions. [2020-04-18 15:52:29,407 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:29,414 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 15:52:29,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:29,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:29,415 INFO L87 Difference]: Start difference. First operand 211 states and 487 transitions. Second operand 5 states. [2020-04-18 15:52:29,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:29,465 INFO L93 Difference]: Finished difference Result 274 states and 588 transitions. [2020-04-18 15:52:29,465 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 588 transitions. [2020-04-18 15:52:29,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:29,465 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:29,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:29,466 INFO L82 PathProgramCache]: Analyzing trace with hash -306385085, now seen corresponding path program 4 times [2020-04-18 15:52:29,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:29,466 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13894546] [2020-04-18 15:52:29,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:29,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:29,492 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:29,492 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13894546] [2020-04-18 15:52:29,492 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1475848575] [2020-04-18 15:52:29,492 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 84 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:29,579 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:29,580 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:29,580 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:29,581 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:29,582 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:29,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:29,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:52:29,583 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:29,583 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:29,848 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:52:29,848 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:29,858 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 15:52:29,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:29,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:52:29,859 INFO L87 Difference]: Start difference. First operand 274 states and 588 transitions. Second operand 7 states. [2020-04-18 15:52:30,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:30,019 INFO L93 Difference]: Finished difference Result 320 states and 644 transitions. [2020-04-18 15:52:30,019 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 644 transitions. [2020-04-18 15:52:30,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:30,019 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:30,020 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:30,020 INFO L82 PathProgramCache]: Analyzing trace with hash -398407445, now seen corresponding path program 5 times [2020-04-18 15:52:30,020 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:30,020 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089584953] [2020-04-18 15:52:30,021 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:30,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:30,059 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:30,059 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089584953] [2020-04-18 15:52:30,059 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1301250723] [2020-04-18 15:52:30,059 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 85 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:30,152 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:30,152 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:30,153 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:30,154 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:30,157 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:30,157 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:30,157 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:30,157 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:30,158 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:30,166 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:52:30,166 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:30,192 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:52:30,192 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:30,192 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=186, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:52:30,192 INFO L87 Difference]: Start difference. First operand 320 states and 644 transitions. Second operand 9 states. [2020-04-18 15:52:30,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:30,533 INFO L93 Difference]: Finished difference Result 337 states and 655 transitions. [2020-04-18 15:52:30,533 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 655 transitions. [2020-04-18 15:52:30,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:30,534 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:30,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:30,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1177752213, now seen corresponding path program 6 times [2020-04-18 15:52:30,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:30,535 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270412858] [2020-04-18 15:52:30,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:30,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:30,573 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:30,573 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270412858] [2020-04-18 15:52:30,573 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [309957181] [2020-04-18 15:52:30,573 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 86 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:30,660 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2020-04-18 15:52:30,660 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:30,661 INFO L264 TraceCheckSpWp]: Trace formula consists of 118 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:30,662 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:30,664 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:30,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:30,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:30,664 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:30,665 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:30,669 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 41 transitions. [2020-04-18 15:52:30,669 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:30,692 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 15:52:30,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:30,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=784, Unknown=0, NotChecked=0, Total=1056 [2020-04-18 15:52:30,693 INFO L87 Difference]: Start difference. First operand 337 states and 655 transitions. Second operand 9 states. [2020-04-18 15:52:31,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:31,103 INFO L93 Difference]: Finished difference Result 366 states and 689 transitions. [2020-04-18 15:52:31,103 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 689 transitions. [2020-04-18 15:52:31,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:31,104 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:52:31,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:31,104 INFO L82 PathProgramCache]: Analyzing trace with hash -1664960285, now seen corresponding path program 7 times [2020-04-18 15:52:31,104 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:31,104 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352285307] [2020-04-18 15:52:31,105 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:31,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:31,128 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:31,128 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352285307] [2020-04-18 15:52:31,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:31,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:52:31,128 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:31,130 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:31,136 INFO L259 McrAutomatonBuilder]: Finished intersection with 55 states and 83 transitions. [2020-04-18 15:52:31,136 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:31,224 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 18 times. [2020-04-18 15:52:31,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:52:31,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=652, Invalid=2654, Unknown=0, NotChecked=0, Total=3306 [2020-04-18 15:52:31,225 INFO L87 Difference]: Start difference. First operand 366 states and 689 transitions. Second operand 11 states. [2020-04-18 15:52:31,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:31,511 INFO L93 Difference]: Finished difference Result 411 states and 747 transitions. [2020-04-18 15:52:31,512 INFO L276 IsEmpty]: Start isEmpty. Operand 411 states and 747 transitions. [2020-04-18 15:52:31,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:31,512 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:52:31,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:31,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1756982645, now seen corresponding path program 8 times [2020-04-18 15:52:31,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:31,513 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299185732] [2020-04-18 15:52:31,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:31,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:31,575 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:31,575 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299185732] [2020-04-18 15:52:31,575 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1969978579] [2020-04-18 15:52:31,575 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 87 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:31,661 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:52:31,662 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:31,663 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:31,663 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:31,666 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:31,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:31,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:31,666 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:31,667 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:31,673 INFO L259 McrAutomatonBuilder]: Finished intersection with 50 states and 73 transitions. [2020-04-18 15:52:31,673 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:31,674 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 13 times. [2020-04-18 15:52:31,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:52:31,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=790, Invalid=3500, Unknown=0, NotChecked=0, Total=4290 [2020-04-18 15:52:31,675 INFO L87 Difference]: Start difference. First operand 411 states and 747 transitions. Second operand 11 states. [2020-04-18 15:52:32,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:32,119 INFO L93 Difference]: Finished difference Result 414 states and 748 transitions. [2020-04-18 15:52:32,119 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 748 transitions. [2020-04-18 15:52:32,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:32,120 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:52:32,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:32,120 INFO L82 PathProgramCache]: Analyzing trace with hash 667736843, now seen corresponding path program 9 times [2020-04-18 15:52:32,121 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:32,121 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850075651] [2020-04-18 15:52:32,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:32,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:32,160 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:32,160 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850075651] [2020-04-18 15:52:32,160 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2049087198] [2020-04-18 15:52:32,160 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 88 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:32,245 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:52:32,246 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:32,246 INFO L264 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:32,247 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:32,248 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:32,248 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:32,249 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:32,249 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:32,249 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:32,255 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 57 transitions. [2020-04-18 15:52:32,255 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:32,267 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 15:52:32,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:32,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1111, Invalid=5051, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 15:52:32,268 INFO L87 Difference]: Start difference. First operand 414 states and 748 transitions. Second operand 9 states. [2020-04-18 15:52:32,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:32,706 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:52:32,707 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:52:32,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:32,707 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:52:32,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:32,708 INFO L82 PathProgramCache]: Analyzing trace with hash -979464821, now seen corresponding path program 10 times [2020-04-18 15:52:32,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:32,708 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854637450] [2020-04-18 15:52:32,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:32,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:32,746 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:32,746 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854637450] [2020-04-18 15:52:32,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:32,747 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:52:32,747 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:32,747 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:32,751 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:52:32,751 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:32,768 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:32,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:32,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1568, Invalid=7744, Unknown=0, NotChecked=0, Total=9312 [2020-04-18 15:52:32,770 INFO L87 Difference]: Start difference. First operand 449 states and 785 transitions. Second operand 9 states. [2020-04-18 15:52:33,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:33,215 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:52:33,216 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:52:33,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:33,216 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:52:33,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:33,217 INFO L82 PathProgramCache]: Analyzing trace with hash -958275701, now seen corresponding path program 11 times [2020-04-18 15:52:33,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:33,217 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772063715] [2020-04-18 15:52:33,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:33,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:33,263 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:33,263 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [772063715] [2020-04-18 15:52:33,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:33,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 15:52:33,263 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:33,264 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:33,268 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:52:33,268 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:33,268 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:33,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:33,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1995, Invalid=10887, Unknown=0, NotChecked=0, Total=12882 [2020-04-18 15:52:33,270 INFO L87 Difference]: Start difference. First operand 449 states and 785 transitions. Second operand 9 states. [2020-04-18 15:52:33,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:33,706 INFO L93 Difference]: Finished difference Result 449 states and 785 transitions. [2020-04-18 15:52:33,707 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 785 transitions. [2020-04-18 15:52:33,707 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:52:33,708 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [709327008] [2020-04-18 15:52:33,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:52:33,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 15:52:33,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [709327008] [2020-04-18 15:52:33,709 INFO L459 AbstractCegarLoop]: Interpolant automaton has 19 states [2020-04-18 15:52:33,709 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:52:33,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 15:52:33,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2434, Invalid=14078, Unknown=0, NotChecked=0, Total=16512 [2020-04-18 15:52:33,711 INFO L87 Difference]: Start difference. First operand 30886 states and 165408 transitions. Second operand 19 states. [2020-04-18 15:52:37,441 WARN L192 SmtUtils]: Spent 242.00 ms on a formula simplification that was a NOOP. DAG size: 13 [2020-04-18 15:52:39,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:39,472 INFO L93 Difference]: Finished difference Result 200901 states and 821147 transitions. [2020-04-18 15:52:39,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 189 states. [2020-04-18 15:52:39,472 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 25 [2020-04-18 15:52:39,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:40,056 INFO L225 Difference]: With dead ends: 200901 [2020-04-18 15:52:40,056 INFO L226 Difference]: Without dead ends: 199946 [2020-04-18 15:52:40,059 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 774 GetRequests, 498 SyntacticMatches, 0 SemanticMatches, 276 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33765 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=9444, Invalid=67562, Unknown=0, NotChecked=0, Total=77006 [2020-04-18 15:52:42,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199946 states. [2020-04-18 15:52:43,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199946 to 30079. [2020-04-18 15:52:43,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30079 states. [2020-04-18 15:52:44,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30079 states to 30079 states and 160377 transitions. [2020-04-18 15:52:44,102 INFO L78 Accepts]: Start accepts. Automaton has 30079 states and 160377 transitions. Word has length 25 [2020-04-18 15:52:44,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:44,102 INFO L479 AbstractCegarLoop]: Abstraction has 30079 states and 160377 transitions. [2020-04-18 15:52:44,102 INFO L480 AbstractCegarLoop]: Interpolant automaton has 19 states. [2020-04-18 15:52:44,103 INFO L276 IsEmpty]: Start isEmpty. Operand 30079 states and 160377 transitions. [2020-04-18 15:52:44,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:44,105 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:44,105 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:45,307 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 85 z3 -smt2 -in SMTLIB2_COMPLIANT=true,87 z3 -smt2 -in SMTLIB2_COMPLIANT=true,88 z3 -smt2 -in SMTLIB2_COMPLIANT=true,83 z3 -smt2 -in SMTLIB2_COMPLIANT=true,84 z3 -smt2 -in SMTLIB2_COMPLIANT=true,86 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:45,308 INFO L427 AbstractCegarLoop]: === Iteration 16 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:45,309 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:45,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1698987747, now seen corresponding path program 1 times [2020-04-18 15:52:45,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:45,309 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1131913839] [2020-04-18 15:52:45,310 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:45,312 INFO L259 McrAutomatonBuilder]: Finished intersection with 48 states and 69 transitions. [2020-04-18 15:52:45,312 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states. [2020-04-18 15:52:45,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:45,312 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:45,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:45,312 INFO L82 PathProgramCache]: Analyzing trace with hash 86770305, now seen corresponding path program 2 times [2020-04-18 15:52:45,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:45,313 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375762295] [2020-04-18 15:52:45,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:45,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:45,319 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:45,320 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375762295] [2020-04-18 15:52:45,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:45,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:45,320 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:45,321 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:45,324 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 67 transitions. [2020-04-18 15:52:45,324 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:45,326 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:45,326 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:45,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:45,327 INFO L87 Difference]: Start difference. First operand 48 states. Second operand 3 states. [2020-04-18 15:52:45,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:45,329 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:52:45,329 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:52:45,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2020-04-18 15:52:45,329 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:45,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:45,330 INFO L82 PathProgramCache]: Analyzing trace with hash -1698987747, now seen corresponding path program 3 times [2020-04-18 15:52:45,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:45,330 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908979897] [2020-04-18 15:52:45,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:45,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:45,348 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:45,348 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908979897] [2020-04-18 15:52:45,349 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:45,349 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 15:52:45,349 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:45,350 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:45,353 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 25 transitions. [2020-04-18 15:52:45,353 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:45,360 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:45,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:45,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:45,361 INFO L87 Difference]: Start difference. First operand 49 states and 69 transitions. Second operand 5 states. [2020-04-18 15:52:45,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:45,376 INFO L93 Difference]: Finished difference Result 49 states and 69 transitions. [2020-04-18 15:52:45,376 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 69 transitions. [2020-04-18 15:52:45,376 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:52:45,376 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1131913839] [2020-04-18 15:52:45,376 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:52:45,376 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 15:52:45,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1131913839] [2020-04-18 15:52:45,377 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 15:52:45,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:52:45,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:45,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:52:45,377 INFO L87 Difference]: Start difference. First operand 30079 states and 160377 transitions. Second operand 5 states. [2020-04-18 15:52:46,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:46,005 INFO L93 Difference]: Finished difference Result 53630 states and 274420 transitions. [2020-04-18 15:52:46,005 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 15:52:46,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2020-04-18 15:52:46,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:46,176 INFO L225 Difference]: With dead ends: 53630 [2020-04-18 15:52:46,177 INFO L226 Difference]: Without dead ends: 53567 [2020-04-18 15:52:46,177 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 15:52:46,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53567 states. [2020-04-18 15:52:47,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53567 to 37992. [2020-04-18 15:52:47,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37992 states. [2020-04-18 15:52:47,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37992 states to 37992 states and 202246 transitions. [2020-04-18 15:52:47,715 INFO L78 Accepts]: Start accepts. Automaton has 37992 states and 202246 transitions. Word has length 25 [2020-04-18 15:52:47,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:47,716 INFO L479 AbstractCegarLoop]: Abstraction has 37992 states and 202246 transitions. [2020-04-18 15:52:47,716 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 15:52:47,716 INFO L276 IsEmpty]: Start isEmpty. Operand 37992 states and 202246 transitions. [2020-04-18 15:52:47,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:47,720 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:47,720 INFO L425 BasicCegarLoop]: trace histogram [5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:47,720 INFO L427 AbstractCegarLoop]: === Iteration 17 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:47,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:47,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1444696671, now seen corresponding path program 1 times [2020-04-18 15:52:47,720 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:47,720 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1435577605] [2020-04-18 15:52:47,721 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:47,723 INFO L259 McrAutomatonBuilder]: Finished intersection with 124 states and 255 transitions. [2020-04-18 15:52:47,723 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states. [2020-04-18 15:52:47,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:47,724 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:47,724 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:47,724 INFO L82 PathProgramCache]: Analyzing trace with hash 2033040719, now seen corresponding path program 2 times [2020-04-18 15:52:47,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:47,724 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277922998] [2020-04-18 15:52:47,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:47,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:47,732 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:47,732 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277922998] [2020-04-18 15:52:47,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:47,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:47,733 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:47,733 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:47,743 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 158 transitions. [2020-04-18 15:52:47,743 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:47,745 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:47,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:47,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:47,746 INFO L87 Difference]: Start difference. First operand 124 states. Second operand 3 states. [2020-04-18 15:52:47,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:47,752 INFO L93 Difference]: Finished difference Result 145 states and 275 transitions. [2020-04-18 15:52:47,752 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 275 transitions. [2020-04-18 15:52:47,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:47,753 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:47,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:47,753 INFO L82 PathProgramCache]: Analyzing trace with hash -1444956951, now seen corresponding path program 3 times [2020-04-18 15:52:47,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:47,754 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [366149473] [2020-04-18 15:52:47,754 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:47,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:47,772 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:47,772 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [366149473] [2020-04-18 15:52:47,773 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:47,773 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 15:52:47,773 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:47,774 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:47,781 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 64 transitions. [2020-04-18 15:52:47,781 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:47,788 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:52:47,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:47,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:47,789 INFO L87 Difference]: Start difference. First operand 145 states and 275 transitions. Second operand 5 states. [2020-04-18 15:52:47,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:47,822 INFO L93 Difference]: Finished difference Result 152 states and 280 transitions. [2020-04-18 15:52:47,822 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 280 transitions. [2020-04-18 15:52:47,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:47,822 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:47,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:47,823 INFO L82 PathProgramCache]: Analyzing trace with hash -1444958001, now seen corresponding path program 4 times [2020-04-18 15:52:47,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:47,823 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [125912857] [2020-04-18 15:52:47,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:47,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:47,842 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:47,843 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [125912857] [2020-04-18 15:52:47,843 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490110537] [2020-04-18 15:52:47,843 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 89 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:47,932 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:47,932 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:47,932 INFO L264 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:47,933 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:47,935 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:47,935 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:47,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:52:47,936 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:47,937 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:47,946 INFO L259 McrAutomatonBuilder]: Finished intersection with 47 states and 64 transitions. [2020-04-18 15:52:47,946 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:47,964 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 15:52:47,964 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:47,964 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2020-04-18 15:52:47,964 INFO L87 Difference]: Start difference. First operand 152 states and 280 transitions. Second operand 5 states. [2020-04-18 15:52:47,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:47,993 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:47,993 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:47,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:47,993 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:47,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:47,993 INFO L82 PathProgramCache]: Analyzing trace with hash -1444696671, now seen corresponding path program 5 times [2020-04-18 15:52:47,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:47,994 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1332004133] [2020-04-18 15:52:47,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:47,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:48,021 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:48,022 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1332004133] [2020-04-18 15:52:48,022 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [768023660] [2020-04-18 15:52:48,022 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 90 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:48,108 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2020-04-18 15:52:48,109 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:48,109 INFO L264 TraceCheckSpWp]: Trace formula consists of 128 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:48,110 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:48,112 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2020-04-18 15:52:48,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:48,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:48,113 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:48,114 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:48,124 INFO L259 McrAutomatonBuilder]: Finished intersection with 60 states and 91 transitions. [2020-04-18 15:52:48,124 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:48,240 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:52:48,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:52:48,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=179, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:52:48,241 INFO L87 Difference]: Start difference. First operand 159 states and 284 transitions. Second operand 12 states. [2020-04-18 15:52:48,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:48,346 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:48,346 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:48,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:48,347 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:48,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:48,347 INFO L82 PathProgramCache]: Analyzing trace with hash -639654315, now seen corresponding path program 6 times [2020-04-18 15:52:48,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:48,348 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025681115] [2020-04-18 15:52:48,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:48,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:48,381 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2020-04-18 15:52:48,381 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1025681115] [2020-04-18 15:52:48,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:48,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 15:52:48,381 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:48,383 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:48,387 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 27 transitions. [2020-04-18 15:52:48,387 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:48,397 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:48,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:48,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=348, Unknown=0, NotChecked=0, Total=506 [2020-04-18 15:52:48,397 INFO L87 Difference]: Start difference. First operand 159 states and 284 transitions. Second operand 7 states. [2020-04-18 15:52:48,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:48,477 INFO L93 Difference]: Finished difference Result 159 states and 284 transitions. [2020-04-18 15:52:48,478 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 284 transitions. [2020-04-18 15:52:48,478 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 15:52:48,478 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1435577605] [2020-04-18 15:52:48,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 15:52:48,479 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2020-04-18 15:52:48,479 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1435577605] [2020-04-18 15:52:48,479 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2020-04-18 15:52:48,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 15:52:48,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 15:52:48,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=226, Invalid=530, Unknown=0, NotChecked=0, Total=756 [2020-04-18 15:52:48,480 INFO L87 Difference]: Start difference. First operand 37992 states and 202246 transitions. Second operand 14 states. [2020-04-18 15:52:49,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:49,834 INFO L93 Difference]: Finished difference Result 106781 states and 495616 transitions. [2020-04-18 15:52:49,835 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2020-04-18 15:52:49,835 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2020-04-18 15:52:49,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 15:52:50,160 INFO L225 Difference]: With dead ends: 106781 [2020-04-18 15:52:50,160 INFO L226 Difference]: Without dead ends: 106582 [2020-04-18 15:52:50,161 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 197 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 433 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=430, Invalid=1130, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:52:51,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106582 states. [2020-04-18 15:52:52,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106582 to 38476. [2020-04-18 15:52:52,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38476 states. [2020-04-18 15:52:53,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38476 states to 38476 states and 204312 transitions. [2020-04-18 15:52:53,122 INFO L78 Accepts]: Start accepts. Automaton has 38476 states and 204312 transitions. Word has length 27 [2020-04-18 15:52:53,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 15:52:53,122 INFO L479 AbstractCegarLoop]: Abstraction has 38476 states and 204312 transitions. [2020-04-18 15:52:53,122 INFO L480 AbstractCegarLoop]: Interpolant automaton has 14 states. [2020-04-18 15:52:53,122 INFO L276 IsEmpty]: Start isEmpty. Operand 38476 states and 204312 transitions. [2020-04-18 15:52:53,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:53,126 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 15:52:53,126 INFO L425 BasicCegarLoop]: trace histogram [4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 15:52:53,527 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 89 z3 -smt2 -in SMTLIB2_COMPLIANT=true,90 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:53,528 INFO L427 AbstractCegarLoop]: === Iteration 18 === [thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, thr1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 15:52:53,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:53,529 INFO L82 PathProgramCache]: Analyzing trace with hash -1707919879, now seen corresponding path program 1 times [2020-04-18 15:52:53,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 15:52:53,529 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [781407991] [2020-04-18 15:52:53,530 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:53,540 INFO L259 McrAutomatonBuilder]: Finished intersection with 484 states and 1539 transitions. [2020-04-18 15:52:53,542 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states. [2020-04-18 15:52:53,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:53,543 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 15:52:53,543 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:53,543 INFO L82 PathProgramCache]: Analyzing trace with hash -961346275, now seen corresponding path program 2 times [2020-04-18 15:52:53,543 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:53,543 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1760472540] [2020-04-18 15:52:53,543 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:53,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:53,552 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2020-04-18 15:52:53,552 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1760472540] [2020-04-18 15:52:53,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:52:53,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 15:52:53,553 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:53,554 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:53,570 INFO L259 McrAutomatonBuilder]: Finished intersection with 121 states and 244 transitions. [2020-04-18 15:52:53,570 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:53,573 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 15:52:53,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 15:52:53,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 15:52:53,573 INFO L87 Difference]: Start difference. First operand 484 states. Second operand 3 states. [2020-04-18 15:52:53,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:53,589 INFO L93 Difference]: Finished difference Result 649 states and 1927 transitions. [2020-04-18 15:52:53,589 INFO L276 IsEmpty]: Start isEmpty. Operand 649 states and 1927 transitions. [2020-04-18 15:52:53,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:53,590 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 15:52:53,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:53,591 INFO L82 PathProgramCache]: Analyzing trace with hash -437619671, now seen corresponding path program 3 times [2020-04-18 15:52:53,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:53,591 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993211888] [2020-04-18 15:52:53,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:53,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:53,623 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:53,623 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993211888] [2020-04-18 15:52:53,623 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2036307326] [2020-04-18 15:52:53,624 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 91 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:53,715 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2020-04-18 15:52:53,715 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:53,716 INFO L264 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:53,717 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:53,719 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:53,720 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:53,720 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2020-04-18 15:52:53,720 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:53,721 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:53,735 INFO L259 McrAutomatonBuilder]: Finished intersection with 101 states and 186 transitions. [2020-04-18 15:52:53,735 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:53,744 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 15:52:53,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 15:52:53,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 15:52:53,745 INFO L87 Difference]: Start difference. First operand 649 states and 1927 transitions. Second operand 5 states. [2020-04-18 15:52:53,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:53,811 INFO L93 Difference]: Finished difference Result 922 states and 2584 transitions. [2020-04-18 15:52:53,811 INFO L276 IsEmpty]: Start isEmpty. Operand 922 states and 2584 transitions. [2020-04-18 15:52:53,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:53,813 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 15:52:53,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:53,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1223947389, now seen corresponding path program 4 times [2020-04-18 15:52:53,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:53,813 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218290165] [2020-04-18 15:52:53,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:53,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:53,842 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:53,842 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [218290165] [2020-04-18 15:52:53,842 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1833697472] [2020-04-18 15:52:53,842 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 92 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:53,930 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:53,930 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:53,931 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:53,932 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:53,933 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:53,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:53,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2020-04-18 15:52:53,934 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:53,935 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:53,952 INFO L259 McrAutomatonBuilder]: Finished intersection with 93 states and 162 transitions. [2020-04-18 15:52:53,952 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:53,972 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 9 times. [2020-04-18 15:52:53,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 15:52:53,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2020-04-18 15:52:53,973 INFO L87 Difference]: Start difference. First operand 922 states and 2584 transitions. Second operand 7 states. [2020-04-18 15:52:54,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:54,196 INFO L93 Difference]: Finished difference Result 1322 states and 3426 transitions. [2020-04-18 15:52:54,196 INFO L276 IsEmpty]: Start isEmpty. Operand 1322 states and 3426 transitions. [2020-04-18 15:52:54,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:54,198 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 15:52:54,198 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:54,198 INFO L82 PathProgramCache]: Analyzing trace with hash 218326747, now seen corresponding path program 5 times [2020-04-18 15:52:54,198 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:54,199 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318167491] [2020-04-18 15:52:54,199 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:54,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:54,237 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:54,238 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1318167491] [2020-04-18 15:52:54,238 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [90660614] [2020-04-18 15:52:54,238 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 93 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:54,330 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:54,330 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:54,331 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:54,332 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:54,335 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:54,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:54,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:52:54,335 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:54,337 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:54,355 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 142 transitions. [2020-04-18 15:52:54,355 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:54,379 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:52:54,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:54,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=186, Unknown=0, NotChecked=0, Total=272 [2020-04-18 15:52:54,379 INFO L87 Difference]: Start difference. First operand 1322 states and 3426 transitions. Second operand 9 states. [2020-04-18 15:52:55,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:55,002 INFO L93 Difference]: Finished difference Result 1581 states and 3887 transitions. [2020-04-18 15:52:55,002 INFO L276 IsEmpty]: Start isEmpty. Operand 1581 states and 3887 transitions. [2020-04-18 15:52:55,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:55,004 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 15:52:55,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:55,005 INFO L82 PathProgramCache]: Analyzing trace with hash 218325697, now seen corresponding path program 6 times [2020-04-18 15:52:55,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:55,005 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574216490] [2020-04-18 15:52:55,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:55,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:55,024 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:55,025 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574216490] [2020-04-18 15:52:55,025 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1433324169] [2020-04-18 15:52:55,025 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 94 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:55,117 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2020-04-18 15:52:55,117 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:55,118 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 4 conjunts are in the unsatisfiable core [2020-04-18 15:52:55,119 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:55,121 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:55,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:55,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2020-04-18 15:52:55,122 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:55,123 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:55,138 INFO L259 McrAutomatonBuilder]: Finished intersection with 93 states and 160 transitions. [2020-04-18 15:52:55,138 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:55,198 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 13 times. [2020-04-18 15:52:55,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:55,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=1027, Unknown=0, NotChecked=0, Total=1332 [2020-04-18 15:52:55,199 INFO L87 Difference]: Start difference. First operand 1581 states and 3887 transitions. Second operand 9 states. [2020-04-18 15:52:55,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:55,360 INFO L93 Difference]: Finished difference Result 2422 states and 5388 transitions. [2020-04-18 15:52:55,360 INFO L276 IsEmpty]: Start isEmpty. Operand 2422 states and 5388 transitions. [2020-04-18 15:52:55,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:55,362 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 15:52:55,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:55,363 INFO L82 PathProgramCache]: Analyzing trace with hash 218978557, now seen corresponding path program 7 times [2020-04-18 15:52:55,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:55,363 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175335669] [2020-04-18 15:52:55,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:55,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:55,389 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:55,390 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175335669] [2020-04-18 15:52:55,390 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [741322367] [2020-04-18 15:52:55,390 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 95 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:55,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:55,485 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:55,486 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:55,488 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:55,488 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:55,488 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:55,488 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:55,489 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:55,503 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 135 transitions. [2020-04-18 15:52:55,504 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:55,517 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 10 times. [2020-04-18 15:52:55,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:55,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=326, Invalid=1234, Unknown=0, NotChecked=0, Total=1560 [2020-04-18 15:52:55,518 INFO L87 Difference]: Start difference. First operand 2422 states and 5388 transitions. Second operand 9 states. [2020-04-18 15:52:55,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:55,865 INFO L93 Difference]: Finished difference Result 2894 states and 6143 transitions. [2020-04-18 15:52:55,865 INFO L276 IsEmpty]: Start isEmpty. Operand 2894 states and 6143 transitions. [2020-04-18 15:52:55,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:55,868 INFO L105 Mcr]: ---- MCR iteration 6 ---- [2020-04-18 15:52:55,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:55,868 INFO L82 PathProgramCache]: Analyzing trace with hash 1828442715, now seen corresponding path program 8 times [2020-04-18 15:52:55,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:55,868 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [975531221] [2020-04-18 15:52:55,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:55,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:55,909 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:55,910 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [975531221] [2020-04-18 15:52:55,910 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2116119952] [2020-04-18 15:52:55,910 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 96 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:56,000 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:52:56,000 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:56,001 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:56,002 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:56,005 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2020-04-18 15:52:56,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:56,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:52:56,006 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:56,007 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:56,022 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 106 transitions. [2020-04-18 15:52:56,022 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:56,037 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 15:52:56,037 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:52:56,037 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=414, Invalid=1748, Unknown=0, NotChecked=0, Total=2162 [2020-04-18 15:52:56,038 INFO L87 Difference]: Start difference. First operand 2894 states and 6143 transitions. Second operand 9 states. [2020-04-18 15:52:56,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:56,756 INFO L93 Difference]: Finished difference Result 3077 states and 6384 transitions. [2020-04-18 15:52:56,757 INFO L276 IsEmpty]: Start isEmpty. Operand 3077 states and 6384 transitions. [2020-04-18 15:52:56,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:56,759 INFO L105 Mcr]: ---- MCR iteration 7 ---- [2020-04-18 15:52:56,759 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:56,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1827968295, now seen corresponding path program 9 times [2020-04-18 15:52:56,760 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:56,760 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514090868] [2020-04-18 15:52:56,760 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:56,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:56,787 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:56,787 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514090868] [2020-04-18 15:52:56,787 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1101391342] [2020-04-18 15:52:56,788 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 97 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:56,878 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:52:56,878 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:56,879 INFO L264 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:52:56,880 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:56,882 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:56,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:56,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:52:56,883 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:56,884 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:56,905 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 143 transitions. [2020-04-18 15:52:56,905 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:57,002 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 22 times. [2020-04-18 15:52:57,002 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:52:57,003 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=855, Invalid=3975, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 15:52:57,003 INFO L87 Difference]: Start difference. First operand 3077 states and 6384 transitions. Second operand 15 states. [2020-04-18 15:52:57,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:57,543 INFO L93 Difference]: Finished difference Result 3704 states and 7396 transitions. [2020-04-18 15:52:57,543 INFO L276 IsEmpty]: Start isEmpty. Operand 3704 states and 7396 transitions. [2020-04-18 15:52:57,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:57,546 INFO L105 Mcr]: ---- MCR iteration 8 ---- [2020-04-18 15:52:57,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:57,546 INFO L82 PathProgramCache]: Analyzing trace with hash -1839600541, now seen corresponding path program 10 times [2020-04-18 15:52:57,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:57,547 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834914013] [2020-04-18 15:52:57,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:57,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:58,102 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:58,102 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834914013] [2020-04-18 15:52:58,102 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1909025701] [2020-04-18 15:52:58,102 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 98 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:58,189 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:52:58,189 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:58,190 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:58,191 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:58,193 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:58,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:58,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:58,194 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:58,195 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:58,209 INFO L259 McrAutomatonBuilder]: Finished intersection with 67 states and 106 transitions. [2020-04-18 15:52:58,209 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:58,211 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:52:58,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:52:58,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=919, Invalid=4483, Unknown=0, NotChecked=0, Total=5402 [2020-04-18 15:52:58,211 INFO L87 Difference]: Start difference. First operand 3704 states and 7396 transitions. Second operand 11 states. [2020-04-18 15:52:59,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:52:59,015 INFO L93 Difference]: Finished difference Result 3735 states and 7427 transitions. [2020-04-18 15:52:59,015 INFO L276 IsEmpty]: Start isEmpty. Operand 3735 states and 7427 transitions. [2020-04-18 15:52:59,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:52:59,018 INFO L105 Mcr]: ---- MCR iteration 9 ---- [2020-04-18 15:52:59,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:52:59,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1803561181, now seen corresponding path program 11 times [2020-04-18 15:52:59,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:52:59,018 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101861345] [2020-04-18 15:52:59,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:52:59,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:52:59,055 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:59,055 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101861345] [2020-04-18 15:52:59,056 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [728748390] [2020-04-18 15:52:59,056 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 99 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:52:59,150 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2020-04-18 15:52:59,150 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:52:59,151 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:52:59,151 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:52:59,153 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:52:59,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:52:59,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:52:59,153 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:52:59,154 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:52:59,167 INFO L259 McrAutomatonBuilder]: Finished intersection with 83 states and 142 transitions. [2020-04-18 15:52:59,167 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:52:59,169 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 15 times. [2020-04-18 15:52:59,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 15:52:59,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1087, Invalid=5719, Unknown=0, NotChecked=0, Total=6806 [2020-04-18 15:52:59,170 INFO L87 Difference]: Start difference. First operand 3735 states and 7427 transitions. Second operand 15 states. [2020-04-18 15:53:00,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:53:00,250 INFO L93 Difference]: Finished difference Result 3766 states and 7458 transitions. [2020-04-18 15:53:00,250 INFO L276 IsEmpty]: Start isEmpty. Operand 3766 states and 7458 transitions. [2020-04-18 15:53:00,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:53:00,253 INFO L105 Mcr]: ---- MCR iteration 10 ---- [2020-04-18 15:53:00,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:53:00,254 INFO L82 PathProgramCache]: Analyzing trace with hash -390105629, now seen corresponding path program 12 times [2020-04-18 15:53:00,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:53:00,254 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799579187] [2020-04-18 15:53:00,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:53:00,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:00,281 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:00,282 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799579187] [2020-04-18 15:53:00,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 15:53:00,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 15:53:00,282 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:53:00,283 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:53:00,300 INFO L259 McrAutomatonBuilder]: Finished intersection with 113 states and 206 transitions. [2020-04-18 15:53:00,300 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:53:00,450 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 25 times. [2020-04-18 15:53:00,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:53:00,451 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1381, Invalid=7931, Unknown=0, NotChecked=0, Total=9312 [2020-04-18 15:53:00,451 INFO L87 Difference]: Start difference. First operand 3766 states and 7458 transitions. Second operand 12 states. [2020-04-18 15:53:01,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:53:01,065 INFO L93 Difference]: Finished difference Result 4072 states and 7870 transitions. [2020-04-18 15:53:01,065 INFO L276 IsEmpty]: Start isEmpty. Operand 4072 states and 7870 transitions. [2020-04-18 15:53:01,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:53:01,072 INFO L105 Mcr]: ---- MCR iteration 11 ---- [2020-04-18 15:53:01,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:53:01,072 INFO L82 PathProgramCache]: Analyzing trace with hash 1052168507, now seen corresponding path program 13 times [2020-04-18 15:53:01,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:53:01,073 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570122261] [2020-04-18 15:53:01,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:53:01,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:01,146 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:01,147 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570122261] [2020-04-18 15:53:01,147 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2090936902] [2020-04-18 15:53:01,147 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 100 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:53:01,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:01,287 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:53:01,289 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:53:01,293 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:01,293 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:53:01,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:53:01,294 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:53:01,297 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:53:01,327 INFO L259 McrAutomatonBuilder]: Finished intersection with 103 states and 186 transitions. [2020-04-18 15:53:01,327 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:53:01,330 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 15:53:01,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 15:53:01,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1550, Invalid=9370, Unknown=0, NotChecked=0, Total=10920 [2020-04-18 15:53:01,331 INFO L87 Difference]: Start difference. First operand 4072 states and 7870 transitions. Second operand 11 states. [2020-04-18 15:53:02,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:53:02,127 INFO L93 Difference]: Finished difference Result 4106 states and 7897 transitions. [2020-04-18 15:53:02,127 INFO L276 IsEmpty]: Start isEmpty. Operand 4106 states and 7897 transitions. [2020-04-18 15:53:02,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:53:02,131 INFO L105 Mcr]: ---- MCR iteration 12 ---- [2020-04-18 15:53:02,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:53:02,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1090938693, now seen corresponding path program 14 times [2020-04-18 15:53:02,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:53:02,131 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73436692] [2020-04-18 15:53:02,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:53:02,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:02,171 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:02,171 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73436692] [2020-04-18 15:53:02,171 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1500734737] [2020-04-18 15:53:02,171 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 101 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:53:02,260 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2020-04-18 15:53:02,260 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:53:02,261 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:53:02,262 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:53:02,264 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:02,265 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:53:02,265 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2020-04-18 15:53:02,265 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:53:02,266 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:53:02,279 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 150 transitions. [2020-04-18 15:53:02,279 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:53:02,297 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 15:53:02,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 15:53:02,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1932, Invalid=12110, Unknown=0, NotChecked=0, Total=14042 [2020-04-18 15:53:02,298 INFO L87 Difference]: Start difference. First operand 4106 states and 7897 transitions. Second operand 9 states. [2020-04-18 15:53:03,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:53:03,056 INFO L93 Difference]: Finished difference Result 4326 states and 8149 transitions. [2020-04-18 15:53:03,056 INFO L276 IsEmpty]: Start isEmpty. Operand 4326 states and 8149 transitions. [2020-04-18 15:53:03,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:53:03,060 INFO L105 Mcr]: ---- MCR iteration 13 ---- [2020-04-18 15:53:03,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:53:03,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1090750953, now seen corresponding path program 15 times [2020-04-18 15:53:03,060 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:53:03,060 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764041347] [2020-04-18 15:53:03,060 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:53:03,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:03,117 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:03,117 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764041347] [2020-04-18 15:53:03,117 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1628317161] [2020-04-18 15:53:03,117 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 102 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:53:03,210 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2020-04-18 15:53:03,210 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:53:03,211 INFO L264 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 6 conjunts are in the unsatisfiable core [2020-04-18 15:53:03,212 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:53:03,214 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:03,214 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:53:03,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2020-04-18 15:53:03,215 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:53:03,216 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:53:03,237 INFO L259 McrAutomatonBuilder]: Finished intersection with 103 states and 179 transitions. [2020-04-18 15:53:03,238 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:53:03,325 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 26 times. [2020-04-18 15:53:03,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-04-18 15:53:03,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2581, Invalid=16879, Unknown=0, NotChecked=0, Total=19460 [2020-04-18 15:53:03,327 INFO L87 Difference]: Start difference. First operand 4326 states and 8149 transitions. Second operand 16 states. [2020-04-18 15:53:03,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 15:53:03,938 INFO L93 Difference]: Finished difference Result 4570 states and 8415 transitions. [2020-04-18 15:53:03,938 INFO L276 IsEmpty]: Start isEmpty. Operand 4570 states and 8415 transitions. [2020-04-18 15:53:03,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2020-04-18 15:53:03,941 INFO L105 Mcr]: ---- MCR iteration 14 ---- [2020-04-18 15:53:03,942 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 15:53:03,942 INFO L82 PathProgramCache]: Analyzing trace with hash -463352493, now seen corresponding path program 16 times [2020-04-18 15:53:03,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 15:53:03,942 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877851337] [2020-04-18 15:53:03,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 15:53:03,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 15:53:03,983 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:03,983 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877851337] [2020-04-18 15:53:03,983 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [364778488] [2020-04-18 15:53:03,983 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 103 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 103 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:53:04,075 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2020-04-18 15:53:04,075 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2020-04-18 15:53:04,076 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 8 conjunts are in the unsatisfiable core [2020-04-18 15:53:04,077 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2020-04-18 15:53:04,078 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2020-04-18 15:53:04,078 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2020-04-18 15:53:04,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2020-04-18 15:53:04,079 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 15:53:04,080 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 15:53:04,093 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 150 transitions. [2020-04-18 15:53:04,093 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 15:53:04,110 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 11 times. [2020-04-18 15:53:04,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 15:53:04,112 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=2647, Invalid=17945, Unknown=0, NotChecked=0, Total=20592 [2020-04-18 15:53:04,112 INFO L87 Difference]: Start difference. First operand 4570 states and 8415 transitions. Second operand 12 states. Received shutdown request... [2020-04-18 15:53:07,444 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 92 z3 -smt2 -in SMTLIB2_COMPLIANT=true,97 z3 -smt2 -in SMTLIB2_COMPLIANT=true,100 z3 -smt2 -in SMTLIB2_COMPLIANT=true,98 z3 -smt2 -in SMTLIB2_COMPLIANT=true,93 z3 -smt2 -in SMTLIB2_COMPLIANT=true,103 z3 -smt2 -in SMTLIB2_COMPLIANT=true,94 z3 -smt2 -in SMTLIB2_COMPLIANT=true,102 z3 -smt2 -in SMTLIB2_COMPLIANT=true,91 z3 -smt2 -in SMTLIB2_COMPLIANT=true,96 z3 -smt2 -in SMTLIB2_COMPLIANT=true,101 z3 -smt2 -in SMTLIB2_COMPLIANT=true,95 z3 -smt2 -in SMTLIB2_COMPLIANT=true,99 z3 -smt2 -in SMTLIB2_COMPLIANT=true [2020-04-18 15:53:07,445 FATAL L? ?]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:128) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.isCorrect(StrategyModuleMcr.java:64) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.checkFeasibility(AutomatonFreeRefinementEngine.java:242) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.executeStrategy(AutomatonFreeRefinementEngine.java:166) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.AutomatonFreeRefinementEngine.(AutomatonFreeRefinementEngine.java:85) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:75) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:511) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:436) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:370) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.CegarLoopResult.iterate(CegarLoopResult.java:142) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterateNew(TraceAbstractionStarter.java:352) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:175) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:127) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:120) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:317) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.run(DefaultToolchainJob.java:145) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.addInternalsAndSuccessors(NestedWordAutomatonReachableStates.java:1067) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates$ReachableStatesComputation.(NestedWordAutomatonReachableStates.java:966) at de.uni_freiburg.informatik.ultimate.automata.nestedword.reachablestates.NestedWordAutomatonReachableStates.(NestedWordAutomatonReachableStates.java:187) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.computeDifference(Difference.java:137) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:90) at de.uni_freiburg.informatik.ultimate.automata.nestedword.operations.Difference.(Difference.java:115) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.Mcr.exploreInterleavings(Mcr.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.Mcr.(Mcr.java:86) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:126) ... 23 more [2020-04-18 15:53:07,451 INFO L168 Benchmark]: Toolchain (without parser) took 239794.51 ms. Allocated memory was 138.4 MB in the beginning and 3.0 GB in the end (delta: 2.9 GB). Free memory was 102.3 MB in the beginning and 827.4 MB in the end (delta: -725.1 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,452 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 138.4 MB. Free memory was 121.5 MB in the beginning and 121.3 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,452 INFO L168 Benchmark]: CACSL2BoogieTranslator took 669.66 ms. Allocated memory was 138.4 MB in the beginning and 204.5 MB in the end (delta: 66.1 MB). Free memory was 100.2 MB in the beginning and 164.4 MB in the end (delta: -64.2 MB). Peak memory consumption was 27.4 MB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,452 INFO L168 Benchmark]: Boogie Procedure Inliner took 50.68 ms. Allocated memory is still 204.5 MB. Free memory was 164.4 MB in the beginning and 162.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,452 INFO L168 Benchmark]: Boogie Preprocessor took 59.50 ms. Allocated memory is still 204.5 MB. Free memory was 162.3 MB in the beginning and 161.0 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,453 INFO L168 Benchmark]: RCFGBuilder took 417.11 ms. Allocated memory is still 204.5 MB. Free memory was 161.0 MB in the beginning and 141.1 MB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,453 INFO L168 Benchmark]: TraceAbstraction took 238567.49 ms. Allocated memory was 204.5 MB in the beginning and 3.0 GB in the end (delta: 2.8 GB). Free memory was 141.1 MB in the beginning and 827.4 MB in the end (delta: -686.3 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. [2020-04-18 15:53:07,455 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 138.4 MB. Free memory was 121.5 MB in the beginning and 121.3 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 669.66 ms. Allocated memory was 138.4 MB in the beginning and 204.5 MB in the end (delta: 66.1 MB). Free memory was 100.2 MB in the beginning and 164.4 MB in the end (delta: -64.2 MB). Peak memory consumption was 27.4 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 50.68 ms. Allocated memory is still 204.5 MB. Free memory was 164.4 MB in the beginning and 162.3 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 59.50 ms. Allocated memory is still 204.5 MB. Free memory was 162.3 MB in the beginning and 161.0 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 7.1 GB. * RCFGBuilder took 417.11 ms. Allocated memory is still 204.5 MB. Free memory was 161.0 MB in the beginning and 141.1 MB in the end (delta: 19.8 MB). Peak memory consumption was 19.8 MB. Max. memory is 7.1 GB. * TraceAbstraction took 238567.49 ms. Allocated memory was 204.5 MB in the beginning and 3.0 GB in the end (delta: 2.8 GB). Free memory was 141.1 MB in the beginning and 827.4 MB in the end (delta: -686.3 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.3s, 55 ProgramPointsBefore, 18 ProgramPointsAfterwards, 51 TransitionsBefore, 12 TransitionsAfterwards, 692 CoEnabledTransitionPairs, 6 FixpointIterations, 13 TrivialSequentialCompositions, 27 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 5 ConcurrentYvCompositions, 2 ChoiceCompositions, 389 VarBasedMoverChecksPositive, 4 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 576 CheckedPairsTotal, 45 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.3s, 76 ProgramPointsBefore, 31 ProgramPointsAfterwards, 69 TransitionsBefore, 21 TransitionsAfterwards, 1108 CoEnabledTransitionPairs, 6 FixpointIterations, 25 TrivialSequentialCompositions, 27 ConcurrentSequentialCompositions, 2 TrivialYvCompositions, 5 ConcurrentYvCompositions, 3 ChoiceCompositions, 577 VarBasedMoverChecksPositive, 8 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 964 CheckedPairsTotal, 59 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.6s, 97 ProgramPointsBefore, 41 ProgramPointsAfterwards, 87 TransitionsBefore, 27 TransitionsAfterwards, 1608 CoEnabledTransitionPairs, 6 FixpointIterations, 32 TrivialSequentialCompositions, 30 ConcurrentSequentialCompositions, 7 TrivialYvCompositions, 4 ConcurrentYvCompositions, 4 ChoiceCompositions, 781 VarBasedMoverChecksPositive, 14 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 1796 CheckedPairsTotal, 73 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.7s, 118 ProgramPointsBefore, 51 ProgramPointsAfterwards, 105 TransitionsBefore, 33 TransitionsAfterwards, 2192 CoEnabledTransitionPairs, 6 FixpointIterations, 43 TrivialSequentialCompositions, 34 ConcurrentSequentialCompositions, 10 TrivialYvCompositions, 5 ConcurrentYvCompositions, 5 ChoiceCompositions, 1100 VarBasedMoverChecksPositive, 20 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 2240 CheckedPairsTotal, 92 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 1.9s, 139 ProgramPointsBefore, 61 ProgramPointsAfterwards, 123 TransitionsBefore, 39 TransitionsAfterwards, 2860 CoEnabledTransitionPairs, 6 FixpointIterations, 59 TrivialSequentialCompositions, 40 ConcurrentSequentialCompositions, 11 TrivialYvCompositions, 5 ConcurrentYvCompositions, 6 ChoiceCompositions, 1387 VarBasedMoverChecksPositive, 25 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 3096 CheckedPairsTotal, 115 TotalNumberOfCompositions - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.0s, 160 ProgramPointsBefore, 71 ProgramPointsAfterwards, 141 TransitionsBefore, 45 TransitionsAfterwards, 3612 CoEnabledTransitionPairs, 6 FixpointIterations, 66 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 12 TrivialYvCompositions, 4 ConcurrentYvCompositions, 7 ChoiceCompositions, 1785 VarBasedMoverChecksPositive, 33 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 4226 CheckedPairsTotal, 127 TotalNumberOfCompositions - ExceptionOrErrorResult: RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user. de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: RuntimeException: de.uni_freiburg.informatik.ultimate.automata.AutomataOperationCanceledException: Timeout or canceled by user.: de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.StrategyModuleMcr.getOrConstruct(StrategyModuleMcr.java:128) RESULT: Ultimate could not prove your program: Toolchain returned no result. Completed graceful shutdown