/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-MCRwithDepranks-Lazy-NoForkJoinOpt-wrwc.epf -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl


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This is Ultimate 0.2.2-wip.dk.mcr-reduction-4b0ab11
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[2022-03-04 00:24:05,887 INFO  L101        SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-MCRwithDepranks-Lazy-NoForkJoinOpt-wrwc.epf
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[2022-03-04 00:24:05,901 INFO  L136        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2022-03-04 00:24:05,902 INFO  L138        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2022-03-04 00:24:05,902 INFO  L136        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2022-03-04 00:24:05,902 INFO  L138        SettingsManager]:  * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS
[2022-03-04 00:24:05,903 INFO  L136        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2022-03-04 00:24:05,903 INFO  L138        SettingsManager]:  * Create parallel compositions if possible=false
[2022-03-04 00:24:05,903 INFO  L138        SettingsManager]:  * Use SBE=true
[2022-03-04 00:24:05,903 INFO  L136        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2022-03-04 00:24:05,903 INFO  L138        SettingsManager]:  * sizeof long=4
[2022-03-04 00:24:05,903 INFO  L138        SettingsManager]:  * Overapproximate operations on floating types=true
[2022-03-04 00:24:05,903 INFO  L138        SettingsManager]:  * sizeof POINTER=4
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Check division by zero=IGNORE
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * sizeof long double=12
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Check if freed pointer was valid=false
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Use constant arrays=true
[2022-03-04 00:24:05,904 INFO  L138        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2022-03-04 00:24:05,905 INFO  L136        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2022-03-04 00:24:05,905 INFO  L138        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2022-03-04 00:24:05,905 INFO  L138        SettingsManager]:  * To the following directory=./dump/
[2022-03-04 00:24:05,905 INFO  L138        SettingsManager]:  * SMT solver=External_DefaultMode
[2022-03-04 00:24:05,905 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2022-03-04 00:24:05,905 INFO  L136        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2022-03-04 00:24:05,905 INFO  L138        SettingsManager]:  * Construct finite automaton lazily=true
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Trace refinement strategy=CAMEL
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Large block encoding in concurrent analysis=OFF
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA
[2022-03-04 00:24:05,906 INFO  L138        SettingsManager]:  * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2022-03-04 00:24:05,907 INFO  L138        SettingsManager]:  * Partial Order Reduction in concurrent analysis=MCR_WITH_DEPRANKS
[2022-03-04 00:24:05,907 INFO  L138        SettingsManager]:  * MCR: Overapproximate write-read-write conflicts=false
[2022-03-04 00:24:05,907 INFO  L138        SettingsManager]:  * MCR: Optimize fork and join=false
[2022-03-04 00:24:05,907 INFO  L138        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
WARNING: An illegal reflective access operation has occurred
WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int)
WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1
WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations
WARNING: All illegal access operations will be denied in a future release
[2022-03-04 00:24:06,099 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2022-03-04 00:24:06,113 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2022-03-04 00:24:06,114 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2022-03-04 00:24:06,115 INFO  L271        PluginConnector]: Initializing Boogie PL CUP Parser...
[2022-03-04 00:24:06,116 INFO  L275        PluginConnector]: Boogie PL CUP Parser initialized
[2022-03-04 00:24:06,116 INFO  L432   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl
[2022-03-04 00:24:06,117 INFO  L110           BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl'
[2022-03-04 00:24:06,138 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2022-03-04 00:24:06,139 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2022-03-04 00:24:06,140 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2022-03-04 00:24:06,141 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2022-03-04 00:24:06,141 INFO  L275        PluginConnector]: Boogie Procedure Inliner initialized
[2022-03-04 00:24:06,164 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,169 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,174 INFO  L137                Inliner]: procedures = 3, calls = 2, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0
[2022-03-04 00:24:06,175 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2022-03-04 00:24:06,176 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2022-03-04 00:24:06,176 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2022-03-04 00:24:06,176 INFO  L275        PluginConnector]: Boogie Preprocessor initialized
[2022-03-04 00:24:06,182 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,182 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,183 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,183 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,185 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,188 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,188 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,189 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2022-03-04 00:24:06,189 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2022-03-04 00:24:06,189 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2022-03-04 00:24:06,190 INFO  L275        PluginConnector]: RCFGBuilder initialized
[2022-03-04 00:24:06,190 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/1) ...
[2022-03-04 00:24:06,195 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2022-03-04 00:24:06,204 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2022-03-04 00:24:06,217 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
[2022-03-04 00:24:06,229 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process
[2022-03-04 00:24:06,247 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure Process0 given in one single declaration
[2022-03-04 00:24:06,247 INFO  L130     BoogieDeclarations]: Found specification of procedure Process0
[2022-03-04 00:24:06,247 INFO  L138     BoogieDeclarations]: Found implementation of procedure Process0
[2022-03-04 00:24:06,247 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure Process1 given in one single declaration
[2022-03-04 00:24:06,247 INFO  L130     BoogieDeclarations]: Found specification of procedure Process1
[2022-03-04 00:24:06,247 INFO  L138     BoogieDeclarations]: Found implementation of procedure Process1
[2022-03-04 00:24:06,248 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration
[2022-03-04 00:24:06,248 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2022-03-04 00:24:06,248 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2022-03-04 00:24:06,248 WARN  L208             CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement
[2022-03-04 00:24:06,283 INFO  L234             CfgBuilder]: Building ICFG
[2022-03-04 00:24:06,285 INFO  L260             CfgBuilder]: Building CFG for each procedure with an implementation
[2022-03-04 00:24:06,358 INFO  L275             CfgBuilder]: Performing block encoding
[2022-03-04 00:24:06,366 INFO  L294             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2022-03-04 00:24:06,367 INFO  L299             CfgBuilder]: Removed 2 assume(true) statements.
[2022-03-04 00:24:06,368 INFO  L202        PluginConnector]: Adding new model PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.03 12:24:06 BoogieIcfgContainer
[2022-03-04 00:24:06,368 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2022-03-04 00:24:06,371 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2022-03-04 00:24:06,371 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2022-03-04 00:24:06,373 INFO  L275        PluginConnector]: TraceAbstraction initialized
[2022-03-04 00:24:06,373 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 12:24:06" (1/2) ...
[2022-03-04 00:24:06,374 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f730e65 and model type PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.03 12:24:06, skipping insertion in model container
[2022-03-04 00:24:06,374 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.03 12:24:06" (2/2) ...
[2022-03-04 00:24:06,377 INFO  L111   eAbstractionObserver]: Analyzing ICFG PetersonWithBug.bpl
[2022-03-04 00:24:06,382 WARN  L150   ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program
[2022-03-04 00:24:06,382 INFO  L205   ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2022-03-04 00:24:06,382 INFO  L164   ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations.
[2022-03-04 00:24:06,383 INFO  L534   ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances.
[2022-03-04 00:24:06,420 WARN  L322   ript$VariableManager]: TermVariabe Process0Thread1of1ForFork0_x not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-03-04 00:24:06,421 WARN  L322   ript$VariableManager]: TermVariabe Process0Thread1of1ForFork0_y not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-03-04 00:24:06,435 WARN  L322   ript$VariableManager]: TermVariabe Process1Thread1of1ForFork1_a not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-03-04 00:24:06,435 WARN  L322   ript$VariableManager]: TermVariabe Process1Thread1of1ForFork1_b not constructed by VariableManager. Cannot ensure absence of name clashes.
[2022-03-04 00:24:06,436 INFO  L148    ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions.
[2022-03-04 00:24:06,475 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000
[2022-03-04 00:24:06,476 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
[2022-03-04 00:24:06,477 INFO  L229       MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null)
[2022-03-04 00:24:06,478 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process
[2022-03-04 00:24:06,503 INFO  L338      AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ========
[2022-03-04 00:24:06,510 INFO  L339      AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mLazyFiniteAutomaton=true, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR, mMcrOptimizeForkJoin=false, mMcrOverapproximateWrwc=false
[2022-03-04 00:24:06,510 INFO  L340      AbstractCegarLoop]: Starting to check reachability of 6 error locations.
[2022-03-04 00:24:06,556 INFO  L104   alCausalityReduction]: MaximalCausalityReduction evaluated 12 transitions and produced 13 states.
[2022-03-04 00:24:06,558 INFO  L402      AbstractCegarLoop]: === Iteration 1 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] ===
[2022-03-04 00:24:06,562 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-03-04 00:24:06,562 INFO  L85        PathProgramCache]: Analyzing trace with hash -2134110811, now seen corresponding path program 1 times
[2022-03-04 00:24:06,567 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-03-04 00:24:06,568 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472795316]
[2022-03-04 00:24:06,568 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-03-04 00:24:06,568 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-03-04 00:24:06,631 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-03-04 00:24:06,685 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2022-03-04 00:24:06,685 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-03-04 00:24:06,686 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472795316]
[2022-03-04 00:24:06,686 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472795316] provided 1 perfect and 0 imperfect interpolant sequences
[2022-03-04 00:24:06,686 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-03-04 00:24:06,686 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1
[2022-03-04 00:24:06,687 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1081355458]
[2022-03-04 00:24:06,688 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-03-04 00:24:06,691 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 3 states
[2022-03-04 00:24:06,691 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-03-04 00:24:06,728 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2022-03-04 00:24:06,729 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2022-03-04 00:24:06,730 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:06,731 INFO  L470      AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states
[2022-03-04 00:24:06,732 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 3 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-03-04 00:24:06,732 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:07,608 INFO  L104   alCausalityReduction]: MaximalCausalityReduction evaluated 1746 transitions and produced 1644 states.
[2022-03-04 00:24:07,609 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:07,609 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0
[2022-03-04 00:24:07,610 INFO  L402      AbstractCegarLoop]: === Iteration 2 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] ===
[2022-03-04 00:24:07,611 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-03-04 00:24:07,611 INFO  L85        PathProgramCache]: Analyzing trace with hash 1275991164, now seen corresponding path program 1 times
[2022-03-04 00:24:07,612 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-03-04 00:24:07,612 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930115643]
[2022-03-04 00:24:07,612 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-03-04 00:24:07,613 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-03-04 00:24:07,723 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-03-04 00:24:08,130 INFO  L134       CoverageAnalysis]: Checked inductivity of 33277 backedges. 4811 proven. 0 refuted. 0 times theorem prover too weak. 28466 trivial. 0 not checked.
[2022-03-04 00:24:08,130 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-03-04 00:24:08,131 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930115643]
[2022-03-04 00:24:08,131 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [930115643] provided 1 perfect and 0 imperfect interpolant sequences
[2022-03-04 00:24:08,131 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-03-04 00:24:08,131 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-03-04 00:24:08,131 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274755623]
[2022-03-04 00:24:08,131 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-03-04 00:24:08,134 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2022-03-04 00:24:08,134 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-03-04 00:24:08,136 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-03-04 00:24:08,136 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12
[2022-03-04 00:24:08,137 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:08,137 INFO  L470      AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states
[2022-03-04 00:24:08,137 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-03-04 00:24:08,137 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:08,137 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:08,739 INFO  L104   alCausalityReduction]: MaximalCausalityReduction evaluated 2564 transitions and produced 2443 states.
[2022-03-04 00:24:08,739 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:08,740 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:08,740 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1
[2022-03-04 00:24:08,741 INFO  L402      AbstractCegarLoop]: === Iteration 3 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] ===
[2022-03-04 00:24:08,741 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-03-04 00:24:08,742 INFO  L85        PathProgramCache]: Analyzing trace with hash -1117109782, now seen corresponding path program 2 times
[2022-03-04 00:24:08,742 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-03-04 00:24:08,743 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011220728]
[2022-03-04 00:24:08,743 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-03-04 00:24:08,744 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-03-04 00:24:08,782 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-03-04 00:24:08,951 INFO  L134       CoverageAnalysis]: Checked inductivity of 67729 backedges. 6888 proven. 0 refuted. 0 times theorem prover too weak. 60841 trivial. 0 not checked.
[2022-03-04 00:24:08,952 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-03-04 00:24:08,952 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011220728]
[2022-03-04 00:24:08,953 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2011220728] provided 1 perfect and 0 imperfect interpolant sequences
[2022-03-04 00:24:08,953 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-03-04 00:24:08,953 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-03-04 00:24:08,954 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2037729465]
[2022-03-04 00:24:08,954 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-03-04 00:24:08,954 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2022-03-04 00:24:08,954 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-03-04 00:24:08,955 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-03-04 00:24:08,955 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12
[2022-03-04 00:24:08,955 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:08,956 INFO  L470      AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states
[2022-03-04 00:24:08,956 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-03-04 00:24:08,956 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:08,956 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:08,956 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:09,385 INFO  L104   alCausalityReduction]: MaximalCausalityReduction evaluated 2042 transitions and produced 1958 states.
[2022-03-04 00:24:09,386 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:09,386 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,387 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,387 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2
[2022-03-04 00:24:09,387 INFO  L402      AbstractCegarLoop]: === Iteration 4 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] ===
[2022-03-04 00:24:09,391 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-03-04 00:24:09,391 INFO  L85        PathProgramCache]: Analyzing trace with hash 184073870, now seen corresponding path program 3 times
[2022-03-04 00:24:09,391 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-03-04 00:24:09,391 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592482040]
[2022-03-04 00:24:09,391 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-03-04 00:24:09,391 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-03-04 00:24:09,411 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2022-03-04 00:24:09,504 INFO  L134       CoverageAnalysis]: Checked inductivity of 43215 backedges. 6150 proven. 0 refuted. 0 times theorem prover too weak. 37065 trivial. 0 not checked.
[2022-03-04 00:24:09,504 INFO  L144   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2022-03-04 00:24:09,504 INFO  L338   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592482040]
[2022-03-04 00:24:09,504 INFO  L165   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1592482040] provided 1 perfect and 0 imperfect interpolant sequences
[2022-03-04 00:24:09,504 INFO  L191   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2022-03-04 00:24:09,505 INFO  L204   FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2022-03-04 00:24:09,505 INFO  L118   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273998267]
[2022-03-04 00:24:09,505 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2022-03-04 00:24:09,505 INFO  L546      AbstractCegarLoop]: INTERPOLANT automaton has 4 states
[2022-03-04 00:24:09,505 INFO  L108   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2022-03-04 00:24:09,506 INFO  L143   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2022-03-04 00:24:09,506 INFO  L145   InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12
[2022-03-04 00:24:09,506 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:09,506 INFO  L470      AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states
[2022-03-04 00:24:09,506 INFO  L471      AbstractCegarLoop]: INTERPOLANT automaton has  has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2022-03-04 00:24:09,506 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:09,506 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,506 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,506 INFO  L154   InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. 
[2022-03-04 00:24:09,993 INFO  L104   alCausalityReduction]: MaximalCausalityReduction evaluated 1803 transitions and produced 1684 states.
[2022-03-04 00:24:09,994 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2022-03-04 00:24:09,994 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,994 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,994 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2022-03-04 00:24:09,995 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3
[2022-03-04 00:24:09,995 INFO  L402      AbstractCegarLoop]: === Iteration 5 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] ===
[2022-03-04 00:24:09,995 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2022-03-04 00:24:09,996 INFO  L85        PathProgramCache]: Analyzing trace with hash -1682391402, now seen corresponding path program 4 times
[2022-03-04 00:24:09,996 INFO  L126   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2022-03-04 00:24:09,996 INFO  L338   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453903649]
[2022-03-04 00:24:09,996 INFO  L95    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2022-03-04 00:24:09,996 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2022-03-04 00:24:10,024 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-03-04 00:24:10,024 INFO  L352             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2022-03-04 00:24:10,046 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2022-03-04 00:24:10,088 INFO  L138   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2022-03-04 00:24:10,088 INFO  L628         BasicCegarLoop]: Counterexample is feasible
[2022-03-04 00:24:10,089 INFO  L764   garLoopResultBuilder]: Registering result UNSAFE for location Process0Err0ASSERT_VIOLATIONASSERT (5 of 6 remaining)
[2022-03-04 00:24:10,090 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location Process0Err0ASSERT_VIOLATIONASSERT (4 of 6 remaining)
[2022-03-04 00:24:10,090 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location Process1Err0ASSERT_VIOLATIONASSERT (3 of 6 remaining)
[2022-03-04 00:24:10,090 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATION (2 of 6 remaining)
[2022-03-04 00:24:10,091 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATION (1 of 6 remaining)
[2022-03-04 00:24:10,091 INFO  L764   garLoopResultBuilder]: Registering result UNKNOWN for location Process1Err0ASSERT_VIOLATIONASSERT (0 of 6 remaining)
[2022-03-04 00:24:10,091 WARN  L452      AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4
[2022-03-04 00:24:10,096 INFO  L732         BasicCegarLoop]: Path program histogram: [4, 1]
[2022-03-04 00:24:10,099 INFO  L230   ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances
[2022-03-04 00:24:10,099 INFO  L180   ceAbstractionStarter]: Computing trace abstraction results
[2022-03-04 00:24:10,149 INFO  L202        PluginConnector]: Adding new model PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.03 12:24:10 BasicIcfg
[2022-03-04 00:24:10,149 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2022-03-04 00:24:10,149 INFO  L158              Benchmark]: Toolchain (without parser) took 4009.89ms. Allocated memory was 198.2MB in the beginning and 1.1GB in the end (delta: 902.8MB). Free memory was 162.4MB in the beginning and 480.1MB in the end (delta: -317.7MB). Peak memory consumption was 587.1MB. Max. memory is 8.0GB.
[2022-03-04 00:24:10,150 INFO  L158              Benchmark]: Boogie PL CUP Parser took 0.11ms. Allocated memory is still 198.2MB. Free memory is still 163.4MB. There was no memory consumed. Max. memory is 8.0GB.
[2022-03-04 00:24:10,150 INFO  L158              Benchmark]: Boogie Procedure Inliner took 35.00ms. Allocated memory is still 198.2MB. Free memory was 162.3MB in the beginning and 160.8MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB.
[2022-03-04 00:24:10,150 INFO  L158              Benchmark]: Boogie Preprocessor took 12.36ms. Allocated memory is still 198.2MB. Free memory was 160.8MB in the beginning and 159.8MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB.
[2022-03-04 00:24:10,151 INFO  L158              Benchmark]: RCFGBuilder took 178.87ms. Allocated memory is still 198.2MB. Free memory was 159.8MB in the beginning and 151.5MB in the end (delta: 8.2MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB.
[2022-03-04 00:24:10,151 INFO  L158              Benchmark]: TraceAbstraction took 3778.20ms. Allocated memory was 198.2MB in the beginning and 1.1GB in the end (delta: 902.8MB). Free memory was 151.1MB in the beginning and 480.1MB in the end (delta: -329.1MB). Peak memory consumption was 574.6MB. Max. memory is 8.0GB.
[2022-03-04 00:24:10,152 INFO  L339   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * Boogie PL CUP Parser took 0.11ms. Allocated memory is still 198.2MB. Free memory is still 163.4MB. There was no memory consumed. Max. memory is 8.0GB.
 * Boogie Procedure Inliner took 35.00ms. Allocated memory is still 198.2MB. Free memory was 162.3MB in the beginning and 160.8MB in the end (delta: 1.4MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB.
 * Boogie Preprocessor took 12.36ms. Allocated memory is still 198.2MB. Free memory was 160.8MB in the beginning and 159.8MB in the end (delta: 1.0MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB.
 * RCFGBuilder took 178.87ms. Allocated memory is still 198.2MB. Free memory was 159.8MB in the beginning and 151.5MB in the end (delta: 8.2MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB.
 * TraceAbstraction took 3778.20ms. Allocated memory was 198.2MB in the beginning and 1.1GB in the end (delta: 902.8MB). Free memory was 151.1MB in the beginning and 480.1MB in the end (delta: -329.1MB). Peak memory consumption was 574.6MB. Max. memory is 8.0GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: Independence relation benchmarks
    ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0]  ], Cache Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Statistics on independence cache: Total cache size (in pairs): 0, Positive cache size: 0, Positive conditional cache size: 0, Positive unconditional cache size: 0, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0, Eliminated conditions: 0, Maximal queried relation: -1, Independence queries for same thread: 0
  - StatisticsResult: ErrorAutomatonStatistics
    NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0
  - CounterExampleResult [Line: 40]: assertion can be violated
    assertion can be violated
We found a FailurePath: 
[L25]        0  critical := 0;
       VAL      [critical=0]
[L26]  FORK  0  fork 0 Process0();
       VAL      [critical=0]
[L37]        1  turn := 1;
       VAL      [critical=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L27]  FORK  0  fork 1 Process1();
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=1]
[L61]        2  critical := 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=1]
[L62]        2  flag1 := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L40]        1  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L41]        1  critical := 1;
       VAL      [critical=1, flag0=1, flag1=0, turn=1]
[L42]        1  critical := 0;
       VAL      [critical=0, flag0=1, flag1=0, turn=1]
[L43]        1  flag0 := 0;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L37]        1  turn := 1;
       VAL      [critical=0, flag0=0, flag1=0, turn=1]
[L56]        2  flag1 := 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=1]
[L57]        2  turn := 0;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L58]        2  assume flag0 == 0 || turn == 1;
       VAL      [critical=0, flag0=0, flag1=1, turn=0]
[L38]        1  flag0 := 1;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L39]        1  assume flag1 == 0 || turn == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L59]        2  assert critical == 0;
       VAL      [critical=0, flag0=1, flag1=1, turn=0]
[L60]        2  critical := 1;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]
[L40]        1  assert critical == 0;
       VAL      [critical=1, flag0=1, flag1=1, turn=0]

  - UnprovableResult [Line: 59]: Unable to prove that assertion always holds
    Unable to prove that assertion always holds
 Reason: Not analyzed. 
  - UnprovableResult [Line: 26]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
    Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
 Reason: Not analyzed. 
  - UnprovableResult [Line: 26]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
    Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users)
 Reason: Not analyzed. 
  - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances
    CFG has 5 procedures, 47 locations, 6 error locations. Started 1 CEGAR loops. OverallTime: 3.6s, OverallIterations: 5, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 2.4s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 15, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 3138 NumberOfCodeBlocks, 3138 NumberOfCodeBlocksAsserted, 5 NumberOfCheckSat, 2575 ConstructedInterpolants, 0 QuantifiedInterpolants, 2643 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 4 InterpolantComputations, 4 PerfectInterpolantSequences, 144221/144221 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
[2022-03-04 00:24:10,176 INFO  L540       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0
[2022-03-04 00:24:10,392 INFO  L540       MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0
Received shutdown request...