/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/automizer/mcr/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-McrAutomaton-WP.epf -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/nonblocking-cntr-alt.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.2-wip.dk.mcr-reduction-c7b2d19 [2022-03-15 21:31:58,168 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-03-15 21:31:58,170 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-03-15 21:31:58,227 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-03-15 21:31:58,228 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-03-15 21:31:58,231 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-03-15 21:31:58,233 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-03-15 21:31:58,235 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-03-15 21:31:58,236 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-03-15 21:31:58,238 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-03-15 21:31:58,238 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-03-15 21:31:58,239 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-03-15 21:31:58,239 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-03-15 21:31:58,240 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-03-15 21:31:58,240 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-03-15 21:31:58,241 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-03-15 21:31:58,241 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-03-15 21:31:58,242 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-03-15 21:31:58,243 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-03-15 21:31:58,244 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-03-15 21:31:58,244 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-03-15 21:31:58,249 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-03-15 21:31:58,252 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-03-15 21:31:58,253 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-03-15 21:31:58,258 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-03-15 21:31:58,263 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-03-15 21:31:58,263 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-03-15 21:31:58,263 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-03-15 21:31:58,266 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/mcr/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-McrAutomaton-WP.epf [2022-03-15 21:31:58,293 INFO L113 SettingsManager]: Loading preferences was successful [2022-03-15 21:31:58,293 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-03-15 21:31:58,294 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-03-15 21:31:58,294 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-03-15 21:31:58,294 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-03-15 21:31:58,294 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-03-15 21:31:58,295 INFO L138 SettingsManager]: * Use SBE=true [2022-03-15 21:31:58,295 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-03-15 21:31:58,295 INFO L138 SettingsManager]: * sizeof long=4 [2022-03-15 21:31:58,295 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-03-15 21:31:58,295 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * sizeof long double=12 [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Use constant arrays=true [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-03-15 21:31:58,296 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-03-15 21:31:58,296 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-03-15 21:31:58,297 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-03-15 21:31:58,297 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-15 21:31:58,297 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-03-15 21:31:58,297 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-03-15 21:31:58,297 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=VARIABLE_BASED_MOVER_CHECK [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-03-15 21:31:58,298 INFO L138 SettingsManager]: * Interpolant automaton=MCR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-03-15 21:31:58,445 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-03-15 21:31:58,461 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-03-15 21:31:58,463 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-03-15 21:31:58,464 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2022-03-15 21:31:58,468 INFO L275 PluginConnector]: Boogie PL CUP Parser initialized [2022-03-15 21:31:58,469 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/nonblocking-cntr-alt.wvr.bpl [2022-03-15 21:31:58,469 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/nonblocking-cntr-alt.wvr.bpl' [2022-03-15 21:31:58,486 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-03-15 21:31:58,487 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-03-15 21:31:58,490 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-03-15 21:31:58,490 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-03-15 21:31:58,490 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-03-15 21:31:58,498 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,503 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,507 INFO L137 Inliner]: procedures = 3, calls = 2, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2022-03-15 21:31:58,508 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-03-15 21:31:58,509 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-03-15 21:31:58,509 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-03-15 21:31:58,509 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-03-15 21:31:58,514 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,515 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,516 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,518 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,521 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,521 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,522 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-03-15 21:31:58,524 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-03-15 21:31:58,524 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-03-15 21:31:58,524 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-03-15 21:31:58,525 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/1) ... [2022-03-15 21:31:58,530 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-15 21:31:58,535 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:31:58,546 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-03-15 21:31:58,553 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-03-15 21:31:58,574 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2022-03-15 21:31:58,574 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2022-03-15 21:31:58,574 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2022-03-15 21:31:58,574 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2022-03-15 21:31:58,574 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2022-03-15 21:31:58,574 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2022-03-15 21:31:58,574 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2022-03-15 21:31:58,574 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-03-15 21:31:58,574 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-03-15 21:31:58,575 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-03-15 21:31:58,603 INFO L234 CfgBuilder]: Building ICFG [2022-03-15 21:31:58,604 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-03-15 21:31:58,664 INFO L275 CfgBuilder]: Performing block encoding [2022-03-15 21:31:58,673 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-03-15 21:31:58,674 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-03-15 21:31:58,675 INFO L202 PluginConnector]: Adding new model nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.03 09:31:58 BoogieIcfgContainer [2022-03-15 21:31:58,675 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-03-15 21:31:58,677 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-03-15 21:31:58,677 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-03-15 21:31:58,679 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-03-15 21:31:58,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:31:58" (1/2) ... [2022-03-15 21:31:58,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6a6620cd and model type nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.03 09:31:58, skipping insertion in model container [2022-03-15 21:31:58,680 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.03 09:31:58" (2/2) ... [2022-03-15 21:31:58,680 INFO L111 eAbstractionObserver]: Analyzing ICFG nonblocking-cntr-alt.wvr.bpl [2022-03-15 21:31:58,683 WARN L150 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-03-15 21:31:58,684 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-03-15 21:31:58,684 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-03-15 21:31:58,684 INFO L534 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-03-15 21:31:58,704 INFO L148 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-03-15 21:31:58,751 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-03-15 21:31:58,756 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=MCR, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mLazyFiniteAutomaton=false, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=true, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR, mMcrOptimizeForkJoin=true, mMcrOverapproximateWrwc=true [2022-03-15 21:31:58,756 INFO L340 AbstractCegarLoop]: Starting to check reachability of 3 error locations. [2022-03-15 21:31:58,763 INFO L126 etLargeBlockEncoding]: Petri net LBE is using variable-based independence relation. [2022-03-15 21:31:58,770 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 28 places, 23 transitions, 62 flow [2022-03-15 21:31:58,772 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 28 places, 23 transitions, 62 flow [2022-03-15 21:31:58,773 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 28 places, 23 transitions, 62 flow [2022-03-15 21:31:58,816 INFO L129 PetriNetUnfolder]: 2/21 cut-off events. [2022-03-15 21:31:58,816 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-03-15 21:31:58,819 INFO L84 FinitePrefix]: Finished finitePrefix Result has 30 conditions, 21 events. 2/21 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 3. Compared 13 event pairs, 0 based on Foata normal form. 0/18 useless extension candidates. Maximal degree in co-relation 12. Up to 2 conditions per place. [2022-03-15 21:31:58,820 INFO L116 LiptonReduction]: Number of co-enabled transitions 48 [2022-03-15 21:31:58,973 INFO L131 LiptonReduction]: Checked pairs total: 48 [2022-03-15 21:31:58,973 INFO L133 LiptonReduction]: Total number of compositions: 11 [2022-03-15 21:31:58,979 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 18 places, 13 transitions, 42 flow [2022-03-15 21:31:58,991 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:58,992 INFO L276 IsEmpty]: Start isEmpty. Operand has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:58,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2022-03-15 21:31:58,996 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:31:58,997 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:31:58,997 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:31:59,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:31:59,001 INFO L85 PathProgramCache]: Analyzing trace with hash -2130505189, now seen corresponding path program 1 times [2022-03-15 21:31:59,016 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:31:59,016 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009929366] [2022-03-15 21:31:59,016 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:31:59,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:31:59,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:31:59,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:31:59,099 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:31:59,099 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009929366] [2022-03-15 21:31:59,099 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2009929366] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:31:59,099 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:31:59,099 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-03-15 21:31:59,100 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2023103194] [2022-03-15 21:31:59,101 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:31:59,103 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:31:59,111 INFO L252 McrAutomatonBuilder]: Finished intersection with 12 states and 14 transitions. [2022-03-15 21:31:59,112 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:31:59,200 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:31:59,201 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-03-15 21:31:59,202 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:31:59,221 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-03-15 21:31:59,223 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:31:59,224 INFO L87 Difference]: Start difference. First operand has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:31:59,247 INFO L93 Difference]: Finished difference Result 15 states and 26 transitions. [2022-03-15 21:31:59,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-15 21:31:59,249 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 8 [2022-03-15 21:31:59,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:31:59,255 INFO L225 Difference]: With dead ends: 15 [2022-03-15 21:31:59,255 INFO L226 Difference]: Without dead ends: 15 [2022-03-15 21:31:59,256 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:31:59,262 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1 mSDsluCounter, 5 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 18 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:31:59,263 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1 Valid, 0 Invalid, 18 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:31:59,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states. [2022-03-15 21:31:59,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2022-03-15 21:31:59,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 14 states have (on average 1.8571428571428572) internal successors, (26), 14 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 26 transitions. [2022-03-15 21:31:59,284 INFO L78 Accepts]: Start accepts. Automaton has 15 states and 26 transitions. Word has length 8 [2022-03-15 21:31:59,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:31:59,285 INFO L470 AbstractCegarLoop]: Abstraction has 15 states and 26 transitions. [2022-03-15 21:31:59,285 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 2 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,285 INFO L276 IsEmpty]: Start isEmpty. Operand 15 states and 26 transitions. [2022-03-15 21:31:59,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2022-03-15 21:31:59,285 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:31:59,285 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:31:59,286 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-03-15 21:31:59,286 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:31:59,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:31:59,286 INFO L85 PathProgramCache]: Analyzing trace with hash -534398978, now seen corresponding path program 1 times [2022-03-15 21:31:59,288 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:31:59,289 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700240354] [2022-03-15 21:31:59,289 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:31:59,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:31:59,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:31:59,315 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:31:59,315 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:31:59,315 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700240354] [2022-03-15 21:31:59,315 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [700240354] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:31:59,315 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:31:59,316 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-03-15 21:31:59,316 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1935866487] [2022-03-15 21:31:59,316 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:31:59,316 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:31:59,318 INFO L252 McrAutomatonBuilder]: Finished intersection with 15 states and 19 transitions. [2022-03-15 21:31:59,318 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:31:59,375 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:31:59,376 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-03-15 21:31:59,377 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:31:59,377 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-03-15 21:31:59,378 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:31:59,378 INFO L87 Difference]: Start difference. First operand 15 states and 26 transitions. Second operand has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:31:59,394 INFO L93 Difference]: Finished difference Result 19 states and 34 transitions. [2022-03-15 21:31:59,394 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-15 21:31:59,394 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 9 [2022-03-15 21:31:59,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:31:59,396 INFO L225 Difference]: With dead ends: 19 [2022-03-15 21:31:59,396 INFO L226 Difference]: Without dead ends: 19 [2022-03-15 21:31:59,396 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:31:59,397 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 0 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:31:59,398 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [0 Valid, 0 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:31:59,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2022-03-15 21:31:59,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2022-03-15 21:31:59,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 18 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 34 transitions. [2022-03-15 21:31:59,405 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 34 transitions. Word has length 9 [2022-03-15 21:31:59,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:31:59,405 INFO L470 AbstractCegarLoop]: Abstraction has 19 states and 34 transitions. [2022-03-15 21:31:59,406 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 4.0) internal successors, (12), 2 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:31:59,406 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 34 transitions. [2022-03-15 21:31:59,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-03-15 21:31:59,406 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:31:59,406 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:31:59,406 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-03-15 21:31:59,406 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:31:59,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:31:59,407 INFO L85 PathProgramCache]: Analyzing trace with hash 613358463, now seen corresponding path program 1 times [2022-03-15 21:31:59,408 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:31:59,408 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947585767] [2022-03-15 21:31:59,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:31:59,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:31:59,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:31:59,626 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:31:59,627 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:31:59,627 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947585767] [2022-03-15 21:31:59,630 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947585767] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:31:59,630 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2123030581] [2022-03-15 21:31:59,631 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:31:59,631 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:31:59,631 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:31:59,632 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:31:59,633 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-03-15 21:31:59,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:31:59,660 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 15 conjunts are in the unsatisfiable core [2022-03-15 21:31:59,663 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:31:59,864 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:31:59,864 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:00,139 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:00,139 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2123030581] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:00,139 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:00,139 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 13 [2022-03-15 21:32:00,139 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [625266121] [2022-03-15 21:32:00,140 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:00,140 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:00,144 INFO L252 McrAutomatonBuilder]: Finished intersection with 17 states and 22 transitions. [2022-03-15 21:32:00,144 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:00,345 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 4 new interpolants: [235#(and (or (not (< j1 M1)) (<= 0 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ M2 counter)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1) (= (+ M1 1) (+ M2 counter 1)))), 233#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 234#(and (or (< j1 M1) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (= (+ M1 1) (+ M2 counter)))), 232#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1))] [2022-03-15 21:32:00,345 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-03-15 21:32:00,345 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:00,346 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-03-15 21:32:00,346 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=257, Unknown=0, NotChecked=0, Total=342 [2022-03-15 21:32:00,346 INFO L87 Difference]: Start difference. First operand 19 states and 34 transitions. Second operand has 11 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:00,572 INFO L93 Difference]: Finished difference Result 37 states and 65 transitions. [2022-03-15 21:32:00,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:32:00,572 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-03-15 21:32:00,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:00,573 INFO L225 Difference]: With dead ends: 37 [2022-03-15 21:32:00,573 INFO L226 Difference]: Without dead ends: 34 [2022-03-15 21:32:00,573 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 9 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=142, Invalid=458, Unknown=0, NotChecked=0, Total=600 [2022-03-15 21:32:00,574 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 40 mSDsluCounter, 30 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:00,574 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 0 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:00,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2022-03-15 21:32:00,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 25. [2022-03-15 21:32:00,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 24 states have (on average 2.0) internal successors, (48), 24 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 48 transitions. [2022-03-15 21:32:00,577 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 48 transitions. Word has length 10 [2022-03-15 21:32:00,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:00,577 INFO L470 AbstractCegarLoop]: Abstraction has 25 states and 48 transitions. [2022-03-15 21:32:00,577 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 2.0) internal successors, (20), 10 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,577 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 48 transitions. [2022-03-15 21:32:00,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2022-03-15 21:32:00,578 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:00,578 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:00,596 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:00,778 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:00,779 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:00,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:00,779 INFO L85 PathProgramCache]: Analyzing trace with hash 1422718885, now seen corresponding path program 2 times [2022-03-15 21:32:00,780 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:00,780 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [896120896] [2022-03-15 21:32:00,780 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:00,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:00,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:00,802 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:00,803 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:00,803 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [896120896] [2022-03-15 21:32:00,803 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [896120896] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:00,803 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [504146070] [2022-03-15 21:32:00,803 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:32:00,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:00,803 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:00,804 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:00,805 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-03-15 21:32:00,834 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:00,834 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:00,834 INFO L263 TraceCheckSpWp]: Trace formula consists of 35 conjuncts, 5 conjunts are in the unsatisfiable core [2022-03-15 21:32:00,835 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:00,878 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:00,878 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:00,924 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:00,924 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [504146070] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:00,924 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:00,925 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2022-03-15 21:32:00,925 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1003825767] [2022-03-15 21:32:00,925 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:00,925 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:00,926 INFO L252 McrAutomatonBuilder]: Finished intersection with 14 states and 16 transitions. [2022-03-15 21:32:00,926 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:00,935 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:00,935 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-15 21:32:00,935 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:00,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-15 21:32:00,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-03-15 21:32:00,936 INFO L87 Difference]: Start difference. First operand 25 states and 48 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:00,967 INFO L93 Difference]: Finished difference Result 30 states and 56 transitions. [2022-03-15 21:32:00,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-15 21:32:00,968 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 10 [2022-03-15 21:32:00,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:00,968 INFO L225 Difference]: With dead ends: 30 [2022-03-15 21:32:00,968 INFO L226 Difference]: Without dead ends: 30 [2022-03-15 21:32:00,968 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 18 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2022-03-15 21:32:00,969 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 3 mSDsluCounter, 8 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:00,969 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [3 Valid, 0 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:32:00,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2022-03-15 21:32:00,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2022-03-15 21:32:00,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 24 states have (on average 1.9583333333333333) internal successors, (47), 24 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 47 transitions. [2022-03-15 21:32:00,972 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 47 transitions. Word has length 10 [2022-03-15 21:32:00,972 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:00,972 INFO L470 AbstractCegarLoop]: Abstraction has 25 states and 47 transitions. [2022-03-15 21:32:00,972 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:00,972 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 47 transitions. [2022-03-15 21:32:00,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:32:00,972 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:00,973 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:00,988 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:01,175 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable3 [2022-03-15 21:32:01,176 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:01,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:01,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1834100766, now seen corresponding path program 3 times [2022-03-15 21:32:01,178 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:01,178 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611442621] [2022-03-15 21:32:01,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:01,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:01,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:01,215 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:01,215 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:01,216 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611442621] [2022-03-15 21:32:01,216 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1611442621] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:01,216 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [575846992] [2022-03-15 21:32:01,216 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:32:01,216 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:01,216 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:01,232 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:01,247 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-03-15 21:32:01,253 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2022-03-15 21:32:01,253 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:01,253 INFO L263 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 8 conjunts are in the unsatisfiable core [2022-03-15 21:32:01,254 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:01,292 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:01,292 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:01,334 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:01,334 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [575846992] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:01,334 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:01,334 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 4] total 6 [2022-03-15 21:32:01,334 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [105702124] [2022-03-15 21:32:01,334 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:01,335 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:01,336 INFO L252 McrAutomatonBuilder]: Finished intersection with 20 states and 27 transitions. [2022-03-15 21:32:01,336 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:01,430 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:01,430 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-03-15 21:32:01,430 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:01,430 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-03-15 21:32:01,431 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2022-03-15 21:32:01,431 INFO L87 Difference]: Start difference. First operand 25 states and 47 transitions. Second operand has 6 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:01,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:01,481 INFO L93 Difference]: Finished difference Result 55 states and 102 transitions. [2022-03-15 21:32:01,481 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-03-15 21:32:01,481 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:32:01,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:01,483 INFO L225 Difference]: With dead ends: 55 [2022-03-15 21:32:01,483 INFO L226 Difference]: Without dead ends: 48 [2022-03-15 21:32:01,483 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 23 SyntacticMatches, 5 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2022-03-15 21:32:01,484 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 15 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:01,484 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 0 Invalid, 86 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:32:01,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2022-03-15 21:32:01,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 31. [2022-03-15 21:32:01,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 30 states have (on average 2.066666666666667) internal successors, (62), 30 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:01,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 62 transitions. [2022-03-15 21:32:01,491 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 62 transitions. Word has length 11 [2022-03-15 21:32:01,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:01,491 INFO L470 AbstractCegarLoop]: Abstraction has 31 states and 62 transitions. [2022-03-15 21:32:01,491 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 3.0) internal successors, (18), 5 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:01,491 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 62 transitions. [2022-03-15 21:32:01,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:32:01,492 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:01,492 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:01,510 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:01,698 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:01,698 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:01,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:01,699 INFO L85 PathProgramCache]: Analyzing trace with hash 1168102562, now seen corresponding path program 4 times [2022-03-15 21:32:01,699 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:01,699 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895700965] [2022-03-15 21:32:01,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:01,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:01,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:01,794 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:01,795 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:01,795 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895700965] [2022-03-15 21:32:01,795 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895700965] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:01,795 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1533749905] [2022-03-15 21:32:01,795 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:32:01,795 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:01,796 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:01,797 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:01,820 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:32:01,820 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:01,821 WARN L261 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 20 conjunts are in the unsatisfiable core [2022-03-15 21:32:01,822 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:01,825 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-03-15 21:32:01,969 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:01,969 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:02,211 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:02,212 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1533749905] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:02,212 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:02,212 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 16 [2022-03-15 21:32:02,212 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [310540803] [2022-03-15 21:32:02,212 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:02,213 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:02,215 INFO L252 McrAutomatonBuilder]: Finished intersection with 19 states and 25 transitions. [2022-03-15 21:32:02,215 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:02,493 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 5 new interpolants: [742#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 745#(and (or (not (< j1 M1)) (<= 1 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ M2 counter)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1) (= (+ M1 1) (+ M2 counter 1)))), 744#(and (or (< j1 M1) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (= (+ M1 1) (+ M2 counter)))), 743#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 746#(and (or (< (+ 2 j1) M1) (<= 0 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (= (+ M1 1) (+ 2 M2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ M2 counter 1)) (not (< (+ j1 1) M1))))] [2022-03-15 21:32:02,493 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-03-15 21:32:02,493 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:02,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-03-15 21:32:02,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=403, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:32:02,494 INFO L87 Difference]: Start difference. First operand 31 states and 62 transitions. Second operand has 13 states, 12 states have (on average 1.9166666666666667) internal successors, (23), 12 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:02,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:02,768 INFO L93 Difference]: Finished difference Result 50 states and 94 transitions. [2022-03-15 21:32:02,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:32:02,768 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 1.9166666666666667) internal successors, (23), 12 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:32:02,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:02,769 INFO L225 Difference]: With dead ends: 50 [2022-03-15 21:32:02,769 INFO L226 Difference]: Without dead ends: 47 [2022-03-15 21:32:02,769 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 9 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=179, Invalid=691, Unknown=0, NotChecked=0, Total=870 [2022-03-15 21:32:02,770 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 40 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 126 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 126 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:02,770 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 0 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 126 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:02,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-03-15 21:32:02,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 35. [2022-03-15 21:32:02,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.1176470588235294) internal successors, (72), 34 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:02,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 72 transitions. [2022-03-15 21:32:02,773 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 72 transitions. Word has length 11 [2022-03-15 21:32:02,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:02,773 INFO L470 AbstractCegarLoop]: Abstraction has 35 states and 72 transitions. [2022-03-15 21:32:02,773 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 1.9166666666666667) internal successors, (23), 12 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:02,773 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 72 transitions. [2022-03-15 21:32:02,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:32:02,774 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:02,774 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:02,791 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Ended with exit code 0 [2022-03-15 21:32:02,989 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:02,989 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:02,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:02,990 INFO L85 PathProgramCache]: Analyzing trace with hash 1977462984, now seen corresponding path program 5 times [2022-03-15 21:32:02,991 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:02,991 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727909604] [2022-03-15 21:32:02,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:02,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:02,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:03,060 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:03,060 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:03,060 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [727909604] [2022-03-15 21:32:03,060 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [727909604] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:03,061 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2049267702] [2022-03-15 21:32:03,061 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:32:03,061 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:03,061 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:03,062 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:03,063 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-03-15 21:32:03,080 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:03,080 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:03,080 WARN L261 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 20 conjunts are in the unsatisfiable core [2022-03-15 21:32:03,081 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:03,227 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:03,227 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:03,436 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:03,436 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2049267702] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:03,436 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:03,436 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 17 [2022-03-15 21:32:03,437 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1229793490] [2022-03-15 21:32:03,437 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:03,437 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:03,438 INFO L252 McrAutomatonBuilder]: Finished intersection with 16 states and 19 transitions. [2022-03-15 21:32:03,438 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:03,549 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 3 new interpolants: [961#(and (or (not (< j1 M1)) (<= M1 (+ M2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (< (+ M2 counter) M1) (< (+ j1 1) M1))), 960#(and (or (< j1 M1) (< (+ M2 counter) (+ M1 1))) (or (<= M1 (+ M2 counter)) (< j1 M1))), 962#(and (or (<= (+ j2 counter) j1) (not (< j1 M1))) (or (not (< j1 M1)) (<= (+ j1 1) (+ M2 counter))) (or (not (< j1 M1)) (<= 0 counter)))] [2022-03-15 21:32:03,550 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-03-15 21:32:03,550 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:03,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-03-15 21:32:03,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2022-03-15 21:32:03,551 INFO L87 Difference]: Start difference. First operand 35 states and 72 transitions. Second operand has 11 states, 10 states have (on average 1.8) internal successors, (18), 10 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:03,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:03,908 INFO L93 Difference]: Finished difference Result 74 states and 137 transitions. [2022-03-15 21:32:03,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:32:03,908 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.8) internal successors, (18), 10 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:32:03,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:03,909 INFO L225 Difference]: With dead ends: 74 [2022-03-15 21:32:03,909 INFO L226 Difference]: Without dead ends: 71 [2022-03-15 21:32:03,909 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=216, Invalid=776, Unknown=0, NotChecked=0, Total=992 [2022-03-15 21:32:03,910 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 56 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 137 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 56 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 164 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 137 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:03,910 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [56 Valid, 0 Invalid, 164 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 137 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:03,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2022-03-15 21:32:03,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 37. [2022-03-15 21:32:03,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 2.138888888888889) internal successors, (77), 36 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:03,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 77 transitions. [2022-03-15 21:32:03,913 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 77 transitions. Word has length 11 [2022-03-15 21:32:03,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:03,913 INFO L470 AbstractCegarLoop]: Abstraction has 37 states and 77 transitions. [2022-03-15 21:32:03,913 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.8) internal successors, (18), 10 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:03,913 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 77 transitions. [2022-03-15 21:32:03,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:32:03,914 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:03,914 INFO L514 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:03,930 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:04,123 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:04,123 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:04,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:04,124 INFO L85 PathProgramCache]: Analyzing trace with hash 1074034372, now seen corresponding path program 6 times [2022-03-15 21:32:04,125 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:04,125 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669698501] [2022-03-15 21:32:04,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:04,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:04,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:04,215 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:04,215 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:04,215 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669698501] [2022-03-15 21:32:04,215 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1669698501] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:04,215 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1180168917] [2022-03-15 21:32:04,215 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:32:04,215 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:04,215 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:04,216 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:04,239 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-03-15 21:32:04,244 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2022-03-15 21:32:04,244 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:04,244 INFO L263 TraceCheckSpWp]: Trace formula consists of 40 conjuncts, 16 conjunts are in the unsatisfiable core [2022-03-15 21:32:04,245 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:04,452 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:04,452 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:04,692 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:04,692 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1180168917] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:04,692 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:04,692 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 6] total 14 [2022-03-15 21:32:04,693 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1526150005] [2022-03-15 21:32:04,693 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:04,693 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:04,694 INFO L252 McrAutomatonBuilder]: Finished intersection with 16 states and 19 transitions. [2022-03-15 21:32:04,694 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:04,794 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 2 new interpolants: [1207#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 1208#(or (not (< j2 M2)) (<= (+ 2 j2) M2) (= (+ (- 1) M2 counter) M1) (not (< 0 counter)))] [2022-03-15 21:32:04,794 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-03-15 21:32:04,795 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:04,795 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-03-15 21:32:04,795 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2022-03-15 21:32:04,795 INFO L87 Difference]: Start difference. First operand 37 states and 77 transitions. Second operand has 10 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:04,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:04,923 INFO L93 Difference]: Finished difference Result 54 states and 102 transitions. [2022-03-15 21:32:04,923 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-03-15 21:32:04,924 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:32:04,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:04,924 INFO L225 Difference]: With dead ends: 54 [2022-03-15 21:32:04,924 INFO L226 Difference]: Without dead ends: 47 [2022-03-15 21:32:04,924 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 10 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2022-03-15 21:32:04,925 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 24 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 131 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 131 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:04,925 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 0 Invalid, 140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 131 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:04,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2022-03-15 21:32:04,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 40. [2022-03-15 21:32:04,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 39 states have (on average 2.1538461538461537) internal successors, (84), 39 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:04,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 84 transitions. [2022-03-15 21:32:04,927 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 84 transitions. Word has length 11 [2022-03-15 21:32:04,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:04,927 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 84 transitions. [2022-03-15 21:32:04,928 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 1.8888888888888888) internal successors, (17), 9 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:04,928 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 84 transitions. [2022-03-15 21:32:04,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-03-15 21:32:04,928 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:04,928 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:04,944 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:05,141 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:05,141 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:05,142 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:05,142 INFO L85 PathProgramCache]: Analyzing trace with hash 1851298651, now seen corresponding path program 7 times [2022-03-15 21:32:05,142 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:05,142 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915280231] [2022-03-15 21:32:05,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:05,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:05,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:05,238 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:05,239 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:05,239 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915280231] [2022-03-15 21:32:05,239 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1915280231] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:05,239 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1479678441] [2022-03-15 21:32:05,239 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:32:05,239 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:05,239 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:05,240 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:05,241 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-03-15 21:32:05,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:05,259 WARN L261 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 25 conjunts are in the unsatisfiable core [2022-03-15 21:32:05,259 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:05,399 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:05,399 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:05,614 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:05,614 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1479678441] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:05,614 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:05,614 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 19 [2022-03-15 21:32:05,614 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [709396514] [2022-03-15 21:32:05,614 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:05,615 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:05,616 INFO L252 McrAutomatonBuilder]: Finished intersection with 22 states and 30 transitions. [2022-03-15 21:32:05,616 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:06,022 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [1442#(and (or (not (< j1 M1)) (<= 1 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 1440#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 1439#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 1443#(and (or (< (+ 2 j1) M1) (<= 0 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 1438#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 1441#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:32:06,023 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-03-15 21:32:06,023 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:06,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-03-15 21:32:06,023 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=575, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:32:06,023 INFO L87 Difference]: Start difference. First operand 40 states and 84 transitions. Second operand has 15 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:06,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:06,638 INFO L93 Difference]: Finished difference Result 88 states and 166 transitions. [2022-03-15 21:32:06,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2022-03-15 21:32:06,638 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-03-15 21:32:06,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:06,639 INFO L225 Difference]: With dead ends: 88 [2022-03-15 21:32:06,639 INFO L226 Difference]: Without dead ends: 76 [2022-03-15 21:32:06,640 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 9 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 551 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=421, Invalid=1649, Unknown=0, NotChecked=0, Total=2070 [2022-03-15 21:32:06,641 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 106 mSDsluCounter, 57 mSDsCounter, 0 mSdLazyCounter, 208 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 106 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 246 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:06,641 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [106 Valid, 0 Invalid, 246 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 208 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:06,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2022-03-15 21:32:06,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 44. [2022-03-15 21:32:06,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44 states, 43 states have (on average 2.302325581395349) internal successors, (99), 43 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:06,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 99 transitions. [2022-03-15 21:32:06,655 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 99 transitions. Word has length 12 [2022-03-15 21:32:06,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:06,655 INFO L470 AbstractCegarLoop]: Abstraction has 44 states and 99 transitions. [2022-03-15 21:32:06,655 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 1.9285714285714286) internal successors, (27), 14 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:06,655 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 99 transitions. [2022-03-15 21:32:06,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-03-15 21:32:06,655 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:06,655 INFO L514 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:06,673 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:06,856 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:06,856 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:06,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:06,857 INFO L85 PathProgramCache]: Analyzing trace with hash 2094347121, now seen corresponding path program 8 times [2022-03-15 21:32:06,857 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:06,857 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1193467151] [2022-03-15 21:32:06,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:06,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:06,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:06,947 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:06,947 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:06,947 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1193467151] [2022-03-15 21:32:06,947 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1193467151] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:06,948 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1087410601] [2022-03-15 21:32:06,948 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:32:06,948 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:06,948 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:06,949 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:06,950 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-03-15 21:32:06,970 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:06,970 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:06,970 WARN L261 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 24 conjunts are in the unsatisfiable core [2022-03-15 21:32:06,971 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:07,116 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:07,116 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:07,314 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:07,314 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1087410601] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:07,314 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:07,314 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 7, 6] total 17 [2022-03-15 21:32:07,315 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [881243200] [2022-03-15 21:32:07,315 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:07,316 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:07,318 INFO L252 McrAutomatonBuilder]: Finished intersection with 18 states and 22 transitions. [2022-03-15 21:32:07,318 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:07,444 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 4 new interpolants: [1728#(or (< j2 M2) (and (<= (+ M2 counter) j1) (<= j1 (+ M2 counter)))), 1743#(and (or (< j2 M2) (< (+ M2 counter) (+ M1 1))) (or (< j2 M2) (<= M1 (+ M2 counter)))), 1745#(and (or (<= (+ j2 counter) j1) (not (< j1 M1))) (or (not (< j1 M1)) (<= (+ j1 1) (+ M2 counter))) (or (not (< j1 M1)) (<= 0 counter))), 1744#(and (or (< j2 M2) (<= M1 (+ M2 counter)) (<= j1 (+ M2 counter))) (or (< j2 M2) (< (+ M2 counter) (+ M1 1))))] [2022-03-15 21:32:07,444 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-03-15 21:32:07,444 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:07,445 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-03-15 21:32:07,445 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=98, Invalid=364, Unknown=0, NotChecked=0, Total=462 [2022-03-15 21:32:07,445 INFO L87 Difference]: Start difference. First operand 44 states and 99 transitions. Second operand has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 11 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:07,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:07,644 INFO L93 Difference]: Finished difference Result 71 states and 138 transitions. [2022-03-15 21:32:07,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:32:07,644 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 11 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-03-15 21:32:07,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:07,644 INFO L225 Difference]: With dead ends: 71 [2022-03-15 21:32:07,644 INFO L226 Difference]: Without dead ends: 64 [2022-03-15 21:32:07,645 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 12 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=160, Invalid=596, Unknown=0, NotChecked=0, Total=756 [2022-03-15 21:32:07,645 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 31 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 129 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 129 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:07,645 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 0 Invalid, 138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 129 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:07,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2022-03-15 21:32:07,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 40. [2022-03-15 21:32:07,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 39 states have (on average 2.230769230769231) internal successors, (87), 39 states have internal predecessors, (87), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:07,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 87 transitions. [2022-03-15 21:32:07,647 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 87 transitions. Word has length 12 [2022-03-15 21:32:07,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:07,647 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 87 transitions. [2022-03-15 21:32:07,647 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 11 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:07,647 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 87 transitions. [2022-03-15 21:32:07,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2022-03-15 21:32:07,648 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:07,648 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:07,664 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-03-15 21:32:07,855 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable9 [2022-03-15 21:32:07,855 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:07,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:07,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1030734335, now seen corresponding path program 9 times [2022-03-15 21:32:07,856 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:07,857 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321516077] [2022-03-15 21:32:07,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:07,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:07,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:07,935 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:07,935 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:07,935 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321516077] [2022-03-15 21:32:07,935 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321516077] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:07,935 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1372702486] [2022-03-15 21:32:07,935 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:32:07,935 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:07,936 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:07,936 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:07,938 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-03-15 21:32:07,955 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-03-15 21:32:07,955 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:07,955 WARN L261 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 23 conjunts are in the unsatisfiable core [2022-03-15 21:32:07,956 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:08,097 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:08,098 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:08,470 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:08,470 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1372702486] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:08,470 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:08,470 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 7] total 19 [2022-03-15 21:32:08,471 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [388918657] [2022-03-15 21:32:08,471 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:08,471 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:08,472 INFO L252 McrAutomatonBuilder]: Finished intersection with 16 states and 18 transitions. [2022-03-15 21:32:08,472 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:08,536 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 2 new interpolants: [1997#(and (or (not (< j1 M1)) (<= M1 (+ M2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (< (+ M2 counter) M1) (< (+ j1 1) M1))), 1996#(and (or (< j1 M1) (< (+ M2 counter) (+ M1 1))) (or (<= M1 (+ M2 counter)) (< j1 M1)))] [2022-03-15 21:32:08,536 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-03-15 21:32:08,536 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:08,536 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-03-15 21:32:08,536 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:32:08,537 INFO L87 Difference]: Start difference. First operand 40 states and 87 transitions. Second operand has 11 states, 10 states have (on average 1.7) internal successors, (17), 10 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:08,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:08,747 INFO L93 Difference]: Finished difference Result 75 states and 146 transitions. [2022-03-15 21:32:08,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-03-15 21:32:08,748 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 10 states have (on average 1.7) internal successors, (17), 10 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 12 [2022-03-15 21:32:08,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:08,748 INFO L225 Difference]: With dead ends: 75 [2022-03-15 21:32:08,748 INFO L226 Difference]: Without dead ends: 70 [2022-03-15 21:32:08,748 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 10 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=182, Invalid=688, Unknown=0, NotChecked=0, Total=870 [2022-03-15 21:32:08,749 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 38 mSDsluCounter, 39 mSDsCounter, 0 mSdLazyCounter, 140 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 153 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 140 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:08,749 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 0 Invalid, 153 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 140 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:08,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-03-15 21:32:08,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 46. [2022-03-15 21:32:08,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 46 states, 45 states have (on average 2.2666666666666666) internal successors, (102), 45 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:08,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 102 transitions. [2022-03-15 21:32:08,751 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 102 transitions. Word has length 12 [2022-03-15 21:32:08,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:08,751 INFO L470 AbstractCegarLoop]: Abstraction has 46 states and 102 transitions. [2022-03-15 21:32:08,751 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 10 states have (on average 1.7) internal successors, (17), 10 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:08,751 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 102 transitions. [2022-03-15 21:32:08,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-03-15 21:32:08,751 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:08,751 INFO L514 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:08,766 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:08,959 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:08,959 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:08,960 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:08,960 INFO L85 PathProgramCache]: Analyzing trace with hash 1555540930, now seen corresponding path program 10 times [2022-03-15 21:32:08,960 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:08,960 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [119514219] [2022-03-15 21:32:08,960 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:08,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:08,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:09,004 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,004 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:09,004 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [119514219] [2022-03-15 21:32:09,004 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [119514219] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:09,004 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1886322824] [2022-03-15 21:32:09,004 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:32:09,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:09,005 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:09,005 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:09,007 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-03-15 21:32:09,023 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:32:09,023 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:09,024 INFO L263 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 12 conjunts are in the unsatisfiable core [2022-03-15 21:32:09,024 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:09,056 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,056 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:09,103 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,103 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1886322824] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:09,103 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:09,103 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 5] total 8 [2022-03-15 21:32:09,103 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [474342606] [2022-03-15 21:32:09,103 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:09,104 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:09,105 INFO L252 McrAutomatonBuilder]: Finished intersection with 25 states and 35 transitions. [2022-03-15 21:32:09,105 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:09,221 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:09,222 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-03-15 21:32:09,222 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:09,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-03-15 21:32:09,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2022-03-15 21:32:09,222 INFO L87 Difference]: Start difference. First operand 46 states and 102 transitions. Second operand has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:09,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:09,278 INFO L93 Difference]: Finished difference Result 102 states and 210 transitions. [2022-03-15 21:32:09,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-03-15 21:32:09,279 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-03-15 21:32:09,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:09,279 INFO L225 Difference]: With dead ends: 102 [2022-03-15 21:32:09,279 INFO L226 Difference]: Without dead ends: 87 [2022-03-15 21:32:09,279 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2022-03-15 21:32:09,280 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 18 mSDsluCounter, 48 mSDsCounter, 0 mSdLazyCounter, 105 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 116 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:09,280 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 0 Invalid, 116 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 105 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:32:09,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2022-03-15 21:32:09,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 52. [2022-03-15 21:32:09,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 51 states have (on average 2.3137254901960786) internal successors, (118), 51 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:09,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 118 transitions. [2022-03-15 21:32:09,283 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 118 transitions. Word has length 13 [2022-03-15 21:32:09,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:09,283 INFO L470 AbstractCegarLoop]: Abstraction has 52 states and 118 transitions. [2022-03-15 21:32:09,283 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 3.2857142857142856) internal successors, (23), 6 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:09,283 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 118 transitions. [2022-03-15 21:32:09,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-03-15 21:32:09,287 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:09,287 INFO L514 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:09,308 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:09,508 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-03-15 21:32:09,509 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:09,509 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:09,509 INFO L85 PathProgramCache]: Analyzing trace with hash -1811131428, now seen corresponding path program 11 times [2022-03-15 21:32:09,510 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:09,510 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2082895760] [2022-03-15 21:32:09,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:09,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:09,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:09,586 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,586 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:09,586 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2082895760] [2022-03-15 21:32:09,586 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2082895760] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:09,586 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [123434452] [2022-03-15 21:32:09,586 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:32:09,586 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:09,587 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:09,587 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:09,588 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-03-15 21:32:09,605 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-03-15 21:32:09,605 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:09,605 WARN L261 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 29 conjunts are in the unsatisfiable core [2022-03-15 21:32:09,606 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:09,756 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,756 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:09,962 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:09,962 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [123434452] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:09,962 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:09,962 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7] total 21 [2022-03-15 21:32:09,962 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [456162020] [2022-03-15 21:32:09,962 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:09,963 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:09,964 INFO L252 McrAutomatonBuilder]: Finished intersection with 19 states and 23 transitions. [2022-03-15 21:32:09,964 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:10,098 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 4 new interpolants: [2569#(and (or (<= j1 (+ j2 counter)) (not (< j1 M1))) (or (<= (+ j2 counter) j1) (not (< j1 M1))) (or (not (< j1 M1)) (<= 1 counter))), 2568#(and (or (not (< j1 M1)) (<= M1 (+ M2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (< (+ M2 counter) M1) (< (+ j1 1) M1))), 2570#(and (or (<= j1 (+ j2 counter)) (not (< (+ j1 1) M1))) (or (<= (+ j2 counter) j1) (not (< (+ j1 1) M1))) (or (<= 0 counter) (not (< (+ j1 1) M1)))), 2567#(and (or (< j1 M1) (< (+ M2 counter) (+ M1 1))) (or (<= M1 (+ M2 counter)) (< j1 M1)))] [2022-03-15 21:32:10,098 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-03-15 21:32:10,098 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:10,098 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-03-15 21:32:10,099 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:32:10,099 INFO L87 Difference]: Start difference. First operand 52 states and 118 transitions. Second operand has 13 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 12 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:10,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:10,664 INFO L93 Difference]: Finished difference Result 83 states and 156 transitions. [2022-03-15 21:32:10,664 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:32:10,664 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 12 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-03-15 21:32:10,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:10,666 INFO L225 Difference]: With dead ends: 83 [2022-03-15 21:32:10,666 INFO L226 Difference]: Without dead ends: 70 [2022-03-15 21:32:10,667 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=463, Invalid=1429, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:32:10,668 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 92 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 143 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 92 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 170 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 143 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:10,668 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [92 Valid, 0 Invalid, 170 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 143 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:10,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2022-03-15 21:32:10,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 37. [2022-03-15 21:32:10,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 36 states have (on average 2.0833333333333335) internal successors, (75), 36 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:10,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 75 transitions. [2022-03-15 21:32:10,676 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 75 transitions. Word has length 13 [2022-03-15 21:32:10,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:10,676 INFO L470 AbstractCegarLoop]: Abstraction has 37 states and 75 transitions. [2022-03-15 21:32:10,676 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 12 states have (on average 1.8333333333333333) internal successors, (22), 12 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:10,676 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 75 transitions. [2022-03-15 21:32:10,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-03-15 21:32:10,676 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:10,676 INFO L514 BasicCegarLoop]: trace histogram [3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:10,694 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2022-03-15 21:32:10,887 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-03-15 21:32:10,887 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:10,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:10,888 INFO L85 PathProgramCache]: Analyzing trace with hash -965456552, now seen corresponding path program 12 times [2022-03-15 21:32:10,888 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:10,888 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894075582] [2022-03-15 21:32:10,888 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:10,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:10,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:10,957 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:10,958 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:10,958 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894075582] [2022-03-15 21:32:10,958 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894075582] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:10,958 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1523344329] [2022-03-15 21:32:10,958 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:32:10,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:10,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:10,959 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:10,979 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-03-15 21:32:10,983 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 2 check-sat command(s) [2022-03-15 21:32:10,983 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:10,983 WARN L261 TraceCheckSpWp]: Trace formula consists of 50 conjuncts, 27 conjunts are in the unsatisfiable core [2022-03-15 21:32:10,984 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:11,136 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:11,136 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:11,527 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:11,528 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1523344329] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:11,528 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:11,528 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 19 [2022-03-15 21:32:11,528 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1770868981] [2022-03-15 21:32:11,528 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:11,529 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:11,529 INFO L252 McrAutomatonBuilder]: Finished intersection with 18 states and 21 transitions. [2022-03-15 21:32:11,529 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:11,632 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 3 new interpolants: [2836#(or (< j2 M2) (and (<= (+ M2 counter) j1) (<= j1 (+ M2 counter)))), 2855#(and (or (< j2 M2) (< (+ M2 counter) (+ M1 1))) (or (< j2 M2) (<= M1 (+ M2 counter)))), 2856#(and (or (< j2 M2) (<= M1 (+ M2 counter)) (<= j1 (+ M2 counter))) (or (< j2 M2) (< (+ M2 counter) (+ M1 1))))] [2022-03-15 21:32:11,633 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-03-15 21:32:11,633 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:11,633 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-03-15 21:32:11,633 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=401, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:32:11,633 INFO L87 Difference]: Start difference. First operand 37 states and 75 transitions. Second operand has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:11,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:11,754 INFO L93 Difference]: Finished difference Result 58 states and 116 transitions. [2022-03-15 21:32:11,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-03-15 21:32:11,755 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-03-15 21:32:11,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:11,755 INFO L225 Difference]: With dead ends: 58 [2022-03-15 21:32:11,755 INFO L226 Difference]: Without dead ends: 51 [2022-03-15 21:32:11,755 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 13 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=156, Invalid=600, Unknown=0, NotChecked=0, Total=756 [2022-03-15 21:32:11,756 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 30 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 108 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 119 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:11,756 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 0 Invalid, 119 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 108 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:32:11,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-03-15 21:32:11,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 39. [2022-03-15 21:32:11,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 38 states have (on average 2.0789473684210527) internal successors, (79), 38 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:11,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 79 transitions. [2022-03-15 21:32:11,757 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 79 transitions. Word has length 13 [2022-03-15 21:32:11,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:11,757 INFO L470 AbstractCegarLoop]: Abstraction has 39 states and 79 transitions. [2022-03-15 21:32:11,757 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.8181818181818181) internal successors, (20), 11 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:11,757 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 79 transitions. [2022-03-15 21:32:11,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-03-15 21:32:11,758 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:11,758 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:11,773 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:11,967 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-03-15 21:32:11,967 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:11,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:11,968 INFO L85 PathProgramCache]: Analyzing trace with hash 902839231, now seen corresponding path program 13 times [2022-03-15 21:32:11,968 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:11,968 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1632789451] [2022-03-15 21:32:11,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:11,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:11,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:12,072 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:12,072 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:12,073 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1632789451] [2022-03-15 21:32:12,073 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1632789451] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:12,073 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1108317837] [2022-03-15 21:32:12,073 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:32:12,073 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:12,073 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:12,074 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:12,074 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-03-15 21:32:12,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:12,097 WARN L261 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 33 conjunts are in the unsatisfiable core [2022-03-15 21:32:12,098 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:12,262 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:12,262 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:12,524 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:12,525 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1108317837] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:12,525 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:12,525 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 25 [2022-03-15 21:32:12,525 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1416610344] [2022-03-15 21:32:12,525 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:12,526 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:12,527 INFO L252 McrAutomatonBuilder]: Finished intersection with 27 states and 38 transitions. [2022-03-15 21:32:12,527 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:13,078 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [3111#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 3112#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 3114#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 1 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 3109#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 3110#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 3108#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 3113#(and (or (not (< j1 M1)) (<= 2 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 3115#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (<= 0 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))))] [2022-03-15 21:32:13,078 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:32:13,078 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:13,078 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:32:13,079 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=987, Unknown=0, NotChecked=0, Total=1190 [2022-03-15 21:32:13,079 INFO L87 Difference]: Start difference. First operand 39 states and 79 transitions. Second operand has 19 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 18 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:13,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:13,868 INFO L93 Difference]: Finished difference Result 86 states and 157 transitions. [2022-03-15 21:32:13,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-03-15 21:32:13,868 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 18 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-03-15 21:32:13,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:13,869 INFO L225 Difference]: With dead ends: 86 [2022-03-15 21:32:13,869 INFO L226 Difference]: Without dead ends: 83 [2022-03-15 21:32:13,870 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 11 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 951 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=657, Invalid=2765, Unknown=0, NotChecked=0, Total=3422 [2022-03-15 21:32:13,870 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 110 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 231 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 276 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 231 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:13,870 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [110 Valid, 0 Invalid, 276 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 231 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:13,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-03-15 21:32:13,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 42. [2022-03-15 21:32:13,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 41 states have (on average 2.097560975609756) internal successors, (86), 41 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:13,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 86 transitions. [2022-03-15 21:32:13,872 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 86 transitions. Word has length 14 [2022-03-15 21:32:13,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:13,872 INFO L470 AbstractCegarLoop]: Abstraction has 42 states and 86 transitions. [2022-03-15 21:32:13,872 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 18 states have (on average 1.8888888888888888) internal successors, (34), 18 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:13,872 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 86 transitions. [2022-03-15 21:32:13,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2022-03-15 21:32:13,872 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:13,872 INFO L514 BasicCegarLoop]: trace histogram [4, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:13,888 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2022-03-15 21:32:14,088 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-03-15 21:32:14,088 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:14,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:14,088 INFO L85 PathProgramCache]: Analyzing trace with hash 612037341, now seen corresponding path program 14 times [2022-03-15 21:32:14,089 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:14,089 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262118771] [2022-03-15 21:32:14,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:14,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:14,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:14,185 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:14,185 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:14,185 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262118771] [2022-03-15 21:32:14,185 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [262118771] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:14,185 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [952451435] [2022-03-15 21:32:14,185 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:32:14,185 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:14,185 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:14,186 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:14,217 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:14,218 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:14,218 WARN L261 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 33 conjunts are in the unsatisfiable core [2022-03-15 21:32:14,219 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:14,226 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-03-15 21:32:14,379 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:14,379 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:14,565 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 1 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:32:14,565 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [952451435] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:14,566 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:14,566 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9, 7] total 21 [2022-03-15 21:32:14,566 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [267647109] [2022-03-15 21:32:14,566 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:14,566 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:14,567 INFO L252 McrAutomatonBuilder]: Finished intersection with 21 states and 26 transitions. [2022-03-15 21:32:14,567 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:14,752 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 5 new interpolants: [3435#(and (or (<= j1 (+ j2 counter)) (not (< j1 M1))) (or (<= (+ j2 counter) j1) (not (< j1 M1))) (or (not (< j1 M1)) (<= 1 counter))), 3413#(or (< j2 M2) (and (<= (+ M2 counter) j1) (<= j1 (+ M2 counter)))), 3436#(and (or (< j2 M2) (< (+ M2 counter) (+ M1 1))) (or (< j2 M2) (<= M1 (+ M2 counter)))), 3437#(and (or (< j2 M2) (<= M1 (+ M2 counter)) (<= j1 (+ M2 counter))) (or (< j2 M2) (< (+ M2 counter) (+ M1 1)))), 3438#(and (or (<= j1 (+ j2 counter)) (not (< (+ j1 1) M1))) (or (<= (+ j2 counter) j1) (not (< (+ j1 1) M1))) (or (<= 0 counter) (not (< (+ j1 1) M1))))] [2022-03-15 21:32:14,753 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-03-15 21:32:14,753 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:14,753 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-03-15 21:32:14,753 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=575, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:32:14,753 INFO L87 Difference]: Start difference. First operand 42 states and 86 transitions. Second operand has 14 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:15,028 INFO L93 Difference]: Finished difference Result 67 states and 131 transitions. [2022-03-15 21:32:15,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:32:15,029 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 14 [2022-03-15 21:32:15,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:15,029 INFO L225 Difference]: With dead ends: 67 [2022-03-15 21:32:15,029 INFO L226 Difference]: Without dead ends: 57 [2022-03-15 21:32:15,030 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 14 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=345, Invalid=1215, Unknown=0, NotChecked=0, Total=1560 [2022-03-15 21:32:15,030 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 58 mSDsluCounter, 27 mSDsCounter, 0 mSdLazyCounter, 107 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 58 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 107 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:15,030 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [58 Valid, 0 Invalid, 122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 107 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:15,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2022-03-15 21:32:15,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 28. [2022-03-15 21:32:15,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 27 states have (on average 1.8518518518518519) internal successors, (50), 27 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 50 transitions. [2022-03-15 21:32:15,032 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 50 transitions. Word has length 14 [2022-03-15 21:32:15,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:15,032 INFO L470 AbstractCegarLoop]: Abstraction has 28 states and 50 transitions. [2022-03-15 21:32:15,032 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 13 states have (on average 1.9230769230769231) internal successors, (25), 13 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,032 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 50 transitions. [2022-03-15 21:32:15,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-03-15 21:32:15,032 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:15,032 INFO L514 BasicCegarLoop]: trace histogram [4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:15,050 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:15,248 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:15,248 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:15,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:15,248 INFO L85 PathProgramCache]: Analyzing trace with hash -2076897314, now seen corresponding path program 15 times [2022-03-15 21:32:15,249 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:15,249 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773967995] [2022-03-15 21:32:15,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:15,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:15,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:15,292 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:15,292 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:15,292 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773967995] [2022-03-15 21:32:15,292 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [773967995] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:15,292 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [798664517] [2022-03-15 21:32:15,292 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:32:15,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:15,292 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:15,293 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:15,294 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-03-15 21:32:15,312 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2022-03-15 21:32:15,312 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:15,312 INFO L263 TraceCheckSpWp]: Trace formula consists of 60 conjuncts, 16 conjunts are in the unsatisfiable core [2022-03-15 21:32:15,313 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:15,355 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:15,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:15,420 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 6 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:15,420 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [798664517] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:15,421 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:15,421 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 6] total 10 [2022-03-15 21:32:15,421 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1044666892] [2022-03-15 21:32:15,421 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:15,421 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:15,423 INFO L252 McrAutomatonBuilder]: Finished intersection with 30 states and 43 transitions. [2022-03-15 21:32:15,423 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:15,602 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:15,602 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-03-15 21:32:15,602 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:15,603 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-03-15 21:32:15,603 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2022-03-15 21:32:15,603 INFO L87 Difference]: Start difference. First operand 28 states and 50 transitions. Second operand has 8 states, 8 states have (on average 3.5) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:15,683 INFO L93 Difference]: Finished difference Result 62 states and 117 transitions. [2022-03-15 21:32:15,683 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:32:15,683 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.5) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-03-15 21:32:15,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:15,684 INFO L225 Difference]: With dead ends: 62 [2022-03-15 21:32:15,684 INFO L226 Difference]: Without dead ends: 43 [2022-03-15 21:32:15,684 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 37 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2022-03-15 21:32:15,684 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 11 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 148 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 11 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 160 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:15,684 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [11 Valid, 0 Invalid, 160 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 148 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:15,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2022-03-15 21:32:15,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 30. [2022-03-15 21:32:15,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 29 states have (on average 1.8620689655172413) internal successors, (54), 29 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 54 transitions. [2022-03-15 21:32:15,686 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 54 transitions. Word has length 15 [2022-03-15 21:32:15,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:15,686 INFO L470 AbstractCegarLoop]: Abstraction has 30 states and 54 transitions. [2022-03-15 21:32:15,686 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.5) internal successors, (28), 7 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:15,686 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 54 transitions. [2022-03-15 21:32:15,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2022-03-15 21:32:15,686 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:15,686 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:15,703 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:15,899 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-03-15 21:32:15,899 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:15,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:15,900 INFO L85 PathProgramCache]: Analyzing trace with hash 2036962459, now seen corresponding path program 16 times [2022-03-15 21:32:15,903 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:15,903 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490902516] [2022-03-15 21:32:15,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:15,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:15,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:16,023 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:16,023 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:16,023 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490902516] [2022-03-15 21:32:16,023 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1490902516] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:16,023 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [430310929] [2022-03-15 21:32:16,023 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:32:16,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:16,024 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:16,025 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:16,026 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-03-15 21:32:16,043 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:32:16,044 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:16,044 WARN L261 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 41 conjunts are in the unsatisfiable core [2022-03-15 21:32:16,045 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:16,252 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:16,253 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:16,587 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:16,588 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [430310929] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:16,588 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:16,588 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 31 [2022-03-15 21:32:16,588 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1916211089] [2022-03-15 21:32:16,588 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:16,589 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:16,590 INFO L252 McrAutomatonBuilder]: Finished intersection with 32 states and 46 transitions. [2022-03-15 21:32:16,590 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:17,318 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [3941#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 3939#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 3938#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 3945#(and (or (not (< (+ 3 j1) M1)) (<= 0 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 3936#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 3940#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 3942#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 3 counter) (< (+ j1 1) M1))), 3944#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= 1 counter) (not (< (+ 2 j1) M1)))), 3937#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 3943#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 2 counter) (not (< (+ j1 1) M1))))] [2022-03-15 21:32:17,319 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:32:17,319 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:17,319 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:32:17,319 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=1504, Unknown=0, NotChecked=0, Total=1806 [2022-03-15 21:32:17,320 INFO L87 Difference]: Start difference. First operand 30 states and 54 transitions. Second operand has 23 states, 22 states have (on average 1.8636363636363635) internal successors, (41), 22 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:18,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:18,284 INFO L93 Difference]: Finished difference Result 75 states and 140 transitions. [2022-03-15 21:32:18,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-03-15 21:32:18,284 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 22 states have (on average 1.8636363636363635) internal successors, (41), 22 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 16 [2022-03-15 21:32:18,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:18,284 INFO L225 Difference]: With dead ends: 75 [2022-03-15 21:32:18,284 INFO L226 Difference]: Without dead ends: 72 [2022-03-15 21:32:18,285 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 12 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1369 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=913, Invalid=3779, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:32:18,286 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 110 mSDsluCounter, 77 mSDsCounter, 0 mSdLazyCounter, 246 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 315 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 246 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:18,286 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [110 Valid, 0 Invalid, 315 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 246 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:18,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2022-03-15 21:32:18,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 33. [2022-03-15 21:32:18,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 32 states have (on average 1.875) internal successors, (60), 32 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:18,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 60 transitions. [2022-03-15 21:32:18,287 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 60 transitions. Word has length 16 [2022-03-15 21:32:18,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:18,287 INFO L470 AbstractCegarLoop]: Abstraction has 33 states and 60 transitions. [2022-03-15 21:32:18,287 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 22 states have (on average 1.8636363636363635) internal successors, (41), 22 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:18,287 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 60 transitions. [2022-03-15 21:32:18,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-03-15 21:32:18,288 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:18,288 INFO L514 BasicCegarLoop]: trace histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:18,303 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2022-03-15 21:32:18,495 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2022-03-15 21:32:18,495 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:18,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:18,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1278815614, now seen corresponding path program 17 times [2022-03-15 21:32:18,496 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:18,496 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338314158] [2022-03-15 21:32:18,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:18,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:18,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:18,562 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:18,562 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:18,562 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338314158] [2022-03-15 21:32:18,562 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1338314158] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:18,562 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1577896997] [2022-03-15 21:32:18,562 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:32:18,562 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:18,562 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:18,563 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:18,565 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-03-15 21:32:18,586 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2022-03-15 21:32:18,586 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:18,586 INFO L263 TraceCheckSpWp]: Trace formula consists of 70 conjuncts, 20 conjunts are in the unsatisfiable core [2022-03-15 21:32:18,591 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:18,646 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:18,646 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:18,741 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 10 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:18,741 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1577896997] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:18,741 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:18,741 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7] total 12 [2022-03-15 21:32:18,741 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1743364263] [2022-03-15 21:32:18,741 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:18,742 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:18,744 INFO L252 McrAutomatonBuilder]: Finished intersection with 35 states and 51 transitions. [2022-03-15 21:32:18,744 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:18,948 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:18,949 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-03-15 21:32:18,949 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:18,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-03-15 21:32:18,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2022-03-15 21:32:18,949 INFO L87 Difference]: Start difference. First operand 33 states and 60 transitions. Second operand has 9 states, 9 states have (on average 3.6666666666666665) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:19,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:19,051 INFO L93 Difference]: Finished difference Result 74 states and 141 transitions. [2022-03-15 21:32:19,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:32:19,051 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 3.6666666666666665) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-03-15 21:32:19,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:19,051 INFO L225 Difference]: With dead ends: 74 [2022-03-15 21:32:19,051 INFO L226 Difference]: Without dead ends: 51 [2022-03-15 21:32:19,052 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 44 SyntacticMatches, 5 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2022-03-15 21:32:19,052 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 12 mSDsluCounter, 119 mSDsCounter, 0 mSdLazyCounter, 218 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 231 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 218 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:19,052 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [12 Valid, 0 Invalid, 231 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 218 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:19,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2022-03-15 21:32:19,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 35. [2022-03-15 21:32:19,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 1.8823529411764706) internal successors, (64), 34 states have internal predecessors, (64), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:19,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 64 transitions. [2022-03-15 21:32:19,053 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 64 transitions. Word has length 17 [2022-03-15 21:32:19,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:19,053 INFO L470 AbstractCegarLoop]: Abstraction has 35 states and 64 transitions. [2022-03-15 21:32:19,054 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 3.6666666666666665) internal successors, (33), 8 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:19,054 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 64 transitions. [2022-03-15 21:32:19,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2022-03-15 21:32:19,054 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:19,054 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:19,069 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:19,266 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:19,267 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:19,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:19,267 INFO L85 PathProgramCache]: Analyzing trace with hash 770513919, now seen corresponding path program 18 times [2022-03-15 21:32:19,279 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:19,279 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170977354] [2022-03-15 21:32:19,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:19,280 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:19,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:19,444 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 10 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:19,445 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:19,445 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170977354] [2022-03-15 21:32:19,445 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [170977354] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:19,445 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [779484376] [2022-03-15 21:32:19,445 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:32:19,445 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:19,445 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:19,446 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:19,446 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-03-15 21:32:19,471 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 4 check-sat command(s) [2022-03-15 21:32:19,471 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:19,475 WARN L261 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 48 conjunts are in the unsatisfiable core [2022-03-15 21:32:19,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:19,767 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:19,767 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:20,233 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 6 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:20,234 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [779484376] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:20,234 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:20,234 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 37 [2022-03-15 21:32:20,234 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [342060890] [2022-03-15 21:32:20,234 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:20,235 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:20,237 INFO L252 McrAutomatonBuilder]: Finished intersection with 37 states and 54 transitions. [2022-03-15 21:32:20,237 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:21,075 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [4554#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 0 counter) (< (+ 5 j1) M1))), 4545#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 4550#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (< (+ j1 1) M1) (<= 4 counter))), 4553#(and (or (not (< (+ 3 j1) M1)) (<= 1 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 4552#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (<= 2 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)))), 4544#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 4547#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 4543#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 4548#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 4546#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 4549#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 4551#(and (or (< (+ 2 j1) M1) (<= 3 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1))))] [2022-03-15 21:32:21,076 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:32:21,076 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:21,076 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:32:21,077 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=372, Invalid=2178, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:32:21,077 INFO L87 Difference]: Start difference. First operand 35 states and 64 transitions. Second operand has 27 states, 26 states have (on average 1.8461538461538463) internal successors, (48), 26 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:22,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:22,374 INFO L93 Difference]: Finished difference Result 91 states and 172 transitions. [2022-03-15 21:32:22,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-03-15 21:32:22,375 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 26 states have (on average 1.8461538461538463) internal successors, (48), 26 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 18 [2022-03-15 21:32:22,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:22,375 INFO L225 Difference]: With dead ends: 91 [2022-03-15 21:32:22,375 INFO L226 Difference]: Without dead ends: 88 [2022-03-15 21:32:22,377 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2050 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1031, Invalid=5611, Unknown=0, NotChecked=0, Total=6642 [2022-03-15 21:32:22,377 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 190 mSDsluCounter, 102 mSDsCounter, 0 mSdLazyCounter, 327 mSolverCounterSat, 94 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 190 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 421 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 94 IncrementalHoareTripleChecker+Valid, 327 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:22,377 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [190 Valid, 0 Invalid, 421 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [94 Valid, 327 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:22,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2022-03-15 21:32:22,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 38. [2022-03-15 21:32:22,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 37 states have (on average 1.8918918918918919) internal successors, (70), 37 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:22,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 70 transitions. [2022-03-15 21:32:22,378 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 70 transitions. Word has length 18 [2022-03-15 21:32:22,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:22,379 INFO L470 AbstractCegarLoop]: Abstraction has 38 states and 70 transitions. [2022-03-15 21:32:22,379 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 26 states have (on average 1.8461538461538463) internal successors, (48), 26 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:22,379 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 70 transitions. [2022-03-15 21:32:22,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-03-15 21:32:22,379 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:22,379 INFO L514 BasicCegarLoop]: trace histogram [6, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:22,395 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:22,587 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:22,587 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:22,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:22,588 INFO L85 PathProgramCache]: Analyzing trace with hash -1884014690, now seen corresponding path program 19 times [2022-03-15 21:32:22,588 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:22,588 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104731655] [2022-03-15 21:32:22,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:22,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:22,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:22,668 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:22,669 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:22,669 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2104731655] [2022-03-15 21:32:22,669 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2104731655] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:22,669 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [280488583] [2022-03-15 21:32:22,669 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:32:22,669 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:22,669 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:22,670 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:22,677 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-03-15 21:32:22,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:22,698 INFO L263 TraceCheckSpWp]: Trace formula consists of 80 conjuncts, 24 conjunts are in the unsatisfiable core [2022-03-15 21:32:22,698 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:22,749 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:22,750 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:22,848 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:22,848 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [280488583] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:22,848 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:22,849 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 14 [2022-03-15 21:32:22,849 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [807803052] [2022-03-15 21:32:22,849 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:22,850 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:22,852 INFO L252 McrAutomatonBuilder]: Finished intersection with 40 states and 59 transitions. [2022-03-15 21:32:22,852 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:23,106 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:23,107 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-03-15 21:32:23,107 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:23,107 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-03-15 21:32:23,107 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2022-03-15 21:32:23,107 INFO L87 Difference]: Start difference. First operand 38 states and 70 transitions. Second operand has 10 states, 10 states have (on average 3.8) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:23,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:23,249 INFO L93 Difference]: Finished difference Result 86 states and 165 transitions. [2022-03-15 21:32:23,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:32:23,249 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.8) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-03-15 21:32:23,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:23,250 INFO L225 Difference]: With dead ends: 86 [2022-03-15 21:32:23,250 INFO L226 Difference]: Without dead ends: 59 [2022-03-15 21:32:23,250 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 51 SyntacticMatches, 5 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2022-03-15 21:32:23,250 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 13 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 338 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 13 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 350 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 338 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:23,251 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [13 Valid, 0 Invalid, 350 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 338 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:23,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-03-15 21:32:23,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 40. [2022-03-15 21:32:23,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 39 states have (on average 1.8974358974358974) internal successors, (74), 39 states have internal predecessors, (74), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:23,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 74 transitions. [2022-03-15 21:32:23,252 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 74 transitions. Word has length 19 [2022-03-15 21:32:23,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:23,252 INFO L470 AbstractCegarLoop]: Abstraction has 40 states and 74 transitions. [2022-03-15 21:32:23,252 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.8) internal successors, (38), 9 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:23,252 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 74 transitions. [2022-03-15 21:32:23,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2022-03-15 21:32:23,252 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:23,252 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:23,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:23,459 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:23,459 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:23,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:23,460 INFO L85 PathProgramCache]: Analyzing trace with hash 426644955, now seen corresponding path program 20 times [2022-03-15 21:32:23,460 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:23,460 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34754234] [2022-03-15 21:32:23,460 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:23,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:23,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:23,650 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:23,650 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:23,650 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34754234] [2022-03-15 21:32:23,651 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [34754234] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:23,651 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [592553998] [2022-03-15 21:32:23,651 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:32:23,651 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:23,651 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:23,652 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:23,653 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-03-15 21:32:23,673 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:23,673 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:23,674 WARN L261 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 57 conjunts are in the unsatisfiable core [2022-03-15 21:32:23,675 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:24,017 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:24,017 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:24,487 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 15 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:24,487 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [592553998] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:24,487 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:24,487 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 43 [2022-03-15 21:32:24,487 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [139704714] [2022-03-15 21:32:24,488 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:24,489 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:24,491 INFO L252 McrAutomatonBuilder]: Finished intersection with 42 states and 62 transitions. [2022-03-15 21:32:24,492 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:25,566 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 14 new interpolants: [5255#(and (or (not (< (+ 3 j1) M1)) (<= 2 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 5251#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 5246#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 5256#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 1 counter))), 5248#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 5249#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 5250#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 5253#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 4 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 5244#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 5257#(and (or (not (< (+ 5 j1) M1)) (<= 0 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 5245#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 5254#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (<= 3 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)))), 5247#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 5252#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 5 counter) (< (+ j1 1) M1)))] [2022-03-15 21:32:25,566 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-03-15 21:32:25,566 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:25,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-03-15 21:32:25,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=565, Invalid=2857, Unknown=0, NotChecked=0, Total=3422 [2022-03-15 21:32:25,567 INFO L87 Difference]: Start difference. First operand 40 states and 74 transitions. Second operand has 31 states, 30 states have (on average 1.8333333333333333) internal successors, (55), 30 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:27,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:27,156 INFO L93 Difference]: Finished difference Result 107 states and 204 transitions. [2022-03-15 21:32:27,156 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-03-15 21:32:27,156 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 30 states have (on average 1.8333333333333333) internal successors, (55), 30 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 20 [2022-03-15 21:32:27,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:27,157 INFO L225 Difference]: With dead ends: 107 [2022-03-15 21:32:27,157 INFO L226 Difference]: Without dead ends: 104 [2022-03-15 21:32:27,158 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 13 SyntacticMatches, 4 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2743 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1736, Invalid=7194, Unknown=0, NotChecked=0, Total=8930 [2022-03-15 21:32:27,159 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 210 mSDsluCounter, 125 mSDsCounter, 0 mSdLazyCounter, 383 mSolverCounterSat, 105 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 210 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 488 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 105 IncrementalHoareTripleChecker+Valid, 383 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:27,159 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [210 Valid, 0 Invalid, 488 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [105 Valid, 383 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:27,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2022-03-15 21:32:27,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 43. [2022-03-15 21:32:27,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 42 states have (on average 1.9047619047619047) internal successors, (80), 42 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:27,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 80 transitions. [2022-03-15 21:32:27,160 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 80 transitions. Word has length 20 [2022-03-15 21:32:27,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:27,160 INFO L470 AbstractCegarLoop]: Abstraction has 43 states and 80 transitions. [2022-03-15 21:32:27,160 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 30 states have (on average 1.8333333333333333) internal successors, (55), 30 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:27,161 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 80 transitions. [2022-03-15 21:32:27,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-03-15 21:32:27,161 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:27,161 INFO L514 BasicCegarLoop]: trace histogram [7, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:27,176 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:27,375 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2022-03-15 21:32:27,375 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:27,376 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:27,376 INFO L85 PathProgramCache]: Analyzing trace with hash 340949314, now seen corresponding path program 21 times [2022-03-15 21:32:27,376 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:27,376 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [296722761] [2022-03-15 21:32:27,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:27,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:27,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:27,456 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 49 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:27,457 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:27,457 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [296722761] [2022-03-15 21:32:27,457 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [296722761] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:27,457 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1873303378] [2022-03-15 21:32:27,457 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:32:27,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:27,457 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:27,458 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:27,459 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-03-15 21:32:27,484 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-03-15 21:32:27,484 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:27,484 INFO L263 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 27 conjunts are in the unsatisfiable core [2022-03-15 21:32:27,485 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:27,552 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 1 proven. 48 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:27,552 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:27,665 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 21 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:27,665 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1873303378] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:27,665 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:27,665 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 9] total 16 [2022-03-15 21:32:27,666 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1627653957] [2022-03-15 21:32:27,666 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:27,667 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:27,670 INFO L252 McrAutomatonBuilder]: Finished intersection with 45 states and 67 transitions. [2022-03-15 21:32:27,670 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:27,998 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:27,998 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-03-15 21:32:27,998 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:27,999 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-03-15 21:32:27,999 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2022-03-15 21:32:27,999 INFO L87 Difference]: Start difference. First operand 43 states and 80 transitions. Second operand has 11 states, 11 states have (on average 3.909090909090909) internal successors, (43), 10 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:28,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:28,169 INFO L93 Difference]: Finished difference Result 98 states and 189 transitions. [2022-03-15 21:32:28,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:32:28,169 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.909090909090909) internal successors, (43), 10 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-03-15 21:32:28,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:28,169 INFO L225 Difference]: With dead ends: 98 [2022-03-15 21:32:28,169 INFO L226 Difference]: Without dead ends: 67 [2022-03-15 21:32:28,170 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 58 SyntacticMatches, 5 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=416, Unknown=0, NotChecked=0, Total=552 [2022-03-15 21:32:28,170 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 14 mSDsluCounter, 235 mSDsCounter, 0 mSdLazyCounter, 400 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 14 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 415 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 400 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:28,170 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [14 Valid, 0 Invalid, 415 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 400 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:32:28,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-03-15 21:32:28,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 45. [2022-03-15 21:32:28,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 45 states, 44 states have (on average 1.9090909090909092) internal successors, (84), 44 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:28,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 84 transitions. [2022-03-15 21:32:28,172 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 84 transitions. Word has length 21 [2022-03-15 21:32:28,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:28,172 INFO L470 AbstractCegarLoop]: Abstraction has 45 states and 84 transitions. [2022-03-15 21:32:28,172 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 3.909090909090909) internal successors, (43), 10 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:28,172 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 84 transitions. [2022-03-15 21:32:28,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2022-03-15 21:32:28,172 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:28,172 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:28,188 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2022-03-15 21:32:28,375 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2022-03-15 21:32:28,375 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:28,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:28,376 INFO L85 PathProgramCache]: Analyzing trace with hash 386776127, now seen corresponding path program 22 times [2022-03-15 21:32:28,376 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:28,376 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [872205597] [2022-03-15 21:32:28,376 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:28,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:28,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:28,601 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 21 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:28,601 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:28,601 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [872205597] [2022-03-15 21:32:28,601 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [872205597] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:28,601 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1764371250] [2022-03-15 21:32:28,601 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:32:28,601 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:28,602 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:28,603 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:28,603 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-03-15 21:32:28,626 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:32:28,627 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:28,628 WARN L261 TraceCheckSpWp]: Trace formula consists of 95 conjuncts, 65 conjunts are in the unsatisfiable core [2022-03-15 21:32:28,628 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:29,041 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:29,041 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:29,650 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 21 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:29,650 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1764371250] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:29,650 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:29,650 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 49 [2022-03-15 21:32:29,650 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [506856669] [2022-03-15 21:32:29,650 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:29,651 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:29,655 INFO L252 McrAutomatonBuilder]: Finished intersection with 47 states and 70 transitions. [2022-03-15 21:32:29,655 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:30,870 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 16 new interpolants: [6049#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 5 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 6051#(and (or (not (< (+ 3 j1) M1)) (<= 3 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 6052#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 2 counter) (< (+ 5 j1) M1))), 6043#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6044#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6047#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6053#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 1 counter) (< (+ 6 j1) M1))), 6041#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 6046#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6039#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 6040#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 6050#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 4 counter))), 6042#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6048#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (<= 6 counter) (not (< j1 M1)) (< (+ j1 1) M1))), 6054#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (<= 0 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)))), 6045#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:32:30,871 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-03-15 21:32:30,871 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:30,871 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-03-15 21:32:30,872 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=725, Invalid=3697, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:32:30,872 INFO L87 Difference]: Start difference. First operand 45 states and 84 transitions. Second operand has 35 states, 34 states have (on average 1.8235294117647058) internal successors, (62), 34 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:32,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:32,743 INFO L93 Difference]: Finished difference Result 123 states and 236 transitions. [2022-03-15 21:32:32,743 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2022-03-15 21:32:32,743 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 34 states have (on average 1.8235294117647058) internal successors, (62), 34 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 22 [2022-03-15 21:32:32,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:32,744 INFO L225 Difference]: With dead ends: 123 [2022-03-15 21:32:32,744 INFO L226 Difference]: Without dead ends: 120 [2022-03-15 21:32:32,746 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 15 SyntacticMatches, 3 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3550 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=2242, Invalid=9314, Unknown=0, NotChecked=0, Total=11556 [2022-03-15 21:32:32,747 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 306 mSDsluCounter, 121 mSDsCounter, 0 mSdLazyCounter, 387 mSolverCounterSat, 135 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 306 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 522 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 135 IncrementalHoareTripleChecker+Valid, 387 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:32,747 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [306 Valid, 0 Invalid, 522 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [135 Valid, 387 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:32,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2022-03-15 21:32:32,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 48. [2022-03-15 21:32:32,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 48 states, 47 states have (on average 1.9148936170212767) internal successors, (90), 47 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:32,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 90 transitions. [2022-03-15 21:32:32,748 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 90 transitions. Word has length 22 [2022-03-15 21:32:32,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:32,748 INFO L470 AbstractCegarLoop]: Abstraction has 48 states and 90 transitions. [2022-03-15 21:32:32,749 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 34 states have (on average 1.8235294117647058) internal successors, (62), 34 states have internal predecessors, (62), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:32,749 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 90 transitions. [2022-03-15 21:32:32,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:32:32,749 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:32,749 INFO L514 BasicCegarLoop]: trace histogram [8, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:32,764 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2022-03-15 21:32:32,949 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:32,949 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:32,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:32,950 INFO L85 PathProgramCache]: Analyzing trace with hash -894984354, now seen corresponding path program 23 times [2022-03-15 21:32:32,951 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:32,951 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1578928076] [2022-03-15 21:32:32,951 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:32,951 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:32,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:33,064 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:33,064 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:33,064 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1578928076] [2022-03-15 21:32:33,064 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1578928076] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:33,064 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [368753658] [2022-03-15 21:32:33,064 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:32:33,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:33,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:33,065 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:33,067 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-03-15 21:32:33,091 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-03-15 21:32:33,091 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:33,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 32 conjunts are in the unsatisfiable core [2022-03-15 21:32:33,092 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:33,177 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:33,178 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:33,332 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 28 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:33,332 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [368753658] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:33,332 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:33,332 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 10] total 18 [2022-03-15 21:32:33,332 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [922745725] [2022-03-15 21:32:33,332 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:33,334 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:33,338 INFO L252 McrAutomatonBuilder]: Finished intersection with 50 states and 75 transitions. [2022-03-15 21:32:33,338 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:33,707 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:33,707 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2022-03-15 21:32:33,707 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:33,707 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2022-03-15 21:32:33,708 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2022-03-15 21:32:33,708 INFO L87 Difference]: Start difference. First operand 48 states and 90 transitions. Second operand has 12 states, 12 states have (on average 4.0) internal successors, (48), 11 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:33,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:33,945 INFO L93 Difference]: Finished difference Result 110 states and 213 transitions. [2022-03-15 21:32:33,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:32:33,954 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 4.0) internal successors, (48), 11 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:32:33,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:33,955 INFO L225 Difference]: With dead ends: 110 [2022-03-15 21:32:33,955 INFO L226 Difference]: Without dead ends: 75 [2022-03-15 21:32:33,955 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 65 SyntacticMatches, 5 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=535, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:32:33,956 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 15 mSDsluCounter, 343 mSDsCounter, 0 mSdLazyCounter, 562 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 15 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 576 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 562 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:33,956 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [15 Valid, 0 Invalid, 576 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 562 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:33,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2022-03-15 21:32:33,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 50. [2022-03-15 21:32:33,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 50 states, 49 states have (on average 1.9183673469387754) internal successors, (94), 49 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:33,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 94 transitions. [2022-03-15 21:32:33,957 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 94 transitions. Word has length 23 [2022-03-15 21:32:33,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:33,957 INFO L470 AbstractCegarLoop]: Abstraction has 50 states and 94 transitions. [2022-03-15 21:32:33,957 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 4.0) internal successors, (48), 11 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:33,957 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 94 transitions. [2022-03-15 21:32:33,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2022-03-15 21:32:33,957 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:33,958 INFO L514 BasicCegarLoop]: trace histogram [8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:33,973 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-03-15 21:32:34,163 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:34,163 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:34,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:34,164 INFO L85 PathProgramCache]: Analyzing trace with hash 194909979, now seen corresponding path program 24 times [2022-03-15 21:32:34,164 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:34,164 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524888274] [2022-03-15 21:32:34,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:34,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:34,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:34,419 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 28 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:34,419 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:34,419 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524888274] [2022-03-15 21:32:34,420 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1524888274] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:34,420 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [938250688] [2022-03-15 21:32:34,420 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:32:34,420 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:34,420 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:34,421 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:34,421 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-03-15 21:32:34,450 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-03-15 21:32:34,450 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:34,451 WARN L261 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 72 conjunts are in the unsatisfiable core [2022-03-15 21:32:34,452 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:34,899 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:34,899 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:35,639 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 21 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:35,639 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [938250688] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:35,639 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:35,639 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19] total 55 [2022-03-15 21:32:35,639 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [156211798] [2022-03-15 21:32:35,639 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:35,641 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:35,652 INFO L252 McrAutomatonBuilder]: Finished intersection with 52 states and 78 transitions. [2022-03-15 21:32:35,652 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:37,113 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 18 new interpolants: [6939#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 6 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 6933#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6941#(and (or (not (< (+ 3 j1) M1)) (< (+ j1 4) M1) (<= 4 counter)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 6943#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 2 counter) (< (+ 6 j1) M1))), 6935#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6940#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= 5 counter) (not (< (+ 2 j1) M1)))), 6928#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 6929#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 6930#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 6932#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6937#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6934#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6938#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (< (+ j1 1) M1) (<= 7 counter))), 6944#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 1 counter) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 6942#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 3 counter) (< (+ 5 j1) M1))), 6931#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 6945#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 0 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 6936#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:32:37,113 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 39 states [2022-03-15 21:32:37,113 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:37,113 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2022-03-15 21:32:37,114 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=4768, Unknown=0, NotChecked=0, Total=5550 [2022-03-15 21:32:37,114 INFO L87 Difference]: Start difference. First operand 50 states and 94 transitions. Second operand has 39 states, 38 states have (on average 1.8157894736842106) internal successors, (69), 38 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:39,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:39,574 INFO L93 Difference]: Finished difference Result 139 states and 268 transitions. [2022-03-15 21:32:39,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-03-15 21:32:39,574 INFO L78 Accepts]: Start accepts. Automaton has has 39 states, 38 states have (on average 1.8157894736842106) internal successors, (69), 38 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 24 [2022-03-15 21:32:39,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:39,575 INFO L225 Difference]: With dead ends: 139 [2022-03-15 21:32:39,575 INFO L226 Difference]: Without dead ends: 136 [2022-03-15 21:32:39,576 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 15 SyntacticMatches, 4 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4742 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=2193, Invalid=12327, Unknown=0, NotChecked=0, Total=14520 [2022-03-15 21:32:39,576 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 301 mSDsluCounter, 172 mSDsCounter, 0 mSdLazyCounter, 529 mSolverCounterSat, 164 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 301 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 693 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 164 IncrementalHoareTripleChecker+Valid, 529 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:39,576 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [301 Valid, 0 Invalid, 693 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [164 Valid, 529 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:32:39,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2022-03-15 21:32:39,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 53. [2022-03-15 21:32:39,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 52 states have (on average 1.9230769230769231) internal successors, (100), 52 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:39,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 100 transitions. [2022-03-15 21:32:39,578 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 100 transitions. Word has length 24 [2022-03-15 21:32:39,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:39,578 INFO L470 AbstractCegarLoop]: Abstraction has 53 states and 100 transitions. [2022-03-15 21:32:39,578 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 39 states, 38 states have (on average 1.8157894736842106) internal successors, (69), 38 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:39,578 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 100 transitions. [2022-03-15 21:32:39,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-03-15 21:32:39,578 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:39,578 INFO L514 BasicCegarLoop]: trace histogram [9, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:39,594 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Ended with exit code 0 [2022-03-15 21:32:39,794 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-03-15 21:32:39,794 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:39,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:39,794 INFO L85 PathProgramCache]: Analyzing trace with hash 1747099650, now seen corresponding path program 25 times [2022-03-15 21:32:39,795 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:39,795 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113160004] [2022-03-15 21:32:39,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:39,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:39,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:39,918 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:39,919 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:39,919 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113160004] [2022-03-15 21:32:39,919 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1113160004] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:39,919 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1020381673] [2022-03-15 21:32:39,919 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:32:39,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:39,919 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:39,920 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:39,921 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-03-15 21:32:39,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:39,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 110 conjuncts, 36 conjunts are in the unsatisfiable core [2022-03-15 21:32:39,945 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:40,018 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:40,018 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:40,207 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 36 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:40,207 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1020381673] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:40,207 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:40,207 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 11] total 20 [2022-03-15 21:32:40,207 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2127174539] [2022-03-15 21:32:40,207 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:40,209 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:40,214 INFO L252 McrAutomatonBuilder]: Finished intersection with 55 states and 83 transitions. [2022-03-15 21:32:40,214 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:40,579 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:40,579 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-03-15 21:32:40,579 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:40,579 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-03-15 21:32:40,579 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=300, Unknown=0, NotChecked=0, Total=420 [2022-03-15 21:32:40,579 INFO L87 Difference]: Start difference. First operand 53 states and 100 transitions. Second operand has 13 states, 13 states have (on average 4.076923076923077) internal successors, (53), 12 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:40,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:40,836 INFO L93 Difference]: Finished difference Result 122 states and 237 transitions. [2022-03-15 21:32:40,836 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-03-15 21:32:40,836 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 4.076923076923077) internal successors, (53), 12 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-03-15 21:32:40,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:40,837 INFO L225 Difference]: With dead ends: 122 [2022-03-15 21:32:40,837 INFO L226 Difference]: Without dead ends: 83 [2022-03-15 21:32:40,837 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 72 SyntacticMatches, 5 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=201, Invalid=669, Unknown=0, NotChecked=0, Total=870 [2022-03-15 21:32:40,837 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 16 mSDsluCounter, 391 mSDsCounter, 0 mSdLazyCounter, 638 mSolverCounterSat, 17 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 655 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 17 IncrementalHoareTripleChecker+Valid, 638 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:40,837 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 0 Invalid, 655 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [17 Valid, 638 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:32:40,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2022-03-15 21:32:40,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 55. [2022-03-15 21:32:40,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 54 states have (on average 1.9259259259259258) internal successors, (104), 54 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:40,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 104 transitions. [2022-03-15 21:32:40,839 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 104 transitions. Word has length 25 [2022-03-15 21:32:40,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:40,839 INFO L470 AbstractCegarLoop]: Abstraction has 55 states and 104 transitions. [2022-03-15 21:32:40,839 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 4.076923076923077) internal successors, (53), 12 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:40,839 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 104 transitions. [2022-03-15 21:32:40,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2022-03-15 21:32:40,839 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:40,839 INFO L514 BasicCegarLoop]: trace histogram [9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:40,854 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Ended with exit code 0 [2022-03-15 21:32:41,043 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2022-03-15 21:32:41,043 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:41,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:41,044 INFO L85 PathProgramCache]: Analyzing trace with hash 1163533439, now seen corresponding path program 26 times [2022-03-15 21:32:41,044 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:41,044 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171605875] [2022-03-15 21:32:41,044 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:41,044 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:41,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:41,322 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 36 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:41,322 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:41,322 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171605875] [2022-03-15 21:32:41,322 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [171605875] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:41,322 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1090477858] [2022-03-15 21:32:41,322 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:32:41,323 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:41,323 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:41,323 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:41,324 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-03-15 21:32:41,347 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:32:41,348 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:41,349 WARN L261 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 81 conjunts are in the unsatisfiable core [2022-03-15 21:32:41,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:41,821 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:41,821 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:42,665 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 36 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:42,665 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1090477858] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:42,665 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:42,665 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21] total 61 [2022-03-15 21:32:42,665 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1395303220] [2022-03-15 21:32:42,665 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:42,667 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:42,673 INFO L252 McrAutomatonBuilder]: Finished intersection with 57 states and 86 transitions. [2022-03-15 21:32:42,673 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:44,270 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 20 new interpolants: [7919#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7924#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (<= 6 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)))), 7923#(and (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 7 counter)) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 7917#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7912#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 7915#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7911#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 7914#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7926#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 4 counter)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter)))), 7925#(and (or (not (< (+ 3 j1) M1)) (<= 5 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 7929#(and (or (not (< (+ 7 j1) M1)) (<= 1 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 7921#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7922#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 8 counter) (< (+ j1 1) M1))), 7927#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 3 counter) (< (+ 6 j1) M1))), 7918#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7913#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 7930#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 0 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 7916#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 7928#(and (or (<= 2 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 7920#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:32:44,270 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 43 states [2022-03-15 21:32:44,271 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:44,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2022-03-15 21:32:44,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1112, Invalid=5694, Unknown=0, NotChecked=0, Total=6806 [2022-03-15 21:32:44,271 INFO L87 Difference]: Start difference. First operand 55 states and 104 transitions. Second operand has 43 states, 42 states have (on average 1.8095238095238095) internal successors, (76), 42 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:47,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:47,075 INFO L93 Difference]: Finished difference Result 155 states and 300 transitions. [2022-03-15 21:32:47,075 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2022-03-15 21:32:47,076 INFO L78 Accepts]: Start accepts. Automaton has has 43 states, 42 states have (on average 1.8095238095238095) internal successors, (76), 42 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 26 [2022-03-15 21:32:47,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:47,076 INFO L225 Difference]: With dead ends: 155 [2022-03-15 21:32:47,076 INFO L226 Difference]: Without dead ends: 152 [2022-03-15 21:32:47,078 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 17 SyntacticMatches, 3 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5569 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=3463, Invalid=14359, Unknown=0, NotChecked=0, Total=17822 [2022-03-15 21:32:47,078 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 312 mSDsluCounter, 212 mSDsCounter, 0 mSdLazyCounter, 662 mSolverCounterSat, 192 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 312 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 854 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 192 IncrementalHoareTripleChecker+Valid, 662 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:47,078 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [312 Valid, 0 Invalid, 854 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [192 Valid, 662 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:32:47,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2022-03-15 21:32:47,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 58. [2022-03-15 21:32:47,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 57 states have (on average 1.9298245614035088) internal successors, (110), 57 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:47,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 110 transitions. [2022-03-15 21:32:47,080 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 110 transitions. Word has length 26 [2022-03-15 21:32:47,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:47,080 INFO L470 AbstractCegarLoop]: Abstraction has 58 states and 110 transitions. [2022-03-15 21:32:47,080 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 43 states, 42 states have (on average 1.8095238095238095) internal successors, (76), 42 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:47,080 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 110 transitions. [2022-03-15 21:32:47,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:32:47,080 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:47,080 INFO L514 BasicCegarLoop]: trace histogram [10, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:47,098 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:47,291 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-03-15 21:32:47,291 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:47,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:47,292 INFO L85 PathProgramCache]: Analyzing trace with hash 1709655838, now seen corresponding path program 27 times [2022-03-15 21:32:47,292 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:47,292 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1467360610] [2022-03-15 21:32:47,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:47,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:47,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:47,443 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 100 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:47,443 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:47,443 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1467360610] [2022-03-15 21:32:47,443 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1467360610] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:47,443 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [655842751] [2022-03-15 21:32:47,443 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:32:47,443 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:47,443 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:47,444 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:47,467 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-03-15 21:32:47,474 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-03-15 21:32:47,474 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:47,475 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 37 conjunts are in the unsatisfiable core [2022-03-15 21:32:47,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:47,589 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 94 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:47,589 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:47,745 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 45 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:47,745 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [655842751] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:47,745 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:47,745 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 16, 12] total 22 [2022-03-15 21:32:47,745 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [368264747] [2022-03-15 21:32:47,745 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:47,747 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:47,753 INFO L252 McrAutomatonBuilder]: Finished intersection with 60 states and 91 transitions. [2022-03-15 21:32:47,753 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:48,187 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:48,187 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-03-15 21:32:48,187 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:48,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-03-15 21:32:48,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=363, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:32:48,187 INFO L87 Difference]: Start difference. First operand 58 states and 110 transitions. Second operand has 14 states, 14 states have (on average 4.142857142857143) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:48,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:48,544 INFO L93 Difference]: Finished difference Result 134 states and 261 transitions. [2022-03-15 21:32:48,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-03-15 21:32:48,544 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 4.142857142857143) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:32:48,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:48,545 INFO L225 Difference]: With dead ends: 134 [2022-03-15 21:32:48,545 INFO L226 Difference]: Without dead ends: 91 [2022-03-15 21:32:48,545 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 79 SyntacticMatches, 5 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=238, Invalid=818, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:32:48,545 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 17 mSDsluCounter, 529 mSDsCounter, 0 mSdLazyCounter, 842 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 17 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 858 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 842 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:48,545 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [17 Valid, 0 Invalid, 858 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 842 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:32:48,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2022-03-15 21:32:48,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 60. [2022-03-15 21:32:48,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 60 states, 59 states have (on average 1.9322033898305084) internal successors, (114), 59 states have internal predecessors, (114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:48,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 114 transitions. [2022-03-15 21:32:48,551 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 114 transitions. Word has length 27 [2022-03-15 21:32:48,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:48,551 INFO L470 AbstractCegarLoop]: Abstraction has 60 states and 114 transitions. [2022-03-15 21:32:48,551 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 4.142857142857143) internal successors, (58), 13 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:48,551 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 114 transitions. [2022-03-15 21:32:48,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2022-03-15 21:32:48,551 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:48,552 INFO L514 BasicCegarLoop]: trace histogram [10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:48,567 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:48,755 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-03-15 21:32:48,755 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:48,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:48,756 INFO L85 PathProgramCache]: Analyzing trace with hash -751724453, now seen corresponding path program 28 times [2022-03-15 21:32:48,756 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:48,756 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47469135] [2022-03-15 21:32:48,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:48,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:48,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:49,086 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 45 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:49,087 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:49,087 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47469135] [2022-03-15 21:32:49,087 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [47469135] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:49,087 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1482432839] [2022-03-15 21:32:49,087 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:32:49,087 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:49,087 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:49,088 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:49,089 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-03-15 21:32:49,116 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:32:49,116 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:49,117 WARN L261 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 89 conjunts are in the unsatisfiable core [2022-03-15 21:32:49,118 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:49,660 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:49,660 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:50,495 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 45 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:50,495 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1482432839] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:50,495 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:50,495 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23] total 67 [2022-03-15 21:32:50,496 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [581702321] [2022-03-15 21:32:50,496 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:50,498 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:50,504 INFO L252 McrAutomatonBuilder]: Finished intersection with 62 states and 94 transitions. [2022-03-15 21:32:50,505 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:52,315 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 22 new interpolants: [9003#(and (or (<= 6 counter) (not (< (+ 3 j1) M1)) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 9006#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 3 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 8990#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 9009#(and (or (< (+ j1 10) M1) (<= 0 counter) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 8992#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8996#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 9002#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 7 counter))), 8989#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 8999#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8995#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8998#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8988#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 9001#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 8 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 9007#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 2 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 9005#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= 4 counter))), 8994#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8997#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8991#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 8993#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 9008#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 1 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 9000#(and (or (not (< j1 M1)) (<= 9 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 9004#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 5 counter)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))))] [2022-03-15 21:32:52,315 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 47 states [2022-03-15 21:32:52,316 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:52,316 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2022-03-15 21:32:52,316 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1337, Invalid=6853, Unknown=0, NotChecked=0, Total=8190 [2022-03-15 21:32:52,316 INFO L87 Difference]: Start difference. First operand 60 states and 114 transitions. Second operand has 47 states, 46 states have (on average 1.8043478260869565) internal successors, (83), 46 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:55,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:55,530 INFO L93 Difference]: Finished difference Result 171 states and 332 transitions. [2022-03-15 21:32:55,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-03-15 21:32:55,530 INFO L78 Accepts]: Start accepts. Automaton has has 47 states, 46 states have (on average 1.8043478260869565) internal successors, (83), 46 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 28 [2022-03-15 21:32:55,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:55,531 INFO L225 Difference]: With dead ends: 171 [2022-03-15 21:32:55,531 INFO L226 Difference]: Without dead ends: 168 [2022-03-15 21:32:55,532 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 18 SyntacticMatches, 3 SemanticMatches, 145 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6748 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=4174, Invalid=17288, Unknown=0, NotChecked=0, Total=21462 [2022-03-15 21:32:55,533 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 506 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 550 mSolverCounterSat, 248 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 506 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 798 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 248 IncrementalHoareTripleChecker+Valid, 550 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:55,533 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [506 Valid, 0 Invalid, 798 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [248 Valid, 550 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:32:55,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2022-03-15 21:32:55,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 63. [2022-03-15 21:32:55,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 63 states, 62 states have (on average 1.935483870967742) internal successors, (120), 62 states have internal predecessors, (120), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:55,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 120 transitions. [2022-03-15 21:32:55,535 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 120 transitions. Word has length 28 [2022-03-15 21:32:55,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:55,535 INFO L470 AbstractCegarLoop]: Abstraction has 63 states and 120 transitions. [2022-03-15 21:32:55,535 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 47 states, 46 states have (on average 1.8043478260869565) internal successors, (83), 46 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:55,535 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 120 transitions. [2022-03-15 21:32:55,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-03-15 21:32:55,535 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:55,535 INFO L514 BasicCegarLoop]: trace histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:55,551 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-03-15 21:32:55,739 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:55,739 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:55,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:55,741 INFO L85 PathProgramCache]: Analyzing trace with hash -1828763966, now seen corresponding path program 29 times [2022-03-15 21:32:55,741 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:55,741 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [109389502] [2022-03-15 21:32:55,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:55,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:55,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:55,882 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:55,883 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:55,883 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [109389502] [2022-03-15 21:32:55,883 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [109389502] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:55,883 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2059141867] [2022-03-15 21:32:55,883 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:32:55,883 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:55,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:55,884 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:55,884 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-03-15 21:32:55,916 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:32:55,916 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:55,917 INFO L263 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 44 conjunts are in the unsatisfiable core [2022-03-15 21:32:55,917 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:56,000 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 121 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:56,000 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:56,208 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 55 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:56,209 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2059141867] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:56,209 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:56,209 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 13] total 24 [2022-03-15 21:32:56,209 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1272715827] [2022-03-15 21:32:56,209 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:56,211 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:56,218 INFO L252 McrAutomatonBuilder]: Finished intersection with 65 states and 99 transitions. [2022-03-15 21:32:56,219 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:32:56,672 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:32:56,672 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-03-15 21:32:56,672 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:32:56,673 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-03-15 21:32:56,673 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=432, Unknown=0, NotChecked=0, Total=600 [2022-03-15 21:32:56,673 INFO L87 Difference]: Start difference. First operand 63 states and 120 transitions. Second operand has 15 states, 15 states have (on average 4.2) internal successors, (63), 14 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:57,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:32:57,050 INFO L93 Difference]: Finished difference Result 146 states and 285 transitions. [2022-03-15 21:32:57,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-03-15 21:32:57,050 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 4.2) internal successors, (63), 14 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-03-15 21:32:57,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:32:57,051 INFO L225 Difference]: With dead ends: 146 [2022-03-15 21:32:57,051 INFO L226 Difference]: Without dead ends: 99 [2022-03-15 21:32:57,051 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 86 SyntacticMatches, 5 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=278, Invalid=982, Unknown=0, NotChecked=0, Total=1260 [2022-03-15 21:32:57,051 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 18 mSDsluCounter, 587 mSDsCounter, 0 mSdLazyCounter, 932 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 18 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 951 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 932 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:32:57,051 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [18 Valid, 0 Invalid, 951 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 932 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:32:57,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2022-03-15 21:32:57,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 65. [2022-03-15 21:32:57,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 64 states have (on average 1.9375) internal successors, (124), 64 states have internal predecessors, (124), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:57,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 124 transitions. [2022-03-15 21:32:57,053 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 124 transitions. Word has length 29 [2022-03-15 21:32:57,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:32:57,053 INFO L470 AbstractCegarLoop]: Abstraction has 65 states and 124 transitions. [2022-03-15 21:32:57,053 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.2) internal successors, (63), 14 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:32:57,053 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 124 transitions. [2022-03-15 21:32:57,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2022-03-15 21:32:57,053 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:32:57,053 INFO L514 BasicCegarLoop]: trace histogram [11, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:32:57,069 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2022-03-15 21:32:57,254 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:57,254 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:32:57,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:32:57,254 INFO L85 PathProgramCache]: Analyzing trace with hash -688243521, now seen corresponding path program 30 times [2022-03-15 21:32:57,255 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:32:57,255 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [199371703] [2022-03-15 21:32:57,255 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:32:57,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:32:57,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:32:57,614 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 55 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:57,614 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:32:57,614 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [199371703] [2022-03-15 21:32:57,615 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [199371703] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:32:57,615 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [692795271] [2022-03-15 21:32:57,615 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:32:57,615 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:32:57,615 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:32:57,616 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:32:57,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-03-15 21:32:57,645 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:32:57,645 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:32:57,646 WARN L261 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 95 conjunts are in the unsatisfiable core [2022-03-15 21:32:57,647 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:32:58,383 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:58,383 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:32:59,520 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 45 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:32:59,520 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [692795271] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:32:59,520 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:32:59,520 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25] total 73 [2022-03-15 21:32:59,520 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1423134223] [2022-03-15 21:32:59,520 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:32:59,523 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:32:59,531 INFO L252 McrAutomatonBuilder]: Finished intersection with 67 states and 102 transitions. [2022-03-15 21:32:59,531 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:01,655 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 24 new interpolants: [10174#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 8 counter)) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 10170#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10162#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10161#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 10176#(and (or (<= 6 counter) (not (< (+ j1 4) M1)) (< (+ 5 j1) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter)))), 10179#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 3 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 10180#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 2 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 10177#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 5 counter) (< (+ 6 j1) M1))), 10163#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10173#(and (or (< (+ 2 j1) M1) (<= 9 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 10181#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 1 counter))), 10172#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 10 counter) (< (+ j1 1) M1))), 10168#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10169#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10166#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10178#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 4 counter))), 10160#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 10164#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10167#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10159#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 10171#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10182#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 0 counter))), 10165#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 10175#(and (or (not (< (+ 3 j1) M1)) (< (+ j1 4) M1) (<= 7 counter)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1)))] [2022-03-15 21:33:01,655 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 51 states [2022-03-15 21:33:01,655 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:01,656 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2022-03-15 21:33:01,656 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1338, Invalid=8364, Unknown=0, NotChecked=0, Total=9702 [2022-03-15 21:33:01,656 INFO L87 Difference]: Start difference. First operand 65 states and 124 transitions. Second operand has 51 states, 50 states have (on average 1.8) internal successors, (90), 50 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:05,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:05,684 INFO L93 Difference]: Finished difference Result 187 states and 364 transitions. [2022-03-15 21:33:05,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2022-03-15 21:33:05,684 INFO L78 Accepts]: Start accepts. Automaton has has 51 states, 50 states have (on average 1.8) internal successors, (90), 50 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 30 [2022-03-15 21:33:05,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:05,685 INFO L225 Difference]: With dead ends: 187 [2022-03-15 21:33:05,685 INFO L226 Difference]: Without dead ends: 184 [2022-03-15 21:33:05,686 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 18 SyntacticMatches, 4 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8392 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=3787, Invalid=21653, Unknown=0, NotChecked=0, Total=25440 [2022-03-15 21:33:05,687 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 441 mSDsluCounter, 240 mSDsCounter, 0 mSdLazyCounter, 776 mSolverCounterSat, 276 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 441 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1052 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 276 IncrementalHoareTripleChecker+Valid, 776 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:05,687 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [441 Valid, 0 Invalid, 1052 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [276 Valid, 776 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:33:05,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2022-03-15 21:33:05,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 68. [2022-03-15 21:33:05,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 68 states, 67 states have (on average 1.9402985074626866) internal successors, (130), 67 states have internal predecessors, (130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:05,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 130 transitions. [2022-03-15 21:33:05,689 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 130 transitions. Word has length 30 [2022-03-15 21:33:05,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:05,689 INFO L470 AbstractCegarLoop]: Abstraction has 68 states and 130 transitions. [2022-03-15 21:33:05,689 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 51 states, 50 states have (on average 1.8) internal successors, (90), 50 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:05,689 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 130 transitions. [2022-03-15 21:33:05,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:33:05,689 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:05,689 INFO L514 BasicCegarLoop]: trace histogram [12, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:05,706 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:05,889 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2022-03-15 21:33:05,890 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:05,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:05,890 INFO L85 PathProgramCache]: Analyzing trace with hash 139144926, now seen corresponding path program 31 times [2022-03-15 21:33:05,891 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:05,891 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742957650] [2022-03-15 21:33:05,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:05,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:05,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:06,053 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:06,053 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:06,053 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [742957650] [2022-03-15 21:33:06,053 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [742957650] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:06,053 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [167078148] [2022-03-15 21:33:06,053 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:33:06,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:06,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:06,055 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:06,056 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-03-15 21:33:06,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:06,084 INFO L263 TraceCheckSpWp]: Trace formula consists of 140 conjuncts, 48 conjunts are in the unsatisfiable core [2022-03-15 21:33:06,085 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:06,197 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 144 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:06,197 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:06,486 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 66 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:06,486 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [167078148] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:06,486 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:06,486 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 14] total 26 [2022-03-15 21:33:06,486 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2056002544] [2022-03-15 21:33:06,487 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:06,489 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:06,498 INFO L252 McrAutomatonBuilder]: Finished intersection with 70 states and 107 transitions. [2022-03-15 21:33:06,498 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:07,060 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:33:07,060 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-03-15 21:33:07,060 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:07,060 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-03-15 21:33:07,061 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=507, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:33:07,061 INFO L87 Difference]: Start difference. First operand 68 states and 130 transitions. Second operand has 16 states, 16 states have (on average 4.25) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:07,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:07,501 INFO L93 Difference]: Finished difference Result 158 states and 309 transitions. [2022-03-15 21:33:07,501 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2022-03-15 21:33:07,501 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 4.25) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:33:07,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:07,501 INFO L225 Difference]: With dead ends: 158 [2022-03-15 21:33:07,501 INFO L226 Difference]: Without dead ends: 107 [2022-03-15 21:33:07,502 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 93 SyntacticMatches, 5 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=321, Invalid=1161, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:33:07,502 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 19 mSDsluCounter, 755 mSDsCounter, 0 mSdLazyCounter, 1178 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 19 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 1178 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:07,502 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [19 Valid, 0 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 1178 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:33:07,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2022-03-15 21:33:07,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 70. [2022-03-15 21:33:07,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 70 states, 69 states have (on average 1.9420289855072463) internal successors, (134), 69 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:07,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 134 transitions. [2022-03-15 21:33:07,504 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 134 transitions. Word has length 31 [2022-03-15 21:33:07,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:07,504 INFO L470 AbstractCegarLoop]: Abstraction has 70 states and 134 transitions. [2022-03-15 21:33:07,504 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 4.25) internal successors, (68), 15 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:07,504 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 134 transitions. [2022-03-15 21:33:07,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2022-03-15 21:33:07,504 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:07,504 INFO L514 BasicCegarLoop]: trace histogram [12, 12, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:07,519 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2022-03-15 21:33:07,716 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,32 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:07,716 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:07,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:07,717 INFO L85 PathProgramCache]: Analyzing trace with hash 962632091, now seen corresponding path program 32 times [2022-03-15 21:33:07,717 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:07,717 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020171450] [2022-03-15 21:33:07,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:07,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:07,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:08,167 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 66 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:08,167 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:08,167 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020171450] [2022-03-15 21:33:08,167 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020171450] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:08,167 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1576280338] [2022-03-15 21:33:08,167 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:33:08,167 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:08,168 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:08,168 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:08,169 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-03-15 21:33:08,196 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:33:08,196 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:08,198 WARN L261 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 105 conjunts are in the unsatisfiable core [2022-03-15 21:33:08,199 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:08,880 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:08,880 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:10,086 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 66 proven. 90 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:10,086 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1576280338] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:10,086 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:10,086 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27] total 79 [2022-03-15 21:33:10,087 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [614693059] [2022-03-15 21:33:10,087 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:10,089 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:10,099 INFO L252 McrAutomatonBuilder]: Finished intersection with 72 states and 110 transitions. [2022-03-15 21:33:10,100 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:12,447 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 26 new interpolants: [11442#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 7 counter)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter)))), 11449#(and (or (< (+ j1 12) M1) (<= 0 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 11436#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11424#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 11425#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 11444#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 5 counter))), 11431#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11432#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11443#(and (or (not (< (+ 5 j1) M1)) (<= 6 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 11439#(and (or (< (+ 2 j1) M1) (<= 10 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 11441#(and (or (not (< (+ 3 j1) M1)) (<= 8 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 11440#(and (or (< (+ 3 j1) M1) (<= 9 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 11427#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11448#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 1 counter))), 11429#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11445#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 4 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 11433#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11446#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 3 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 11437#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11434#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11435#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11430#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 11426#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 11447#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= 2 counter) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 11438#(and (or (not (< j1 M1)) (<= 11 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 11428#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:33:12,448 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 55 states [2022-03-15 21:33:12,448 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:12,448 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2022-03-15 21:33:12,449 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1852, Invalid=9490, Unknown=0, NotChecked=0, Total=11342 [2022-03-15 21:33:12,449 INFO L87 Difference]: Start difference. First operand 70 states and 134 transitions. Second operand has 55 states, 54 states have (on average 1.7962962962962963) internal successors, (97), 54 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:16,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:16,901 INFO L93 Difference]: Finished difference Result 203 states and 396 transitions. [2022-03-15 21:33:16,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-03-15 21:33:16,901 INFO L78 Accepts]: Start accepts. Automaton has has 55 states, 54 states have (on average 1.7962962962962963) internal successors, (97), 54 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 32 [2022-03-15 21:33:16,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:16,902 INFO L225 Difference]: With dead ends: 203 [2022-03-15 21:33:16,902 INFO L226 Difference]: Without dead ends: 200 [2022-03-15 21:33:16,903 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 19 SyntacticMatches, 4 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9508 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=5801, Invalid=23955, Unknown=0, NotChecked=0, Total=29756 [2022-03-15 21:33:16,904 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 551 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 711 mSolverCounterSat, 346 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 551 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1057 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 346 IncrementalHoareTripleChecker+Valid, 711 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:16,904 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [551 Valid, 0 Invalid, 1057 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [346 Valid, 711 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:33:16,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2022-03-15 21:33:16,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 73. [2022-03-15 21:33:16,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 73 states, 72 states have (on average 1.9444444444444444) internal successors, (140), 72 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:16,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 140 transitions. [2022-03-15 21:33:16,906 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 140 transitions. Word has length 32 [2022-03-15 21:33:16,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:16,906 INFO L470 AbstractCegarLoop]: Abstraction has 73 states and 140 transitions. [2022-03-15 21:33:16,906 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 55 states, 54 states have (on average 1.7962962962962963) internal successors, (97), 54 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:16,906 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 140 transitions. [2022-03-15 21:33:16,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-03-15 21:33:16,906 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:16,906 INFO L514 BasicCegarLoop]: trace histogram [13, 12, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:16,922 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:17,121 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,33 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:17,122 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:17,122 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:17,122 INFO L85 PathProgramCache]: Analyzing trace with hash -223318654, now seen corresponding path program 33 times [2022-03-15 21:33:17,122 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:17,123 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381323425] [2022-03-15 21:33:17,123 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:17,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:17,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:17,299 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 0 proven. 169 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:17,299 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:17,299 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381323425] [2022-03-15 21:33:17,299 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [381323425] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:17,299 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1110335257] [2022-03-15 21:33:17,299 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:33:17,299 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:17,300 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:17,300 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:17,301 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-03-15 21:33:17,339 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-03-15 21:33:17,339 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:17,341 INFO L263 TraceCheckSpWp]: Trace formula consists of 150 conjuncts, 55 conjunts are in the unsatisfiable core [2022-03-15 21:33:17,341 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:17,717 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 6 proven. 163 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:17,717 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:17,979 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 78 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:17,979 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1110335257] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:17,979 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:17,979 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 27, 15] total 42 [2022-03-15 21:33:17,979 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [844759277] [2022-03-15 21:33:17,979 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:17,982 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:17,992 INFO L252 McrAutomatonBuilder]: Finished intersection with 75 states and 115 transitions. [2022-03-15 21:33:17,993 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:18,722 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:33:18,722 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-03-15 21:33:18,722 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:18,722 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-03-15 21:33:18,722 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=359, Invalid=1447, Unknown=0, NotChecked=0, Total=1806 [2022-03-15 21:33:18,723 INFO L87 Difference]: Start difference. First operand 73 states and 140 transitions. Second operand has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 16 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:19,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:19,236 INFO L93 Difference]: Finished difference Result 170 states and 333 transitions. [2022-03-15 21:33:19,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2022-03-15 21:33:19,236 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 16 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-03-15 21:33:19,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:19,237 INFO L225 Difference]: With dead ends: 170 [2022-03-15 21:33:19,237 INFO L226 Difference]: Without dead ends: 115 [2022-03-15 21:33:19,237 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 86 SyntacticMatches, 5 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 772 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=502, Invalid=2578, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:33:19,237 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 20 mSDsluCounter, 883 mSDsCounter, 0 mSdLazyCounter, 1367 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 20 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1386 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 1367 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:19,237 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [20 Valid, 0 Invalid, 1386 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 1367 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:33:19,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2022-03-15 21:33:19,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 75. [2022-03-15 21:33:19,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 75 states, 74 states have (on average 1.945945945945946) internal successors, (144), 74 states have internal predecessors, (144), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:19,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 144 transitions. [2022-03-15 21:33:19,239 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 144 transitions. Word has length 33 [2022-03-15 21:33:19,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:19,239 INFO L470 AbstractCegarLoop]: Abstraction has 75 states and 144 transitions. [2022-03-15 21:33:19,239 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 16 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:19,239 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 144 transitions. [2022-03-15 21:33:19,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2022-03-15 21:33:19,240 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:19,240 INFO L514 BasicCegarLoop]: trace histogram [13, 13, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:19,256 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Ended with exit code 0 [2022-03-15 21:33:19,455 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable34 [2022-03-15 21:33:19,455 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:19,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:19,456 INFO L85 PathProgramCache]: Analyzing trace with hash 873864447, now seen corresponding path program 34 times [2022-03-15 21:33:19,456 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:19,457 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1096355865] [2022-03-15 21:33:19,457 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:19,457 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:19,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:19,926 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 78 proven. 104 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:19,926 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:19,926 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1096355865] [2022-03-15 21:33:19,927 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1096355865] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:19,927 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [499348320] [2022-03-15 21:33:19,927 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:33:19,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:19,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:19,928 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:19,928 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-03-15 21:33:19,959 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:33:19,959 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:19,961 WARN L261 TraceCheckSpWp]: Trace formula consists of 155 conjuncts, 113 conjunts are in the unsatisfiable core [2022-03-15 21:33:19,962 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:20,724 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:20,724 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:21,869 INFO L134 CoverageAnalysis]: Checked inductivity of 182 backedges. 78 proven. 104 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:21,869 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [499348320] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:21,869 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:21,869 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29] total 85 [2022-03-15 21:33:21,869 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1113427731] [2022-03-15 21:33:21,869 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:21,872 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:21,884 INFO L252 McrAutomatonBuilder]: Finished intersection with 77 states and 118 transitions. [2022-03-15 21:33:21,884 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:24,381 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 28 new interpolants: [12807#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12824#(and (or (< (+ j1 13) M1) (<= 0 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 12818#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 6 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 12804#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12820#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 4 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 12802#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12819#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 5 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 12801#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12817#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= 7 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 12798#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 12816#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 8 counter))), 12814#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= 10 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 12799#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 12821#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= 3 counter) (not (< (+ 9 j1) M1)))), 12808#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12810#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12800#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12822#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 2 counter))), 12811#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12813#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 11 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 12806#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12815#(and (or (not (< (+ 3 j1) M1)) (<= 9 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 12805#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12803#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12809#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 12797#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 12812#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (<= 12 counter) (not (< j1 M1)) (< (+ j1 1) M1))), 12823#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 1 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter))))] [2022-03-15 21:33:24,400 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 59 states [2022-03-15 21:33:24,400 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:24,401 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2022-03-15 21:33:24,401 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2138, Invalid=10972, Unknown=0, NotChecked=0, Total=13110 [2022-03-15 21:33:24,401 INFO L87 Difference]: Start difference. First operand 75 states and 144 transitions. Second operand has 59 states, 58 states have (on average 1.793103448275862) internal successors, (104), 58 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:29,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:29,445 INFO L93 Difference]: Finished difference Result 219 states and 428 transitions. [2022-03-15 21:33:29,446 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2022-03-15 21:33:29,446 INFO L78 Accepts]: Start accepts. Automaton has has 59 states, 58 states have (on average 1.793103448275862) internal successors, (104), 58 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 34 [2022-03-15 21:33:29,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:29,446 INFO L225 Difference]: With dead ends: 219 [2022-03-15 21:33:29,447 INFO L226 Difference]: Without dead ends: 216 [2022-03-15 21:33:29,448 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 208 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 184 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10963 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=6709, Invalid=27701, Unknown=0, NotChecked=0, Total=34410 [2022-03-15 21:33:29,449 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 614 mSDsluCounter, 294 mSDsCounter, 0 mSdLazyCounter, 946 mSolverCounterSat, 386 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 614 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1332 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 386 IncrementalHoareTripleChecker+Valid, 946 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:29,449 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [614 Valid, 0 Invalid, 1332 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [386 Valid, 946 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:33:29,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2022-03-15 21:33:29,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 78. [2022-03-15 21:33:29,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78 states, 77 states have (on average 1.948051948051948) internal successors, (150), 77 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:29,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 150 transitions. [2022-03-15 21:33:29,451 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 150 transitions. Word has length 34 [2022-03-15 21:33:29,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:29,451 INFO L470 AbstractCegarLoop]: Abstraction has 78 states and 150 transitions. [2022-03-15 21:33:29,451 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 59 states, 58 states have (on average 1.793103448275862) internal successors, (104), 58 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:29,451 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 150 transitions. [2022-03-15 21:33:29,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:33:29,451 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:29,451 INFO L514 BasicCegarLoop]: trace histogram [14, 13, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:29,467 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:29,667 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2022-03-15 21:33:29,667 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:29,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:29,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1319851678, now seen corresponding path program 35 times [2022-03-15 21:33:29,668 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:29,668 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373513016] [2022-03-15 21:33:29,668 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:29,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:29,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:29,867 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:29,867 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:29,867 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [373513016] [2022-03-15 21:33:29,867 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [373513016] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:29,867 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1480498004] [2022-03-15 21:33:29,867 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:33:29,868 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:29,868 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:29,868 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:29,869 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-03-15 21:33:29,903 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-03-15 21:33:29,903 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:29,904 INFO L263 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 56 conjunts are in the unsatisfiable core [2022-03-15 21:33:29,905 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:30,016 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 196 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:30,017 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:30,319 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 91 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:30,319 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1480498004] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:30,319 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:30,319 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 16] total 30 [2022-03-15 21:33:30,319 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1825281961] [2022-03-15 21:33:30,319 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:30,322 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:30,334 INFO L252 McrAutomatonBuilder]: Finished intersection with 80 states and 123 transitions. [2022-03-15 21:33:30,334 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:30,913 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:33:30,913 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-03-15 21:33:30,913 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:30,913 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-03-15 21:33:30,914 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=255, Invalid=675, Unknown=0, NotChecked=0, Total=930 [2022-03-15 21:33:30,914 INFO L87 Difference]: Start difference. First operand 78 states and 150 transitions. Second operand has 18 states, 18 states have (on average 4.333333333333333) internal successors, (78), 17 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:31,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:31,471 INFO L93 Difference]: Finished difference Result 182 states and 357 transitions. [2022-03-15 21:33:31,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2022-03-15 21:33:31,472 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 4.333333333333333) internal successors, (78), 17 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:33:31,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:31,472 INFO L225 Difference]: With dead ends: 182 [2022-03-15 21:33:31,472 INFO L226 Difference]: Without dead ends: 123 [2022-03-15 21:33:31,472 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 107 SyntacticMatches, 5 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=416, Invalid=1564, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:33:31,473 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 21 mSDsluCounter, 956 mSDsCounter, 0 mSdLazyCounter, 1478 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1500 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 1478 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:31,473 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 0 Invalid, 1500 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 1478 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:33:31,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2022-03-15 21:33:31,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 80. [2022-03-15 21:33:31,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 79 states have (on average 1.9493670886075949) internal successors, (154), 79 states have internal predecessors, (154), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:31,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 154 transitions. [2022-03-15 21:33:31,474 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 154 transitions. Word has length 35 [2022-03-15 21:33:31,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:31,475 INFO L470 AbstractCegarLoop]: Abstraction has 80 states and 154 transitions. [2022-03-15 21:33:31,475 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 4.333333333333333) internal successors, (78), 17 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:31,475 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 154 transitions. [2022-03-15 21:33:31,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2022-03-15 21:33:31,475 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:31,475 INFO L514 BasicCegarLoop]: trace histogram [14, 14, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:31,490 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:31,679 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2022-03-15 21:33:31,679 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:31,679 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:31,680 INFO L85 PathProgramCache]: Analyzing trace with hash -849143077, now seen corresponding path program 36 times [2022-03-15 21:33:31,680 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:31,680 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1867173093] [2022-03-15 21:33:31,680 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:31,680 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:31,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:32,182 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 91 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:32,182 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:32,182 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1867173093] [2022-03-15 21:33:32,183 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1867173093] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:32,183 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782318625] [2022-03-15 21:33:32,183 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:33:32,183 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:32,183 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:32,184 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:32,184 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-03-15 21:33:32,219 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-03-15 21:33:32,219 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:32,220 WARN L261 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 120 conjunts are in the unsatisfiable core [2022-03-15 21:33:32,221 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:33,099 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:33,099 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:34,667 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 78 proven. 132 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:34,668 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782318625] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:34,668 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:34,668 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31] total 91 [2022-03-15 21:33:34,668 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [727949050] [2022-03-15 21:33:34,668 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:34,671 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:34,700 INFO L252 McrAutomatonBuilder]: Finished intersection with 82 states and 126 transitions. [2022-03-15 21:33:34,700 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:37,550 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 30 new interpolants: [14261#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14260#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14272#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 7 counter))), 14265#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14259#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14268#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 11 counter)) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 14275#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 4 counter)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 14252#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 14257#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14277#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (<= 2 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 14256#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14250#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 14271#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 8 counter) (< (+ 6 j1) M1))), 14262#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14270#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 9 counter))), 14253#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14255#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14269#(and (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= 10 counter) (< (+ j1 4) M1))), 14263#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14266#(and (or (not (< j1 M1)) (<= 13 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 14276#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 3 counter))), 14278#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 1 counter) (not (< (+ j1 12) M1)))), 14273#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (<= 6 counter) (not (< (+ 7 j1) M1)) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 14264#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14258#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14267#(and (or (<= 12 counter) (< (+ 2 j1) M1) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 14254#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 14279#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 0 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 14274#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 5 counter))), 14251#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1))] [2022-03-15 21:33:37,550 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 63 states [2022-03-15 21:33:37,550 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:37,551 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2022-03-15 21:33:37,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2057, Invalid=12949, Unknown=0, NotChecked=0, Total=15006 [2022-03-15 21:33:37,552 INFO L87 Difference]: Start difference. First operand 80 states and 154 transitions. Second operand has 63 states, 62 states have (on average 1.7903225806451613) internal successors, (111), 62 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:43,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:43,714 INFO L93 Difference]: Finished difference Result 235 states and 460 transitions. [2022-03-15 21:33:43,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2022-03-15 21:33:43,714 INFO L78 Accepts]: Start accepts. Automaton has has 63 states, 62 states have (on average 1.7903225806451613) internal successors, (111), 62 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 36 [2022-03-15 21:33:43,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:43,715 INFO L225 Difference]: With dead ends: 235 [2022-03-15 21:33:43,715 INFO L226 Difference]: Without dead ends: 232 [2022-03-15 21:33:43,717 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 222 GetRequests, 21 SyntacticMatches, 4 SemanticMatches, 197 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13322 ImplicationChecksByTransitivity, 8.9s TimeCoverageRelationStatistics Valid=5832, Invalid=33570, Unknown=0, NotChecked=0, Total=39402 [2022-03-15 21:33:43,717 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 554 mSDsluCounter, 348 mSDsCounter, 0 mSdLazyCounter, 1101 mSolverCounterSat, 428 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 554 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1529 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 428 IncrementalHoareTripleChecker+Valid, 1101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:43,717 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [554 Valid, 0 Invalid, 1529 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [428 Valid, 1101 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:33:43,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2022-03-15 21:33:43,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 83. [2022-03-15 21:33:43,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 82 states have (on average 1.951219512195122) internal successors, (160), 82 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:43,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 160 transitions. [2022-03-15 21:33:43,720 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 160 transitions. Word has length 36 [2022-03-15 21:33:43,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:43,720 INFO L470 AbstractCegarLoop]: Abstraction has 83 states and 160 transitions. [2022-03-15 21:33:43,720 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 63 states, 62 states have (on average 1.7903225806451613) internal successors, (111), 62 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:43,720 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 160 transitions. [2022-03-15 21:33:43,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-03-15 21:33:43,720 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:43,720 INFO L514 BasicCegarLoop]: trace histogram [15, 14, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:43,741 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:43,931 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37,37 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:43,931 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:43,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:43,932 INFO L85 PathProgramCache]: Analyzing trace with hash -553774014, now seen corresponding path program 37 times [2022-03-15 21:33:43,932 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:43,932 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072473614] [2022-03-15 21:33:43,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:43,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:43,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:44,123 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:44,123 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:44,123 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072473614] [2022-03-15 21:33:44,124 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1072473614] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:44,124 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [247830391] [2022-03-15 21:33:44,124 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:33:44,124 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:44,124 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:44,125 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:44,125 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-03-15 21:33:44,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:44,160 INFO L263 TraceCheckSpWp]: Trace formula consists of 170 conjuncts, 60 conjunts are in the unsatisfiable core [2022-03-15 21:33:44,161 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:44,269 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 225 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:44,269 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:44,605 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 105 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:44,606 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [247830391] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:44,606 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:44,606 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 17] total 32 [2022-03-15 21:33:44,606 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1533559713] [2022-03-15 21:33:44,606 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:44,609 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:44,623 INFO L252 McrAutomatonBuilder]: Finished intersection with 85 states and 131 transitions. [2022-03-15 21:33:44,623 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:45,236 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:33:45,236 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:33:45,236 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:45,236 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:33:45,236 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=288, Invalid=768, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:33:45,237 INFO L87 Difference]: Start difference. First operand 83 states and 160 transitions. Second operand has 19 states, 19 states have (on average 4.368421052631579) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:45,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:45,887 INFO L93 Difference]: Finished difference Result 194 states and 381 transitions. [2022-03-15 21:33:45,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2022-03-15 21:33:45,887 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 4.368421052631579) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2022-03-15 21:33:45,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:45,888 INFO L225 Difference]: With dead ends: 194 [2022-03-15 21:33:45,888 INFO L226 Difference]: Without dead ends: 131 [2022-03-15 21:33:45,888 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 114 SyntacticMatches, 5 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 139 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=468, Invalid=1788, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:33:45,889 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 22 mSDsluCounter, 1169 mSDsCounter, 0 mSdLazyCounter, 1787 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 22 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1808 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 1787 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:45,889 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [22 Valid, 0 Invalid, 1808 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 1787 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:33:45,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2022-03-15 21:33:45,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 85. [2022-03-15 21:33:45,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 85 states, 84 states have (on average 1.9523809523809523) internal successors, (164), 84 states have internal predecessors, (164), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:45,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 164 transitions. [2022-03-15 21:33:45,890 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 164 transitions. Word has length 37 [2022-03-15 21:33:45,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:45,890 INFO L470 AbstractCegarLoop]: Abstraction has 85 states and 164 transitions. [2022-03-15 21:33:45,890 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 4.368421052631579) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:45,891 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 164 transitions. [2022-03-15 21:33:45,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2022-03-15 21:33:45,891 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:45,891 INFO L514 BasicCegarLoop]: trace histogram [15, 15, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:45,906 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:46,104 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 38 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-03-15 21:33:46,104 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:46,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:46,104 INFO L85 PathProgramCache]: Analyzing trace with hash -1898595009, now seen corresponding path program 38 times [2022-03-15 21:33:46,105 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:46,105 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125101461] [2022-03-15 21:33:46,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:46,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:46,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:46,662 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 105 proven. 135 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:46,663 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:46,663 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125101461] [2022-03-15 21:33:46,663 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125101461] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:46,663 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [561366456] [2022-03-15 21:33:46,663 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:33:46,663 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:46,663 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:46,664 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:46,664 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-03-15 21:33:46,696 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:33:46,696 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:46,698 WARN L261 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 129 conjunts are in the unsatisfiable core [2022-03-15 21:33:46,698 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:47,622 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 240 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:47,622 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:49,214 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 105 proven. 135 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:49,215 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [561366456] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:49,215 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:49,215 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33] total 97 [2022-03-15 21:33:49,215 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1326132399] [2022-03-15 21:33:49,215 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:49,219 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:49,233 INFO L252 McrAutomatonBuilder]: Finished intersection with 87 states and 134 transitions. [2022-03-15 21:33:49,233 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:33:52,358 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 32 new interpolants: [15825#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 3 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 15799#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 15800#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15812#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15807#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15817#(and (or (not (< (+ 3 j1) M1)) (<= 11 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 15824#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 4 counter))), 15821#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 7 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 15797#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 15813#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15815#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 13 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 15804#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15810#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15811#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15827#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (<= 1 counter) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 15803#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15819#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 9 counter) (< (+ 6 j1) M1))), 15808#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15801#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15826#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 2 counter) (not (< (+ j1 12) M1)))), 15820#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 8 counter))), 15806#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15823#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 5 counter)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 15809#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15816#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 12 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 15805#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15828#(and (or (< (+ j1 15) M1) (<= 0 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 15822#(and (or (< (+ 9 j1) M1) (<= 6 counter) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 15814#(and (or (not (< j1 M1)) (<= 14 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 15798#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 15802#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 15818#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 10 counter)))] [2022-03-15 21:33:52,358 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 67 states [2022-03-15 21:33:52,358 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:33:52,359 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2022-03-15 21:33:52,359 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2779, Invalid=14251, Unknown=0, NotChecked=0, Total=17030 [2022-03-15 21:33:52,360 INFO L87 Difference]: Start difference. First operand 85 states and 164 transitions. Second operand has 67 states, 66 states have (on average 1.7878787878787878) internal successors, (118), 66 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:58,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:33:58,837 INFO L93 Difference]: Finished difference Result 251 states and 492 transitions. [2022-03-15 21:33:58,838 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2022-03-15 21:33:58,838 INFO L78 Accepts]: Start accepts. Automaton has has 67 states, 66 states have (on average 1.7878787878787878) internal successors, (118), 66 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 38 [2022-03-15 21:33:58,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:33:58,839 INFO L225 Difference]: With dead ends: 251 [2022-03-15 21:33:58,839 INFO L226 Difference]: Without dead ends: 248 [2022-03-15 21:33:58,841 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 22 SyntacticMatches, 4 SemanticMatches, 210 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14416 ImplicationChecksByTransitivity, 9.4s TimeCoverageRelationStatistics Valid=8738, Invalid=35994, Unknown=0, NotChecked=0, Total=44732 [2022-03-15 21:33:58,841 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 745 mSDsluCounter, 328 mSDsCounter, 0 mSdLazyCounter, 1059 mSolverCounterSat, 496 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 745 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1555 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 496 IncrementalHoareTripleChecker+Valid, 1059 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:33:58,841 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [745 Valid, 0 Invalid, 1555 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [496 Valid, 1059 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:33:58,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2022-03-15 21:33:58,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 88. [2022-03-15 21:33:58,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 88 states, 87 states have (on average 1.9540229885057472) internal successors, (170), 87 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:58,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 170 transitions. [2022-03-15 21:33:58,843 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 170 transitions. Word has length 38 [2022-03-15 21:33:58,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:33:58,843 INFO L470 AbstractCegarLoop]: Abstraction has 88 states and 170 transitions. [2022-03-15 21:33:58,843 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 67 states, 66 states have (on average 1.7878787878787878) internal successors, (118), 66 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:33:58,844 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 170 transitions. [2022-03-15 21:33:58,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:33:58,844 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:33:58,844 INFO L514 BasicCegarLoop]: trace histogram [16, 15, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:33:58,859 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-03-15 21:33:59,059 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2022-03-15 21:33:59,059 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:33:59,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:33:59,060 INFO L85 PathProgramCache]: Analyzing trace with hash 1272954462, now seen corresponding path program 39 times [2022-03-15 21:33:59,060 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:33:59,060 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532878285] [2022-03-15 21:33:59,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:33:59,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:33:59,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:33:59,271 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 256 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:59,271 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:33:59,271 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532878285] [2022-03-15 21:33:59,271 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1532878285] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:33:59,271 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [256787749] [2022-03-15 21:33:59,271 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:33:59,271 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:33:59,271 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:33:59,272 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:33:59,273 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-03-15 21:33:59,318 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:33:59,319 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:33:59,320 INFO L263 TraceCheckSpWp]: Trace formula consists of 180 conjuncts, 60 conjunts are in the unsatisfiable core [2022-03-15 21:33:59,320 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:33:59,495 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 10 proven. 246 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:59,495 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:33:59,803 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 120 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:33:59,803 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [256787749] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:33:59,803 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:33:59,803 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 23, 18] total 34 [2022-03-15 21:33:59,803 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1244209393] [2022-03-15 21:33:59,803 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:33:59,807 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:33:59,822 INFO L252 McrAutomatonBuilder]: Finished intersection with 90 states and 139 transitions. [2022-03-15 21:33:59,823 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:00,524 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:34:00,524 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-03-15 21:34:00,524 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:00,525 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-03-15 21:34:00,525 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=323, Invalid=867, Unknown=0, NotChecked=0, Total=1190 [2022-03-15 21:34:00,525 INFO L87 Difference]: Start difference. First operand 88 states and 170 transitions. Second operand has 20 states, 20 states have (on average 4.4) internal successors, (88), 19 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:01,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:01,264 INFO L93 Difference]: Finished difference Result 206 states and 405 transitions. [2022-03-15 21:34:01,264 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2022-03-15 21:34:01,264 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 4.4) internal successors, (88), 19 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:34:01,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:01,265 INFO L225 Difference]: With dead ends: 206 [2022-03-15 21:34:01,265 INFO L226 Difference]: Without dead ends: 139 [2022-03-15 21:34:01,265 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 121 SyntacticMatches, 5 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 272 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=523, Invalid=2027, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:34:01,266 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 23 mSDsluCounter, 1327 mSDsCounter, 0 mSdLazyCounter, 2018 mSolverCounterSat, 22 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2040 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 22 IncrementalHoareTripleChecker+Valid, 2018 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:01,266 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [23 Valid, 0 Invalid, 2040 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [22 Valid, 2018 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:34:01,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2022-03-15 21:34:01,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 90. [2022-03-15 21:34:01,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 90 states, 89 states have (on average 1.9550561797752808) internal successors, (174), 89 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:01,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 174 transitions. [2022-03-15 21:34:01,267 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 174 transitions. Word has length 39 [2022-03-15 21:34:01,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:01,268 INFO L470 AbstractCegarLoop]: Abstraction has 90 states and 174 transitions. [2022-03-15 21:34:01,268 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 4.4) internal successors, (88), 19 states have internal predecessors, (88), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:01,268 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 174 transitions. [2022-03-15 21:34:01,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2022-03-15 21:34:01,268 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:01,268 INFO L514 BasicCegarLoop]: trace histogram [16, 16, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:01,284 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2022-03-15 21:34:01,475 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,40 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:01,475 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:01,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:01,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1685134363, now seen corresponding path program 40 times [2022-03-15 21:34:01,476 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:01,476 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061715781] [2022-03-15 21:34:01,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:01,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:01,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:02,079 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 120 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:02,080 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:02,080 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061715781] [2022-03-15 21:34:02,080 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1061715781] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:02,080 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [560476070] [2022-03-15 21:34:02,080 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:34:02,080 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:02,080 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:02,081 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:02,081 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-03-15 21:34:02,117 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:34:02,117 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:02,119 WARN L261 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 137 conjunts are in the unsatisfiable core [2022-03-15 21:34:02,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:03,164 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 272 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:03,164 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:04,725 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 120 proven. 152 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:04,725 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [560476070] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:04,725 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:04,725 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35] total 103 [2022-03-15 21:34:04,725 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1320613063] [2022-03-15 21:34:04,725 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:04,729 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:04,746 INFO L252 McrAutomatonBuilder]: Finished intersection with 92 states and 142 transitions. [2022-03-15 21:34:04,746 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:08,037 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 34 new interpolants: [17461#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= 10 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 17450#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17438#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 17462#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 9 counter) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 17442#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17452#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17465#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (<= 6 counter) (< (+ j1 10) M1) (not (< (+ 9 j1) M1)))), 17441#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17443#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17468#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 3 counter) (not (< (+ j1 12) M1)))), 17440#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 17444#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17464#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 7 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 17457#(and (or (< (+ 2 j1) M1) (<= 14 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 17449#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17466#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 5 counter))), 17454#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17453#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17448#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17459#(and (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1)) (or (<= 12 counter) (not (< (+ 3 j1) M1)) (< (+ j1 4) M1))), 17469#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 2 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 17470#(and (or (< (+ j1 15) M1) (<= 1 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 17458#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 13 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 17446#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17451#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17447#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17471#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 0 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 17439#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 17463#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 8 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 17460#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 11 counter)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter)))), 17456#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 15 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 17445#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17455#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 17467#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 4 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter))))] [2022-03-15 21:34:08,037 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 71 states [2022-03-15 21:34:08,037 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:08,038 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2022-03-15 21:34:08,038 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3128, Invalid=16054, Unknown=0, NotChecked=0, Total=19182 [2022-03-15 21:34:08,039 INFO L87 Difference]: Start difference. First operand 90 states and 174 transitions. Second operand has 71 states, 70 states have (on average 1.7857142857142858) internal successors, (125), 70 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:15,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:15,330 INFO L93 Difference]: Finished difference Result 267 states and 524 transitions. [2022-03-15 21:34:15,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2022-03-15 21:34:15,331 INFO L78 Accepts]: Start accepts. Automaton has has 71 states, 70 states have (on average 1.7857142857142858) internal successors, (125), 70 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 40 [2022-03-15 21:34:15,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:15,332 INFO L225 Difference]: With dead ends: 267 [2022-03-15 21:34:15,332 INFO L226 Difference]: Without dead ends: 264 [2022-03-15 21:34:15,334 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 24 SyntacticMatches, 3 SemanticMatches, 223 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16195 ImplicationChecksByTransitivity, 10.5s TimeCoverageRelationStatistics Valid=9847, Invalid=40553, Unknown=0, NotChecked=0, Total=50400 [2022-03-15 21:34:15,334 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 769 mSDsluCounter, 342 mSDsCounter, 0 mSdLazyCounter, 1110 mSolverCounterSat, 556 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 769 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1666 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 556 IncrementalHoareTripleChecker+Valid, 1110 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:15,335 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [769 Valid, 0 Invalid, 1666 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [556 Valid, 1110 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-03-15 21:34:15,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2022-03-15 21:34:15,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 93. [2022-03-15 21:34:15,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 93 states, 92 states have (on average 1.9565217391304348) internal successors, (180), 92 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:15,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 180 transitions. [2022-03-15 21:34:15,337 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 180 transitions. Word has length 40 [2022-03-15 21:34:15,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:15,337 INFO L470 AbstractCegarLoop]: Abstraction has 93 states and 180 transitions. [2022-03-15 21:34:15,337 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 71 states, 70 states have (on average 1.7857142857142858) internal successors, (125), 70 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:15,337 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 180 transitions. [2022-03-15 21:34:15,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2022-03-15 21:34:15,337 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:15,337 INFO L514 BasicCegarLoop]: trace histogram [17, 16, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:15,353 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Ended with exit code 0 [2022-03-15 21:34:15,544 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2022-03-15 21:34:15,544 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:15,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:15,544 INFO L85 PathProgramCache]: Analyzing trace with hash 699415298, now seen corresponding path program 41 times [2022-03-15 21:34:15,545 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:15,545 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601534730] [2022-03-15 21:34:15,545 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:15,545 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:15,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:15,780 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:15,781 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:15,781 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601534730] [2022-03-15 21:34:15,781 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601534730] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:15,781 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1826259354] [2022-03-15 21:34:15,781 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:34:15,781 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:15,781 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:15,782 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:15,783 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-03-15 21:34:15,836 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 10 check-sat command(s) [2022-03-15 21:34:15,836 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:15,837 INFO L263 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 68 conjunts are in the unsatisfiable core [2022-03-15 21:34:15,838 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:15,994 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 0 proven. 289 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:15,994 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:16,393 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 136 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:16,393 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1826259354] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:16,393 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:16,393 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 19] total 36 [2022-03-15 21:34:16,393 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [718091638] [2022-03-15 21:34:16,393 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:16,397 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:16,417 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 147 transitions. [2022-03-15 21:34:16,417 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:17,142 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:34:17,142 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:34:17,142 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:17,143 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:34:17,143 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=360, Invalid=972, Unknown=0, NotChecked=0, Total=1332 [2022-03-15 21:34:17,143 INFO L87 Difference]: Start difference. First operand 93 states and 180 transitions. Second operand has 21 states, 21 states have (on average 4.428571428571429) internal successors, (93), 20 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:17,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:17,952 INFO L93 Difference]: Finished difference Result 218 states and 429 transitions. [2022-03-15 21:34:17,952 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2022-03-15 21:34:17,952 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 4.428571428571429) internal successors, (93), 20 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 41 [2022-03-15 21:34:17,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:17,953 INFO L225 Difference]: With dead ends: 218 [2022-03-15 21:34:17,953 INFO L226 Difference]: Without dead ends: 147 [2022-03-15 21:34:17,953 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 128 SyntacticMatches, 5 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 174 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=581, Invalid=2281, Unknown=0, NotChecked=0, Total=2862 [2022-03-15 21:34:17,953 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 24 mSDsluCounter, 1495 mSDsCounter, 0 mSdLazyCounter, 2263 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2286 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 2263 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:17,953 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [24 Valid, 0 Invalid, 2286 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 2263 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:34:17,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2022-03-15 21:34:17,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 95. [2022-03-15 21:34:17,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 95 states, 94 states have (on average 1.9574468085106382) internal successors, (184), 94 states have internal predecessors, (184), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:17,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 184 transitions. [2022-03-15 21:34:17,955 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 184 transitions. Word has length 41 [2022-03-15 21:34:17,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:17,955 INFO L470 AbstractCegarLoop]: Abstraction has 95 states and 184 transitions. [2022-03-15 21:34:17,955 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 4.428571428571429) internal successors, (93), 20 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:17,955 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 184 transitions. [2022-03-15 21:34:17,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2022-03-15 21:34:17,955 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:17,956 INFO L514 BasicCegarLoop]: trace histogram [17, 17, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:17,971 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Ended with exit code 0 [2022-03-15 21:34:18,171 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42,42 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:18,171 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:18,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:18,172 INFO L85 PathProgramCache]: Analyzing trace with hash 1667308927, now seen corresponding path program 42 times [2022-03-15 21:34:18,172 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:18,172 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388441262] [2022-03-15 21:34:18,172 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:18,172 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:18,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:18,837 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 136 proven. 170 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:18,837 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:18,837 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388441262] [2022-03-15 21:34:18,838 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1388441262] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:18,838 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1216983647] [2022-03-15 21:34:18,838 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:34:18,838 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:18,838 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:18,839 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:18,840 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-03-15 21:34:18,880 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2022-03-15 21:34:18,880 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:18,882 WARN L261 TraceCheckSpWp]: Trace formula consists of 195 conjuncts, 141 conjunts are in the unsatisfiable core [2022-03-15 21:34:18,883 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:20,222 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 0 proven. 306 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:20,222 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:22,336 INFO L134 CoverageAnalysis]: Checked inductivity of 306 backedges. 120 proven. 186 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:22,336 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1216983647] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:22,336 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:22,336 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37] total 109 [2022-03-15 21:34:22,337 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [102018027] [2022-03-15 21:34:22,337 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:22,341 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:22,360 INFO L252 McrAutomatonBuilder]: Finished intersection with 97 states and 150 transitions. [2022-03-15 21:34:22,360 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:26,039 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 36 new interpolants: [19203#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 5 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 19204#(and (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= 4 counter)) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 19197#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 11 counter) (< (+ 6 j1) M1))), 19195#(and (or (not (< (+ 3 j1) M1)) (<= 13 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 19192#(and (or (not (< j1 M1)) (< (+ j1 1) M1) (<= 16 counter)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 19184#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19196#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (<= 12 counter) (not (< (+ j1 4) M1)) (< (+ 5 j1) M1))), 19186#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19185#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19178#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19188#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19177#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19199#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 9 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 19202#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (<= 6 counter) (< (+ j1 11) M1) (not (< (+ j1 10) M1)))), 19198#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 10 counter) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 19182#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19180#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19194#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 14 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 19183#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19200#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 8 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 19189#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19201#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 7 counter))), 19193#(and (or (< (+ 2 j1) M1) (<= 15 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 19176#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19208#(and (or (<= 0 counter) (< (+ j1 17) M1) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 19187#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19181#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19174#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 19190#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19207#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 1 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 19206#(and (or (< (+ j1 15) M1) (<= 2 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 19191#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19179#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 19173#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 19175#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 19205#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 3 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1)))] [2022-03-15 21:34:26,040 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 75 states [2022-03-15 21:34:26,040 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:26,040 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2022-03-15 21:34:26,041 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=2901, Invalid=18561, Unknown=0, NotChecked=0, Total=21462 [2022-03-15 21:34:26,041 INFO L87 Difference]: Start difference. First operand 95 states and 184 transitions. Second operand has 75 states, 74 states have (on average 1.7837837837837838) internal successors, (132), 74 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:34,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:34,937 INFO L93 Difference]: Finished difference Result 283 states and 556 transitions. [2022-03-15 21:34:34,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2022-03-15 21:34:34,938 INFO L78 Accepts]: Start accepts. Automaton has has 75 states, 74 states have (on average 1.7837837837837838) internal successors, (132), 74 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 42 [2022-03-15 21:34:34,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:34,939 INFO L225 Difference]: With dead ends: 283 [2022-03-15 21:34:34,939 INFO L226 Difference]: Without dead ends: 280 [2022-03-15 21:34:34,941 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 264 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 236 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18727 ImplicationChecksByTransitivity, 12.9s TimeCoverageRelationStatistics Valid=8288, Invalid=48118, Unknown=0, NotChecked=0, Total=56406 [2022-03-15 21:34:34,942 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 991 mSDsluCounter, 406 mSDsCounter, 0 mSdLazyCounter, 1285 mSolverCounterSat, 626 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 991 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 1911 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 626 IncrementalHoareTripleChecker+Valid, 1285 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:34,942 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [991 Valid, 0 Invalid, 1911 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [626 Valid, 1285 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-03-15 21:34:34,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2022-03-15 21:34:34,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 98. [2022-03-15 21:34:34,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 98 states, 97 states have (on average 1.958762886597938) internal successors, (190), 97 states have internal predecessors, (190), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:34,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 190 transitions. [2022-03-15 21:34:34,944 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 190 transitions. Word has length 42 [2022-03-15 21:34:34,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:34,944 INFO L470 AbstractCegarLoop]: Abstraction has 98 states and 190 transitions. [2022-03-15 21:34:34,944 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 75 states, 74 states have (on average 1.7837837837837838) internal successors, (132), 74 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:34,944 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 190 transitions. [2022-03-15 21:34:34,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2022-03-15 21:34:34,944 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:34,944 INFO L514 BasicCegarLoop]: trace histogram [18, 17, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:34,961 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2022-03-15 21:34:35,155 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43,43 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:35,155 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:35,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:35,156 INFO L85 PathProgramCache]: Analyzing trace with hash 146826782, now seen corresponding path program 43 times [2022-03-15 21:34:35,156 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:35,156 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644903922] [2022-03-15 21:34:35,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:35,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:35,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:35,415 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:35,416 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:35,416 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644903922] [2022-03-15 21:34:35,416 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1644903922] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:35,416 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [172929489] [2022-03-15 21:34:35,416 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:34:35,416 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:35,416 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:35,417 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:35,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-03-15 21:34:35,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:35,459 INFO L263 TraceCheckSpWp]: Trace formula consists of 200 conjuncts, 72 conjunts are in the unsatisfiable core [2022-03-15 21:34:35,460 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:35,589 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:35,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:36,033 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 153 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:36,033 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [172929489] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:36,033 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:36,033 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 20] total 38 [2022-03-15 21:34:36,033 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1348527246] [2022-03-15 21:34:36,033 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:36,037 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:36,058 INFO L252 McrAutomatonBuilder]: Finished intersection with 100 states and 155 transitions. [2022-03-15 21:34:36,058 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:36,852 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:34:36,853 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-03-15 21:34:36,853 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:36,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-03-15 21:34:36,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=399, Invalid=1083, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:34:36,853 INFO L87 Difference]: Start difference. First operand 98 states and 190 transitions. Second operand has 22 states, 22 states have (on average 4.454545454545454) internal successors, (98), 21 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:37,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:37,730 INFO L93 Difference]: Finished difference Result 230 states and 453 transitions. [2022-03-15 21:34:37,730 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-03-15 21:34:37,730 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 4.454545454545454) internal successors, (98), 21 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 43 [2022-03-15 21:34:37,730 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:37,731 INFO L225 Difference]: With dead ends: 230 [2022-03-15 21:34:37,731 INFO L226 Difference]: Without dead ends: 155 [2022-03-15 21:34:37,731 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 135 SyntacticMatches, 5 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 193 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=642, Invalid=2550, Unknown=0, NotChecked=0, Total=3192 [2022-03-15 21:34:37,733 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 25 mSDsluCounter, 1588 mSDsCounter, 0 mSdLazyCounter, 2402 mSolverCounterSat, 26 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 25 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 26 IncrementalHoareTripleChecker+Valid, 2402 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:37,733 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [25 Valid, 0 Invalid, 2428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [26 Valid, 2402 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:34:37,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2022-03-15 21:34:37,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 100. [2022-03-15 21:34:37,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 99 states have (on average 1.9595959595959596) internal successors, (194), 99 states have internal predecessors, (194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:37,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 194 transitions. [2022-03-15 21:34:37,735 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 194 transitions. Word has length 43 [2022-03-15 21:34:37,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:37,735 INFO L470 AbstractCegarLoop]: Abstraction has 100 states and 194 transitions. [2022-03-15 21:34:37,735 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 4.454545454545454) internal successors, (98), 21 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:37,735 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 194 transitions. [2022-03-15 21:34:37,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-03-15 21:34:37,735 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:37,736 INFO L514 BasicCegarLoop]: trace histogram [18, 18, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:37,755 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Forceful destruction successful, exit code 0 [2022-03-15 21:34:37,951 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 44 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable44 [2022-03-15 21:34:37,952 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:37,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:37,952 INFO L85 PathProgramCache]: Analyzing trace with hash -1715298981, now seen corresponding path program 44 times [2022-03-15 21:34:37,952 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:37,953 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816048562] [2022-03-15 21:34:37,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:37,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:37,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:38,654 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 153 proven. 189 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:38,654 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:38,655 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816048562] [2022-03-15 21:34:38,655 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1816048562] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:38,655 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [689366382] [2022-03-15 21:34:38,655 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:34:38,655 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:38,655 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:38,656 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:38,656 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2022-03-15 21:34:38,691 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:34:38,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:38,693 WARN L261 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 153 conjunts are in the unsatisfiable core [2022-03-15 21:34:38,694 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:39,905 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 0 proven. 342 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:39,905 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:41,725 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 153 proven. 189 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:41,725 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [689366382] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:41,725 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:41,725 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39] total 115 [2022-03-15 21:34:41,725 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1362400620] [2022-03-15 21:34:41,725 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:41,729 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:41,764 INFO L252 McrAutomatonBuilder]: Finished intersection with 102 states and 158 transitions. [2022-03-15 21:34:41,764 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:45,575 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 38 new interpolants: [21034#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 5 counter) (not (< (+ j1 12) M1)))), 21007#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21026#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 13 counter) (< (+ 5 j1) M1))), 21016#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21037#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 2 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 21024#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= 15 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 21033#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (<= 6 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 21032#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 7 counter))), 21013#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21022#(and (or (not (< j1 M1)) (< (+ j1 1) M1) (<= 17 counter)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 21003#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 21019#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21036#(and (or (< (+ j1 15) M1) (<= 3 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 21039#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (<= 0 counter) (not (< (+ j1 17) M1)))), 21006#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21038#(and (or (< (+ j1 17) M1) (<= 1 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 21012#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21023#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 16 counter))), 21011#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21021#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21018#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21031#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 8 counter)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 21020#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21005#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21009#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21004#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 21015#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21025#(and (or (not (< (+ 3 j1) M1)) (<= 14 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 21002#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 21014#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21029#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 10 counter))), 21027#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (<= 12 counter) (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 21030#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 9 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 21017#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21028#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 11 counter)) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 21010#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21008#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 21035#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 4 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1)))] [2022-03-15 21:34:45,575 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 79 states [2022-03-15 21:34:45,575 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:45,575 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2022-03-15 21:34:45,577 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3893, Invalid=19977, Unknown=0, NotChecked=0, Total=23870 [2022-03-15 21:34:45,577 INFO L87 Difference]: Start difference. First operand 100 states and 194 transitions. Second operand has 79 states, 78 states have (on average 1.7820512820512822) internal successors, (139), 78 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:54,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:54,816 INFO L93 Difference]: Finished difference Result 299 states and 588 transitions. [2022-03-15 21:34:54,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2022-03-15 21:34:54,816 INFO L78 Accepts]: Start accepts. Automaton has has 79 states, 78 states have (on average 1.7820512820512822) internal successors, (139), 78 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-03-15 21:34:54,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:54,817 INFO L225 Difference]: With dead ends: 299 [2022-03-15 21:34:54,817 INFO L226 Difference]: Without dead ends: 296 [2022-03-15 21:34:54,820 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 278 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 249 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20248 ImplicationChecksByTransitivity, 13.0s TimeCoverageRelationStatistics Valid=12274, Invalid=50476, Unknown=0, NotChecked=0, Total=62750 [2022-03-15 21:34:54,820 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 979 mSDsluCounter, 460 mSDsCounter, 0 mSdLazyCounter, 1433 mSolverCounterSat, 707 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 979 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2140 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 707 IncrementalHoareTripleChecker+Valid, 1433 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:54,820 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [979 Valid, 0 Invalid, 2140 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [707 Valid, 1433 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-03-15 21:34:54,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2022-03-15 21:34:54,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 103. [2022-03-15 21:34:54,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 103 states, 102 states have (on average 1.9607843137254901) internal successors, (200), 102 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:54,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 200 transitions. [2022-03-15 21:34:54,823 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 200 transitions. Word has length 44 [2022-03-15 21:34:54,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:54,823 INFO L470 AbstractCegarLoop]: Abstraction has 103 states and 200 transitions. [2022-03-15 21:34:54,823 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 79 states, 78 states have (on average 1.7820512820512822) internal successors, (139), 78 states have internal predecessors, (139), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:54,823 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 200 transitions. [2022-03-15 21:34:54,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-03-15 21:34:54,823 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:54,823 INFO L514 BasicCegarLoop]: trace histogram [19, 18, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:54,839 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Ended with exit code 0 [2022-03-15 21:34:55,024 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable45 [2022-03-15 21:34:55,024 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:55,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:55,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1634803262, now seen corresponding path program 45 times [2022-03-15 21:34:55,025 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:55,025 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [505260519] [2022-03-15 21:34:55,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:55,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:55,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:55,317 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 0 proven. 361 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:55,317 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:55,317 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [505260519] [2022-03-15 21:34:55,317 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [505260519] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:55,317 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1238235380] [2022-03-15 21:34:55,317 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:34:55,317 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:55,318 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:55,318 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:55,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2022-03-15 21:34:55,374 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2022-03-15 21:34:55,374 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:55,375 INFO L263 TraceCheckSpWp]: Trace formula consists of 210 conjuncts, 68 conjunts are in the unsatisfiable core [2022-03-15 21:34:55,376 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:34:55,668 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 36 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:55,669 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:34:56,007 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 171 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:56,007 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1238235380] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:34:56,007 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:34:56,007 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 30, 21] total 40 [2022-03-15 21:34:56,007 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1287275659] [2022-03-15 21:34:56,007 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:34:56,012 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:34:56,037 INFO L252 McrAutomatonBuilder]: Finished intersection with 105 states and 163 transitions. [2022-03-15 21:34:56,037 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:34:56,876 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:34:56,877 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:34:56,877 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:34:56,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:34:56,877 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=440, Invalid=1200, Unknown=0, NotChecked=0, Total=1640 [2022-03-15 21:34:56,877 INFO L87 Difference]: Start difference. First operand 103 states and 200 transitions. Second operand has 23 states, 23 states have (on average 4.478260869565218) internal successors, (103), 22 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:57,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:34:57,832 INFO L93 Difference]: Finished difference Result 242 states and 477 transitions. [2022-03-15 21:34:57,832 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-03-15 21:34:57,832 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 4.478260869565218) internal successors, (103), 22 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2022-03-15 21:34:57,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:34:57,833 INFO L225 Difference]: With dead ends: 242 [2022-03-15 21:34:57,833 INFO L226 Difference]: Without dead ends: 163 [2022-03-15 21:34:57,833 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 142 SyntacticMatches, 5 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=706, Invalid=2834, Unknown=0, NotChecked=0, Total=3540 [2022-03-15 21:34:57,833 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 26 mSDsluCounter, 1771 mSDsCounter, 0 mSdLazyCounter, 2668 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 26 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2695 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 2668 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2022-03-15 21:34:57,834 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [26 Valid, 0 Invalid, 2695 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 2668 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2022-03-15 21:34:57,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2022-03-15 21:34:57,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 105. [2022-03-15 21:34:57,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 105 states, 104 states have (on average 1.9615384615384615) internal successors, (204), 104 states have internal predecessors, (204), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:57,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 204 transitions. [2022-03-15 21:34:57,835 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 204 transitions. Word has length 45 [2022-03-15 21:34:57,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:34:57,835 INFO L470 AbstractCegarLoop]: Abstraction has 105 states and 204 transitions. [2022-03-15 21:34:57,836 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 4.478260869565218) internal successors, (103), 22 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:34:57,836 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 204 transitions. [2022-03-15 21:34:57,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2022-03-15 21:34:57,836 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:34:57,836 INFO L514 BasicCegarLoop]: trace histogram [19, 19, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:34:57,852 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Ended with exit code 0 [2022-03-15 21:34:58,051 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable46 [2022-03-15 21:34:58,052 INFO L402 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:34:58,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:34:58,052 INFO L85 PathProgramCache]: Analyzing trace with hash -136299073, now seen corresponding path program 46 times [2022-03-15 21:34:58,052 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:34:58,052 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [101120689] [2022-03-15 21:34:58,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:34:58,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:34:58,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:34:58,813 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 171 proven. 209 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:34:58,813 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:34:58,813 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [101120689] [2022-03-15 21:34:58,813 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [101120689] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:34:58,813 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623873213] [2022-03-15 21:34:58,814 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:34:58,814 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:34:58,814 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:34:58,815 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:34:58,815 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-03-15 21:34:58,851 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:34:58,851 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:34:58,853 WARN L261 TraceCheckSpWp]: Trace formula consists of 215 conjuncts, 161 conjunts are in the unsatisfiable core [2022-03-15 21:34:58,854 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:35:00,186 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 0 proven. 380 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:00,186 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:35:02,419 INFO L134 CoverageAnalysis]: Checked inductivity of 380 backedges. 171 proven. 209 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:02,419 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1623873213] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:35:02,419 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:35:02,419 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41] total 121 [2022-03-15 21:35:02,419 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2048753709] [2022-03-15 21:35:02,419 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:35:02,424 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:35:02,449 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 166 transitions. [2022-03-15 21:35:02,449 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:35:06,719 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 40 new interpolants: [22945#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22943#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22959#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 5 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 22955#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 9 counter))), 22937#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22936#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22950#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 14 counter) (< (+ 5 j1) M1))), 22954#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 10 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 22963#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (<= 1 counter) (not (< (+ j1 17) M1)))), 22952#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (<= 12 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)))), 22940#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22926#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 22928#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22939#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22961#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 3 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 22929#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22948#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 16 counter)) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 22933#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22934#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22960#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 4 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 22964#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= 0 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 22941#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22944#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22931#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22953#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 11 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 22927#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 22942#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22938#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22946#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 18 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 22947#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 17 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 22925#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 22932#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22962#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= 2 counter) (< (+ j1 17) M1) (not (< (+ 16 j1) M1))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 22935#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22958#(and (or (< (+ j1 13) M1) (<= 6 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 22951#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= 13 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 22930#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 22957#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 7 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 22956#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 8 counter))), 22949#(and (or (not (< (+ 3 j1) M1)) (<= 15 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1)))] [2022-03-15 21:35:06,719 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 83 states [2022-03-15 21:35:06,719 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:35:06,719 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2022-03-15 21:35:06,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4309, Invalid=22097, Unknown=0, NotChecked=0, Total=26406 [2022-03-15 21:35:06,721 INFO L87 Difference]: Start difference. First operand 105 states and 204 transitions. Second operand has 83 states, 82 states have (on average 1.7804878048780488) internal successors, (146), 82 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:17,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:35:17,006 INFO L93 Difference]: Finished difference Result 315 states and 620 transitions. [2022-03-15 21:35:17,007 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2022-03-15 21:35:17,007 INFO L78 Accepts]: Start accepts. Automaton has has 83 states, 82 states have (on average 1.7804878048780488) internal successors, (146), 82 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2022-03-15 21:35:17,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:35:17,008 INFO L225 Difference]: With dead ends: 315 [2022-03-15 21:35:17,008 INFO L226 Difference]: Without dead ends: 312 [2022-03-15 21:35:17,011 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 292 GetRequests, 26 SyntacticMatches, 4 SemanticMatches, 262 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22542 ImplicationChecksByTransitivity, 14.6s TimeCoverageRelationStatistics Valid=13592, Invalid=55840, Unknown=0, NotChecked=0, Total=69432 [2022-03-15 21:35:17,011 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 991 mSDsluCounter, 516 mSDsCounter, 0 mSdLazyCounter, 1605 mSolverCounterSat, 761 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 991 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2366 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 761 IncrementalHoareTripleChecker+Valid, 1605 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-03-15 21:35:17,011 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [991 Valid, 0 Invalid, 2366 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [761 Valid, 1605 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-03-15 21:35:17,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2022-03-15 21:35:17,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 108. [2022-03-15 21:35:17,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 108 states, 107 states have (on average 1.9626168224299065) internal successors, (210), 107 states have internal predecessors, (210), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:17,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 210 transitions. [2022-03-15 21:35:17,013 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 210 transitions. Word has length 46 [2022-03-15 21:35:17,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:35:17,013 INFO L470 AbstractCegarLoop]: Abstraction has 108 states and 210 transitions. [2022-03-15 21:35:17,014 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 83 states, 82 states have (on average 1.7804878048780488) internal successors, (146), 82 states have internal predecessors, (146), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:17,014 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 210 transitions. [2022-03-15 21:35:17,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2022-03-15 21:35:17,014 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:35:17,014 INFO L514 BasicCegarLoop]: trace histogram [20, 19, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:35:17,038 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Forceful destruction successful, exit code 0 [2022-03-15 21:35:17,230 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47,47 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:17,230 INFO L402 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:35:17,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:35:17,230 INFO L85 PathProgramCache]: Analyzing trace with hash 69553630, now seen corresponding path program 47 times [2022-03-15 21:35:17,232 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:35:17,232 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709573943] [2022-03-15 21:35:17,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:35:17,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:35:17,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:35:17,541 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:17,541 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:35:17,541 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709573943] [2022-03-15 21:35:17,541 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1709573943] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:35:17,541 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1967628703] [2022-03-15 21:35:17,541 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:35:17,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:17,541 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:35:17,542 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:35:17,543 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-03-15 21:35:17,591 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2022-03-15 21:35:17,591 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:35:17,592 INFO L263 TraceCheckSpWp]: Trace formula consists of 220 conjuncts, 80 conjunts are in the unsatisfiable core [2022-03-15 21:35:17,593 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:35:17,762 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 400 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:17,762 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:35:18,288 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 190 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:18,288 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1967628703] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:35:18,288 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:35:18,289 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 22] total 42 [2022-03-15 21:35:18,289 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2086099951] [2022-03-15 21:35:18,289 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:35:18,294 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:35:18,340 INFO L252 McrAutomatonBuilder]: Finished intersection with 110 states and 171 transitions. [2022-03-15 21:35:18,340 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:35:19,221 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:35:19,221 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:35:19,221 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:35:19,222 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:35:19,222 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=483, Invalid=1323, Unknown=0, NotChecked=0, Total=1806 [2022-03-15 21:35:19,222 INFO L87 Difference]: Start difference. First operand 108 states and 210 transitions. Second operand has 24 states, 24 states have (on average 4.5) internal successors, (108), 23 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:20,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:35:20,291 INFO L93 Difference]: Finished difference Result 254 states and 501 transitions. [2022-03-15 21:35:20,291 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2022-03-15 21:35:20,292 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 4.5) internal successors, (108), 23 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2022-03-15 21:35:20,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:35:20,292 INFO L225 Difference]: With dead ends: 254 [2022-03-15 21:35:20,292 INFO L226 Difference]: Without dead ends: 171 [2022-03-15 21:35:20,293 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 149 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 234 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=773, Invalid=3133, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:35:20,293 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 27 mSDsluCounter, 1964 mSDsCounter, 0 mSdLazyCounter, 2948 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2976 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 2948 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2022-03-15 21:35:20,293 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 0 Invalid, 2976 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 2948 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2022-03-15 21:35:20,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2022-03-15 21:35:20,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 110. [2022-03-15 21:35:20,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 110 states, 109 states have (on average 1.963302752293578) internal successors, (214), 109 states have internal predecessors, (214), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:20,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 214 transitions. [2022-03-15 21:35:20,297 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 214 transitions. Word has length 47 [2022-03-15 21:35:20,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:35:20,297 INFO L470 AbstractCegarLoop]: Abstraction has 110 states and 214 transitions. [2022-03-15 21:35:20,297 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 4.5) internal successors, (108), 23 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:20,297 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 214 transitions. [2022-03-15 21:35:20,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2022-03-15 21:35:20,297 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:35:20,297 INFO L514 BasicCegarLoop]: trace histogram [20, 20, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:35:20,315 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Forceful destruction successful, exit code 0 [2022-03-15 21:35:20,513 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 48 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48 [2022-03-15 21:35:20,514 INFO L402 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:35:20,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:35:20,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1318035099, now seen corresponding path program 48 times [2022-03-15 21:35:20,514 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:35:20,514 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1109852695] [2022-03-15 21:35:20,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:35:20,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:35:20,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:35:21,355 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 190 proven. 230 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:21,356 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:35:21,356 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1109852695] [2022-03-15 21:35:21,356 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1109852695] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:35:21,356 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1726190151] [2022-03-15 21:35:21,356 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:35:21,356 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:21,356 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:35:21,357 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:35:21,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-03-15 21:35:21,408 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 11 check-sat command(s) [2022-03-15 21:35:21,408 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:35:21,411 WARN L261 TraceCheckSpWp]: Trace formula consists of 225 conjuncts, 169 conjunts are in the unsatisfiable core [2022-03-15 21:35:21,412 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:35:22,867 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:22,867 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:35:25,277 INFO L134 CoverageAnalysis]: Checked inductivity of 420 backedges. 190 proven. 230 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:25,278 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1726190151] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:35:25,278 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:35:25,278 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43] total 127 [2022-03-15 21:35:25,278 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1803819511] [2022-03-15 21:35:25,278 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:35:25,282 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:35:25,308 INFO L252 McrAutomatonBuilder]: Finished intersection with 112 states and 174 transitions. [2022-03-15 21:35:25,308 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:35:29,745 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 42 new interpolants: [24981#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (<= 2 counter) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 24944#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 24957#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24951#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24967#(and (or (not (< (+ 3 j1) M1)) (< (+ j1 4) M1) (<= 16 counter)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 24979#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 4 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 24960#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24945#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24971#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (<= 12 counter) (not (< (+ 7 j1) M1)) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 24947#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24965#(and (or (< (+ 2 j1) M1) (<= 18 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 24954#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24962#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24966#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 17 counter))), 24978#(and (or (< (+ j1 15) M1) (<= 5 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 24968#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 15 counter) (< (+ 5 j1) M1))), 24983#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 0 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 24952#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24969#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 14 counter) (< (+ 6 j1) M1))), 24977#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 6 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 24956#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24980#(and (or (< (+ j1 17) M1) (<= 3 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 24975#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 8 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 24949#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24963#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 24973#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 10 counter))), 24953#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24943#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 24970#(and (or (<= 13 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 24955#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24942#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 24961#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24946#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24959#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24948#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24982#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 1 counter) (< (+ 19 j1) M1))), 24972#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 11 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 24950#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24958#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 24964#(and (or (not (< j1 M1)) (<= 19 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 24974#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 9 counter))), 24976#(and (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= 7 counter)) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))))] [2022-03-15 21:35:29,745 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 87 states [2022-03-15 21:35:29,745 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:35:29,745 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2022-03-15 21:35:29,747 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=4742, Invalid=24328, Unknown=0, NotChecked=0, Total=29070 [2022-03-15 21:35:29,747 INFO L87 Difference]: Start difference. First operand 110 states and 214 transitions. Second operand has 87 states, 86 states have (on average 1.7790697674418605) internal successors, (153), 86 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:41,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:35:41,038 INFO L93 Difference]: Finished difference Result 331 states and 652 transitions. [2022-03-15 21:35:41,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2022-03-15 21:35:41,038 INFO L78 Accepts]: Start accepts. Automaton has has 87 states, 86 states have (on average 1.7790697674418605) internal successors, (153), 86 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2022-03-15 21:35:41,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:35:41,039 INFO L225 Difference]: With dead ends: 331 [2022-03-15 21:35:41,039 INFO L226 Difference]: Without dead ends: 328 [2022-03-15 21:35:41,042 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 275 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24753 ImplicationChecksByTransitivity, 16.0s TimeCoverageRelationStatistics Valid=14969, Invalid=61483, Unknown=0, NotChecked=0, Total=76452 [2022-03-15 21:35:41,042 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1189 mSDsluCounter, 506 mSDsCounter, 0 mSdLazyCounter, 1600 mSolverCounterSat, 861 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1189 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2461 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 861 IncrementalHoareTripleChecker+Valid, 1600 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:35:41,042 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1189 Valid, 0 Invalid, 2461 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [861 Valid, 1600 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-03-15 21:35:41,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2022-03-15 21:35:41,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 113. [2022-03-15 21:35:41,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 113 states, 112 states have (on average 1.9642857142857142) internal successors, (220), 112 states have internal predecessors, (220), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:41,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 220 transitions. [2022-03-15 21:35:41,045 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 220 transitions. Word has length 48 [2022-03-15 21:35:41,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:35:41,045 INFO L470 AbstractCegarLoop]: Abstraction has 113 states and 220 transitions. [2022-03-15 21:35:41,045 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 87 states, 86 states have (on average 1.7790697674418605) internal successors, (153), 86 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:41,045 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 220 transitions. [2022-03-15 21:35:41,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2022-03-15 21:35:41,045 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:35:41,045 INFO L514 BasicCegarLoop]: trace histogram [21, 20, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:35:41,061 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Ended with exit code 0 [2022-03-15 21:35:41,248 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 49 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable49 [2022-03-15 21:35:41,248 INFO L402 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:35:41,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:35:41,248 INFO L85 PathProgramCache]: Analyzing trace with hash -2090727294, now seen corresponding path program 49 times [2022-03-15 21:35:41,249 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:35:41,249 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593037590] [2022-03-15 21:35:41,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:35:41,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:35:41,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:35:41,602 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 0 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:41,603 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:35:41,603 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593037590] [2022-03-15 21:35:41,603 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593037590] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:35:41,603 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [166294171] [2022-03-15 21:35:41,603 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:35:41,603 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:41,603 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:35:41,604 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:35:41,608 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-03-15 21:35:41,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:35:41,648 INFO L263 TraceCheckSpWp]: Trace formula consists of 230 conjuncts, 84 conjunts are in the unsatisfiable core [2022-03-15 21:35:41,648 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:35:41,796 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 0 proven. 441 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:41,796 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:35:42,359 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 210 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:42,359 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [166294171] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:35:42,359 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:35:42,359 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 23] total 44 [2022-03-15 21:35:42,359 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1937872920] [2022-03-15 21:35:42,359 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:35:42,363 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:35:42,406 INFO L252 McrAutomatonBuilder]: Finished intersection with 115 states and 179 transitions. [2022-03-15 21:35:42,406 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:35:43,325 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:35:43,325 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:35:43,326 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:35:43,326 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:35:43,326 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=1452, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:35:43,326 INFO L87 Difference]: Start difference. First operand 113 states and 220 transitions. Second operand has 25 states, 25 states have (on average 4.52) internal successors, (113), 24 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:44,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:35:44,529 INFO L93 Difference]: Finished difference Result 266 states and 525 transitions. [2022-03-15 21:35:44,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2022-03-15 21:35:44,533 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 4.52) internal successors, (113), 24 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2022-03-15 21:35:44,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:35:44,533 INFO L225 Difference]: With dead ends: 266 [2022-03-15 21:35:44,533 INFO L226 Difference]: Without dead ends: 179 [2022-03-15 21:35:44,534 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 156 SyntacticMatches, 5 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 256 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=843, Invalid=3447, Unknown=0, NotChecked=0, Total=4290 [2022-03-15 21:35:44,534 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 28 mSDsluCounter, 2267 mSDsCounter, 0 mSdLazyCounter, 3383 mSolverCounterSat, 27 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 28 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3410 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 27 IncrementalHoareTripleChecker+Valid, 3383 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2022-03-15 21:35:44,534 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [28 Valid, 0 Invalid, 3410 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [27 Valid, 3383 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2022-03-15 21:35:44,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2022-03-15 21:35:44,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 115. [2022-03-15 21:35:44,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 115 states, 114 states have (on average 1.9649122807017543) internal successors, (224), 114 states have internal predecessors, (224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:44,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 224 transitions. [2022-03-15 21:35:44,536 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 224 transitions. Word has length 49 [2022-03-15 21:35:44,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:35:44,536 INFO L470 AbstractCegarLoop]: Abstraction has 115 states and 224 transitions. [2022-03-15 21:35:44,536 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 4.52) internal successors, (113), 24 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:35:44,536 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 224 transitions. [2022-03-15 21:35:44,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2022-03-15 21:35:44,536 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:35:44,537 INFO L514 BasicCegarLoop]: trace histogram [21, 21, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:35:44,564 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Forceful destruction successful, exit code 0 [2022-03-15 21:35:44,755 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,50 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:44,755 INFO L402 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:35:44,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:35:44,756 INFO L85 PathProgramCache]: Analyzing trace with hash -595911169, now seen corresponding path program 50 times [2022-03-15 21:35:44,756 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:35:44,756 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658105759] [2022-03-15 21:35:44,756 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:35:44,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:35:44,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:35:45,637 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 210 proven. 252 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:45,637 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:35:45,637 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658105759] [2022-03-15 21:35:45,637 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1658105759] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:35:45,637 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1677012604] [2022-03-15 21:35:45,637 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:35:45,637 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:35:45,637 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:35:45,638 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:35:45,639 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2022-03-15 21:35:45,680 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:35:45,680 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:35:45,682 WARN L261 TraceCheckSpWp]: Trace formula consists of 235 conjuncts, 177 conjunts are in the unsatisfiable core [2022-03-15 21:35:45,683 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:35:47,235 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 462 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:47,235 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:35:49,516 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 210 proven. 252 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:35:49,516 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1677012604] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:35:49,516 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:35:49,516 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45, 45] total 133 [2022-03-15 21:35:49,516 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [234002902] [2022-03-15 21:35:49,516 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:35:49,530 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:35:49,559 INFO L252 McrAutomatonBuilder]: Finished intersection with 117 states and 182 transitions. [2022-03-15 21:35:49,559 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:35:54,504 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 44 new interpolants: [27078#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 18 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 27056#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27069#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27092#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= 4 counter)) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 27054#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 27070#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27095#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (<= 1 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1))), 27053#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 27075#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27087#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 9 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 27059#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27071#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27076#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 20 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 27074#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 27064#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27062#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27057#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27079#(and (or (not (< (+ 3 j1) M1)) (< (+ j1 4) M1) (<= 17 counter)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 27065#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27055#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 27091#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 5 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 27083#(and (or (not (< (+ 7 j1) M1)) (<= 13 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 27060#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27085#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 11 counter))), 27077#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 19 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 27088#(and (or (< (+ j1 13) M1) (<= 8 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 27063#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27066#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27096#(and (or (not (< (+ j1 20) M1)) (<= 0 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 27073#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27093#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (<= 3 counter) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 27061#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27072#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27084#(and (or (<= 12 counter) (< (+ 9 j1) M1) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 27089#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 7 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 27081#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 15 counter) (< (+ 6 j1) M1))), 27080#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 16 counter)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter)))), 27086#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 10 counter))), 27067#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27068#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27090#(and (or (<= 6 counter) (< (+ j1 15) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 27058#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 27082#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 14 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 27094#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= 2 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)))] [2022-03-15 21:35:54,504 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 91 states [2022-03-15 21:35:54,504 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:35:54,505 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2022-03-15 21:35:54,506 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5200, Invalid=26662, Unknown=0, NotChecked=0, Total=31862 [2022-03-15 21:35:54,506 INFO L87 Difference]: Start difference. First operand 115 states and 224 transitions. Second operand has 91 states, 90 states have (on average 1.7777777777777777) internal successors, (160), 90 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:06,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:36:06,943 INFO L93 Difference]: Finished difference Result 347 states and 684 transitions. [2022-03-15 21:36:06,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2022-03-15 21:36:06,943 INFO L78 Accepts]: Start accepts. Automaton has has 91 states, 90 states have (on average 1.7777777777777777) internal successors, (160), 90 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 50 [2022-03-15 21:36:06,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:36:06,944 INFO L225 Difference]: With dead ends: 347 [2022-03-15 21:36:06,944 INFO L226 Difference]: Without dead ends: 344 [2022-03-15 21:36:06,948 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 320 GetRequests, 28 SyntacticMatches, 4 SemanticMatches, 288 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27283 ImplicationChecksByTransitivity, 17.5s TimeCoverageRelationStatistics Valid=16421, Invalid=67389, Unknown=0, NotChecked=0, Total=83810 [2022-03-15 21:36:06,948 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1173 mSDsluCounter, 514 mSDsCounter, 0 mSdLazyCounter, 1623 mSolverCounterSat, 934 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1173 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2557 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 934 IncrementalHoareTripleChecker+Valid, 1623 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:36:06,948 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1173 Valid, 0 Invalid, 2557 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [934 Valid, 1623 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-03-15 21:36:06,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2022-03-15 21:36:06,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 118. [2022-03-15 21:36:06,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118 states, 117 states have (on average 1.9658119658119657) internal successors, (230), 117 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:06,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 230 transitions. [2022-03-15 21:36:06,951 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 230 transitions. Word has length 50 [2022-03-15 21:36:06,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:36:06,951 INFO L470 AbstractCegarLoop]: Abstraction has 118 states and 230 transitions. [2022-03-15 21:36:06,951 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 91 states, 90 states have (on average 1.7777777777777777) internal successors, (160), 90 states have internal predecessors, (160), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:06,951 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 230 transitions. [2022-03-15 21:36:06,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2022-03-15 21:36:06,951 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:36:06,951 INFO L514 BasicCegarLoop]: trace histogram [22, 21, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:36:06,985 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Forceful destruction successful, exit code 0 [2022-03-15 21:36:07,167 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable51 [2022-03-15 21:36:07,167 INFO L402 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:36:07,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:36:07,168 INFO L85 PathProgramCache]: Analyzing trace with hash -1293519458, now seen corresponding path program 51 times [2022-03-15 21:36:07,168 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:36:07,168 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409604243] [2022-03-15 21:36:07,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:36:07,168 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:36:07,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:36:07,506 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 484 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:07,506 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:36:07,506 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [409604243] [2022-03-15 21:36:07,506 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [409604243] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:36:07,506 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [773822832] [2022-03-15 21:36:07,506 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:36:07,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:36:07,507 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:36:07,507 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:36:07,508 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-03-15 21:36:07,563 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2022-03-15 21:36:07,563 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:36:07,565 INFO L263 TraceCheckSpWp]: Trace formula consists of 240 conjuncts, 84 conjunts are in the unsatisfiable core [2022-03-15 21:36:07,566 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:36:07,792 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 10 proven. 474 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:07,792 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:36:08,321 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 231 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:08,321 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [773822832] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:36:08,321 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:36:08,321 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 29, 24] total 46 [2022-03-15 21:36:08,322 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [617953544] [2022-03-15 21:36:08,322 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:36:08,326 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:36:08,359 INFO L252 McrAutomatonBuilder]: Finished intersection with 120 states and 187 transitions. [2022-03-15 21:36:08,359 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:36:09,272 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:36:09,272 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:36:09,272 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:36:09,272 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:36:09,272 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=575, Invalid=1587, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:36:09,272 INFO L87 Difference]: Start difference. First operand 118 states and 230 transitions. Second operand has 26 states, 26 states have (on average 4.538461538461538) internal successors, (118), 25 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:10,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:36:10,570 INFO L93 Difference]: Finished difference Result 278 states and 549 transitions. [2022-03-15 21:36:10,570 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2022-03-15 21:36:10,570 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 4.538461538461538) internal successors, (118), 25 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 51 [2022-03-15 21:36:10,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:36:10,571 INFO L225 Difference]: With dead ends: 278 [2022-03-15 21:36:10,571 INFO L226 Difference]: Without dead ends: 187 [2022-03-15 21:36:10,571 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 163 SyntacticMatches, 5 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 449 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=916, Invalid=3776, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:36:10,575 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 29 mSDsluCounter, 2485 mSDsCounter, 0 mSdLazyCounter, 3698 mSolverCounterSat, 28 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 29 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 28 IncrementalHoareTripleChecker+Valid, 3698 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:36:10,575 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [29 Valid, 0 Invalid, 3726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [28 Valid, 3698 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2022-03-15 21:36:10,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2022-03-15 21:36:10,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 120. [2022-03-15 21:36:10,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 120 states, 119 states have (on average 1.9663865546218486) internal successors, (234), 119 states have internal predecessors, (234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:10,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 234 transitions. [2022-03-15 21:36:10,577 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 234 transitions. Word has length 51 [2022-03-15 21:36:10,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:36:10,577 INFO L470 AbstractCegarLoop]: Abstraction has 120 states and 234 transitions. [2022-03-15 21:36:10,577 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 4.538461538461538) internal successors, (118), 25 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:10,577 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 234 transitions. [2022-03-15 21:36:10,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2022-03-15 21:36:10,578 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:36:10,578 INFO L514 BasicCegarLoop]: trace histogram [22, 22, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:36:10,605 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Forceful destruction successful, exit code 0 [2022-03-15 21:36:10,794 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable52,52 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:36:10,794 INFO L402 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:36:10,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:36:10,794 INFO L85 PathProgramCache]: Analyzing trace with hash 705699803, now seen corresponding path program 52 times [2022-03-15 21:36:10,795 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:36:10,795 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1681453332] [2022-03-15 21:36:10,795 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:36:10,795 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:36:10,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:36:11,740 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 231 proven. 275 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:11,740 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:36:11,740 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1681453332] [2022-03-15 21:36:11,740 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1681453332] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:36:11,740 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2128876051] [2022-03-15 21:36:11,740 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:36:11,740 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:36:11,740 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:36:11,741 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:36:11,742 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2022-03-15 21:36:11,782 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:36:11,782 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:36:11,784 WARN L261 TraceCheckSpWp]: Trace formula consists of 245 conjuncts, 185 conjunts are in the unsatisfiable core [2022-03-15 21:36:11,789 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:36:13,474 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:13,475 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:36:15,993 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 231 proven. 275 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:15,993 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2128876051] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:36:15,994 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:36:15,994 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47, 47] total 139 [2022-03-15 21:36:15,994 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1814776494] [2022-03-15 21:36:15,994 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:36:15,999 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:36:16,031 INFO L252 McrAutomatonBuilder]: Finished intersection with 122 states and 190 transitions. [2022-03-15 21:36:16,031 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:36:21,197 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 46 new interpolants: [29300#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= 3 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 29262#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29285#(and (or (not (< (+ 3 j1) M1)) (<= 18 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 29297#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 6 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 29274#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29264#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29284#(and (or (<= 19 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 29260#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 29269#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29259#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 29272#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29299#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= 4 counter))), 29293#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 10 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 29281#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29283#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 20 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 29263#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29302#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= 1 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 29282#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 21 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 29271#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29268#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29288#(and (or (<= 15 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 29291#(and (or (<= 12 counter) (< (+ j1 10) M1) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 29270#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29296#(and (or (< (+ j1 15) M1) (<= 7 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 29301#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 2 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 29289#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 14 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 29294#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 9 counter) (not (< (+ j1 12) M1)))), 29280#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29261#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29287#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= 16 counter))), 29290#(and (or (< (+ 9 j1) M1) (<= 13 counter) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 29275#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29266#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29298#(and (or (< (+ j1 17) M1) (<= 5 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 29278#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29273#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29303#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (<= 0 counter) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 29292#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 11 counter))), 29265#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29277#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29286#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 17 counter))), 29295#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 8 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 29279#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 29276#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 29258#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 29267#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:36:21,197 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 95 states [2022-03-15 21:36:21,197 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:36:21,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2022-03-15 21:36:21,199 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5675, Invalid=29107, Unknown=0, NotChecked=0, Total=34782 [2022-03-15 21:36:21,199 INFO L87 Difference]: Start difference. First operand 120 states and 234 transitions. Second operand has 95 states, 94 states have (on average 1.7765957446808511) internal successors, (167), 94 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:34,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:36:34,900 INFO L93 Difference]: Finished difference Result 363 states and 716 transitions. [2022-03-15 21:36:34,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 119 states. [2022-03-15 21:36:34,901 INFO L78 Accepts]: Start accepts. Automaton has has 95 states, 94 states have (on average 1.7765957446808511) internal successors, (167), 94 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 52 [2022-03-15 21:36:34,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:36:34,902 INFO L225 Difference]: With dead ends: 363 [2022-03-15 21:36:34,902 INFO L226 Difference]: Without dead ends: 360 [2022-03-15 21:36:34,905 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 334 GetRequests, 30 SyntacticMatches, 3 SemanticMatches, 301 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29710 ImplicationChecksByTransitivity, 19.2s TimeCoverageRelationStatistics Valid=17932, Invalid=73574, Unknown=0, NotChecked=0, Total=91506 [2022-03-15 21:36:34,906 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1360 mSDsluCounter, 587 mSDsCounter, 0 mSdLazyCounter, 1814 mSolverCounterSat, 1026 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1360 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2840 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1026 IncrementalHoareTripleChecker+Valid, 1814 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:36:34,906 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1360 Valid, 0 Invalid, 2840 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1026 Valid, 1814 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-03-15 21:36:34,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states. [2022-03-15 21:36:34,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 123. [2022-03-15 21:36:34,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 123 states, 122 states have (on average 1.9672131147540983) internal successors, (240), 122 states have internal predecessors, (240), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:34,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 240 transitions. [2022-03-15 21:36:34,908 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 240 transitions. Word has length 52 [2022-03-15 21:36:34,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:36:34,908 INFO L470 AbstractCegarLoop]: Abstraction has 123 states and 240 transitions. [2022-03-15 21:36:34,908 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 95 states, 94 states have (on average 1.7765957446808511) internal successors, (167), 94 states have internal predecessors, (167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:34,908 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 240 transitions. [2022-03-15 21:36:34,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2022-03-15 21:36:34,909 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:36:34,909 INFO L514 BasicCegarLoop]: trace histogram [23, 22, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:36:34,925 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Forceful destruction successful, exit code 0 [2022-03-15 21:36:35,109 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable53 [2022-03-15 21:36:35,109 INFO L402 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:36:35,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:36:35,110 INFO L85 PathProgramCache]: Analyzing trace with hash 401715010, now seen corresponding path program 53 times [2022-03-15 21:36:35,110 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:36:35,110 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994263161] [2022-03-15 21:36:35,110 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:36:35,110 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:36:35,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:36:35,482 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 0 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:35,482 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:36:35,482 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994263161] [2022-03-15 21:36:35,482 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1994263161] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:36:35,482 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [308371647] [2022-03-15 21:36:35,483 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:36:35,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:36:35,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:36:35,484 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:36:35,484 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-03-15 21:36:35,539 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2022-03-15 21:36:35,539 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:36:35,541 INFO L263 TraceCheckSpWp]: Trace formula consists of 250 conjuncts, 92 conjunts are in the unsatisfiable core [2022-03-15 21:36:35,542 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:36:35,711 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 0 proven. 529 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:35,712 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:36:36,368 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 253 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:36,368 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [308371647] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:36:36,368 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:36:36,368 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 25] total 48 [2022-03-15 21:36:36,368 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [586215009] [2022-03-15 21:36:36,368 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:36:36,373 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:36:36,406 INFO L252 McrAutomatonBuilder]: Finished intersection with 125 states and 195 transitions. [2022-03-15 21:36:36,406 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:36:37,399 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:36:37,399 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:36:37,399 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:36:37,399 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:36:37,399 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=624, Invalid=1728, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:36:37,399 INFO L87 Difference]: Start difference. First operand 123 states and 240 transitions. Second operand has 27 states, 27 states have (on average 4.555555555555555) internal successors, (123), 26 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:38,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:36:38,807 INFO L93 Difference]: Finished difference Result 290 states and 573 transitions. [2022-03-15 21:36:38,807 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2022-03-15 21:36:38,808 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 4.555555555555555) internal successors, (123), 26 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 53 [2022-03-15 21:36:38,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:36:38,808 INFO L225 Difference]: With dead ends: 290 [2022-03-15 21:36:38,808 INFO L226 Difference]: Without dead ends: 195 [2022-03-15 21:36:38,809 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 170 SyntacticMatches, 5 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 303 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=992, Invalid=4120, Unknown=0, NotChecked=0, Total=5112 [2022-03-15 21:36:38,809 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 30 mSDsluCounter, 2713 mSDsCounter, 0 mSdLazyCounter, 4027 mSolverCounterSat, 29 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 30 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4056 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 29 IncrementalHoareTripleChecker+Valid, 4027 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:36:38,809 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [30 Valid, 0 Invalid, 4056 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [29 Valid, 4027 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-03-15 21:36:38,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2022-03-15 21:36:38,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 125. [2022-03-15 21:36:38,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 125 states, 124 states have (on average 1.967741935483871) internal successors, (244), 124 states have internal predecessors, (244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:38,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 244 transitions. [2022-03-15 21:36:38,811 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 244 transitions. Word has length 53 [2022-03-15 21:36:38,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:36:38,811 INFO L470 AbstractCegarLoop]: Abstraction has 125 states and 244 transitions. [2022-03-15 21:36:38,811 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.555555555555555) internal successors, (123), 26 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:36:38,811 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 244 transitions. [2022-03-15 21:36:38,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2022-03-15 21:36:38,811 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:36:38,811 INFO L514 BasicCegarLoop]: trace histogram [23, 23, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:36:38,837 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2022-03-15 21:36:39,023 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable54 [2022-03-15 21:36:39,023 INFO L402 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:36:39,024 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:36:39,024 INFO L85 PathProgramCache]: Analyzing trace with hash 1801043519, now seen corresponding path program 54 times [2022-03-15 21:36:39,024 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:36:39,024 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [573702863] [2022-03-15 21:36:39,024 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:36:39,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:36:39,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:36:40,052 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 253 proven. 299 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:40,052 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:36:40,053 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [573702863] [2022-03-15 21:36:40,053 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [573702863] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:36:40,053 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2022324214] [2022-03-15 21:36:40,053 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:36:40,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:36:40,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:36:40,054 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:36:40,054 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-03-15 21:36:40,116 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2022-03-15 21:36:40,116 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:36:40,119 WARN L261 TraceCheckSpWp]: Trace formula consists of 255 conjuncts, 193 conjunts are in the unsatisfiable core [2022-03-15 21:36:40,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:36:41,917 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 0 proven. 552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:41,918 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:36:44,892 INFO L134 CoverageAnalysis]: Checked inductivity of 552 backedges. 253 proven. 299 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:36:44,892 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2022324214] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:36:44,892 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:36:44,892 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49, 49] total 145 [2022-03-15 21:36:44,892 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [525266910] [2022-03-15 21:36:44,892 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:36:44,897 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:36:44,933 INFO L252 McrAutomatonBuilder]: Finished intersection with 127 states and 198 transitions. [2022-03-15 21:36:44,933 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:36:50,412 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 48 new interpolants: [31569#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31576#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31570#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31560#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31593#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 11 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 31559#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 31583#(and (or (< (+ 2 j1) M1) (<= 21 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 31584#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= 20 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 31596#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 8 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 31566#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31602#(and (or (not (< (+ j1 20) M1)) (<= 2 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 31600#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 4 counter) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 31587#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 17 counter) (< (+ 6 j1) M1))), 31567#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31573#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31582#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 22 counter) (< (+ j1 1) M1))), 31565#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31562#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31580#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31588#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 16 counter)) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 31575#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31577#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31586#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 18 counter) (< (+ 5 j1) M1))), 31579#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31597#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 7 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 31574#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31563#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31578#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 31603#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (<= 1 counter) (not (< (+ 21 j1) M1)))), 31564#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31571#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31590#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 14 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 31599#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= 5 counter)) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 31557#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 31561#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31572#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31558#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 31589#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1)) (or (not (< (+ 7 j1) M1)) (<= 15 counter) (< (+ j1 8) M1))), 31585#(and (or (not (< (+ 3 j1) M1)) (<= 19 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 31581#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31568#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 31594#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 10 counter) (not (< (+ j1 12) M1)))), 31601#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 3 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 31604#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (<= 0 counter) (< (+ 23 j1) M1))), 31595#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (<= 9 counter) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 31598#(and (or (<= 6 counter) (< (+ j1 17) M1) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 31591#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= 13 counter) (not (< (+ 9 j1) M1)))), 31592#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (<= 12 counter) (< (+ j1 11) M1) (not (< (+ j1 10) M1))))] [2022-03-15 21:36:50,412 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 99 states [2022-03-15 21:36:50,412 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:36:50,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2022-03-15 21:36:50,415 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6173, Invalid=31657, Unknown=0, NotChecked=0, Total=37830 [2022-03-15 21:36:50,415 INFO L87 Difference]: Start difference. First operand 125 states and 244 transitions. Second operand has 99 states, 98 states have (on average 1.7755102040816326) internal successors, (174), 98 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:05,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:05,434 INFO L93 Difference]: Finished difference Result 379 states and 748 transitions. [2022-03-15 21:37:05,435 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 124 states. [2022-03-15 21:37:05,435 INFO L78 Accepts]: Start accepts. Automaton has has 99 states, 98 states have (on average 1.7755102040816326) internal successors, (174), 98 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 54 [2022-03-15 21:37:05,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:05,436 INFO L225 Difference]: With dead ends: 379 [2022-03-15 21:37:05,436 INFO L226 Difference]: Without dead ends: 376 [2022-03-15 21:37:05,440 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 348 GetRequests, 31 SyntacticMatches, 3 SemanticMatches, 314 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32358 ImplicationChecksByTransitivity, 21.1s TimeCoverageRelationStatistics Valid=19514, Invalid=80026, Unknown=0, NotChecked=0, Total=99540 [2022-03-15 21:37:05,440 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1296 mSDsluCounter, 588 mSDsCounter, 0 mSdLazyCounter, 1883 mSolverCounterSat, 1110 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1296 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2993 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1110 IncrementalHoareTripleChecker+Valid, 1883 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:05,440 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1296 Valid, 0 Invalid, 2993 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1110 Valid, 1883 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-03-15 21:37:05,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 376 states. [2022-03-15 21:37:05,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 376 to 128. [2022-03-15 21:37:05,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 128 states, 127 states have (on average 1.968503937007874) internal successors, (250), 127 states have internal predecessors, (250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:05,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 250 transitions. [2022-03-15 21:37:05,442 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 250 transitions. Word has length 54 [2022-03-15 21:37:05,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:05,443 INFO L470 AbstractCegarLoop]: Abstraction has 128 states and 250 transitions. [2022-03-15 21:37:05,443 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 99 states, 98 states have (on average 1.7755102040816326) internal successors, (174), 98 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:05,443 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 250 transitions. [2022-03-15 21:37:05,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2022-03-15 21:37:05,443 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:05,443 INFO L514 BasicCegarLoop]: trace histogram [24, 23, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:05,459 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Ended with exit code 0 [2022-03-15 21:37:05,644 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable55,55 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:05,645 INFO L402 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:37:05,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:05,645 INFO L85 PathProgramCache]: Analyzing trace with hash -2368162, now seen corresponding path program 55 times [2022-03-15 21:37:05,645 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:05,646 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580224673] [2022-03-15 21:37:05,646 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:05,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:05,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:06,038 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:06,039 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:06,039 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580224673] [2022-03-15 21:37:06,039 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1580224673] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:37:06,039 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [826456373] [2022-03-15 21:37:06,039 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:37:06,039 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:06,039 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:06,040 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:37:06,040 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2022-03-15 21:37:06,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:06,086 INFO L263 TraceCheckSpWp]: Trace formula consists of 260 conjuncts, 96 conjunts are in the unsatisfiable core [2022-03-15 21:37:06,087 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:37:06,254 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 576 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:06,254 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:37:06,958 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 276 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:06,958 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [826456373] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:37:06,958 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:37:06,958 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 26] total 50 [2022-03-15 21:37:06,958 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [597060336] [2022-03-15 21:37:06,958 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:06,963 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:07,002 INFO L252 McrAutomatonBuilder]: Finished intersection with 130 states and 203 transitions. [2022-03-15 21:37:07,003 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:08,051 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:37:08,052 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:37:08,052 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:08,052 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:37:08,052 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=675, Invalid=1875, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:37:08,052 INFO L87 Difference]: Start difference. First operand 128 states and 250 transitions. Second operand has 28 states, 28 states have (on average 4.571428571428571) internal successors, (128), 27 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:09,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:09,537 INFO L93 Difference]: Finished difference Result 302 states and 597 transitions. [2022-03-15 21:37:09,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2022-03-15 21:37:09,537 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 4.571428571428571) internal successors, (128), 27 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2022-03-15 21:37:09,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:09,538 INFO L225 Difference]: With dead ends: 302 [2022-03-15 21:37:09,538 INFO L226 Difference]: Without dead ends: 203 [2022-03-15 21:37:09,539 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 177 SyntacticMatches, 5 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1071, Invalid=4479, Unknown=0, NotChecked=0, Total=5550 [2022-03-15 21:37:09,539 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 31 mSDsluCounter, 2836 mSDsCounter, 0 mSdLazyCounter, 4208 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 31 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4240 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 4208 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:09,539 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [31 Valid, 0 Invalid, 4240 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 4208 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-03-15 21:37:09,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2022-03-15 21:37:09,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 130. [2022-03-15 21:37:09,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 130 states, 129 states have (on average 1.9689922480620154) internal successors, (254), 129 states have internal predecessors, (254), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:09,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 254 transitions. [2022-03-15 21:37:09,541 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 254 transitions. Word has length 55 [2022-03-15 21:37:09,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:09,541 INFO L470 AbstractCegarLoop]: Abstraction has 130 states and 254 transitions. [2022-03-15 21:37:09,541 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 4.571428571428571) internal successors, (128), 27 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:09,541 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 254 transitions. [2022-03-15 21:37:09,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2022-03-15 21:37:09,541 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:09,541 INFO L514 BasicCegarLoop]: trace histogram [24, 24, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:09,557 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Forceful destruction successful, exit code 0 [2022-03-15 21:37:09,742 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable56,56 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:09,742 INFO L402 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:37:09,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:09,742 INFO L85 PathProgramCache]: Analyzing trace with hash 427565339, now seen corresponding path program 56 times [2022-03-15 21:37:09,743 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:09,743 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1845873255] [2022-03-15 21:37:09,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:09,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:09,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:10,820 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 276 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:10,820 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:10,821 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1845873255] [2022-03-15 21:37:10,821 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1845873255] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:37:10,821 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1414071412] [2022-03-15 21:37:10,821 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:37:10,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:10,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:10,822 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:37:10,822 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2022-03-15 21:37:10,865 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:37:10,865 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:37:10,868 WARN L261 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 201 conjunts are in the unsatisfiable core [2022-03-15 21:37:10,869 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:37:12,826 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 0 proven. 600 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:12,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:37:15,650 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 276 proven. 324 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:15,651 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1414071412] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:37:15,651 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:37:15,651 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51, 51] total 151 [2022-03-15 21:37:15,651 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [654428748] [2022-03-15 21:37:15,651 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:15,656 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:15,694 INFO L252 McrAutomatonBuilder]: Finished intersection with 132 states and 206 transitions. [2022-03-15 21:37:15,694 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:21,588 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 50 new interpolants: [33991#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 8 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 33956#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33978#(and (or (< (+ 3 j1) M1) (<= 21 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 33969#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33977#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 22 counter)) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 33967#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33998#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (<= 1 counter) (< (+ 23 j1) M1))), 33987#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (<= 12 counter) (< (+ j1 12) M1) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 33985#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 14 counter))), 33962#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33986#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (<= 13 counter) (< (+ j1 11) M1) (not (< (+ j1 10) M1)))), 33960#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33966#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33976#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 23 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 33970#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33953#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33996#(and (or (not (< (+ j1 20) M1)) (<= 3 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 33957#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33994#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 5 counter) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 33954#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33965#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33984#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 15 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 33989#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1)) (or (< (+ 14 j1) M1) (<= 10 counter) (not (< (+ j1 13) M1)))), 33979#(and (or (not (< (+ 3 j1) M1)) (<= 20 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 33950#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 33971#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 33951#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 33972#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33974#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33999#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 0 counter) (< (+ j1 24) M1))), 33955#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33973#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33997#(and (or (< (+ 22 j1) M1) (<= 2 counter) (not (< (+ 21 j1) M1))) (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 33952#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 33993#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= 6 counter) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 33980#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 19 counter) (< (+ 5 j1) M1))), 33958#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33982#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 17 counter)) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 33963#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33990#(and (or (< (+ j1 15) M1) (<= 9 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 33975#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33981#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 18 counter) (< (+ 6 j1) M1))), 33992#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= 7 counter)) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 33964#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33968#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33959#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33983#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 16 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 33961#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 33995#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (< (+ j1 20) M1) (<= 4 counter)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1))), 33988#(and (or (< (+ j1 13) M1) (<= 11 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))))] [2022-03-15 21:37:21,588 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 103 states [2022-03-15 21:37:21,588 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:21,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2022-03-15 21:37:21,591 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6694, Invalid=34312, Unknown=0, NotChecked=0, Total=41006 [2022-03-15 21:37:21,591 INFO L87 Difference]: Start difference. First operand 130 states and 254 transitions. Second operand has 103 states, 102 states have (on average 1.7745098039215685) internal successors, (181), 102 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:38,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:38,059 INFO L93 Difference]: Finished difference Result 395 states and 780 transitions. [2022-03-15 21:37:38,059 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 129 states. [2022-03-15 21:37:38,060 INFO L78 Accepts]: Start accepts. Automaton has has 103 states, 102 states have (on average 1.7745098039215685) internal successors, (181), 102 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 56 [2022-03-15 21:37:38,060 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:38,061 INFO L225 Difference]: With dead ends: 395 [2022-03-15 21:37:38,061 INFO L226 Difference]: Without dead ends: 392 [2022-03-15 21:37:38,065 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 31 SyntacticMatches, 4 SemanticMatches, 327 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35242 ImplicationChecksByTransitivity, 22.9s TimeCoverageRelationStatistics Valid=21167, Invalid=86745, Unknown=0, NotChecked=0, Total=107912 [2022-03-15 21:37:38,065 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1588 mSDsluCounter, 649 mSDsCounter, 0 mSdLazyCounter, 2080 mSolverCounterSat, 1212 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1588 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3292 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1212 IncrementalHoareTripleChecker+Valid, 2080 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:38,065 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1588 Valid, 0 Invalid, 3292 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1212 Valid, 2080 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-03-15 21:37:38,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2022-03-15 21:37:38,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 133. [2022-03-15 21:37:38,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 133 states, 132 states have (on average 1.9696969696969697) internal successors, (260), 132 states have internal predecessors, (260), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:38,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 260 transitions. [2022-03-15 21:37:38,068 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 260 transitions. Word has length 56 [2022-03-15 21:37:38,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:38,068 INFO L470 AbstractCegarLoop]: Abstraction has 133 states and 260 transitions. [2022-03-15 21:37:38,068 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 103 states, 102 states have (on average 1.7745098039215685) internal successors, (181), 102 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:38,068 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 260 transitions. [2022-03-15 21:37:38,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2022-03-15 21:37:38,068 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:38,068 INFO L514 BasicCegarLoop]: trace histogram [25, 24, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:38,084 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Ended with exit code 0 [2022-03-15 21:37:38,268 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57,57 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:38,269 INFO L402 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:37:38,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:38,269 INFO L85 PathProgramCache]: Analyzing trace with hash 369481218, now seen corresponding path program 57 times [2022-03-15 21:37:38,270 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:38,270 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1571022138] [2022-03-15 21:37:38,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:38,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:38,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:38,670 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 0 proven. 625 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:38,670 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:38,670 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1571022138] [2022-03-15 21:37:38,670 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1571022138] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:37:38,670 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [99240458] [2022-03-15 21:37:38,670 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:37:38,670 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:38,671 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:38,671 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:37:38,672 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2022-03-15 21:37:38,734 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2022-03-15 21:37:38,734 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:37:38,735 INFO L263 TraceCheckSpWp]: Trace formula consists of 270 conjuncts, 92 conjunts are in the unsatisfiable core [2022-03-15 21:37:38,741 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:37:39,086 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 36 proven. 589 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:39,087 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:37:39,656 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 300 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:39,656 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [99240458] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:37:39,656 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:37:39,656 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 36, 27] total 52 [2022-03-15 21:37:39,657 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1561691477] [2022-03-15 21:37:39,657 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:39,662 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:39,705 INFO L252 McrAutomatonBuilder]: Finished intersection with 135 states and 211 transitions. [2022-03-15 21:37:39,705 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:40,767 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:37:40,767 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:37:40,767 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:40,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:37:40,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=728, Invalid=2028, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:37:40,767 INFO L87 Difference]: Start difference. First operand 133 states and 260 transitions. Second operand has 29 states, 29 states have (on average 4.586206896551724) internal successors, (133), 28 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:42,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:42,375 INFO L93 Difference]: Finished difference Result 314 states and 621 transitions. [2022-03-15 21:37:42,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2022-03-15 21:37:42,376 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 4.586206896551724) internal successors, (133), 28 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 57 [2022-03-15 21:37:42,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:42,376 INFO L225 Difference]: With dead ends: 314 [2022-03-15 21:37:42,376 INFO L226 Difference]: Without dead ends: 211 [2022-03-15 21:37:42,377 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 184 SyntacticMatches, 5 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 755 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1153, Invalid=4853, Unknown=0, NotChecked=0, Total=6006 [2022-03-15 21:37:42,377 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 32 mSDsluCounter, 3199 mSDsCounter, 0 mSdLazyCounter, 4727 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 32 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4758 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 4727 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:42,377 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [32 Valid, 0 Invalid, 4758 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 4727 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2022-03-15 21:37:42,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2022-03-15 21:37:42,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 135. [2022-03-15 21:37:42,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 135 states, 134 states have (on average 1.9701492537313432) internal successors, (264), 134 states have internal predecessors, (264), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:42,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 264 transitions. [2022-03-15 21:37:42,379 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 264 transitions. Word has length 57 [2022-03-15 21:37:42,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:42,379 INFO L470 AbstractCegarLoop]: Abstraction has 135 states and 264 transitions. [2022-03-15 21:37:42,379 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 4.586206896551724) internal successors, (133), 28 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:42,379 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 264 transitions. [2022-03-15 21:37:42,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2022-03-15 21:37:42,380 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:42,380 INFO L514 BasicCegarLoop]: trace histogram [25, 25, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:42,396 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Forceful destruction successful, exit code 0 [2022-03-15 21:37:42,581 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 58 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable58 [2022-03-15 21:37:42,581 INFO L402 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:37:42,581 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:42,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1218715263, now seen corresponding path program 58 times [2022-03-15 21:37:42,582 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:42,582 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732995676] [2022-03-15 21:37:42,582 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:42,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:42,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:43,759 INFO L134 CoverageAnalysis]: Checked inductivity of 650 backedges. 300 proven. 350 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:43,759 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:43,759 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732995676] [2022-03-15 21:37:43,759 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [732995676] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:37:43,759 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1016317875] [2022-03-15 21:37:43,760 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:37:43,760 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:43,760 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:43,761 INFO L229 MonitoredProcess]: Starting monitored process 59 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:37:43,762 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2022-03-15 21:37:43,803 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:37:43,804 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:37:43,806 WARN L261 TraceCheckSpWp]: Trace formula consists of 275 conjuncts, 209 conjunts are in the unsatisfiable core [2022-03-15 21:37:43,807 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:37:45,847 INFO L134 CoverageAnalysis]: Checked inductivity of 650 backedges. 0 proven. 650 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:45,847 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:37:48,870 INFO L134 CoverageAnalysis]: Checked inductivity of 650 backedges. 300 proven. 350 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:48,870 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1016317875] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:37:48,870 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:37:48,870 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53, 53] total 157 [2022-03-15 21:37:48,870 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [689911702] [2022-03-15 21:37:48,871 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:48,876 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:48,917 INFO L252 McrAutomatonBuilder]: Finished intersection with 137 states and 214 transitions. [2022-03-15 21:37:48,917 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:55,007 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 52 new interpolants: [36452#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36465#(and (or (< (+ 2 j1) M1) (<= 23 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 36448#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36463#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36475#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (<= 13 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 36437#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 36477#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 11 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 36461#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36438#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 36454#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36446#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36440#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36445#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36441#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36473#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 15 counter))), 36471#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 17 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 36476#(and (or (<= 12 counter) (< (+ j1 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 36450#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36479#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 9 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 36484#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= 4 counter))), 36485#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (<= 3 counter) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 36482#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= 6 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 36459#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36460#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36443#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36439#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 36447#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36464#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= 24 counter) (< (+ j1 1) M1))), 36467#(and (or (not (< (+ 3 j1) M1)) (<= 21 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 36478#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 10 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 36481#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= 7 counter))), 36449#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36444#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36466#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 22 counter)) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 36480#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (< (+ j1 17) M1) (<= 8 counter) (not (< (+ 16 j1) M1))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 36470#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (<= 18 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)))), 36486#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (<= 2 counter) (< (+ 23 j1) M1))), 36457#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36456#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36483#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= 5 counter) (< (+ j1 20) M1))), 36458#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 36474#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 14 counter))), 36442#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36488#(and (or (<= 0 counter) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 36462#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36455#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36468#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 20 counter))), 36487#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 1 counter) (< (+ j1 24) M1))), 36472#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 16 counter))), 36453#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 36469#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= 19 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 36451#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:37:55,008 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 107 states [2022-03-15 21:37:55,008 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:55,008 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2022-03-15 21:37:55,011 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7232, Invalid=37078, Unknown=0, NotChecked=0, Total=44310 [2022-03-15 21:37:55,011 INFO L87 Difference]: Start difference. First operand 135 states and 264 transitions. Second operand has 107 states, 106 states have (on average 1.7735849056603774) internal successors, (188), 106 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:12,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:12,778 INFO L93 Difference]: Finished difference Result 411 states and 812 transitions. [2022-03-15 21:38:12,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 134 states. [2022-03-15 21:38:12,778 INFO L78 Accepts]: Start accepts. Automaton has has 107 states, 106 states have (on average 1.7735849056603774) internal successors, (188), 106 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 58 [2022-03-15 21:38:12,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:12,779 INFO L225 Difference]: With dead ends: 411 [2022-03-15 21:38:12,779 INFO L226 Difference]: Without dead ends: 408 [2022-03-15 21:38:12,784 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 33 SyntacticMatches, 3 SemanticMatches, 340 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37993 ImplicationChecksByTransitivity, 24.6s TimeCoverageRelationStatistics Valid=22879, Invalid=93743, Unknown=0, NotChecked=0, Total=116622 [2022-03-15 21:38:12,784 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1329 mSDsluCounter, 689 mSDsCounter, 0 mSdLazyCounter, 2148 mSolverCounterSat, 1296 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1329 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3444 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1296 IncrementalHoareTripleChecker+Valid, 2148 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:12,784 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1329 Valid, 0 Invalid, 3444 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1296 Valid, 2148 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-03-15 21:38:12,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 408 states. [2022-03-15 21:38:12,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 408 to 138. [2022-03-15 21:38:12,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 138 states, 137 states have (on average 1.9708029197080292) internal successors, (270), 137 states have internal predecessors, (270), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:12,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 270 transitions. [2022-03-15 21:38:12,787 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 270 transitions. Word has length 58 [2022-03-15 21:38:12,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:12,787 INFO L470 AbstractCegarLoop]: Abstraction has 138 states and 270 transitions. [2022-03-15 21:38:12,787 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 107 states, 106 states have (on average 1.7735849056603774) internal successors, (188), 106 states have internal predecessors, (188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:12,787 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 270 transitions. [2022-03-15 21:38:12,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-03-15 21:38:12,787 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:12,787 INFO L514 BasicCegarLoop]: trace histogram [26, 25, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:12,803 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Ended with exit code 0 [2022-03-15 21:38:12,995 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable59 [2022-03-15 21:38:12,996 INFO L402 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:38:12,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:12,996 INFO L85 PathProgramCache]: Analyzing trace with hash -874674914, now seen corresponding path program 59 times [2022-03-15 21:38:12,996 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:12,996 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1932192321] [2022-03-15 21:38:12,996 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:12,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:13,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:13,425 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:13,426 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:13,426 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1932192321] [2022-03-15 21:38:13,426 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1932192321] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:13,426 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1953864559] [2022-03-15 21:38:13,426 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:38:13,426 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:13,426 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:13,427 INFO L229 MonitoredProcess]: Starting monitored process 60 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:13,427 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2022-03-15 21:38:13,490 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2022-03-15 21:38:13,490 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:13,492 INFO L263 TraceCheckSpWp]: Trace formula consists of 280 conjuncts, 104 conjunts are in the unsatisfiable core [2022-03-15 21:38:13,493 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:13,675 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 676 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:13,675 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:14,478 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 325 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:14,478 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1953864559] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:14,478 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:14,478 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 28] total 54 [2022-03-15 21:38:14,478 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [765591314] [2022-03-15 21:38:14,478 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:14,484 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:14,527 INFO L252 McrAutomatonBuilder]: Finished intersection with 140 states and 219 transitions. [2022-03-15 21:38:14,527 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:15,687 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:15,687 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 30 states [2022-03-15 21:38:15,687 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:15,688 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2022-03-15 21:38:15,688 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=783, Invalid=2187, Unknown=0, NotChecked=0, Total=2970 [2022-03-15 21:38:15,688 INFO L87 Difference]: Start difference. First operand 138 states and 270 transitions. Second operand has 30 states, 30 states have (on average 4.6) internal successors, (138), 29 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:17,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:17,437 INFO L93 Difference]: Finished difference Result 326 states and 645 transitions. [2022-03-15 21:38:17,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2022-03-15 21:38:17,437 INFO L78 Accepts]: Start accepts. Automaton has has 30 states, 30 states have (on average 4.6) internal successors, (138), 29 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-03-15 21:38:17,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:17,438 INFO L225 Difference]: With dead ends: 326 [2022-03-15 21:38:17,438 INFO L226 Difference]: Without dead ends: 219 [2022-03-15 21:38:17,439 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 191 SyntacticMatches, 5 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 381 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1238, Invalid=5242, Unknown=0, NotChecked=0, Total=6480 [2022-03-15 21:38:17,439 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 33 mSDsluCounter, 3332 mSDsCounter, 0 mSdLazyCounter, 4922 mSolverCounterSat, 34 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 33 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4956 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 34 IncrementalHoareTripleChecker+Valid, 4922 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:17,439 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [33 Valid, 0 Invalid, 4956 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [34 Valid, 4922 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2022-03-15 21:38:17,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2022-03-15 21:38:17,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 140. [2022-03-15 21:38:17,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 140 states, 139 states have (on average 1.9712230215827338) internal successors, (274), 139 states have internal predecessors, (274), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:17,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 274 transitions. [2022-03-15 21:38:17,441 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 274 transitions. Word has length 59 [2022-03-15 21:38:17,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:17,441 INFO L470 AbstractCegarLoop]: Abstraction has 140 states and 274 transitions. [2022-03-15 21:38:17,441 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 30 states, 30 states have (on average 4.6) internal successors, (138), 29 states have internal predecessors, (138), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:17,442 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 274 transitions. [2022-03-15 21:38:17,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2022-03-15 21:38:17,442 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:17,442 INFO L514 BasicCegarLoop]: trace histogram [26, 26, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:17,457 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Ended with exit code 0 [2022-03-15 21:38:17,642 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60,60 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:17,642 INFO L402 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:38:17,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:17,643 INFO L85 PathProgramCache]: Analyzing trace with hash -804543909, now seen corresponding path program 60 times [2022-03-15 21:38:17,644 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:17,644 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [147322917] [2022-03-15 21:38:17,644 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:17,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:17,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:18,884 INFO L134 CoverageAnalysis]: Checked inductivity of 702 backedges. 325 proven. 377 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:18,884 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:18,884 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [147322917] [2022-03-15 21:38:18,884 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [147322917] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:18,884 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [222664962] [2022-03-15 21:38:18,884 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:38:18,884 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:18,885 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:18,885 INFO L229 MonitoredProcess]: Starting monitored process 61 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:18,886 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2022-03-15 21:38:18,948 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2022-03-15 21:38:18,948 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:18,951 WARN L261 TraceCheckSpWp]: Trace formula consists of 285 conjuncts, 217 conjunts are in the unsatisfiable core [2022-03-15 21:38:18,952 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:21,153 INFO L134 CoverageAnalysis]: Checked inductivity of 702 backedges. 0 proven. 702 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:21,153 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:24,744 INFO L134 CoverageAnalysis]: Checked inductivity of 702 backedges. 325 proven. 377 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:24,745 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [222664962] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:24,745 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:24,745 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55, 55] total 163 [2022-03-15 21:38:24,745 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [91096033] [2022-03-15 21:38:24,745 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:24,751 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:24,799 INFO L252 McrAutomatonBuilder]: Finished intersection with 142 states and 222 transitions. [2022-03-15 21:38:24,799 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:31,443 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 54 new interpolants: [39058#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 13 counter) (not (< (+ j1 12) M1)))), 39042#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39025#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39030#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39043#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39018#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 39051#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 20 counter) (< (+ 6 j1) M1))), 39069#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 2 counter) (< (+ j1 24) M1))), 39021#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39020#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 39048#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 23 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 39033#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39040#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39067#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)) (<= 4 counter)) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 39064#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 7 counter) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 39070#(and (or (< (+ j1 25) M1) (<= 1 counter) (not (< (+ j1 24) M1))) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 39037#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39036#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39057#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 14 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 39032#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39024#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39053#(and (or (not (< (+ 7 j1) M1)) (<= 18 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 39039#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 39035#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39029#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39019#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 39027#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39065#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 6 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 39059#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 12 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 39022#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39061#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter))) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 10 counter))), 39056#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 15 counter))), 39071#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 0 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 39047#(and (or (< (+ 2 j1) M1) (<= 24 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 39062#(and (or (< (+ j1 17) M1) (<= 9 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 39049#(and (or (not (< (+ 3 j1) M1)) (<= 22 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 39050#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 21 counter))), 39023#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39055#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 16 counter)) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 39044#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39046#(and (or (not (< j1 M1)) (<= 25 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 39038#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39041#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39031#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39060#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 11 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 39066#(and (or (not (< (+ j1 20) M1)) (<= 5 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 39068#(and (or (not (< (+ 22 j1) M1)) (<= 3 counter) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1))), 39052#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 19 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 39034#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39045#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39026#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39028#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 39054#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 17 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 39063#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= 8 counter)))] [2022-03-15 21:38:31,444 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 111 states [2022-03-15 21:38:31,444 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:31,444 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 111 interpolants. [2022-03-15 21:38:31,447 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7795, Invalid=39947, Unknown=0, NotChecked=0, Total=47742 [2022-03-15 21:38:31,447 INFO L87 Difference]: Start difference. First operand 140 states and 274 transitions. Second operand has 111 states, 110 states have (on average 1.7727272727272727) internal successors, (195), 110 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:50,850 INFO L93 Difference]: Finished difference Result 427 states and 844 transitions. [2022-03-15 21:38:50,851 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 139 states. [2022-03-15 21:38:50,851 INFO L78 Accepts]: Start accepts. Automaton has has 111 states, 110 states have (on average 1.7727272727272727) internal successors, (195), 110 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 60 [2022-03-15 21:38:50,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:50,852 INFO L225 Difference]: With dead ends: 427 [2022-03-15 21:38:50,852 INFO L226 Difference]: Without dead ends: 424 [2022-03-15 21:38:50,857 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 390 GetRequests, 33 SyntacticMatches, 4 SemanticMatches, 353 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41113 ImplicationChecksByTransitivity, 26.9s TimeCoverageRelationStatistics Valid=24666, Invalid=101004, Unknown=0, NotChecked=0, Total=125670 [2022-03-15 21:38:50,857 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1567 mSDsluCounter, 743 mSDsCounter, 0 mSdLazyCounter, 2321 mSolverCounterSat, 1414 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1567 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3735 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1414 IncrementalHoareTripleChecker+Valid, 2321 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:50,857 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1567 Valid, 0 Invalid, 3735 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1414 Valid, 2321 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-03-15 21:38:50,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2022-03-15 21:38:50,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 143. [2022-03-15 21:38:50,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 142 states have (on average 1.971830985915493) internal successors, (280), 142 states have internal predecessors, (280), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 280 transitions. [2022-03-15 21:38:50,860 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 280 transitions. Word has length 60 [2022-03-15 21:38:50,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:50,860 INFO L470 AbstractCegarLoop]: Abstraction has 143 states and 280 transitions. [2022-03-15 21:38:50,860 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 111 states, 110 states have (on average 1.7727272727272727) internal successors, (195), 110 states have internal predecessors, (195), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,860 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 280 transitions. [2022-03-15 21:38:50,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-03-15 21:38:50,860 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:50,860 INFO L514 BasicCegarLoop]: trace histogram [27, 26, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:50,876 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:51,076 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable61,61 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:51,076 INFO L402 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:38:51,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:51,076 INFO L85 PathProgramCache]: Analyzing trace with hash 828800194, now seen corresponding path program 61 times [2022-03-15 21:38:51,077 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:51,077 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1030567433] [2022-03-15 21:38:51,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:51,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:51,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:51,528 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 0 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:51,528 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:51,528 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1030567433] [2022-03-15 21:38:51,528 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1030567433] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:51,528 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [489599700] [2022-03-15 21:38:51,528 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:38:51,529 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:51,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:51,531 INFO L229 MonitoredProcess]: Starting monitored process 62 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:51,531 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2022-03-15 21:38:51,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:51,581 INFO L263 TraceCheckSpWp]: Trace formula consists of 290 conjuncts, 108 conjunts are in the unsatisfiable core [2022-03-15 21:38:51,582 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:51,771 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 0 proven. 729 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:51,771 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:52,631 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 351 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:52,631 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [489599700] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:52,631 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:52,631 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 29] total 56 [2022-03-15 21:38:52,631 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [858730790] [2022-03-15 21:38:52,631 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:52,637 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:52,737 INFO L252 McrAutomatonBuilder]: Finished intersection with 145 states and 227 transitions. [2022-03-15 21:38:52,737 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:53,960 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:53,960 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 31 states [2022-03-15 21:38:53,960 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:53,961 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2022-03-15 21:38:53,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=840, Invalid=2352, Unknown=0, NotChecked=0, Total=3192 [2022-03-15 21:38:53,961 INFO L87 Difference]: Start difference. First operand 143 states and 280 transitions. Second operand has 31 states, 31 states have (on average 4.612903225806452) internal successors, (143), 30 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:55,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:55,853 INFO L93 Difference]: Finished difference Result 338 states and 669 transitions. [2022-03-15 21:38:55,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2022-03-15 21:38:55,854 INFO L78 Accepts]: Start accepts. Automaton has has 31 states, 31 states have (on average 4.612903225806452) internal successors, (143), 30 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-03-15 21:38:55,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:55,854 INFO L225 Difference]: With dead ends: 338 [2022-03-15 21:38:55,855 INFO L226 Difference]: Without dead ends: 227 [2022-03-15 21:38:55,855 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 285 GetRequests, 198 SyntacticMatches, 5 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 409 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1326, Invalid=5646, Unknown=0, NotChecked=0, Total=6972 [2022-03-15 21:38:55,855 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 34 mSDsluCounter, 3595 mSDsCounter, 0 mSdLazyCounter, 5300 mSolverCounterSat, 35 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 34 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 5335 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 35 IncrementalHoareTripleChecker+Valid, 5300 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:55,855 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [34 Valid, 0 Invalid, 5335 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [35 Valid, 5300 Invalid, 0 Unknown, 0 Unchecked, 1.4s Time] [2022-03-15 21:38:55,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2022-03-15 21:38:55,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 145. [2022-03-15 21:38:55,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 145 states, 144 states have (on average 1.9722222222222223) internal successors, (284), 144 states have internal predecessors, (284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:55,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 284 transitions. [2022-03-15 21:38:55,857 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 284 transitions. Word has length 61 [2022-03-15 21:38:55,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:55,858 INFO L470 AbstractCegarLoop]: Abstraction has 145 states and 284 transitions. [2022-03-15 21:38:55,858 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 31 states, 31 states have (on average 4.612903225806452) internal successors, (143), 30 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:55,858 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 284 transitions. [2022-03-15 21:38:55,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2022-03-15 21:38:55,858 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:55,858 INFO L514 BasicCegarLoop]: trace histogram [27, 27, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:55,874 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Ended with exit code 0 [2022-03-15 21:38:56,067 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable62,62 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:56,067 INFO L402 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:38:56,067 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:56,067 INFO L85 PathProgramCache]: Analyzing trace with hash -494780737, now seen corresponding path program 62 times [2022-03-15 21:38:56,068 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:56,068 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841188928] [2022-03-15 21:38:56,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:56,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:56,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:57,363 INFO L134 CoverageAnalysis]: Checked inductivity of 756 backedges. 351 proven. 405 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:57,363 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:57,363 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841188928] [2022-03-15 21:38:57,363 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841188928] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:57,363 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1456194655] [2022-03-15 21:38:57,363 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:57,364 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:57,364 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:57,365 INFO L229 MonitoredProcess]: Starting monitored process 63 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:57,403 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2022-03-15 21:38:57,447 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:57,447 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:57,450 WARN L261 TraceCheckSpWp]: Trace formula consists of 295 conjuncts, 225 conjunts are in the unsatisfiable core [2022-03-15 21:38:57,451 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:59,774 INFO L134 CoverageAnalysis]: Checked inductivity of 756 backedges. 0 proven. 756 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:59,774 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:03,594 INFO L134 CoverageAnalysis]: Checked inductivity of 756 backedges. 351 proven. 405 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:03,594 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1456194655] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:03,594 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:03,594 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57, 57] total 169 [2022-03-15 21:39:03,594 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1197852240] [2022-03-15 21:39:03,594 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:03,600 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:03,651 INFO L252 McrAutomatonBuilder]: Finished intersection with 147 states and 230 transitions. [2022-03-15 21:39:03,651 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:10,615 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 56 new interpolants: [41699#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41740#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 8 counter) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 41730#(and (or (< (+ 9 j1) M1) (<= 18 counter) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 41737#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 11 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 41725#(and (or (not (< (+ 3 j1) M1)) (<= 23 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 41703#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41716#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41708#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41736#(and (or (<= 12 counter) (< (+ j1 15) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 41722#(and (or (not (< j1 M1)) (<= 26 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 41745#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 3 counter) (< (+ j1 24) M1))), 41744#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= 4 counter)) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1))), 41715#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41706#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41720#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41709#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41724#(and (or (<= 24 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 41739#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (<= 9 counter) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 41711#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41701#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41693#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 41733#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 15 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 41738#(and (or (< (+ j1 17) M1) (<= 10 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 41726#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 22 counter))), 41718#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41702#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41705#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41713#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41700#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41694#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 41727#(and (or (not (< (+ 5 j1) M1)) (<= 21 counter) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1))), 41734#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 14 counter) (not (< (+ j1 12) M1)))), 41747#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 1 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 41732#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 16 counter))), 41735#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 13 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 41729#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 19 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 41719#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41721#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41742#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (<= 6 counter) (< (+ 21 j1) M1))), 41748#(and (or (<= 0 counter) (not (< (+ j1 26) M1)) (< (+ j1 27) M1)) (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 41707#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41731#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 17 counter)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1)))), 41741#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= 7 counter) (< (+ j1 20) M1))), 41746#(and (or (<= 2 counter) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 41712#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41695#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 41697#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41698#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41696#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41714#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 41710#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41743#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)) (<= 5 counter)) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 41704#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 41723#(and (or (< (+ 2 j1) M1) (<= 25 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 41728#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 20 counter) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 41717#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:39:10,616 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 115 states [2022-03-15 21:39:10,616 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:10,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 115 interpolants. [2022-03-15 21:39:10,618 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8377, Invalid=42925, Unknown=0, NotChecked=0, Total=51302 [2022-03-15 21:39:10,619 INFO L87 Difference]: Start difference. First operand 145 states and 284 transitions. Second operand has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:31,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:31,630 INFO L93 Difference]: Finished difference Result 443 states and 876 transitions. [2022-03-15 21:39:31,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 144 states. [2022-03-15 21:39:31,630 INFO L78 Accepts]: Start accepts. Automaton has has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 62 [2022-03-15 21:39:31,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:31,632 INFO L225 Difference]: With dead ends: 443 [2022-03-15 21:39:31,632 INFO L226 Difference]: Without dead ends: 440 [2022-03-15 21:39:31,637 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 404 GetRequests, 34 SyntacticMatches, 4 SemanticMatches, 366 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44218 ImplicationChecksByTransitivity, 29.1s TimeCoverageRelationStatistics Valid=26516, Invalid=108540, Unknown=0, NotChecked=0, Total=135056 [2022-03-15 21:39:31,637 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1804 mSDsluCounter, 752 mSDsCounter, 0 mSdLazyCounter, 2337 mSolverCounterSat, 1518 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1804 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 3855 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1518 IncrementalHoareTripleChecker+Valid, 2337 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:31,638 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1804 Valid, 0 Invalid, 3855 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1518 Valid, 2337 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2022-03-15 21:39:31,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 440 states. [2022-03-15 21:39:31,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 440 to 148. [2022-03-15 21:39:31,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 148 states, 147 states have (on average 1.9727891156462585) internal successors, (290), 147 states have internal predecessors, (290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:31,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 290 transitions. [2022-03-15 21:39:31,641 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 290 transitions. Word has length 62 [2022-03-15 21:39:31,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:31,642 INFO L470 AbstractCegarLoop]: Abstraction has 148 states and 290 transitions. [2022-03-15 21:39:31,642 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 115 states, 114 states have (on average 1.7719298245614035) internal successors, (202), 114 states have internal predecessors, (202), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:31,642 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 290 transitions. [2022-03-15 21:39:31,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2022-03-15 21:39:31,642 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:31,642 INFO L514 BasicCegarLoop]: trace histogram [28, 27, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:31,658 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:31,843 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63,63 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:31,844 INFO L402 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:39:31,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:31,844 INFO L85 PathProgramCache]: Analyzing trace with hash 1841523934, now seen corresponding path program 63 times [2022-03-15 21:39:31,844 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:31,845 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118301977] [2022-03-15 21:39:31,845 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:31,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:31,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:32,376 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 784 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:32,376 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:32,376 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118301977] [2022-03-15 21:39:32,376 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118301977] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:32,376 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [690082745] [2022-03-15 21:39:32,376 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:39:32,377 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:32,377 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:32,379 INFO L229 MonitoredProcess]: Starting monitored process 64 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:32,380 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2022-03-15 21:39:32,464 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2022-03-15 21:39:32,464 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:32,466 INFO L263 TraceCheckSpWp]: Trace formula consists of 300 conjuncts, 117 conjunts are in the unsatisfiable core [2022-03-15 21:39:32,468 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:33,634 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 28 proven. 756 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:33,634 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:34,439 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 378 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:34,439 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [690082745] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:34,439 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:34,439 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 57, 30] total 90 [2022-03-15 21:39:34,439 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1141190289] [2022-03-15 21:39:34,439 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:34,445 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:34,519 INFO L252 McrAutomatonBuilder]: Finished intersection with 150 states and 235 transitions. [2022-03-15 21:39:34,519 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:35,743 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:39:35,744 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 32 states [2022-03-15 21:39:35,744 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:35,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2022-03-15 21:39:35,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1415, Invalid=6775, Unknown=0, NotChecked=0, Total=8190 [2022-03-15 21:39:35,744 INFO L87 Difference]: Start difference. First operand 148 states and 290 transitions. Second operand has 32 states, 32 states have (on average 4.625) internal successors, (148), 31 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:37,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:37,793 INFO L93 Difference]: Finished difference Result 350 states and 693 transitions. [2022-03-15 21:39:37,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2022-03-15 21:39:37,793 INFO L78 Accepts]: Start accepts. Automaton has has 32 states, 32 states have (on average 4.625) internal successors, (148), 31 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 63 [2022-03-15 21:39:37,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:37,794 INFO L225 Difference]: With dead ends: 350 [2022-03-15 21:39:37,794 INFO L226 Difference]: Without dead ends: 235 [2022-03-15 21:39:37,795 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 295 GetRequests, 173 SyntacticMatches, 5 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3671 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1933, Invalid=12109, Unknown=0, NotChecked=0, Total=14042 [2022-03-15 21:39:37,795 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 35 mSDsluCounter, 3868 mSDsCounter, 0 mSdLazyCounter, 5692 mSolverCounterSat, 36 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 5728 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 36 IncrementalHoareTripleChecker+Valid, 5692 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:37,795 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [35 Valid, 0 Invalid, 5728 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [36 Valid, 5692 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-03-15 21:39:37,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2022-03-15 21:39:37,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 150. [2022-03-15 21:39:37,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 150 states, 149 states have (on average 1.9731543624161074) internal successors, (294), 149 states have internal predecessors, (294), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:37,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 294 transitions. [2022-03-15 21:39:37,797 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 294 transitions. Word has length 63 [2022-03-15 21:39:37,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:37,797 INFO L470 AbstractCegarLoop]: Abstraction has 150 states and 294 transitions. [2022-03-15 21:39:37,797 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 32 states, 32 states have (on average 4.625) internal successors, (148), 31 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:37,797 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 294 transitions. [2022-03-15 21:39:37,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2022-03-15 21:39:37,797 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:37,798 INFO L514 BasicCegarLoop]: trace histogram [28, 28, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:37,814 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:38,013 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 64 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable64 [2022-03-15 21:39:38,013 INFO L402 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:39:38,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:38,014 INFO L85 PathProgramCache]: Analyzing trace with hash 1190568859, now seen corresponding path program 64 times [2022-03-15 21:39:38,014 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:38,014 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158922705] [2022-03-15 21:39:38,014 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:38,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:38,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:39,368 INFO L134 CoverageAnalysis]: Checked inductivity of 812 backedges. 378 proven. 434 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:39,368 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:39,368 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158922705] [2022-03-15 21:39:39,368 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1158922705] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:39,368 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [53871359] [2022-03-15 21:39:39,368 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:39:39,368 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:39,368 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:39,369 INFO L229 MonitoredProcess]: Starting monitored process 65 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:39,370 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2022-03-15 21:39:39,417 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:39:39,417 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:39,420 WARN L261 TraceCheckSpWp]: Trace formula consists of 305 conjuncts, 233 conjunts are in the unsatisfiable core [2022-03-15 21:39:39,421 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:41,898 INFO L134 CoverageAnalysis]: Checked inductivity of 812 backedges. 0 proven. 812 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:41,898 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:45,526 INFO L134 CoverageAnalysis]: Checked inductivity of 812 backedges. 378 proven. 434 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:45,526 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [53871359] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:45,526 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:45,526 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59, 59] total 175 [2022-03-15 21:39:45,526 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1791404266] [2022-03-15 21:39:45,526 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:45,532 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:45,607 INFO L252 McrAutomatonBuilder]: Finished intersection with 152 states and 238 transitions. [2022-03-15 21:39:45,607 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:52,935 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 58 new interpolants: [44508#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44544#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= 7 counter)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 44495#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 44509#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44506#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44540#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= 11 counter)) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 44532#(and (or (< (+ 9 j1) M1) (<= 19 counter) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 44528#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 23 counter) (< (+ 5 j1) M1))), 44517#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44529#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 22 counter) (< (+ 6 j1) M1))), 44496#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 44521#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44539#(and (or (not (< (+ j1 15) M1)) (<= 12 counter) (< (+ 16 j1) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 44530#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 21 counter) (not (< (+ 6 j1) M1)))), 44518#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44505#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44500#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44513#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44549#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 2 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 44501#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44541#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (<= 10 counter) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 44519#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44498#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44497#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44548#(and (or (<= 3 counter) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 44550#(and (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (not (< (+ j1 26) M1)) (<= 1 counter) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 44551#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 0 counter)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1))), 44534#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 17 counter))), 44535#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 16 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 44511#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44512#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44533#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= 18 counter) (not (< (+ 9 j1) M1)))), 44537#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 14 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 44527#(and (or (not (< (+ 3 j1) M1)) (<= 24 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 44531#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1)) (or (not (< (+ 7 j1) M1)) (<= 20 counter) (< (+ j1 8) M1))), 44504#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44502#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44520#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44545#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= 6 counter) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 44515#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 44523#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44546#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= 5 counter))), 44507#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44516#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44525#(and (or (< (+ 2 j1) M1) (<= 26 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 44526#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 25 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 44514#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44538#(and (or (<= 13 counter) (< (+ j1 15) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 44524#(and (or (not (< j1 M1)) (<= 27 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 44542#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 9 counter) (< (+ 19 j1) M1))), 44547#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= 4 counter))), 44522#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44543#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= 8 counter) (< (+ j1 20) M1))), 44536#(and (or (< (+ j1 13) M1) (<= 15 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 44494#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 44510#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44503#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 44499#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:39:52,935 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 119 states [2022-03-15 21:39:52,935 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:52,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 119 interpolants. [2022-03-15 21:39:52,938 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=8980, Invalid=46010, Unknown=0, NotChecked=0, Total=54990 [2022-03-15 21:39:52,939 INFO L87 Difference]: Start difference. First operand 150 states and 294 transitions. Second operand has 119 states, 118 states have (on average 1.771186440677966) internal successors, (209), 118 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:15,637 INFO L93 Difference]: Finished difference Result 459 states and 908 transitions. [2022-03-15 21:40:15,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 149 states. [2022-03-15 21:40:15,638 INFO L78 Accepts]: Start accepts. Automaton has has 119 states, 118 states have (on average 1.771186440677966) internal successors, (209), 118 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 64 [2022-03-15 21:40:15,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:15,639 INFO L225 Difference]: With dead ends: 459 [2022-03-15 21:40:15,639 INFO L226 Difference]: Without dead ends: 456 [2022-03-15 21:40:15,645 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 418 GetRequests, 35 SyntacticMatches, 4 SemanticMatches, 379 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47436 ImplicationChecksByTransitivity, 31.0s TimeCoverageRelationStatistics Valid=28433, Invalid=116347, Unknown=0, NotChecked=0, Total=144780 [2022-03-15 21:40:15,645 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1874 mSDsluCounter, 895 mSDsCounter, 0 mSdLazyCounter, 2764 mSolverCounterSat, 1646 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1874 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4410 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1646 IncrementalHoareTripleChecker+Valid, 2764 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:15,645 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1874 Valid, 0 Invalid, 4410 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1646 Valid, 2764 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-03-15 21:40:15,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 456 states. [2022-03-15 21:40:15,647 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 456 to 153. [2022-03-15 21:40:15,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 152 states have (on average 1.9736842105263157) internal successors, (300), 152 states have internal predecessors, (300), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,648 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 300 transitions. [2022-03-15 21:40:15,648 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 300 transitions. Word has length 64 [2022-03-15 21:40:15,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:15,648 INFO L470 AbstractCegarLoop]: Abstraction has 153 states and 300 transitions. [2022-03-15 21:40:15,648 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 119 states, 118 states have (on average 1.771186440677966) internal successors, (209), 118 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,648 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 300 transitions. [2022-03-15 21:40:15,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2022-03-15 21:40:15,648 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:15,648 INFO L514 BasicCegarLoop]: trace histogram [29, 28, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:15,664 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Ended with exit code 0 [2022-03-15 21:40:15,855 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable65,65 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:15,855 INFO L402 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:40:15,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:15,856 INFO L85 PathProgramCache]: Analyzing trace with hash -1747213438, now seen corresponding path program 65 times [2022-03-15 21:40:15,856 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:15,856 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300543542] [2022-03-15 21:40:15,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:15,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:15,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:16,336 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:16,336 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:16,336 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300543542] [2022-03-15 21:40:16,336 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1300543542] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:16,336 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [4061336] [2022-03-15 21:40:16,336 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:40:16,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:16,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:16,338 INFO L229 MonitoredProcess]: Starting monitored process 66 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:16,338 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2022-03-15 21:40:16,416 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2022-03-15 21:40:16,416 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:16,418 INFO L263 TraceCheckSpWp]: Trace formula consists of 310 conjuncts, 116 conjunts are in the unsatisfiable core [2022-03-15 21:40:16,419 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:16,620 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 841 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:16,620 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:17,588 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 406 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:17,589 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [4061336] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:17,589 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:17,589 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 31] total 60 [2022-03-15 21:40:17,589 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [815712183] [2022-03-15 21:40:17,589 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:17,595 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:17,652 INFO L252 McrAutomatonBuilder]: Finished intersection with 155 states and 243 transitions. [2022-03-15 21:40:17,652 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:18,915 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:40:18,915 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-03-15 21:40:18,915 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:18,916 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-03-15 21:40:18,916 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=960, Invalid=2700, Unknown=0, NotChecked=0, Total=3660 [2022-03-15 21:40:18,916 INFO L87 Difference]: Start difference. First operand 153 states and 300 transitions. Second operand has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 32 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:21,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:21,041 INFO L93 Difference]: Finished difference Result 362 states and 717 transitions. [2022-03-15 21:40:21,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2022-03-15 21:40:21,041 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 32 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 65 [2022-03-15 21:40:21,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:21,042 INFO L225 Difference]: With dead ends: 362 [2022-03-15 21:40:21,042 INFO L226 Difference]: Without dead ends: 243 [2022-03-15 21:40:21,043 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 212 SyntacticMatches, 5 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1511, Invalid=6499, Unknown=0, NotChecked=0, Total=8010 [2022-03-15 21:40:21,043 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 36 mSDsluCounter, 4151 mSDsCounter, 0 mSdLazyCounter, 6098 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 36 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 6135 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 6098 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:21,043 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [36 Valid, 0 Invalid, 6135 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 6098 Invalid, 0 Unknown, 0 Unchecked, 1.6s Time] [2022-03-15 21:40:21,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2022-03-15 21:40:21,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 155. [2022-03-15 21:40:21,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155 states, 154 states have (on average 1.974025974025974) internal successors, (304), 154 states have internal predecessors, (304), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:21,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 304 transitions. [2022-03-15 21:40:21,045 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 304 transitions. Word has length 65 [2022-03-15 21:40:21,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:21,045 INFO L470 AbstractCegarLoop]: Abstraction has 155 states and 304 transitions. [2022-03-15 21:40:21,046 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 4.636363636363637) internal successors, (153), 32 states have internal predecessors, (153), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:21,046 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 304 transitions. [2022-03-15 21:40:21,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-03-15 21:40:21,046 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:21,046 INFO L514 BasicCegarLoop]: trace histogram [29, 29, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:21,062 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:21,261 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 66 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable66 [2022-03-15 21:40:21,262 INFO L402 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:40:21,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:21,262 INFO L85 PathProgramCache]: Analyzing trace with hash -249815297, now seen corresponding path program 66 times [2022-03-15 21:40:21,262 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:21,263 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174940454] [2022-03-15 21:40:21,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:21,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:21,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:22,705 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 406 proven. 464 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:22,705 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:22,705 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174940454] [2022-03-15 21:40:22,706 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1174940454] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:22,706 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1208477712] [2022-03-15 21:40:22,706 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:40:22,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:22,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:22,707 INFO L229 MonitoredProcess]: Starting monitored process 67 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:22,707 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2022-03-15 21:40:22,771 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 16 check-sat command(s) [2022-03-15 21:40:22,771 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:22,774 WARN L261 TraceCheckSpWp]: Trace formula consists of 315 conjuncts, 241 conjunts are in the unsatisfiable core [2022-03-15 21:40:22,775 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:25,400 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 0 proven. 870 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:25,400 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:29,229 INFO L134 CoverageAnalysis]: Checked inductivity of 870 backedges. 406 proven. 464 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:29,229 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1208477712] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:29,229 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:29,229 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61, 61] total 181 [2022-03-15 21:40:29,229 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1144125477] [2022-03-15 21:40:29,230 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:29,236 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:29,292 INFO L252 McrAutomatonBuilder]: Finished intersection with 157 states and 246 transitions. [2022-03-15 21:40:29,292 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:36,958 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 60 new interpolants: [47371#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47398#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (<= 18 counter) (< (+ j1 11) M1) (not (< (+ j1 10) M1)))), 47401#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 15 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 47411#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= 5 counter))), 47377#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47397#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= 19 counter) (not (< (+ 9 j1) M1)))), 47362#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47386#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47363#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47403#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 13 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 47381#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47379#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47382#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47389#(and (or (< (+ 2 j1) M1) (<= 27 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 47374#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47376#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47357#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 47395#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 21 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 47375#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47393#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 23 counter) (< (+ 6 j1) M1))), 47368#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47370#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47416#(and (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= 0 counter)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= (+ 29 j2 counter) M1)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= M1 (+ 29 j2 counter)))), 47369#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47402#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 14 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 47405#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= 11 counter))), 47359#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 47415#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 1 counter)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1))), 47413#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 3 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 47404#(and (or (<= 12 counter) (< (+ j1 17) M1) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 47360#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47364#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47373#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47394#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (not (< (+ 6 j1) M1)) (<= 22 counter))), 47365#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47388#(and (or (not (< j1 M1)) (<= 28 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 47366#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47380#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47412#(and (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (< (+ j1 25) M1) (not (< (+ j1 24) M1)) (<= 4 counter)) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 47361#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47387#(and (or (< j1 M1) (<= 29 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47383#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47358#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 47385#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47400#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= 16 counter))), 47407#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 9 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 47372#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47399#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 17 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 47410#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (<= 6 counter) (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1))), 47378#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 47390#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= 26 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 47408#(and (or (not (< (+ j1 20) M1)) (<= 8 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 47384#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 47391#(and (or (not (< (+ 3 j1) M1)) (<= 25 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 47414#(and (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (<= 2 counter) (not (< (+ j1 26) M1)) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 47409#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)) (<= 7 counter))), 47406#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 10 counter) (< (+ 19 j1) M1))), 47396#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 20 counter)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 47392#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 24 counter) (< (+ 5 j1) M1))), 47367#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:40:36,958 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 123 states [2022-03-15 21:40:36,958 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:36,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 123 interpolants. [2022-03-15 21:40:36,961 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9604, Invalid=49202, Unknown=0, NotChecked=0, Total=58806 [2022-03-15 21:40:36,961 INFO L87 Difference]: Start difference. First operand 155 states and 304 transitions. Second operand has 123 states, 122 states have (on average 1.7704918032786885) internal successors, (216), 122 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:01,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:01,340 INFO L93 Difference]: Finished difference Result 475 states and 940 transitions. [2022-03-15 21:41:01,341 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 154 states. [2022-03-15 21:41:01,341 INFO L78 Accepts]: Start accepts. Automaton has has 123 states, 122 states have (on average 1.7704918032786885) internal successors, (216), 122 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-03-15 21:41:01,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:01,342 INFO L225 Difference]: With dead ends: 475 [2022-03-15 21:41:01,342 INFO L226 Difference]: Without dead ends: 472 [2022-03-15 21:41:01,348 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 432 GetRequests, 36 SyntacticMatches, 4 SemanticMatches, 392 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50767 ImplicationChecksByTransitivity, 33.2s TimeCoverageRelationStatistics Valid=30417, Invalid=124425, Unknown=0, NotChecked=0, Total=154842 [2022-03-15 21:41:01,349 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 1906 mSDsluCounter, 860 mSDsCounter, 0 mSdLazyCounter, 2679 mSolverCounterSat, 1744 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1906 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4423 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1744 IncrementalHoareTripleChecker+Valid, 2679 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:01,349 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1906 Valid, 0 Invalid, 4423 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1744 Valid, 2679 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-03-15 21:41:01,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states. [2022-03-15 21:41:01,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 158. [2022-03-15 21:41:01,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 158 states, 157 states have (on average 1.9745222929936306) internal successors, (310), 157 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:01,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 310 transitions. [2022-03-15 21:41:01,351 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 310 transitions. Word has length 66 [2022-03-15 21:41:01,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:01,352 INFO L470 AbstractCegarLoop]: Abstraction has 158 states and 310 transitions. [2022-03-15 21:41:01,352 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 123 states, 122 states have (on average 1.7704918032786885) internal successors, (216), 122 states have internal predecessors, (216), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:01,352 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 310 transitions. [2022-03-15 21:41:01,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2022-03-15 21:41:01,352 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:01,352 INFO L514 BasicCegarLoop]: trace histogram [30, 29, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:01,370 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:01,567 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 67 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable67 [2022-03-15 21:41:01,567 INFO L402 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:41:01,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:01,567 INFO L85 PathProgramCache]: Analyzing trace with hash 845517982, now seen corresponding path program 67 times [2022-03-15 21:41:01,568 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:01,568 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328129279] [2022-03-15 21:41:01,568 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:01,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:01,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:02,090 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:02,091 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:02,091 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328129279] [2022-03-15 21:41:02,091 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1328129279] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:02,091 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [44229281] [2022-03-15 21:41:02,091 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:41:02,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:02,091 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:02,092 INFO L229 MonitoredProcess]: Starting monitored process 68 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:02,094 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2022-03-15 21:41:02,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:02,146 INFO L263 TraceCheckSpWp]: Trace formula consists of 320 conjuncts, 120 conjunts are in the unsatisfiable core [2022-03-15 21:41:02,147 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:02,355 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:02,355 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:03,361 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 435 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:03,361 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [44229281] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:03,361 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:03,361 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 32] total 62 [2022-03-15 21:41:03,361 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1623746856] [2022-03-15 21:41:03,361 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:03,368 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:03,453 INFO L252 McrAutomatonBuilder]: Finished intersection with 160 states and 251 transitions. [2022-03-15 21:41:03,453 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:04,736 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:41:04,736 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 34 states [2022-03-15 21:41:04,736 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:04,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2022-03-15 21:41:04,737 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1023, Invalid=2883, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:41:04,737 INFO L87 Difference]: Start difference. First operand 158 states and 310 transitions. Second operand has 34 states, 34 states have (on average 4.647058823529412) internal successors, (158), 33 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:07,028 INFO L93 Difference]: Finished difference Result 374 states and 741 transitions. [2022-03-15 21:41:07,028 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2022-03-15 21:41:07,028 INFO L78 Accepts]: Start accepts. Automaton has has 34 states, 34 states have (on average 4.647058823529412) internal successors, (158), 33 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 67 [2022-03-15 21:41:07,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:07,029 INFO L225 Difference]: With dead ends: 374 [2022-03-15 21:41:07,029 INFO L226 Difference]: Without dead ends: 251 [2022-03-15 21:41:07,029 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 219 SyntacticMatches, 5 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1608, Invalid=6948, Unknown=0, NotChecked=0, Total=8556 [2022-03-15 21:41:07,030 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 37 mSDsluCounter, 4444 mSDsCounter, 0 mSdLazyCounter, 6518 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 6556 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 6518 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.7s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:07,030 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 0 Invalid, 6556 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 6518 Invalid, 0 Unknown, 0 Unchecked, 1.7s Time] [2022-03-15 21:41:07,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2022-03-15 21:41:07,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 160. [2022-03-15 21:41:07,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 160 states, 159 states have (on average 1.9748427672955975) internal successors, (314), 159 states have internal predecessors, (314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 314 transitions. [2022-03-15 21:41:07,032 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 314 transitions. Word has length 67 [2022-03-15 21:41:07,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:07,032 INFO L470 AbstractCegarLoop]: Abstraction has 160 states and 314 transitions. [2022-03-15 21:41:07,032 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 34 states, 34 states have (on average 4.647058823529412) internal successors, (158), 33 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,032 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 314 transitions. [2022-03-15 21:41:07,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2022-03-15 21:41:07,032 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:07,032 INFO L514 BasicCegarLoop]: trace histogram [30, 30, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:07,048 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:07,239 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 68 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable68 [2022-03-15 21:41:07,239 INFO L402 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:41:07,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:07,240 INFO L85 PathProgramCache]: Analyzing trace with hash 1031087323, now seen corresponding path program 68 times [2022-03-15 21:41:07,240 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:07,240 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597817163] [2022-03-15 21:41:07,240 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:07,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:07,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:08,750 INFO L134 CoverageAnalysis]: Checked inductivity of 930 backedges. 435 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:08,750 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:08,750 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597817163] [2022-03-15 21:41:08,751 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1597817163] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:08,751 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2024617122] [2022-03-15 21:41:08,751 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:41:08,751 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:08,751 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:08,752 INFO L229 MonitoredProcess]: Starting monitored process 69 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:08,752 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2022-03-15 21:41:08,810 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:41:08,810 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:08,813 WARN L261 TraceCheckSpWp]: Trace formula consists of 325 conjuncts, 249 conjunts are in the unsatisfiable core [2022-03-15 21:41:08,814 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:11,584 INFO L134 CoverageAnalysis]: Checked inductivity of 930 backedges. 0 proven. 930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:11,584 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:15,613 INFO L134 CoverageAnalysis]: Checked inductivity of 930 backedges. 435 proven. 495 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:15,613 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2024617122] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:15,613 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:15,613 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63, 63] total 187 [2022-03-15 21:41:15,613 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [23288079] [2022-03-15 21:41:15,614 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:15,620 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:15,696 INFO L252 McrAutomatonBuilder]: Finished intersection with 162 states and 254 transitions. [2022-03-15 21:41:15,696 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:23,609 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 62 new interpolants: [50361#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 14 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 50351#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 24 counter) (< (+ 6 j1) M1))), 50369#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 6 counter) (< (+ j1 24) M1))), 50346#(and (or (not (< j1 M1)) (< (+ j1 1) M1) (<= 29 counter)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 50368#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= 7 counter))), 50315#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 50347#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 28 counter) (not (< (+ j1 1) M1)))), 50344#(and (or (< j1 M1) (<= 29 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50321#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50345#(and (or (< j1 M1) (<= 30 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50355#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 20 counter))), 50356#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (<= 19 counter) (not (< (+ j1 10) M1)))), 50374#(and (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= (+ 29 j2 counter) M1)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= 1 counter)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= M1 (+ 29 j2 counter)))), 50373#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 2 counter)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1))), 50314#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 50353#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= 22 counter)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 50365#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= 10 counter) (< (+ j1 20) M1))), 50333#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50366#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (<= 9 counter) (< (+ 21 j1) M1))), 50362#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1))) (or (<= 13 counter) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 50317#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50371#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 4 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 50335#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 50334#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50329#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50327#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50358#(and (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= 17 counter)) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 50330#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50348#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (<= 27 counter) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 50322#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50339#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50340#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50328#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50336#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50363#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (<= 12 counter) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 50357#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (<= 18 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 50370#(and (or (< (+ j1 25) M1) (not (< (+ j1 24) M1)) (<= 5 counter)) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 50338#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50337#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50316#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 50320#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50350#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 25 counter) (< (+ 5 j1) M1))), 50318#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50342#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50359#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 16 counter))), 50360#(and (or (< (+ j1 15) M1) (<= 15 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 50352#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 23 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 50324#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50375#(and (or (not (< (+ 29 j1) M1)) (<= 0 counter) (< (+ 30 j1) M1)) (or (<= M1 (+ 30 j2 counter)) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1)) (or (<= (+ 30 j2 counter) M1) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1))), 50354#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 21 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 50326#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50331#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50367#(and (or (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)) (<= 8 counter)) (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 50325#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50319#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50323#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50332#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50341#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50343#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 50364#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (not (< (+ j1 18) M1)) (<= 11 counter) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 50349#(and (or (not (< (+ 3 j1) M1)) (<= 26 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 50372#(and (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (<= 3 counter) (not (< (+ j1 26) M1)) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1)))] [2022-03-15 21:41:23,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 127 states [2022-03-15 21:41:23,609 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:23,610 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 127 interpolants. [2022-03-15 21:41:23,613 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10247, Invalid=52503, Unknown=0, NotChecked=0, Total=62750 [2022-03-15 21:41:23,613 INFO L87 Difference]: Start difference. First operand 160 states and 314 transitions. Second operand has 127 states, 126 states have (on average 1.7698412698412698) internal successors, (223), 126 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:49,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:49,998 INFO L93 Difference]: Finished difference Result 491 states and 972 transitions. [2022-03-15 21:41:49,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 159 states. [2022-03-15 21:41:49,999 INFO L78 Accepts]: Start accepts. Automaton has has 127 states, 126 states have (on average 1.7698412698412698) internal successors, (223), 126 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 68 [2022-03-15 21:41:49,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:50,000 INFO L225 Difference]: With dead ends: 491 [2022-03-15 21:41:50,000 INFO L226 Difference]: Without dead ends: 488 [2022-03-15 21:41:50,008 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 446 GetRequests, 38 SyntacticMatches, 3 SemanticMatches, 405 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54058 ImplicationChecksByTransitivity, 35.7s TimeCoverageRelationStatistics Valid=32464, Invalid=132778, Unknown=0, NotChecked=0, Total=165242 [2022-03-15 21:41:50,008 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 2121 mSDsluCounter, 923 mSDsCounter, 0 mSdLazyCounter, 2871 mSolverCounterSat, 1855 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2121 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 4726 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1855 IncrementalHoareTripleChecker+Valid, 2871 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.8s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:50,008 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2121 Valid, 0 Invalid, 4726 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1855 Valid, 2871 Invalid, 0 Unknown, 0 Unchecked, 1.8s Time] [2022-03-15 21:41:50,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states. [2022-03-15 21:41:50,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 163. [2022-03-15 21:41:50,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 163 states, 162 states have (on average 1.9753086419753085) internal successors, (320), 162 states have internal predecessors, (320), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:50,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 320 transitions. [2022-03-15 21:41:50,011 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 320 transitions. Word has length 68 [2022-03-15 21:41:50,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:50,011 INFO L470 AbstractCegarLoop]: Abstraction has 163 states and 320 transitions. [2022-03-15 21:41:50,011 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 127 states, 126 states have (on average 1.7698412698412698) internal successors, (223), 126 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:50,011 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 320 transitions. [2022-03-15 21:41:50,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2022-03-15 21:41:50,012 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:50,012 INFO L514 BasicCegarLoop]: trace histogram [31, 30, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:50,027 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Ended with exit code 0 [2022-03-15 21:41:50,212 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 69 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable69 [2022-03-15 21:41:50,212 INFO L402 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:41:50,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:50,213 INFO L85 PathProgramCache]: Analyzing trace with hash 1898793538, now seen corresponding path program 69 times [2022-03-15 21:41:50,213 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:50,213 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452917450] [2022-03-15 21:41:50,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:50,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:50,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:50,767 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 0 proven. 961 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:50,767 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:50,767 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452917450] [2022-03-15 21:41:50,767 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1452917450] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:50,767 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1871469474] [2022-03-15 21:41:50,767 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:41:50,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:50,767 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:50,768 INFO L229 MonitoredProcess]: Starting monitored process 70 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:50,769 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2022-03-15 21:41:50,938 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2022-03-15 21:41:50,938 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:50,941 INFO L263 TraceCheckSpWp]: Trace formula consists of 330 conjuncts, 114 conjunts are in the unsatisfiable core [2022-03-15 21:41:50,942 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:51,399 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 55 proven. 906 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:51,399 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:52,205 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 465 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:52,206 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1871469474] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:52,206 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:52,206 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 44, 33] total 64 [2022-03-15 21:41:52,206 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1262759884] [2022-03-15 21:41:52,206 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:52,213 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:52,314 INFO L252 McrAutomatonBuilder]: Finished intersection with 165 states and 259 transitions. [2022-03-15 21:41:52,314 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:53,727 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:41:53,727 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2022-03-15 21:41:53,727 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:53,728 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2022-03-15 21:41:53,728 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1088, Invalid=3072, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:41:53,728 INFO L87 Difference]: Start difference. First operand 163 states and 320 transitions. Second operand has 35 states, 35 states have (on average 4.6571428571428575) internal successors, (163), 34 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:56,183 INFO L93 Difference]: Finished difference Result 386 states and 765 transitions. [2022-03-15 21:41:56,183 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2022-03-15 21:41:56,183 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 4.6571428571428575) internal successors, (163), 34 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 69 [2022-03-15 21:41:56,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:56,184 INFO L225 Difference]: With dead ends: 386 [2022-03-15 21:41:56,184 INFO L226 Difference]: Without dead ends: 259 [2022-03-15 21:41:56,184 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 226 SyntacticMatches, 5 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1172 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1708, Invalid=7412, Unknown=0, NotChecked=0, Total=9120 [2022-03-15 21:41:56,185 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 38 mSDsluCounter, 4897 mSDsCounter, 0 mSdLazyCounter, 7163 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 38 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 7200 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 7163 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:56,185 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [38 Valid, 0 Invalid, 7200 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 7163 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2022-03-15 21:41:56,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2022-03-15 21:41:56,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 165. [2022-03-15 21:41:56,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 165 states, 164 states have (on average 1.975609756097561) internal successors, (324), 164 states have internal predecessors, (324), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 324 transitions. [2022-03-15 21:41:56,187 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 324 transitions. Word has length 69 [2022-03-15 21:41:56,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:56,187 INFO L470 AbstractCegarLoop]: Abstraction has 165 states and 324 transitions. [2022-03-15 21:41:56,187 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 4.6571428571428575) internal successors, (163), 34 states have internal predecessors, (163), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,187 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 324 transitions. [2022-03-15 21:41:56,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2022-03-15 21:41:56,187 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:56,187 INFO L514 BasicCegarLoop]: trace histogram [31, 31, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:56,203 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Ended with exit code 0 [2022-03-15 21:41:56,388 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,70 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:56,388 INFO L402 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:41:56,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:56,388 INFO L85 PathProgramCache]: Analyzing trace with hash -157696193, now seen corresponding path program 70 times [2022-03-15 21:41:56,389 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:56,389 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771574588] [2022-03-15 21:41:56,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:56,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:56,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:57,983 INFO L134 CoverageAnalysis]: Checked inductivity of 992 backedges. 465 proven. 527 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:57,984 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:57,984 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771574588] [2022-03-15 21:41:57,984 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771574588] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:57,984 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1037094835] [2022-03-15 21:41:57,984 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:41:57,984 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:57,984 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:57,985 INFO L229 MonitoredProcess]: Starting monitored process 71 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:57,986 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Waiting until timeout for monitored process [2022-03-15 21:41:58,039 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:41:58,040 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:58,043 WARN L261 TraceCheckSpWp]: Trace formula consists of 335 conjuncts, 257 conjunts are in the unsatisfiable core [2022-03-15 21:41:58,044 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:00,976 INFO L134 CoverageAnalysis]: Checked inductivity of 992 backedges. 0 proven. 992 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:00,977 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:05,255 INFO L134 CoverageAnalysis]: Checked inductivity of 992 backedges. 465 proven. 527 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:05,256 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1037094835] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:05,256 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:05,256 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65, 65] total 193 [2022-03-15 21:42:05,256 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1720020068] [2022-03-15 21:42:05,256 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:05,263 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:05,334 INFO L252 McrAutomatonBuilder]: Finished intersection with 167 states and 262 transitions. [2022-03-15 21:42:05,334 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:13,849 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 64 new interpolants: [53385#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53393#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53392#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53401#(and (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= 27 counter) (< (+ j1 4) M1))), 53383#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53379#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53423#(and (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 5 counter)) (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 53377#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53421#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= 7 counter))), 53426#(and (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= 2 counter)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= (+ 29 j2 counter) M1)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= M1 (+ 29 j2 counter)))), 53408#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 20 counter))), 53409#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (<= 19 counter) (not (< (+ j1 11) M1))) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 53414#(and (or (< (+ j1 17) M1) (<= 14 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 53374#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53400#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 28 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 53397#(and (or (<= 31 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53370#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53427#(and (or (not (< (+ 29 j1) M1)) (<= 1 counter) (< (+ 30 j1) M1)) (or (<= M1 (+ 30 j2 counter)) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1)) (or (<= (+ 30 j2 counter) M1) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1))), 53407#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 21 counter))), 53425#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 3 counter)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1))), 53428#(and (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= M1 (+ j2 31 counter))) (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= (+ j2 31 counter) M1)) (or (<= 0 counter) (not (< (+ 30 j1) M1)) (< (+ j1 31) M1))), 53387#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53389#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53390#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53378#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53369#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53381#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53373#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53416#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= 12 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 53372#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53388#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53417#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= 11 counter) (< (+ j1 20) M1))), 53419#(and (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (< (+ 22 j1) M1) (<= 9 counter) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 53382#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53413#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 15 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 53398#(and (or (not (< j1 M1)) (<= 30 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 53405#(and (or (not (< (+ 7 j1) M1)) (<= 23 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 53412#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= 16 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 53420#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= 8 counter))), 53422#(and (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= 6 counter) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 53376#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53386#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 53391#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53411#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= 17 counter)) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 53424#(and (or (not (< (+ j1 26) M1)) (<= 4 counter) (< (+ j1 27) M1)) (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 53406#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 22 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 53384#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53380#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53404#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= 24 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 53396#(and (or (< j1 M1) (<= 30 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53399#(and (or (< (+ 2 j1) M1) (not (< (+ j1 1) M1)) (<= 29 counter)) (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 53367#(and (or (<= counter 0) (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (= (+ M1 (* (- 1) counter) (* (- 1) M2)) 0) (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 53394#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53395#(and (or (< j1 M1) (<= 29 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53375#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53403#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 25 counter) (< (+ 6 j1) M1))), 53415#(and (or (< (+ j1 18) M1) (<= 13 counter) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 53418#(and (or (not (< (+ j1 20) M1)) (<= 10 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 53368#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 53410#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 18 counter) (not (< (+ j1 12) M1)))), 53365#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 53366#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 53402#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 26 counter))), 53371#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:42:13,850 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 131 states [2022-03-15 21:42:13,850 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:13,850 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2022-03-15 21:42:13,854 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10915, Invalid=55907, Unknown=0, NotChecked=0, Total=66822 [2022-03-15 21:42:13,854 INFO L87 Difference]: Start difference. First operand 165 states and 324 transitions. Second operand has 131 states, 130 states have (on average 1.7692307692307692) internal successors, (230), 130 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:42,425 INFO L93 Difference]: Finished difference Result 507 states and 1004 transitions. [2022-03-15 21:42:42,425 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 164 states. [2022-03-15 21:42:42,425 INFO L78 Accepts]: Start accepts. Automaton has has 131 states, 130 states have (on average 1.7692307692307692) internal successors, (230), 130 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 70 [2022-03-15 21:42:42,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:42,427 INFO L225 Difference]: With dead ends: 507 [2022-03-15 21:42:42,427 INFO L226 Difference]: Without dead ends: 504 [2022-03-15 21:42:42,434 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 460 GetRequests, 38 SyntacticMatches, 4 SemanticMatches, 418 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57768 ImplicationChecksByTransitivity, 38.3s TimeCoverageRelationStatistics Valid=34586, Invalid=141394, Unknown=0, NotChecked=0, Total=175980 [2022-03-15 21:42:42,434 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 2023 mSDsluCounter, 1161 mSDsCounter, 0 mSdLazyCounter, 3637 mSolverCounterSat, 1976 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2023 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 5613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1976 IncrementalHoareTripleChecker+Valid, 3637 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:42,434 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2023 Valid, 0 Invalid, 5613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1976 Valid, 3637 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-03-15 21:42:42,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states. [2022-03-15 21:42:42,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 168. [2022-03-15 21:42:42,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 168 states, 167 states have (on average 1.9760479041916168) internal successors, (330), 167 states have internal predecessors, (330), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 330 transitions. [2022-03-15 21:42:42,437 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 330 transitions. Word has length 70 [2022-03-15 21:42:42,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:42,437 INFO L470 AbstractCegarLoop]: Abstraction has 168 states and 330 transitions. [2022-03-15 21:42:42,437 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 131 states, 130 states have (on average 1.7692307692307692) internal successors, (230), 130 states have internal predecessors, (230), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,437 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 330 transitions. [2022-03-15 21:42:42,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2022-03-15 21:42:42,437 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:42,437 INFO L514 BasicCegarLoop]: trace histogram [32, 31, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:42,453 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:42,638 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable71,71 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:42,638 INFO L402 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:42:42,638 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:42,638 INFO L85 PathProgramCache]: Analyzing trace with hash -593757090, now seen corresponding path program 71 times [2022-03-15 21:42:42,639 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:42,639 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2051650735] [2022-03-15 21:42:42,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:42,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:42,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:43,244 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:43,244 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:43,244 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2051650735] [2022-03-15 21:42:43,244 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2051650735] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:43,244 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [725743396] [2022-03-15 21:42:43,244 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:42:43,244 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:43,244 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:43,245 INFO L229 MonitoredProcess]: Starting monitored process 72 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:43,246 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2022-03-15 21:42:43,319 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2022-03-15 21:42:43,319 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:43,321 INFO L263 TraceCheckSpWp]: Trace formula consists of 340 conjuncts, 128 conjunts are in the unsatisfiable core [2022-03-15 21:42:43,322 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:43,544 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 1024 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:43,545 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:44,704 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 496 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:44,704 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [725743396] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:44,704 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:44,704 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 34] total 66 [2022-03-15 21:42:44,704 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [416904948] [2022-03-15 21:42:44,704 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:44,712 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:44,783 INFO L252 McrAutomatonBuilder]: Finished intersection with 170 states and 267 transitions. [2022-03-15 21:42:44,783 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:46,172 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:42:46,172 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 36 states [2022-03-15 21:42:46,172 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:46,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2022-03-15 21:42:46,173 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1155, Invalid=3267, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:42:46,173 INFO L87 Difference]: Start difference. First operand 168 states and 330 transitions. Second operand has 36 states, 36 states have (on average 4.666666666666667) internal successors, (168), 35 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:48,901 INFO L93 Difference]: Finished difference Result 398 states and 789 transitions. [2022-03-15 21:42:48,901 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2022-03-15 21:42:48,901 INFO L78 Accepts]: Start accepts. Automaton has has 36 states, 36 states have (on average 4.666666666666667) internal successors, (168), 35 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 71 [2022-03-15 21:42:48,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:48,902 INFO L225 Difference]: With dead ends: 398 [2022-03-15 21:42:48,902 INFO L226 Difference]: Without dead ends: 267 [2022-03-15 21:42:48,903 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 233 SyntacticMatches, 5 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 564 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1811, Invalid=7891, Unknown=0, NotChecked=0, Total=9702 [2022-03-15 21:42:48,903 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 39 mSDsluCounter, 5060 mSDsCounter, 0 mSdLazyCounter, 7400 mSolverCounterSat, 40 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 7440 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 40 IncrementalHoareTripleChecker+Valid, 7400 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:48,904 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [39 Valid, 0 Invalid, 7440 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [40 Valid, 7400 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-03-15 21:42:48,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2022-03-15 21:42:48,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 170. [2022-03-15 21:42:48,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 170 states, 169 states have (on average 1.9763313609467457) internal successors, (334), 169 states have internal predecessors, (334), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 334 transitions. [2022-03-15 21:42:48,906 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 334 transitions. Word has length 71 [2022-03-15 21:42:48,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:48,906 INFO L470 AbstractCegarLoop]: Abstraction has 170 states and 334 transitions. [2022-03-15 21:42:48,906 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 36 states, 36 states have (on average 4.666666666666667) internal successors, (168), 35 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,906 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 334 transitions. [2022-03-15 21:42:48,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2022-03-15 21:42:48,906 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:48,906 INFO L514 BasicCegarLoop]: trace histogram [32, 32, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:48,922 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Ended with exit code 0 [2022-03-15 21:42:49,107 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72,72 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:49,107 INFO L402 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:42:49,107 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:49,107 INFO L85 PathProgramCache]: Analyzing trace with hash -1195432421, now seen corresponding path program 72 times [2022-03-15 21:42:49,108 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:49,108 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1292296332] [2022-03-15 21:42:49,108 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:49,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:49,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:50,835 INFO L134 CoverageAnalysis]: Checked inductivity of 1056 backedges. 496 proven. 560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:50,835 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:50,835 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1292296332] [2022-03-15 21:42:50,835 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1292296332] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:50,836 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [592301074] [2022-03-15 21:42:50,836 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:42:50,836 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:50,836 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:50,837 INFO L229 MonitoredProcess]: Starting monitored process 73 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:50,837 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Waiting until timeout for monitored process [2022-03-15 21:42:50,915 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 17 check-sat command(s) [2022-03-15 21:42:50,916 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:50,919 WARN L261 TraceCheckSpWp]: Trace formula consists of 345 conjuncts, 265 conjunts are in the unsatisfiable core [2022-03-15 21:42:50,921 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:54,081 INFO L134 CoverageAnalysis]: Checked inductivity of 1056 backedges. 0 proven. 1056 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:54,082 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:58,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1056 backedges. 496 proven. 560 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:58,637 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [592301074] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:58,637 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:58,637 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67, 67] total 199 [2022-03-15 21:42:58,637 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1676402919] [2022-03-15 21:42:58,637 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:58,645 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:58,717 INFO L252 McrAutomatonBuilder]: Finished intersection with 172 states and 270 transitions. [2022-03-15 21:42:58,718 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:07,483 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 66 new interpolants: [56574#(and (or (not (< (+ 30 j1) M1)) (<= 1 counter) (< (+ j1 31) M1)) (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= M1 (+ j2 31 counter))) (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= (+ j2 31 counter) M1))), 56511#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 56512#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 56562#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= 13 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 56542#(and (or (<= 31 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56533#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56530#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56549#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 26 counter) (< (+ 6 j1) M1))), 56546#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= 29 counter)) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 56561#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1))) (or (< (+ j1 18) M1) (<= 14 counter) (not (< (+ j1 17) M1)))), 56553#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= 22 counter))), 56518#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56555#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 20 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 56560#(and (or (< (+ j1 17) M1) (<= 15 counter) (not (< (+ 16 j1) M1))) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 56569#(and (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26))) (or (<= 6 counter) (not (< (+ j1 25) M1)) (< (+ j1 26) M1))), 56554#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 21 counter))), 56550#(and (or (<= 25 counter) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1)))), 56532#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56529#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56551#(and (or (not (< (+ 7 j1) M1)) (<= 24 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 56531#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 56565#(and (or (< (+ 22 j1) M1) (<= 10 counter) (not (< (+ 21 j1) M1))) (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 56566#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (<= 9 counter) (< (+ 23 j1) M1))), 56517#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56523#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56570#(and (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (not (< (+ j1 26) M1)) (<= 5 counter) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 56519#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56522#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56528#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56534#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56548#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= 27 counter))), 56563#(and (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1)) (or (<= 12 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1))), 56572#(and (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= 3 counter)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= (+ 29 j2 counter) M1)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= M1 (+ 29 j2 counter)))), 56559#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter))) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 16 counter))), 56573#(and (or (not (< (+ 29 j1) M1)) (<= 2 counter) (< (+ 30 j1) M1)) (or (<= M1 (+ 30 j2 counter)) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1)) (or (<= (+ 30 j2 counter) M1) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1))), 56510#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 56516#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56556#(and (or (< (+ j1 13) M1) (<= 19 counter) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13)))), 56527#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56547#(and (or (not (< (+ 3 j1) M1)) (<= 28 counter) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 56513#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56571#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 4 counter))), 56544#(and (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (<= 31 counter) (not (< j1 M1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 56520#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56536#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56538#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56524#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56545#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 30 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 56539#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56535#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56525#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56557#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (<= 18 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1))), 56568#(and (or (< (+ j1 25) M1) (not (< (+ j1 24) M1)) (<= 7 counter)) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 56543#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 32 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56564#(and (or (not (< (+ j1 20) M1)) (<= 11 counter) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 56537#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56515#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56541#(and (or (< j1 M1) (<= 30 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56567#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= 8 counter))), 56575#(and (or (<= M1 (+ 32 j2 counter)) (< (+ 32 j1) M1) (not (< (+ j1 31) M1))) (or (<= (+ 32 j2 counter) M1) (< (+ 32 j1) M1) (not (< (+ j1 31) M1))) (or (<= 0 counter) (< (+ 32 j1) M1) (not (< (+ j1 31) M1)))), 56514#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56552#(and (or (< (+ 9 j1) M1) (<= 23 counter) (not (< (+ j1 8) M1))) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 56526#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56540#(and (or (< j1 M1) (<= 29 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56521#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 56558#(and (or (< (+ j1 15) M1) (<= 17 counter) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1))))] [2022-03-15 21:43:07,483 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 135 states [2022-03-15 21:43:07,483 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:07,484 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 135 interpolants. [2022-03-15 21:43:07,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=11600, Invalid=59422, Unknown=0, NotChecked=0, Total=71022 [2022-03-15 21:43:07,487 INFO L87 Difference]: Start difference. First operand 170 states and 334 transitions. Second operand has 135 states, 134 states have (on average 1.7686567164179106) internal successors, (237), 134 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:37,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:37,970 INFO L93 Difference]: Finished difference Result 523 states and 1036 transitions. [2022-03-15 21:43:37,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 169 states. [2022-03-15 21:43:37,970 INFO L78 Accepts]: Start accepts. Automaton has has 135 states, 134 states have (on average 1.7686567164179106) internal successors, (237), 134 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 72 [2022-03-15 21:43:37,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:37,971 INFO L225 Difference]: With dead ends: 523 [2022-03-15 21:43:37,972 INFO L226 Difference]: Without dead ends: 520 [2022-03-15 21:43:37,979 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 474 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 431 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61275 ImplicationChecksByTransitivity, 40.9s TimeCoverageRelationStatistics Valid=36767, Invalid=150289, Unknown=0, NotChecked=0, Total=187056 [2022-03-15 21:43:37,980 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 2384 mSDsluCounter, 1114 mSDsCounter, 0 mSdLazyCounter, 3453 mSolverCounterSat, 2110 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2384 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 5563 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2110 IncrementalHoareTripleChecker+Valid, 3453 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:37,980 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [2384 Valid, 0 Invalid, 5563 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2110 Valid, 3453 Invalid, 0 Unknown, 0 Unchecked, 2.2s Time] [2022-03-15 21:43:37,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 520 states. [2022-03-15 21:43:37,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 520 to 173. [2022-03-15 21:43:37,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 173 states, 172 states have (on average 1.9767441860465116) internal successors, (340), 172 states have internal predecessors, (340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:37,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 340 transitions. [2022-03-15 21:43:37,983 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 340 transitions. Word has length 72 [2022-03-15 21:43:37,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:37,983 INFO L470 AbstractCegarLoop]: Abstraction has 173 states and 340 transitions. [2022-03-15 21:43:37,983 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 135 states, 134 states have (on average 1.7686567164179106) internal successors, (237), 134 states have internal predecessors, (237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:37,983 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 340 transitions. [2022-03-15 21:43:37,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2022-03-15 21:43:37,984 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:37,984 INFO L514 BasicCegarLoop]: trace histogram [33, 32, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:38,000 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Ended with exit code 0 [2022-03-15 21:43:38,192 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 73 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable73 [2022-03-15 21:43:38,192 INFO L402 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:43:38,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:38,192 INFO L85 PathProgramCache]: Analyzing trace with hash 1596158210, now seen corresponding path program 73 times [2022-03-15 21:43:38,193 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:38,193 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990261576] [2022-03-15 21:43:38,193 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:38,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:38,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:38,804 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:38,804 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:38,804 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990261576] [2022-03-15 21:43:38,804 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [990261576] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:38,805 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1917436284] [2022-03-15 21:43:38,805 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:43:38,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:38,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:38,806 INFO L229 MonitoredProcess]: Starting monitored process 74 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:38,806 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2022-03-15 21:43:38,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:38,878 INFO L263 TraceCheckSpWp]: Trace formula consists of 350 conjuncts, 132 conjunts are in the unsatisfiable core [2022-03-15 21:43:38,879 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:39,103 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1089 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:39,103 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:40,330 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 528 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:40,330 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1917436284] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:40,330 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:40,330 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 35] total 68 [2022-03-15 21:43:40,331 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [439776977] [2022-03-15 21:43:40,331 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:40,338 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:40,414 INFO L252 McrAutomatonBuilder]: Finished intersection with 175 states and 275 transitions. [2022-03-15 21:43:40,415 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:41,891 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:43:41,892 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 37 states [2022-03-15 21:43:41,892 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:41,892 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2022-03-15 21:43:41,892 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1224, Invalid=3468, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:43:41,892 INFO L87 Difference]: Start difference. First operand 173 states and 340 transitions. Second operand has 37 states, 37 states have (on average 4.675675675675675) internal successors, (173), 36 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:44,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:44,665 INFO L93 Difference]: Finished difference Result 410 states and 813 transitions. [2022-03-15 21:43:44,666 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2022-03-15 21:43:44,666 INFO L78 Accepts]: Start accepts. Automaton has has 37 states, 37 states have (on average 4.675675675675675) internal successors, (173), 36 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 73 [2022-03-15 21:43:44,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:44,667 INFO L225 Difference]: With dead ends: 410 [2022-03-15 21:43:44,667 INFO L226 Difference]: Without dead ends: 275 [2022-03-15 21:43:44,667 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 240 SyntacticMatches, 5 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 598 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1917, Invalid=8385, Unknown=0, NotChecked=0, Total=10302 [2022-03-15 21:43:44,667 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 40 mSDsluCounter, 5383 mSDsCounter, 0 mSdLazyCounter, 7862 mSolverCounterSat, 41 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 7903 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 41 IncrementalHoareTripleChecker+Valid, 7862 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 2.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:44,668 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 0 Invalid, 7903 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [41 Valid, 7862 Invalid, 0 Unknown, 0 Unchecked, 2.1s Time] [2022-03-15 21:43:44,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2022-03-15 21:43:44,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 175. [2022-03-15 21:43:44,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 175 states, 174 states have (on average 1.9770114942528736) internal successors, (344), 174 states have internal predecessors, (344), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:44,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 344 transitions. [2022-03-15 21:43:44,670 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 344 transitions. Word has length 73 [2022-03-15 21:43:44,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:44,670 INFO L470 AbstractCegarLoop]: Abstraction has 175 states and 344 transitions. [2022-03-15 21:43:44,670 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 37 states, 37 states have (on average 4.675675675675675) internal successors, (173), 36 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:44,670 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 344 transitions. [2022-03-15 21:43:44,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2022-03-15 21:43:44,670 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:44,670 INFO L514 BasicCegarLoop]: trace histogram [33, 33, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:44,691 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Forceful destruction successful, exit code 0 [2022-03-15 21:43:44,886 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74,74 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:44,886 INFO L402 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION] === [2022-03-15 21:43:44,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:44,887 INFO L85 PathProgramCache]: Analyzing trace with hash -1088217217, now seen corresponding path program 74 times [2022-03-15 21:43:44,887 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:44,887 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306422208] [2022-03-15 21:43:44,887 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:44,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:44,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:46,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1122 backedges. 528 proven. 594 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:46,631 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:46,631 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306422208] [2022-03-15 21:43:46,632 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306422208] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:46,632 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [921716766] [2022-03-15 21:43:46,632 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:43:46,632 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:46,632 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:46,633 INFO L229 MonitoredProcess]: Starting monitored process 75 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:46,633 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2022-03-15 21:43:46,686 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:43:46,687 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:46,690 WARN L261 TraceCheckSpWp]: Trace formula consists of 355 conjuncts, 273 conjunts are in the unsatisfiable core [2022-03-15 21:43:46,692 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:49,967 INFO L134 CoverageAnalysis]: Checked inductivity of 1122 backedges. 0 proven. 1122 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:49,967 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:54,728 INFO L134 CoverageAnalysis]: Checked inductivity of 1122 backedges. 528 proven. 594 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:54,729 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [921716766] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:54,729 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:54,729 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69, 69] total 205 [2022-03-15 21:43:54,729 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1119925461] [2022-03-15 21:43:54,729 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:54,737 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:54,846 INFO L252 McrAutomatonBuilder]: Finished intersection with 177 states and 278 transitions. [2022-03-15 21:43:54,846 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:03,994 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 68 new interpolants: [59760#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 10 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59783#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 33 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59814#(and (or (<= 2 counter) (not (< (+ 30 j1) M1)) (< (+ j1 31) M1)) (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= M1 (+ j2 31 counter))) (or (not (< (+ 30 j1) M1)) (< (+ j1 31) M1) (<= (+ j2 31 counter) M1))), 59799#(and (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= 17 counter)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= (+ 16 j2 counter) M1)) (or (not (< (+ j1 15) M1)) (< (+ 16 j1) M1) (<= M1 (+ 16 j2 counter)))), 59784#(and (or (not (< j1 M1)) (<= 32 counter) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= M1 (+ j2 counter 1)) (< (+ j1 1) M1)) (or (not (< j1 M1)) (<= (+ j2 counter 1) M1) (< (+ j1 1) M1))), 59776#(and (or (< j1 M1) (<= 26 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59795#(and (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= (+ j2 12 counter) M1)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= 21 counter)) (or (< (+ j1 12) M1) (not (< (+ j1 11) M1)) (<= M1 (+ j2 12 counter)))), 59755#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 5 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59751#(and (or (< j1 M1) (<= M1 (+ j2 counter)) (<= (+ M1 1) (+ M2 counter))) (or (< j1 M1) (<= 1 counter)) (or (< j1 M1) (<= (+ j2 counter) M1) (< (+ M2 counter) (+ 2 M1)))), 59792#(and (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= 24 counter)) (or (< (+ 9 j1) M1) (not (< (+ j1 8) M1)) (<= (+ 9 j2 counter) M1)) (or (< (+ 9 j1) M1) (<= M1 (+ 9 j2 counter)) (not (< (+ j1 8) M1)))), 59768#(and (or (<= 18 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59808#(and (or (< (+ j1 25) M1) (not (< (+ j1 24) M1)) (<= 8 counter)) (or (<= (+ j2 counter 25) M1) (< (+ j1 25) M1) (not (< (+ j1 24) M1))) (or (<= M1 (+ j2 counter 25)) (< (+ j1 25) M1) (not (< (+ j1 24) M1)))), 59796#(and (or (< (+ j1 13) M1) (<= (+ j2 counter 13) M1) (not (< (+ j1 12) M1))) (or (< (+ j1 13) M1) (not (< (+ j1 12) M1)) (<= M1 (+ j2 counter 13))) (or (< (+ j1 13) M1) (<= 20 counter) (not (< (+ j1 12) M1)))), 59812#(and (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= 4 counter)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= (+ 29 j2 counter) M1)) (or (< (+ 29 j1) M1) (not (< (+ j1 28) M1)) (<= M1 (+ 29 j2 counter)))), 59815#(and (or (<= M1 (+ 32 j2 counter)) (< (+ 32 j1) M1) (not (< (+ j1 31) M1))) (or (<= (+ 32 j2 counter) M1) (< (+ 32 j1) M1) (not (< (+ j1 31) M1))) (or (<= 1 counter) (< (+ 32 j1) M1) (not (< (+ j1 31) M1)))), 59775#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 25 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59797#(and (or (<= M1 (+ 14 j2 counter)) (< (+ 14 j1) M1) (not (< (+ j1 13) M1))) (or (< (+ 14 j1) M1) (not (< (+ j1 13) M1)) (<= (+ 14 j2 counter) M1)) (or (<= 19 counter) (< (+ 14 j1) M1) (not (< (+ j1 13) M1)))), 59798#(and (or (< (+ j1 15) M1) (<= (+ j2 15 counter) M1) (not (< (+ 14 j1) M1))) (or (<= 18 counter) (< (+ j1 15) M1) (not (< (+ 14 j1) M1))) (or (< (+ j1 15) M1) (<= M1 (+ j2 15 counter)) (not (< (+ 14 j1) M1)))), 59753#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 3 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59779#(and (or (< j1 M1) (<= 29 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59762#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 12 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59794#(and (or (<= (+ j2 counter 11) M1) (< (+ j1 11) M1) (not (< (+ j1 10) M1))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= M1 (+ j2 counter 11))) (or (< (+ j1 11) M1) (not (< (+ j1 10) M1)) (<= 22 counter))), 59750#(or (= counter (+ M1 (* (- 1) M2))) (< j2 M2) (< j1 M1)), 59806#(and (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= M1 (+ 23 j2 counter))) (or (not (< (+ 22 j1) M1)) (<= (+ 23 j2 counter) M1) (< (+ 23 j1) M1)) (or (not (< (+ 22 j1) M1)) (< (+ 23 j1) M1) (<= 10 counter))), 59772#(and (or (< j1 M1) (<= 22 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59780#(and (or (< j1 M1) (<= 30 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59810#(and (or (not (< (+ j1 26) M1)) (<= (+ j2 counter 27) M1) (< (+ j1 27) M1)) (or (<= 6 counter) (not (< (+ j1 26) M1)) (< (+ j1 27) M1)) (or (<= M1 (+ j2 counter 27)) (not (< (+ j1 26) M1)) (< (+ j1 27) M1))), 59787#(and (or (not (< (+ 3 j1) M1)) (< (+ j1 4) M1) (<= 29 counter)) (or (not (< (+ 3 j1) M1)) (<= (+ j2 counter 4) M1) (< (+ j1 4) M1)) (or (not (< (+ 3 j1) M1)) (<= M1 (+ j2 counter 4)) (< (+ j1 4) M1))), 59786#(and (or (< (+ 3 j1) M1) (not (< (+ 2 j1) M1)) (<= M1 (+ 3 j2 counter))) (or (<= 30 counter) (< (+ 3 j1) M1) (not (< (+ 2 j1) M1))) (or (< (+ 3 j1) M1) (<= (+ 3 j2 counter) M1) (not (< (+ 2 j1) M1)))), 59757#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 7 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59754#(and (or (< j1 M1) (<= 4 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59803#(and (or (<= 13 counter) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (<= (+ j2 20 counter) M1) (not (< (+ 19 j1) M1)) (< (+ j1 20) M1)) (or (not (< (+ 19 j1) M1)) (<= M1 (+ j2 20 counter)) (< (+ j1 20) M1))), 59816#(and (or (<= 0 counter) (< (+ j1 33) M1) (not (< (+ 32 j1) M1))) (or (<= (+ j2 33 counter) M1) (< (+ j1 33) M1) (not (< (+ 32 j1) M1))) (or (<= M1 (+ j2 33 counter)) (< (+ j1 33) M1) (not (< (+ 32 j1) M1)))), 59800#(and (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= 16 counter)) (or (< (+ j1 17) M1) (not (< (+ 16 j1) M1)) (<= M1 (+ j2 counter 17))) (or (<= (+ j2 counter 17) M1) (< (+ j1 17) M1) (not (< (+ 16 j1) M1)))), 59804#(and (or (not (< (+ j1 20) M1)) (< (+ 21 j1) M1) (<= (+ 21 j2 counter) M1)) (or (<= 12 counter) (not (< (+ j1 20) M1)) (< (+ 21 j1) M1)) (or (not (< (+ j1 20) M1)) (<= M1 (+ 21 j2 counter)) (< (+ 21 j1) M1))), 59809#(and (or (<= (+ j2 counter 26) M1) (not (< (+ j1 25) M1)) (< (+ j1 26) M1)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= 7 counter)) (or (not (< (+ j1 25) M1)) (< (+ j1 26) M1) (<= M1 (+ j2 counter 26)))), 59811#(and (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= M1 (+ j2 counter 28))) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= 5 counter)) (or (< (+ j1 28) M1) (not (< (+ j1 27) M1)) (<= (+ j2 counter 28) M1))), 59774#(and (or (< j1 M1) (<= 24 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59767#(and (or (< j1 M1) (<= 17 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59765#(and (or (< j1 M1) (<= 15 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59801#(and (or (< (+ j1 18) M1) (not (< (+ j1 17) M1)) (<= M1 (+ j2 counter 18))) (or (< (+ j1 18) M1) (<= 15 counter) (not (< (+ j1 17) M1))) (or (<= (+ j2 counter 18) M1) (< (+ j1 18) M1) (not (< (+ j1 17) M1)))), 59785#(and (or (< (+ 2 j1) M1) (<= M1 (+ 2 j2 counter)) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= 31 counter) (not (< (+ j1 1) M1))) (or (< (+ 2 j1) M1) (<= (+ 2 j2 counter) M1) (not (< (+ j1 1) M1)))), 59749#(or (= counter (+ M1 (* (- 1) M2))) (< j1 M1)), 59790#(and (or (<= M1 (+ 7 j2 counter)) (< (+ 7 j1) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= (+ 7 j2 counter) M1) (not (< (+ 6 j1) M1))) (or (< (+ 7 j1) M1) (<= 26 counter) (not (< (+ 6 j1) M1)))), 59752#(and (or (< j1 M1) (<= 2 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59758#(and (or (< j1 M1) (<= 8 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59756#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 6 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59781#(and (or (<= 31 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59802#(and (or (not (< (+ j1 18) M1)) (<= (+ 19 j2 counter) M1) (< (+ 19 j1) M1)) (or (<= 14 counter) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1)) (or (<= M1 (+ 19 j2 counter)) (not (< (+ j1 18) M1)) (< (+ 19 j1) M1))), 59761#(and (or (< j1 M1) (<= 11 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59782#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 32 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59805#(and (or (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)) (<= 11 counter)) (or (<= M1 (+ 22 j2 counter)) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1))) (or (<= (+ 22 j2 counter) M1) (< (+ 22 j1) M1) (not (< (+ 21 j1) M1)))), 59807#(and (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= (+ j2 counter 24) M1)) (or (not (< (+ 23 j1) M1)) (< (+ j1 24) M1) (<= M1 (+ j2 counter 24))) (or (not (< (+ 23 j1) M1)) (<= 9 counter) (< (+ j1 24) M1))), 59759#(and (or (< j1 M1) (<= 9 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59763#(and (or (<= 13 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59791#(and (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= M1 (+ j2 8 counter))) (or (not (< (+ 7 j1) M1)) (<= 25 counter) (< (+ j1 8) M1)) (or (not (< (+ 7 j1) M1)) (< (+ j1 8) M1) (<= (+ j2 8 counter) M1))), 59771#(and (or (< j1 M1) (<= 21 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59766#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 16 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59788#(and (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= (+ 5 j2 counter) M1)) (or (not (< (+ j1 4) M1)) (< (+ 5 j1) M1) (<= M1 (+ 5 j2 counter))) (or (not (< (+ j1 4) M1)) (<= 28 counter) (< (+ 5 j1) M1))), 59793#(and (or (< (+ j1 10) M1) (not (< (+ 9 j1) M1)) (<= (+ j2 counter 10) M1)) (or (< (+ j1 10) M1) (<= M1 (+ j2 counter 10)) (not (< (+ 9 j1) M1))) (or (< (+ j1 10) M1) (<= 23 counter) (not (< (+ 9 j1) M1)))), 59789#(and (or (not (< (+ 5 j1) M1)) (< (+ 6 j1) M1) (<= (+ 6 j2 counter) M1)) (or (not (< (+ 5 j1) M1)) (<= M1 (+ 6 j2 counter)) (< (+ 6 j1) M1)) (or (not (< (+ 5 j1) M1)) (<= 27 counter) (< (+ 6 j1) M1))), 59764#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 14 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59777#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= 27 counter)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59778#(and (or (< j1 M1) (<= 28 counter)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59773#(and (or (<= 23 counter) (< j1 M1)) (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter)))), 59813#(and (or (not (< (+ 29 j1) M1)) (<= 3 counter) (< (+ 30 j1) M1)) (or (<= M1 (+ 30 j2 counter)) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1)) (or (<= (+ 30 j2 counter) M1) (not (< (+ 29 j1) M1)) (< (+ 30 j1) M1))), 59770#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (< j1 M1) (<= M1 (+ j2 counter))) (or (< j1 M1) (<= 20 counter))), 59769#(and (or (< j1 M1) (<= (+ j2 counter) M1)) (or (<= 19 counter) (< j1 M1)) (or (< j1 M1) (<= M1 (+ j2 counter))))] [2022-03-15 21:44:03,994 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 139 states [2022-03-15 21:44:03,994 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:03,995 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 139 interpolants. [2022-03-15 21:44:03,998 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=12308, Invalid=63042, Unknown=0, NotChecked=0, Total=75350 [2022-03-15 21:44:03,998 INFO L87 Difference]: Start difference. First operand 175 states and 344 transitions. Second operand has 139 states, 138 states have (on average 1.7681159420289856) internal successors, (244), 138 states have internal predecessors, (244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Received shutdown request... [2022-03-15 21:44:11,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2022-03-15 21:44:11,353 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 397 GetRequests, 41 SyntacticMatches, 3 SemanticMatches, 352 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49840 ImplicationChecksByTransitivity, 20.0s TimeCoverageRelationStatistics Valid=20493, Invalid=104469, Unknown=0, NotChecked=0, Total=124962 [2022-03-15 21:44:11,354 INFO L933 BasicCegarLoop]: 0 mSDtfsCounter, 67 mSDsluCounter, 846 mSDsCounter, 0 mSdLazyCounter, 2651 mSolverCounterSat, 161 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 67 SdHoareTripleChecker+Valid, 0 SdHoareTripleChecker+Invalid, 2812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 161 IncrementalHoareTripleChecker+Valid, 2651 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:11,354 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [67 Valid, 0 Invalid, 2812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [161 Valid, 2651 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2022-03-15 21:44:11,354 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONASSERT (2 of 3 remaining) [2022-03-15 21:44:11,370 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:11,390 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2022-03-15 21:44:11,390 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2022-03-15 21:44:11,555 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable75,75 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:11,555 WARN L594 AbstractCegarLoop]: Verification canceled: while BasicCegarLoop was constructing difference of abstraction (175states) and FLOYD_HOARE automaton (currently 82 states, 139 states before enhancement),while PredicateComparison was comparing new predicate (quantifier-free) to 354 known predicates. [2022-03-15 21:44:11,556 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATION (1 of 3 remaining) [2022-03-15 21:44:11,557 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATION (0 of 3 remaining) [2022-03-15 21:44:11,558 INFO L732 BasicCegarLoop]: Path program histogram: [74, 1, 1] [2022-03-15 21:44:11,559 INFO L230 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-03-15 21:44:11,559 INFO L180 ceAbstractionStarter]: Computing trace abstraction results [2022-03-15 21:44:11,572 INFO L202 PluginConnector]: Adding new model nonblocking-cntr-alt.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.03 09:44:11 BasicIcfg [2022-03-15 21:44:11,572 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-03-15 21:44:11,573 INFO L158 Benchmark]: Toolchain (without parser) took 733085.70ms. Allocated memory was 189.8MB in the beginning and 725.6MB in the end (delta: 535.8MB). Free memory was 149.5MB in the beginning and 259.3MB in the end (delta: -109.8MB). Peak memory consumption was 599.6MB. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.10ms. Allocated memory is still 189.8MB. Free memory is still 150.6MB. There was no memory consumed. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L158 Benchmark]: Boogie Procedure Inliner took 18.24ms. Allocated memory is still 189.8MB. Free memory was 149.5MB in the beginning and 147.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L158 Benchmark]: Boogie Preprocessor took 13.89ms. Allocated memory is still 189.8MB. Free memory was 147.9MB in the beginning and 147.0MB in the end (delta: 949.5kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L158 Benchmark]: RCFGBuilder took 151.51ms. Allocated memory is still 189.8MB. Free memory was 146.9MB in the beginning and 138.2MB in the end (delta: 8.8MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L158 Benchmark]: TraceAbstraction took 732895.80ms. Allocated memory was 189.8MB in the beginning and 725.6MB in the end (delta: 535.8MB). Free memory was 137.7MB in the beginning and 259.3MB in the end (delta: -121.7MB). Peak memory consumption was 587.0MB. Max. memory is 8.0GB. [2022-03-15 21:44:11,573 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.10ms. Allocated memory is still 189.8MB. Free memory is still 150.6MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 18.24ms. Allocated memory is still 189.8MB. Free memory was 149.5MB in the beginning and 147.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 13.89ms. Allocated memory is still 189.8MB. Free memory was 147.9MB in the beginning and 147.0MB in the end (delta: 949.5kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 151.51ms. Allocated memory is still 189.8MB. Free memory was 146.9MB in the beginning and 138.2MB in the end (delta: 8.8MB). Peak memory consumption was 8.4MB. Max. memory is 8.0GB. * TraceAbstraction took 732895.80ms. Allocated memory was 189.8MB in the beginning and 725.6MB in the end (delta: 535.8MB). Free memory was 137.7MB in the beginning and 259.3MB in the end (delta: -121.7MB). Peak memory consumption was 587.0MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks Lipton Reduction Statistics: ReductionTime: 0.2s, 28 PlacesBefore, 18 PlacesAfterwards, 23 TransitionsBefore, 13 TransitionsAfterwards, 48 CoEnabledTransitionPairs, 3 FixpointIterations, 7 TrivialSequentialCompositions, 4 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 0 ConcurrentYvCompositions, 0 ChoiceCompositions, 11 TotalNumberOfCompositions, 48 MoverChecksTotal, Independence Relation Statistics: CachedIndependenceRelation.Independence Queries: [ total: 48, positive: 48, positive conditional: 0, positive unconditional: 48, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 24, positive: 24, positive conditional: 0, positive unconditional: 24, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 48, positive: 24, positive conditional: 0, positive unconditional: 24, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 24, unknown conditional: 0, unknown unconditional: 24] , Statistics on independence cache: Total cache size (in pairs): 5, Positive cache size: 5, Positive conditional cache size: 0, Positive unconditional cache size: 5, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0 - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - TimeoutResultAtElement [Line: 50]: Timeout (TraceAbstraction) Unable to prove that assertion always holds Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and FLOYD_HOARE automaton (currently 82 states, 139 states before enhancement),while PredicateComparison was comparing new predicate (quantifier-free) to 354 known predicates. - TimeoutResultAtElement [Line: 45]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and FLOYD_HOARE automaton (currently 82 states, 139 states before enhancement),while PredicateComparison was comparing new predicate (quantifier-free) to 354 known predicates. - TimeoutResultAtElement [Line: 45]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and FLOYD_HOARE automaton (currently 82 states, 139 states before enhancement),while PredicateComparison was comparing new predicate (quantifier-free) to 354 known predicates. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 5 procedures, 32 locations, 3 error locations. Started 1 CEGAR loops. OverallTime: 732.8s, OverallIterations: 76, TraceHistogramMax: 33, PathProgramHistogramMax: 74, EmptinessCheckTime: 0.0s, AutomataDifference: 380.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.2s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 31678 SdHoareTripleChecker+Valid, 54.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 31678 mSDsluCounter, 0 SdHoareTripleChecker+Invalid, 45.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 78087 mSDsCounter, 25460 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 141963 IncrementalHoareTripleChecker+Invalid, 167423 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 25460 mSolverCounterUnsat, 0 mSDtfsCounter, 141963 mSolverCounterSat, 0.4s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 15080 GetRequests, 5084 SyntacticMatches, 295 SemanticMatches, 9700 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 771494 ImplicationChecksByTransitivity, 517.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=175occurred in iteration=75, InterpolantAutomatonStates: 4258, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 75 MinimizatonAttempts, 7606 StatesRemovedByMinimization, 73 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 2.7s SatisfiabilityAnalysisTime, 170.6s InterpolantComputationTime, 5691 NumberOfCodeBlocks, 5691 NumberOfCodeBlocksAsserted, 453 NumberOfCheckSat, 8304 ConstructedInterpolants, 0 QuantifiedInterpolants, 86965 SizeOfPredicates, 223 NumberOfNonLiveVariables, 13075 ConjunctsInSsa, 7181 ConjunctsInUnsatCore, 224 InterpolantComputations, 2 PerfectInterpolantSequences, 18105/77029 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown