/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/automizer/mcr/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-McrAutomaton-WP.epf -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/send-receive.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.2-wip.dk.mcr-reduction-c7b2d19 [2022-03-15 21:37:57,544 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-03-15 21:37:57,546 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-03-15 21:37:57,588 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-03-15 21:37:57,637 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-03-15 21:37:57,638 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-03-15 21:37:57,638 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-03-15 21:37:57,639 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/mcr/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-McrAutomaton-WP.epf [2022-03-15 21:37:57,665 INFO L113 SettingsManager]: Loading preferences was successful [2022-03-15 21:37:57,665 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-03-15 21:37:57,666 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-03-15 21:37:57,667 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-03-15 21:37:57,667 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-03-15 21:37:57,667 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-03-15 21:37:57,667 INFO L138 SettingsManager]: * Use SBE=true [2022-03-15 21:37:57,668 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-03-15 21:37:57,668 INFO L138 SettingsManager]: * sizeof long=4 [2022-03-15 21:37:57,668 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * sizeof long double=12 [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-03-15 21:37:57,669 INFO L138 SettingsManager]: * Use constant arrays=true [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-03-15 21:37:57,670 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-15 21:37:57,670 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-03-15 21:37:57,670 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=VARIABLE_BASED_MOVER_CHECK [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-03-15 21:37:57,671 INFO L138 SettingsManager]: * Interpolant automaton=MCR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-03-15 21:37:57,900 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-03-15 21:37:57,929 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-03-15 21:37:57,931 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-03-15 21:37:57,932 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2022-03-15 21:37:57,935 INFO L275 PluginConnector]: Boogie PL CUP Parser initialized [2022-03-15 21:37:57,936 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/send-receive.wvr.bpl [2022-03-15 21:37:57,936 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/send-receive.wvr.bpl' [2022-03-15 21:37:57,969 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-03-15 21:37:57,970 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-03-15 21:37:57,971 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-03-15 21:37:57,971 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-03-15 21:37:57,971 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-03-15 21:37:57,981 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:57,988 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:57,994 INFO L137 Inliner]: procedures = 4, calls = 3, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2022-03-15 21:37:57,995 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-03-15 21:37:57,996 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-03-15 21:37:57,997 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-03-15 21:37:57,997 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-03-15 21:37:58,004 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,004 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,005 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,006 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,010 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,012 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,013 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,013 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-03-15 21:37:58,016 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-03-15 21:37:58,016 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-03-15 21:37:58,016 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-03-15 21:37:58,018 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/1) ... [2022-03-15 21:37:58,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-15 21:37:58,037 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:58,050 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-03-15 21:37:58,068 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-03-15 21:37:58,087 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2022-03-15 21:37:58,087 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2022-03-15 21:37:58,087 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2022-03-15 21:37:58,087 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2022-03-15 21:37:58,087 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2022-03-15 21:37:58,087 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2022-03-15 21:37:58,087 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2022-03-15 21:37:58,088 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-03-15 21:37:58,088 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-03-15 21:37:58,088 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread3 given in one single declaration [2022-03-15 21:37:58,088 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2022-03-15 21:37:58,088 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2022-03-15 21:37:58,088 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-03-15 21:37:58,121 INFO L234 CfgBuilder]: Building ICFG [2022-03-15 21:37:58,123 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-03-15 21:37:58,232 INFO L275 CfgBuilder]: Performing block encoding [2022-03-15 21:37:58,245 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-03-15 21:37:58,245 INFO L299 CfgBuilder]: Removed 0 assume(true) statements. [2022-03-15 21:37:58,247 INFO L202 PluginConnector]: Adding new model send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.03 09:37:58 BoogieIcfgContainer [2022-03-15 21:37:58,251 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-03-15 21:37:58,253 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-03-15 21:37:58,254 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-03-15 21:37:58,256 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-03-15 21:37:58,256 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 15.03 09:37:57" (1/2) ... [2022-03-15 21:37:58,257 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2e2c0547 and model type send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 15.03 09:37:58, skipping insertion in model container [2022-03-15 21:37:58,257 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 15.03 09:37:58" (2/2) ... [2022-03-15 21:37:58,262 INFO L111 eAbstractionObserver]: Analyzing ICFG send-receive.wvr.bpl [2022-03-15 21:37:58,267 WARN L150 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-03-15 21:37:58,267 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2022-03-15 21:37:58,267 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-03-15 21:37:58,267 INFO L534 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-03-15 21:37:58,311 INFO L148 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2022-03-15 21:37:58,354 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-03-15 21:37:58,362 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=Craig_NestedInterpolation, mInterpolantAutomaton=MCR, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=FINITE_AUTOMATA, mLazyFiniteAutomaton=false, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=true, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR, mMcrOptimizeForkJoin=true, mMcrOverapproximateWrwc=true [2022-03-15 21:37:58,371 INFO L340 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2022-03-15 21:37:58,383 INFO L126 etLargeBlockEncoding]: Petri net LBE is using variable-based independence relation. [2022-03-15 21:37:58,391 INFO L133 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 37 places, 30 transitions, 84 flow [2022-03-15 21:37:58,394 INFO L110 LiptonReduction]: Starting Lipton reduction on Petri net that has 37 places, 30 transitions, 84 flow [2022-03-15 21:37:58,395 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 37 places, 30 transitions, 84 flow [2022-03-15 21:37:58,426 INFO L129 PetriNetUnfolder]: 3/27 cut-off events. [2022-03-15 21:37:58,426 INFO L130 PetriNetUnfolder]: For 3/3 co-relation queries the response was YES. [2022-03-15 21:37:58,431 INFO L84 FinitePrefix]: Finished finitePrefix Result has 40 conditions, 27 events. 3/27 cut-off events. For 3/3 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 44 event pairs, 0 based on Foata normal form. 0/23 useless extension candidates. Maximal degree in co-relation 22. Up to 2 conditions per place. [2022-03-15 21:37:58,432 INFO L116 LiptonReduction]: Number of co-enabled transitions 168 [2022-03-15 21:37:58,789 INFO L131 LiptonReduction]: Checked pairs total: 381 [2022-03-15 21:37:58,790 INFO L133 LiptonReduction]: Total number of compositions: 11 [2022-03-15 21:37:58,807 INFO L111 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 28 places, 21 transitions, 66 flow [2022-03-15 21:37:58,832 INFO L133 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result has 53 states, 52 states have (on average 2.6923076923076925) internal successors, (140), 52 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:58,834 INFO L276 IsEmpty]: Start isEmpty. Operand has 53 states, 52 states have (on average 2.6923076923076925) internal successors, (140), 52 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:58,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:37:58,838 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:58,839 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:58,841 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:37:58,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:58,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1190905689, now seen corresponding path program 1 times [2022-03-15 21:37:58,860 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:58,862 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214434050] [2022-03-15 21:37:58,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:58,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:58,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:58,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:58,969 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:58,969 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214434050] [2022-03-15 21:37:58,970 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1214434050] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:37:58,970 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:37:58,970 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-03-15 21:37:58,974 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1700131647] [2022-03-15 21:37:58,975 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:58,980 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:58,995 INFO L252 McrAutomatonBuilder]: Finished intersection with 20 states and 28 transitions. [2022-03-15 21:37:58,996 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:59,140 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:37:59,141 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-03-15 21:37:59,141 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:59,161 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-03-15 21:37:59,162 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:37:59,165 INFO L87 Difference]: Start difference. First operand has 53 states, 52 states have (on average 2.6923076923076925) internal successors, (140), 52 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:59,205 INFO L93 Difference]: Finished difference Result 49 states and 112 transitions. [2022-03-15 21:37:59,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-15 21:37:59,208 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:37:59,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:59,214 INFO L225 Difference]: With dead ends: 49 [2022-03-15 21:37:59,215 INFO L226 Difference]: Without dead ends: 35 [2022-03-15 21:37:59,216 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:37:59,222 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 6 mSDsluCounter, 7 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 2 SdHoareTripleChecker+Invalid, 29 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:59,223 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [6 Valid, 2 Invalid, 29 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:37:59,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2022-03-15 21:37:59,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2022-03-15 21:37:59,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35 states, 34 states have (on average 2.1470588235294117) internal successors, (73), 34 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 73 transitions. [2022-03-15 21:37:59,257 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 73 transitions. Word has length 11 [2022-03-15 21:37:59,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:59,257 INFO L470 AbstractCegarLoop]: Abstraction has 35 states and 73 transitions. [2022-03-15 21:37:59,257 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 6.0) internal successors, (18), 2 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,258 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 73 transitions. [2022-03-15 21:37:59,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2022-03-15 21:37:59,258 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:59,258 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:59,259 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-03-15 21:37:59,259 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:37:59,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:59,260 INFO L85 PathProgramCache]: Analyzing trace with hash 718356409, now seen corresponding path program 2 times [2022-03-15 21:37:59,260 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:59,261 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564913863] [2022-03-15 21:37:59,261 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:59,261 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:59,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:59,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:59,292 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:59,293 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564913863] [2022-03-15 21:37:59,293 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564913863] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:37:59,293 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:37:59,293 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-03-15 21:37:59,293 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [874897904] [2022-03-15 21:37:59,293 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:59,294 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:59,296 INFO L252 McrAutomatonBuilder]: Finished intersection with 14 states and 15 transitions. [2022-03-15 21:37:59,296 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:59,313 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:37:59,314 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-15 21:37:59,314 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:59,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-15 21:37:59,314 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-03-15 21:37:59,314 INFO L87 Difference]: Start difference. First operand 35 states and 73 transitions. Second operand has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:59,374 INFO L93 Difference]: Finished difference Result 58 states and 126 transitions. [2022-03-15 21:37:59,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-15 21:37:59,375 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 11 [2022-03-15 21:37:59,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:59,376 INFO L225 Difference]: With dead ends: 58 [2022-03-15 21:37:59,376 INFO L226 Difference]: Without dead ends: 49 [2022-03-15 21:37:59,376 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2022-03-15 21:37:59,377 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 21 mSDsluCounter, 17 mSDsCounter, 0 mSdLazyCounter, 39 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 21 SdHoareTripleChecker+Valid, 3 SdHoareTripleChecker+Invalid, 44 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 39 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:59,378 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [21 Valid, 3 Invalid, 44 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 39 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:37:59,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2022-03-15 21:37:59,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2022-03-15 21:37:59,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 49 states, 48 states have (on average 2.3125) internal successors, (111), 48 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 111 transitions. [2022-03-15 21:37:59,385 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 111 transitions. Word has length 11 [2022-03-15 21:37:59,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:59,385 INFO L470 AbstractCegarLoop]: Abstraction has 49 states and 111 transitions. [2022-03-15 21:37:59,385 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 3.25) internal successors, (13), 3 states have internal predecessors, (13), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,386 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 111 transitions. [2022-03-15 21:37:59,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2022-03-15 21:37:59,386 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:59,387 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:59,387 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-03-15 21:37:59,387 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:37:59,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:59,388 INFO L85 PathProgramCache]: Analyzing trace with hash 62185783, now seen corresponding path program 1 times [2022-03-15 21:37:59,388 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:59,389 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470066907] [2022-03-15 21:37:59,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:59,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:59,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:59,412 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:59,412 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:59,413 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470066907] [2022-03-15 21:37:59,413 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [470066907] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:37:59,413 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:37:59,413 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-03-15 21:37:59,413 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [688139826] [2022-03-15 21:37:59,413 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:59,414 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:59,416 INFO L252 McrAutomatonBuilder]: Finished intersection with 20 states and 25 transitions. [2022-03-15 21:37:59,416 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:37:59,459 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 1 new interpolants: [433#(<= back front)] [2022-03-15 21:37:59,459 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-15 21:37:59,459 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:37:59,460 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-15 21:37:59,460 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-15 21:37:59,460 INFO L87 Difference]: Start difference. First operand 49 states and 111 transitions. Second operand has 4 states, 4 states have (on average 4.25) internal successors, (17), 3 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:37:59,483 INFO L93 Difference]: Finished difference Result 59 states and 134 transitions. [2022-03-15 21:37:59,483 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-15 21:37:59,483 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.25) internal successors, (17), 3 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 13 [2022-03-15 21:37:59,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:37:59,484 INFO L225 Difference]: With dead ends: 59 [2022-03-15 21:37:59,485 INFO L226 Difference]: Without dead ends: 59 [2022-03-15 21:37:59,485 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-15 21:37:59,486 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 7 mSDsluCounter, 11 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 7 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:37:59,487 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [7 Valid, 4 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:37:59,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2022-03-15 21:37:59,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2022-03-15 21:37:59,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59 states, 58 states have (on average 2.310344827586207) internal successors, (134), 58 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 134 transitions. [2022-03-15 21:37:59,494 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 134 transitions. Word has length 13 [2022-03-15 21:37:59,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:37:59,494 INFO L470 AbstractCegarLoop]: Abstraction has 59 states and 134 transitions. [2022-03-15 21:37:59,494 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.25) internal successors, (17), 3 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:37:59,494 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 134 transitions. [2022-03-15 21:37:59,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-03-15 21:37:59,495 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:37:59,495 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:37:59,495 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-03-15 21:37:59,496 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:37:59,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:37:59,496 INFO L85 PathProgramCache]: Analyzing trace with hash -1708376986, now seen corresponding path program 1 times [2022-03-15 21:37:59,497 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:37:59,497 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129606734] [2022-03-15 21:37:59,497 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:59,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:37:59,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:59,565 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:59,566 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:37:59,566 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129606734] [2022-03-15 21:37:59,566 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2129606734] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:37:59,566 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [804707575] [2022-03-15 21:37:59,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:37:59,567 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:37:59,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:37:59,571 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:37:59,600 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2022-03-15 21:37:59,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:37:59,618 INFO L263 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 10 conjunts are in the unsatisfiable core [2022-03-15 21:37:59,622 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:37:59,757 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2022-03-15 21:37:59,777 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:59,778 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:37:59,860 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:37:59,860 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 24 [2022-03-15 21:37:59,980 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:37:59,983 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [804707575] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:37:59,983 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:37:59,983 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5] total 8 [2022-03-15 21:37:59,983 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [248667698] [2022-03-15 21:37:59,984 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:37:59,985 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:37:59,987 INFO L252 McrAutomatonBuilder]: Finished intersection with 27 states and 39 transitions. [2022-03-15 21:37:59,987 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:00,332 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 2 new interpolants: [705#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 704#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:38:00,333 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-03-15 21:38:00,333 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:00,333 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-03-15 21:38:00,334 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2022-03-15 21:38:00,334 INFO L87 Difference]: Start difference. First operand 59 states and 134 transitions. Second operand has 8 states, 8 states have (on average 3.625) internal successors, (29), 7 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:00,490 INFO L93 Difference]: Finished difference Result 94 states and 220 transitions. [2022-03-15 21:38:00,491 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-03-15 21:38:00,492 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 3.625) internal successors, (29), 7 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-03-15 21:38:00,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:00,493 INFO L225 Difference]: With dead ends: 94 [2022-03-15 21:38:00,493 INFO L226 Difference]: Without dead ends: 85 [2022-03-15 21:38:00,493 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2022-03-15 21:38:00,494 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 40 mSDsluCounter, 42 mSDsCounter, 0 mSdLazyCounter, 168 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 40 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 184 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 168 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:00,495 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [40 Valid, 5 Invalid, 184 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 168 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:00,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2022-03-15 21:38:00,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 71. [2022-03-15 21:38:00,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71 states, 70 states have (on average 2.4) internal successors, (168), 70 states have internal predecessors, (168), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 168 transitions. [2022-03-15 21:38:00,502 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 168 transitions. Word has length 15 [2022-03-15 21:38:00,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:00,503 INFO L470 AbstractCegarLoop]: Abstraction has 71 states and 168 transitions. [2022-03-15 21:38:00,503 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 3.625) internal successors, (29), 7 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,503 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 168 transitions. [2022-03-15 21:38:00,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2022-03-15 21:38:00,504 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:00,504 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:00,534 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:00,719 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,2 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:00,720 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:00,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:00,720 INFO L85 PathProgramCache]: Analyzing trace with hash -1180613624, now seen corresponding path program 1 times [2022-03-15 21:38:00,722 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:00,722 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952991186] [2022-03-15 21:38:00,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:00,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:00,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:00,738 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:00,738 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:00,738 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952991186] [2022-03-15 21:38:00,738 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [952991186] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:38:00,738 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-15 21:38:00,739 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-03-15 21:38:00,739 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1825518933] [2022-03-15 21:38:00,739 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:00,740 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:00,743 INFO L252 McrAutomatonBuilder]: Finished intersection with 27 states and 39 transitions. [2022-03-15 21:38:00,743 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:00,796 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:00,796 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-03-15 21:38:00,797 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:00,797 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-03-15 21:38:00,797 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:38:00,797 INFO L87 Difference]: Start difference. First operand 71 states and 168 transitions. Second operand has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:00,818 INFO L93 Difference]: Finished difference Result 67 states and 156 transitions. [2022-03-15 21:38:00,818 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-15 21:38:00,818 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 15 [2022-03-15 21:38:00,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:00,819 INFO L225 Difference]: With dead ends: 67 [2022-03-15 21:38:00,819 INFO L226 Difference]: Without dead ends: 67 [2022-03-15 21:38:00,819 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-15 21:38:00,820 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 5 mSDsluCounter, 10 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:00,820 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [5 Valid, 4 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 30 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:38:00,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2022-03-15 21:38:00,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2022-03-15 21:38:00,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 67 states, 66 states have (on average 2.3636363636363638) internal successors, (156), 66 states have internal predecessors, (156), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 156 transitions. [2022-03-15 21:38:00,828 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 156 transitions. Word has length 15 [2022-03-15 21:38:00,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:00,828 INFO L470 AbstractCegarLoop]: Abstraction has 67 states and 156 transitions. [2022-03-15 21:38:00,828 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 5.666666666666667) internal successors, (17), 2 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:00,828 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 156 transitions. [2022-03-15 21:38:00,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2022-03-15 21:38:00,829 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:00,829 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:00,829 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-03-15 21:38:00,829 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:00,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:00,830 INFO L85 PathProgramCache]: Analyzing trace with hash 896787748, now seen corresponding path program 2 times [2022-03-15 21:38:00,830 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:00,831 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902670922] [2022-03-15 21:38:00,831 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:00,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:00,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:00,881 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:00,882 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:00,882 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902670922] [2022-03-15 21:38:00,882 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [902670922] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:00,882 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [751086171] [2022-03-15 21:38:00,882 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:00,882 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:00,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:00,884 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:00,885 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2022-03-15 21:38:00,917 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:00,917 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:00,918 INFO L263 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 4 conjunts are in the unsatisfiable core [2022-03-15 21:38:00,918 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:00,953 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:00,954 INFO L324 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2022-03-15 21:38:00,954 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [751086171] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-15 21:38:00,954 INFO L191 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2022-03-15 21:38:00,954 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [4] total 4 [2022-03-15 21:38:00,955 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1567270884] [2022-03-15 21:38:00,955 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:00,957 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:00,961 INFO L252 McrAutomatonBuilder]: Finished intersection with 31 states and 45 transitions. [2022-03-15 21:38:00,961 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:01,082 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:01,083 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-15 21:38:01,083 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:01,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-15 21:38:01,084 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-03-15 21:38:01,084 INFO L87 Difference]: Start difference. First operand 67 states and 156 transitions. Second operand has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:01,119 INFO L93 Difference]: Finished difference Result 165 states and 376 transitions. [2022-03-15 21:38:01,119 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-15 21:38:01,119 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 17 [2022-03-15 21:38:01,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:01,121 INFO L225 Difference]: With dead ends: 165 [2022-03-15 21:38:01,122 INFO L226 Difference]: Without dead ends: 163 [2022-03-15 21:38:01,122 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2022-03-15 21:38:01,123 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 27 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 27 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 43 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:01,124 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [27 Valid, 6 Invalid, 43 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:38:01,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2022-03-15 21:38:01,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 129. [2022-03-15 21:38:01,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 129 states, 128 states have (on average 2.5546875) internal successors, (327), 128 states have internal predecessors, (327), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 327 transitions. [2022-03-15 21:38:01,144 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 327 transitions. Word has length 17 [2022-03-15 21:38:01,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:01,144 INFO L470 AbstractCegarLoop]: Abstraction has 129 states and 327 transitions. [2022-03-15 21:38:01,144 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 4.75) internal successors, (19), 3 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,144 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 327 transitions. [2022-03-15 21:38:01,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-03-15 21:38:01,149 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:01,149 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:01,173 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2022-03-15 21:38:01,370 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable5 [2022-03-15 21:38:01,371 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:01,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:01,371 INFO L85 PathProgramCache]: Analyzing trace with hash -2009143007, now seen corresponding path program 3 times [2022-03-15 21:38:01,372 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:01,372 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243722987] [2022-03-15 21:38:01,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:01,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:01,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:01,391 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:38:01,392 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:01,392 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243722987] [2022-03-15 21:38:01,392 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1243722987] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:01,392 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1925251902] [2022-03-15 21:38:01,392 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:38:01,392 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:01,393 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:01,394 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:01,422 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2022-03-15 21:38:01,434 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2022-03-15 21:38:01,434 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:01,435 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 3 conjunts are in the unsatisfiable core [2022-03-15 21:38:01,435 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:01,459 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:38:01,459 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:01,494 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:38:01,495 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1925251902] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:01,495 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:01,495 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 3 [2022-03-15 21:38:01,495 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1985150829] [2022-03-15 21:38:01,495 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:01,498 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:01,505 INFO L252 McrAutomatonBuilder]: Finished intersection with 43 states and 71 transitions. [2022-03-15 21:38:01,506 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:01,628 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:01,629 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-15 21:38:01,629 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:01,629 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-15 21:38:01,630 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-03-15 21:38:01,630 INFO L87 Difference]: Start difference. First operand 129 states and 327 transitions. Second operand has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:01,659 INFO L93 Difference]: Finished difference Result 148 states and 333 transitions. [2022-03-15 21:38:01,659 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-15 21:38:01,659 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-03-15 21:38:01,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:01,660 INFO L225 Difference]: With dead ends: 148 [2022-03-15 21:38:01,660 INFO L226 Difference]: Without dead ends: 148 [2022-03-15 21:38:01,661 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-03-15 21:38:01,661 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 16 mSDsluCounter, 22 mSDsCounter, 0 mSdLazyCounter, 46 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 46 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:01,662 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [16 Valid, 8 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 46 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-03-15 21:38:01,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2022-03-15 21:38:01,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 137. [2022-03-15 21:38:01,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 137 states, 136 states have (on average 2.3529411764705883) internal successors, (320), 136 states have internal predecessors, (320), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 320 transitions. [2022-03-15 21:38:01,669 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 320 transitions. Word has length 19 [2022-03-15 21:38:01,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:01,669 INFO L470 AbstractCegarLoop]: Abstraction has 137 states and 320 transitions. [2022-03-15 21:38:01,669 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.25) internal successors, (25), 4 states have internal predecessors, (25), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:01,669 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 320 transitions. [2022-03-15 21:38:01,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-03-15 21:38:01,670 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:01,670 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:01,696 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:01,895 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6,4 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:01,895 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:01,895 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:01,895 INFO L85 PathProgramCache]: Analyzing trace with hash -234564547, now seen corresponding path program 1 times [2022-03-15 21:38:01,896 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:01,896 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [378854411] [2022-03-15 21:38:01,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:01,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:01,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:02,014 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:02,015 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:02,015 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [378854411] [2022-03-15 21:38:02,015 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [378854411] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:02,015 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2015264557] [2022-03-15 21:38:02,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:02,015 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:02,015 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:02,016 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:02,018 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2022-03-15 21:38:02,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:02,049 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 18 conjunts are in the unsatisfiable core [2022-03-15 21:38:02,051 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:02,200 INFO L353 Elim1Store]: treesize reduction 9, result has 10.0 percent of original size [2022-03-15 21:38:02,200 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 19 [2022-03-15 21:38:02,215 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:02,215 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:02,357 INFO L353 Elim1Store]: treesize reduction 24, result has 60.7 percent of original size [2022-03-15 21:38:02,357 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 58 [2022-03-15 21:38:02,492 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:02,492 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2015264557] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:02,492 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:02,492 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 13 [2022-03-15 21:38:02,493 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [493545436] [2022-03-15 21:38:02,493 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:02,494 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:02,499 INFO L252 McrAutomatonBuilder]: Finished intersection with 39 states and 61 transitions. [2022-03-15 21:38:02,499 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:03,134 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 3 new interpolants: [2287#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 2286#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 2288#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:38:03,135 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2022-03-15 21:38:03,135 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:03,135 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2022-03-15 21:38:03,135 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2022-03-15 21:38:03,135 INFO L87 Difference]: Start difference. First operand 137 states and 320 transitions. Second operand has 11 states, 11 states have (on average 3.5454545454545454) internal successors, (39), 10 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:03,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:03,338 INFO L93 Difference]: Finished difference Result 178 states and 417 transitions. [2022-03-15 21:38:03,338 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-03-15 21:38:03,338 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 3.5454545454545454) internal successors, (39), 10 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-03-15 21:38:03,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:03,339 INFO L225 Difference]: With dead ends: 178 [2022-03-15 21:38:03,339 INFO L226 Difference]: Without dead ends: 169 [2022-03-15 21:38:03,340 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 41 SyntacticMatches, 6 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:38:03,340 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 61 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 244 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 244 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:03,341 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [61 Valid, 7 Invalid, 263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 244 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:03,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2022-03-15 21:38:03,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 153. [2022-03-15 21:38:03,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 153 states, 152 states have (on average 2.3684210526315788) internal successors, (360), 152 states have internal predecessors, (360), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:03,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 360 transitions. [2022-03-15 21:38:03,345 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 360 transitions. Word has length 19 [2022-03-15 21:38:03,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:03,345 INFO L470 AbstractCegarLoop]: Abstraction has 153 states and 360 transitions. [2022-03-15 21:38:03,345 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 3.5454545454545454) internal successors, (39), 10 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:03,345 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 360 transitions. [2022-03-15 21:38:03,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2022-03-15 21:38:03,346 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:03,346 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:03,371 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:03,546 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,5 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:03,547 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:03,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:03,547 INFO L85 PathProgramCache]: Analyzing trace with hash 615329873, now seen corresponding path program 2 times [2022-03-15 21:38:03,548 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:03,548 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570800902] [2022-03-15 21:38:03,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:03,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:03,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:03,682 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:03,682 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:03,682 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1570800902] [2022-03-15 21:38:03,682 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1570800902] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:03,683 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [245691324] [2022-03-15 21:38:03,683 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:03,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:03,683 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:03,684 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:03,707 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2022-03-15 21:38:03,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:03,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:03,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 62 conjuncts, 18 conjunts are in the unsatisfiable core [2022-03-15 21:38:03,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:03,877 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:03,879 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:03,882 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 19 [2022-03-15 21:38:03,900 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:03,900 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:04,024 INFO L353 Elim1Store]: treesize reduction 24, result has 60.7 percent of original size [2022-03-15 21:38:04,025 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 40 treesize of output 58 [2022-03-15 21:38:04,172 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:04,176 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [245691324] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:04,177 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:04,177 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 14 [2022-03-15 21:38:04,177 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [502338831] [2022-03-15 21:38:04,177 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:04,179 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:04,184 INFO L252 McrAutomatonBuilder]: Finished intersection with 43 states and 71 transitions. [2022-03-15 21:38:04,184 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:05,024 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 5 new interpolants: [2909#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 2911#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 2910#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 2912#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 2908#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:38:05,024 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 13 states [2022-03-15 21:38:05,024 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:05,025 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2022-03-15 21:38:05,025 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=301, Unknown=0, NotChecked=0, Total=380 [2022-03-15 21:38:05,025 INFO L87 Difference]: Start difference. First operand 153 states and 360 transitions. Second operand has 13 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:05,255 INFO L93 Difference]: Finished difference Result 211 states and 501 transitions. [2022-03-15 21:38:05,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-03-15 21:38:05,255 INFO L78 Accepts]: Start accepts. Automaton has has 13 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 19 [2022-03-15 21:38:05,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:05,256 INFO L225 Difference]: With dead ends: 211 [2022-03-15 21:38:05,257 INFO L226 Difference]: Without dead ends: 201 [2022-03-15 21:38:05,257 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 43 SyntacticMatches, 5 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=520, Unknown=0, NotChecked=0, Total=650 [2022-03-15 21:38:05,258 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 62 mSDsluCounter, 71 mSDsCounter, 0 mSdLazyCounter, 227 mSolverCounterSat, 21 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 62 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 248 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 21 IncrementalHoareTripleChecker+Valid, 227 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:05,259 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [62 Valid, 6 Invalid, 248 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [21 Valid, 227 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:05,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2022-03-15 21:38:05,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 169. [2022-03-15 21:38:05,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 169 states, 168 states have (on average 2.357142857142857) internal successors, (396), 168 states have internal predecessors, (396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 396 transitions. [2022-03-15 21:38:05,265 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 396 transitions. Word has length 19 [2022-03-15 21:38:05,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:05,265 INFO L470 AbstractCegarLoop]: Abstraction has 169 states and 396 transitions. [2022-03-15 21:38:05,266 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 13 states, 13 states have (on average 3.4615384615384617) internal successors, (45), 12 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,266 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 396 transitions. [2022-03-15 21:38:05,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2022-03-15 21:38:05,266 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:05,266 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:05,295 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:05,483 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,6 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:05,484 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:05,484 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:05,484 INFO L85 PathProgramCache]: Analyzing trace with hash -108666053, now seen corresponding path program 3 times [2022-03-15 21:38:05,485 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:05,485 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476669602] [2022-03-15 21:38:05,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:05,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:05,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:05,520 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 9 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:05,520 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:05,520 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476669602] [2022-03-15 21:38:05,520 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1476669602] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:05,521 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [797807749] [2022-03-15 21:38:05,521 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:38:05,521 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:05,521 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:05,522 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:05,550 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2022-03-15 21:38:05,558 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2022-03-15 21:38:05,558 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:05,559 INFO L263 TraceCheckSpWp]: Trace formula consists of 68 conjuncts, 6 conjunts are in the unsatisfiable core [2022-03-15 21:38:05,559 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:05,590 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:05,590 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:05,642 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:05,642 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [797807749] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:05,643 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:05,643 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 5 [2022-03-15 21:38:05,643 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1289079288] [2022-03-15 21:38:05,643 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:05,645 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:05,649 INFO L252 McrAutomatonBuilder]: Finished intersection with 43 states and 67 transitions. [2022-03-15 21:38:05,650 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:05,804 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:05,805 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-03-15 21:38:05,805 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:05,805 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-03-15 21:38:05,805 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-03-15 21:38:05,805 INFO L87 Difference]: Start difference. First operand 169 states and 396 transitions. Second operand has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 5 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:05,875 INFO L93 Difference]: Finished difference Result 322 states and 725 transitions. [2022-03-15 21:38:05,875 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-03-15 21:38:05,876 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 5 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 21 [2022-03-15 21:38:05,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:05,878 INFO L225 Difference]: With dead ends: 322 [2022-03-15 21:38:05,879 INFO L226 Difference]: Without dead ends: 320 [2022-03-15 21:38:05,879 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 57 SyntacticMatches, 6 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2022-03-15 21:38:05,879 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 37 mSDsluCounter, 49 mSDsCounter, 0 mSdLazyCounter, 70 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 37 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 77 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 70 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:05,880 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [37 Valid, 10 Invalid, 77 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 70 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:05,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320 states. [2022-03-15 21:38:05,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320 to 209. [2022-03-15 21:38:05,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209 states, 208 states have (on average 2.423076923076923) internal successors, (504), 208 states have internal predecessors, (504), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 504 transitions. [2022-03-15 21:38:05,887 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 504 transitions. Word has length 21 [2022-03-15 21:38:05,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:05,888 INFO L470 AbstractCegarLoop]: Abstraction has 209 states and 504 transitions. [2022-03-15 21:38:05,888 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 4.333333333333333) internal successors, (26), 5 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:05,888 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 504 transitions. [2022-03-15 21:38:05,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:38:05,889 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:05,889 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:05,914 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:06,103 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,7 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:06,104 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:06,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:06,104 INFO L85 PathProgramCache]: Analyzing trace with hash 977303228, now seen corresponding path program 4 times [2022-03-15 21:38:06,105 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:06,105 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [719868980] [2022-03-15 21:38:06,105 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:06,105 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:06,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:06,291 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:06,291 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:06,291 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [719868980] [2022-03-15 21:38:06,292 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [719868980] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:06,292 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [575766552] [2022-03-15 21:38:06,292 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:38:06,292 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:06,292 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:06,293 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:06,294 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2022-03-15 21:38:06,321 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:38:06,322 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:06,322 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 26 conjunts are in the unsatisfiable core [2022-03-15 21:38:06,323 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:06,559 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:06,560 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:06,561 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:06,561 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:06,562 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:06,563 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 24 [2022-03-15 21:38:06,576 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:06,577 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:06,844 INFO L353 Elim1Store]: treesize reduction 76, result has 52.8 percent of original size [2022-03-15 21:38:06,844 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 58 treesize of output 112 [2022-03-15 21:38:07,118 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:07,118 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [575766552] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:07,119 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:07,119 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2022-03-15 21:38:07,119 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1826211938] [2022-03-15 21:38:07,119 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:07,121 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:07,128 INFO L252 McrAutomatonBuilder]: Finished intersection with 59 states and 103 transitions. [2022-03-15 21:38:07,128 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:08,704 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [4495#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 4492#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 4497#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 4496#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 4493#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 4494#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)))] [2022-03-15 21:38:08,705 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-03-15 21:38:08,705 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:08,705 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-03-15 21:38:08,705 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=530, Unknown=0, NotChecked=0, Total=650 [2022-03-15 21:38:08,706 INFO L87 Difference]: Start difference. First operand 209 states and 504 transitions. Second operand has 16 states, 16 states have (on average 3.5625) internal successors, (57), 15 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:08,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:08,967 INFO L93 Difference]: Finished difference Result 376 states and 905 transitions. [2022-03-15 21:38:08,968 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-03-15 21:38:08,968 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 3.5625) internal successors, (57), 15 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:38:08,968 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:08,969 INFO L225 Difference]: With dead ends: 376 [2022-03-15 21:38:08,969 INFO L226 Difference]: Without dead ends: 345 [2022-03-15 21:38:08,970 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 50 SyntacticMatches, 14 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 419 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=194, Invalid=862, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:38:08,970 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 86 mSDsluCounter, 72 mSDsCounter, 0 mSdLazyCounter, 266 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 314 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:08,971 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [86 Valid, 5 Invalid, 314 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 266 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:08,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2022-03-15 21:38:08,976 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 273. [2022-03-15 21:38:08,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 273 states, 272 states have (on average 2.411764705882353) internal successors, (656), 272 states have internal predecessors, (656), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:08,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 656 transitions. [2022-03-15 21:38:08,977 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 656 transitions. Word has length 23 [2022-03-15 21:38:08,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:08,977 INFO L470 AbstractCegarLoop]: Abstraction has 273 states and 656 transitions. [2022-03-15 21:38:08,978 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 3.5625) internal successors, (57), 15 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:08,978 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 656 transitions. [2022-03-15 21:38:08,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:38:08,978 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:08,978 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:09,006 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:09,203 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,8 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:09,204 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:09,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:09,204 INFO L85 PathProgramCache]: Analyzing trace with hash 124783032, now seen corresponding path program 5 times [2022-03-15 21:38:09,205 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:09,205 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618937504] [2022-03-15 21:38:09,205 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:09,205 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:09,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:09,344 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:09,345 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:09,345 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618937504] [2022-03-15 21:38:09,345 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1618937504] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:09,345 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [608251049] [2022-03-15 21:38:09,345 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:38:09,345 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:09,345 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:09,346 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:09,380 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2022-03-15 21:38:09,386 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-03-15 21:38:09,386 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:09,387 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 26 conjunts are in the unsatisfiable core [2022-03-15 21:38:09,388 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:09,611 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:09,612 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:09,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:09,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:09,614 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 24 [2022-03-15 21:38:09,638 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:09,639 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:09,872 INFO L353 Elim1Store]: treesize reduction 76, result has 52.8 percent of original size [2022-03-15 21:38:09,872 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 58 treesize of output 112 [2022-03-15 21:38:10,064 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:10,065 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [608251049] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:10,065 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:10,065 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 19 [2022-03-15 21:38:10,065 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1088312097] [2022-03-15 21:38:10,065 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:10,067 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:10,073 INFO L252 McrAutomatonBuilder]: Finished intersection with 55 states and 93 transitions. [2022-03-15 21:38:10,073 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:11,249 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 5 new interpolants: [5586#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 5589#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 5587#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 5588#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 5590#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:38:11,250 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-03-15 21:38:11,250 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:11,250 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-03-15 21:38:11,250 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=505, Unknown=0, NotChecked=0, Total=600 [2022-03-15 21:38:11,250 INFO L87 Difference]: Start difference. First operand 273 states and 656 transitions. Second operand has 15 states, 15 states have (on average 3.533333333333333) internal successors, (53), 14 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:11,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:11,590 INFO L93 Difference]: Finished difference Result 473 states and 1164 transitions. [2022-03-15 21:38:11,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:11,591 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 3.533333333333333) internal successors, (53), 14 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:38:11,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:11,593 INFO L225 Difference]: With dead ends: 473 [2022-03-15 21:38:11,593 INFO L226 Difference]: Without dead ends: 457 [2022-03-15 21:38:11,593 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 50 SyntacticMatches, 11 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=164, Invalid=892, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:38:11,594 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 83 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 410 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 83 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 442 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 410 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:11,594 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [83 Valid, 8 Invalid, 442 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 410 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:11,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 457 states. [2022-03-15 21:38:11,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 457 to 289. [2022-03-15 21:38:11,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 289 states, 288 states have (on average 2.4166666666666665) internal successors, (696), 288 states have internal predecessors, (696), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:11,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 696 transitions. [2022-03-15 21:38:11,601 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 696 transitions. Word has length 23 [2022-03-15 21:38:11,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:11,601 INFO L470 AbstractCegarLoop]: Abstraction has 289 states and 696 transitions. [2022-03-15 21:38:11,601 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 3.533333333333333) internal successors, (53), 14 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:11,601 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 696 transitions. [2022-03-15 21:38:11,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:38:11,602 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:11,602 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:11,626 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2022-03-15 21:38:11,815 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 9 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable11 [2022-03-15 21:38:11,816 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:11,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:11,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1191628212, now seen corresponding path program 6 times [2022-03-15 21:38:11,817 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:11,817 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812729222] [2022-03-15 21:38:11,817 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:11,817 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:11,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:11,958 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:11,958 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:11,958 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812729222] [2022-03-15 21:38:11,958 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1812729222] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:11,958 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [980142301] [2022-03-15 21:38:11,958 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:38:11,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:11,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:11,959 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:11,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2022-03-15 21:38:11,988 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-03-15 21:38:11,988 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:11,989 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 26 conjunts are in the unsatisfiable core [2022-03-15 21:38:11,989 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:12,156 INFO L353 Elim1Store]: treesize reduction 32, result has 3.0 percent of original size [2022-03-15 21:38:12,157 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 54 treesize of output 24 [2022-03-15 21:38:12,169 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:12,169 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:12,371 INFO L353 Elim1Store]: treesize reduction 76, result has 52.8 percent of original size [2022-03-15 21:38:12,371 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 58 treesize of output 112 [2022-03-15 21:38:12,556 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:12,556 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [980142301] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:12,556 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:12,556 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 18 [2022-03-15 21:38:12,557 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1821296756] [2022-03-15 21:38:12,557 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:12,558 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:12,564 INFO L252 McrAutomatonBuilder]: Finished intersection with 51 states and 83 transitions. [2022-03-15 21:38:12,564 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:13,486 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 4 new interpolants: [6811#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 6810#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 6809#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 6812#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:38:13,487 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 14 states [2022-03-15 21:38:13,487 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:13,487 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2022-03-15 21:38:13,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=424, Unknown=0, NotChecked=0, Total=506 [2022-03-15 21:38:13,487 INFO L87 Difference]: Start difference. First operand 289 states and 696 transitions. Second operand has 14 states, 14 states have (on average 3.5) internal successors, (49), 13 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:13,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:13,752 INFO L93 Difference]: Finished difference Result 410 states and 993 transitions. [2022-03-15 21:38:13,752 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:13,752 INFO L78 Accepts]: Start accepts. Automaton has has 14 states, 14 states have (on average 3.5) internal successors, (49), 13 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:38:13,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:13,754 INFO L225 Difference]: With dead ends: 410 [2022-03-15 21:38:13,754 INFO L226 Difference]: Without dead ends: 401 [2022-03-15 21:38:13,755 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 46 SyntacticMatches, 13 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 255 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=149, Invalid=781, Unknown=0, NotChecked=0, Total=930 [2022-03-15 21:38:13,755 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 84 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 307 mSolverCounterSat, 23 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 23 IncrementalHoareTripleChecker+Valid, 307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:13,755 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [84 Valid, 6 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [23 Valid, 307 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:13,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2022-03-15 21:38:13,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 305. [2022-03-15 21:38:13,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 305 states, 304 states have (on average 2.4210526315789473) internal successors, (736), 304 states have internal predecessors, (736), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:13,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 736 transitions. [2022-03-15 21:38:13,763 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 736 transitions. Word has length 23 [2022-03-15 21:38:13,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:13,763 INFO L470 AbstractCegarLoop]: Abstraction has 305 states and 736 transitions. [2022-03-15 21:38:13,763 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 14 states, 14 states have (on average 3.5) internal successors, (49), 13 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:13,763 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 736 transitions. [2022-03-15 21:38:13,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:38:13,764 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:13,764 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:13,785 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:13,979 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 10 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable12 [2022-03-15 21:38:13,979 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:13,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:13,980 INFO L85 PathProgramCache]: Analyzing trace with hash 1283936648, now seen corresponding path program 7 times [2022-03-15 21:38:13,981 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:13,981 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914721089] [2022-03-15 21:38:13,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:13,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:13,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:14,113 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:14,113 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:14,113 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914721089] [2022-03-15 21:38:14,113 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914721089] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:14,113 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [616455751] [2022-03-15 21:38:14,113 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:38:14,113 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:14,114 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:14,114 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:14,115 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2022-03-15 21:38:14,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:14,137 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 26 conjunts are in the unsatisfiable core [2022-03-15 21:38:14,138 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:14,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,398 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:14,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:14,399 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:14,400 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 24 [2022-03-15 21:38:14,412 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:14,413 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:14,626 INFO L353 Elim1Store]: treesize reduction 76, result has 52.8 percent of original size [2022-03-15 21:38:14,627 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 58 treesize of output 112 [2022-03-15 21:38:14,848 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:14,848 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [616455751] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:14,848 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:14,848 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 20 [2022-03-15 21:38:14,849 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [657794778] [2022-03-15 21:38:14,849 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:14,850 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:14,855 INFO L252 McrAutomatonBuilder]: Finished intersection with 59 states and 103 transitions. [2022-03-15 21:38:14,855 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:16,216 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [8008#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 8005#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 8004#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 8003#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 8007#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 8002#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 8006#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front)))] [2022-03-15 21:38:16,216 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-03-15 21:38:16,216 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:16,216 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-03-15 21:38:16,217 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=125, Invalid=631, Unknown=0, NotChecked=0, Total=756 [2022-03-15 21:38:16,217 INFO L87 Difference]: Start difference. First operand 305 states and 736 transitions. Second operand has 17 states, 17 states have (on average 3.5294117647058822) internal successors, (60), 16 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:16,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:16,473 INFO L93 Difference]: Finished difference Result 502 states and 1218 transitions. [2022-03-15 21:38:16,474 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2022-03-15 21:38:16,474 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.5294117647058822) internal successors, (60), 16 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:38:16,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:16,476 INFO L225 Difference]: With dead ends: 502 [2022-03-15 21:38:16,476 INFO L226 Difference]: Without dead ends: 473 [2022-03-15 21:38:16,477 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 52 SyntacticMatches, 10 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 425 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=197, Invalid=993, Unknown=0, NotChecked=0, Total=1190 [2022-03-15 21:38:16,477 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 100 mSDsluCounter, 65 mSDsCounter, 0 mSdLazyCounter, 264 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 100 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 311 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 264 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:16,477 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [100 Valid, 5 Invalid, 311 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 264 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:16,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 473 states. [2022-03-15 21:38:16,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 473 to 329. [2022-03-15 21:38:16,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 329 states, 328 states have (on average 2.4146341463414633) internal successors, (792), 328 states have internal predecessors, (792), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:16,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 792 transitions. [2022-03-15 21:38:16,486 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 792 transitions. Word has length 23 [2022-03-15 21:38:16,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:16,486 INFO L470 AbstractCegarLoop]: Abstraction has 329 states and 792 transitions. [2022-03-15 21:38:16,487 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 3.5294117647058822) internal successors, (60), 16 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:16,487 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 792 transitions. [2022-03-15 21:38:16,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2022-03-15 21:38:16,488 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:16,488 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:16,511 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:16,705 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable13 [2022-03-15 21:38:16,706 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:16,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:16,706 INFO L85 PathProgramCache]: Analyzing trace with hash 431416452, now seen corresponding path program 8 times [2022-03-15 21:38:16,707 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:16,707 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1970794653] [2022-03-15 21:38:16,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:16,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:16,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:16,865 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 3 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:16,865 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:16,865 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1970794653] [2022-03-15 21:38:16,865 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1970794653] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:16,865 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1494077426] [2022-03-15 21:38:16,865 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:16,865 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:16,865 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:16,866 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:16,867 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2022-03-15 21:38:16,888 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:16,888 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:16,889 INFO L263 TraceCheckSpWp]: Trace formula consists of 75 conjuncts, 26 conjunts are in the unsatisfiable core [2022-03-15 21:38:16,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:17,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,142 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,142 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,143 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:17,144 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,145 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:17,145 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:17,145 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 3 disjoint index pairs (out of 10 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 24 [2022-03-15 21:38:17,158 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:17,158 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:17,412 INFO L353 Elim1Store]: treesize reduction 76, result has 52.8 percent of original size [2022-03-15 21:38:17,413 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 58 treesize of output 112 [2022-03-15 21:38:17,650 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:17,651 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1494077426] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:17,651 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:17,651 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9] total 20 [2022-03-15 21:38:17,651 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1313534649] [2022-03-15 21:38:17,651 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:17,653 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:17,659 INFO L252 McrAutomatonBuilder]: Finished intersection with 55 states and 93 transitions. [2022-03-15 21:38:17,659 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:18,768 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [9340#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 9337#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 9336#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 9339#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 9341#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 9338#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:38:18,769 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-03-15 21:38:18,769 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:18,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-03-15 21:38:18,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=595, Unknown=0, NotChecked=0, Total=702 [2022-03-15 21:38:18,769 INFO L87 Difference]: Start difference. First operand 329 states and 792 transitions. Second operand has 16 states, 16 states have (on average 3.5) internal successors, (56), 15 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:19,061 INFO L93 Difference]: Finished difference Result 561 states and 1380 transitions. [2022-03-15 21:38:19,061 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:19,061 INFO L78 Accepts]: Start accepts. Automaton has has 16 states, 16 states have (on average 3.5) internal successors, (56), 15 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 23 [2022-03-15 21:38:19,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:19,064 INFO L225 Difference]: With dead ends: 561 [2022-03-15 21:38:19,064 INFO L226 Difference]: Without dead ends: 545 [2022-03-15 21:38:19,064 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 52 SyntacticMatches, 7 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=178, Invalid=1012, Unknown=0, NotChecked=0, Total=1190 [2022-03-15 21:38:19,065 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 96 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 343 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 96 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 374 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 343 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:19,065 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [96 Valid, 6 Invalid, 374 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 343 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:19,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2022-03-15 21:38:19,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 289. [2022-03-15 21:38:19,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 289 states, 288 states have (on average 2.4166666666666665) internal successors, (696), 288 states have internal predecessors, (696), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 696 transitions. [2022-03-15 21:38:19,074 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 696 transitions. Word has length 23 [2022-03-15 21:38:19,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:19,074 INFO L470 AbstractCegarLoop]: Abstraction has 289 states and 696 transitions. [2022-03-15 21:38:19,074 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 16 states have (on average 3.5) internal successors, (56), 15 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,074 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 696 transitions. [2022-03-15 21:38:19,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2022-03-15 21:38:19,075 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:19,075 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:19,092 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:19,283 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable14 [2022-03-15 21:38:19,284 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:19,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:19,284 INFO L85 PathProgramCache]: Analyzing trace with hash 368007922, now seen corresponding path program 9 times [2022-03-15 21:38:19,285 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:19,285 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490140461] [2022-03-15 21:38:19,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:19,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:19,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:19,336 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:19,337 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:19,337 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [490140461] [2022-03-15 21:38:19,337 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [490140461] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:19,337 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1716123322] [2022-03-15 21:38:19,337 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:38:19,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:19,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:19,338 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:19,368 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2022-03-15 21:38:19,378 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-03-15 21:38:19,378 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:19,379 INFO L263 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 8 conjunts are in the unsatisfiable core [2022-03-15 21:38:19,380 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:19,425 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:19,425 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:19,472 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 16 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:19,473 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1716123322] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:19,473 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:19,473 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5] total 6 [2022-03-15 21:38:19,473 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [856868856] [2022-03-15 21:38:19,473 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:19,474 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:19,481 INFO L252 McrAutomatonBuilder]: Finished intersection with 55 states and 89 transitions. [2022-03-15 21:38:19,481 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:19,646 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:19,646 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2022-03-15 21:38:19,646 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:19,647 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2022-03-15 21:38:19,647 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-03-15 21:38:19,647 INFO L87 Difference]: Start difference. First operand 289 states and 696 transitions. Second operand has 7 states, 7 states have (on average 4.428571428571429) internal successors, (31), 6 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:19,707 INFO L93 Difference]: Finished difference Result 509 states and 1180 transitions. [2022-03-15 21:38:19,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-03-15 21:38:19,708 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 4.428571428571429) internal successors, (31), 6 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 25 [2022-03-15 21:38:19,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:19,710 INFO L225 Difference]: With dead ends: 509 [2022-03-15 21:38:19,710 INFO L226 Difference]: Without dead ends: 507 [2022-03-15 21:38:19,710 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 74 SyntacticMatches, 6 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2022-03-15 21:38:19,711 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 53 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 82 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 53 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 82 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:19,711 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [53 Valid, 12 Invalid, 91 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 82 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:19,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 507 states. [2022-03-15 21:38:19,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 507 to 337. [2022-03-15 21:38:19,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 337 states, 336 states have (on average 2.4523809523809526) internal successors, (824), 336 states have internal predecessors, (824), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 824 transitions. [2022-03-15 21:38:19,735 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 824 transitions. Word has length 25 [2022-03-15 21:38:19,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:19,735 INFO L470 AbstractCegarLoop]: Abstraction has 337 states and 824 transitions. [2022-03-15 21:38:19,735 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 4.428571428571429) internal successors, (31), 6 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:19,735 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 824 transitions. [2022-03-15 21:38:19,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:19,736 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:19,736 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:19,761 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:19,956 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2022-03-15 21:38:19,956 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:19,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:19,957 INFO L85 PathProgramCache]: Analyzing trace with hash -791654489, now seen corresponding path program 10 times [2022-03-15 21:38:19,957 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:19,957 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [190459692] [2022-03-15 21:38:19,957 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:19,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:19,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:20,140 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:20,140 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:20,141 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [190459692] [2022-03-15 21:38:20,141 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [190459692] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:20,141 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1414325902] [2022-03-15 21:38:20,141 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:38:20,141 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:20,141 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:20,142 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:20,167 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2022-03-15 21:38:20,179 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:38:20,179 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:20,180 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:20,181 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:20,523 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,524 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,525 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,525 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:20,526 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,527 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,527 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,528 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,529 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:20,529 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:20,530 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 6 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:20,543 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 7 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:20,544 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:20,925 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:20,926 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:21,412 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:21,412 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1414325902] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:21,412 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:21,412 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 24 [2022-03-15 21:38:21,413 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1914790996] [2022-03-15 21:38:21,414 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:21,416 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:21,425 INFO L252 McrAutomatonBuilder]: Finished intersection with 75 states and 135 transitions. [2022-03-15 21:38:21,426 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:23,262 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [12014#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ front 1) back)) (or (not v_assert) (<= 1 sum))), 12016#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 12015#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 12017#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 12019#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 12013#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 12012#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 12018#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:38:23,262 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:38:23,262 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:23,262 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:38:23,263 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=889, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:38:23,263 INFO L87 Difference]: Start difference. First operand 337 states and 824 transitions. Second operand has 19 states, 19 states have (on average 3.5789473684210527) internal successors, (68), 18 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:23,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:23,592 INFO L93 Difference]: Finished difference Result 547 states and 1341 transitions. [2022-03-15 21:38:23,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:23,593 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.5789473684210527) internal successors, (68), 18 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:23,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:23,595 INFO L225 Difference]: With dead ends: 547 [2022-03-15 21:38:23,595 INFO L226 Difference]: Without dead ends: 537 [2022-03-15 21:38:23,596 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 62 SyntacticMatches, 17 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=258, Invalid=1382, Unknown=0, NotChecked=0, Total=1640 [2022-03-15 21:38:23,596 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 94 mSDsluCounter, 88 mSDsCounter, 0 mSdLazyCounter, 292 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 94 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 334 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 292 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:23,597 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [94 Valid, 8 Invalid, 334 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 292 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:23,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 537 states. [2022-03-15 21:38:23,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 537 to 401. [2022-03-15 21:38:23,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 401 states, 400 states have (on average 2.44) internal successors, (976), 400 states have internal predecessors, (976), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:23,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 976 transitions. [2022-03-15 21:38:23,609 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 976 transitions. Word has length 27 [2022-03-15 21:38:23,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:23,609 INFO L470 AbstractCegarLoop]: Abstraction has 401 states and 976 transitions. [2022-03-15 21:38:23,609 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.5789473684210527) internal successors, (68), 18 states have internal predecessors, (68), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:23,609 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 976 transitions. [2022-03-15 21:38:23,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:23,611 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:23,611 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:23,630 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:23,823 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 14 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable16 [2022-03-15 21:38:23,823 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:23,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:23,824 INFO L85 PathProgramCache]: Analyzing trace with hash 1895144911, now seen corresponding path program 11 times [2022-03-15 21:38:23,824 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:23,824 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626928630] [2022-03-15 21:38:23,825 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:23,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:23,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:24,026 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:24,026 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:24,026 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626928630] [2022-03-15 21:38:24,026 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1626928630] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:24,026 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1134259677] [2022-03-15 21:38:24,026 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:38:24,026 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:24,026 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:24,027 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:24,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2022-03-15 21:38:24,057 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-03-15 21:38:24,057 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:24,058 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:24,059 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:24,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,431 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,432 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:24,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:24,437 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:24,437 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 6 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:24,452 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:24,452 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:24,847 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:24,847 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:25,206 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:25,206 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1134259677] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:25,207 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:25,207 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 25 [2022-03-15 21:38:25,207 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [219475373] [2022-03-15 21:38:25,207 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:25,209 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:25,216 INFO L252 McrAutomatonBuilder]: Finished intersection with 67 states and 115 transitions. [2022-03-15 21:38:25,216 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:26,713 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [13567#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 13572#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 13569#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 13571#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 13568#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 13570#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:38:26,713 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-03-15 21:38:26,713 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:26,714 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-03-15 21:38:26,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=849, Unknown=0, NotChecked=0, Total=992 [2022-03-15 21:38:26,714 INFO L87 Difference]: Start difference. First operand 401 states and 976 transitions. Second operand has 18 states, 18 states have (on average 3.5) internal successors, (63), 17 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:27,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:27,154 INFO L93 Difference]: Finished difference Result 864 states and 2147 transitions. [2022-03-15 21:38:27,154 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:38:27,155 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 3.5) internal successors, (63), 17 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:27,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:27,158 INFO L225 Difference]: With dead ends: 864 [2022-03-15 21:38:27,158 INFO L226 Difference]: Without dead ends: 817 [2022-03-15 21:38:27,159 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 61 SyntacticMatches, 11 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 494 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=242, Invalid=1480, Unknown=0, NotChecked=0, Total=1722 [2022-03-15 21:38:27,159 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 99 mSDsluCounter, 142 mSDsCounter, 0 mSdLazyCounter, 598 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 645 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 598 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:27,159 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [99 Valid, 10 Invalid, 645 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 598 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:38:27,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 817 states. [2022-03-15 21:38:27,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 817 to 481. [2022-03-15 21:38:27,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 481 states, 480 states have (on average 2.441666666666667) internal successors, (1172), 480 states have internal predecessors, (1172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:27,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 481 states to 481 states and 1172 transitions. [2022-03-15 21:38:27,171 INFO L78 Accepts]: Start accepts. Automaton has 481 states and 1172 transitions. Word has length 27 [2022-03-15 21:38:27,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:27,172 INFO L470 AbstractCegarLoop]: Abstraction has 481 states and 1172 transitions. [2022-03-15 21:38:27,172 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 3.5) internal successors, (63), 17 states have internal predecessors, (63), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:27,172 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 1172 transitions. [2022-03-15 21:38:27,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:27,173 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:27,173 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:27,192 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:27,387 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17,15 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:27,387 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:27,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:27,388 INFO L85 PathProgramCache]: Analyzing trace with hash 174645799, now seen corresponding path program 12 times [2022-03-15 21:38:27,388 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:27,388 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395720970] [2022-03-15 21:38:27,389 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:27,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:27,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:27,576 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:27,576 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:27,577 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395720970] [2022-03-15 21:38:27,577 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1395720970] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:27,577 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1719708741] [2022-03-15 21:38:27,577 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:38:27,577 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:27,577 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:27,578 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:27,578 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2022-03-15 21:38:27,603 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2022-03-15 21:38:27,603 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:27,604 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:27,604 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:27,978 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,979 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,979 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,980 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:27,980 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,981 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,981 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,982 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,982 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,983 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:27,984 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:27,985 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 6 disjoint index pairs (out of 15 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 29 [2022-03-15 21:38:27,997 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:27,997 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:28,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,325 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,326 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,326 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,327 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,328 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,329 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,330 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,331 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,340 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,340 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,340 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,341 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,342 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:28,414 INFO L353 Elim1Store]: treesize reduction 34, result has 75.2 percent of original size [2022-03-15 21:38:28,414 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 13 case distinctions, treesize of input 74 treesize of output 136 [2022-03-15 21:38:28,756 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:28,757 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1719708741] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:28,757 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:28,757 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 24 [2022-03-15 21:38:28,757 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1079954991] [2022-03-15 21:38:28,757 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:28,759 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:28,769 INFO L252 McrAutomatonBuilder]: Finished intersection with 75 states and 135 transitions. [2022-03-15 21:38:28,769 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:30,549 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [15604#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 15607#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 15605#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 15606#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 15601#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 15600#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 15603#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 15602#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:38:30,549 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:38:30,549 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:30,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:38:30,550 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=861, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:38:30,550 INFO L87 Difference]: Start difference. First operand 481 states and 1172 transitions. Second operand has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:31,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:31,101 INFO L93 Difference]: Finished difference Result 898 states and 2170 transitions. [2022-03-15 21:38:31,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:38:31,101 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:31,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:31,104 INFO L225 Difference]: With dead ends: 898 [2022-03-15 21:38:31,104 INFO L226 Difference]: Without dead ends: 882 [2022-03-15 21:38:31,105 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 65 SyntacticMatches, 14 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 704 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=351, Invalid=1629, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:38:31,105 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 114 mSDsluCounter, 240 mSDsCounter, 0 mSdLazyCounter, 638 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 32 SdHoareTripleChecker+Invalid, 680 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 638 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:31,105 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 32 Invalid, 680 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 638 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:38:31,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2022-03-15 21:38:31,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 489. [2022-03-15 21:38:31,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 489 states, 488 states have (on average 2.4405737704918034) internal successors, (1191), 488 states have internal predecessors, (1191), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:31,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 489 states to 489 states and 1191 transitions. [2022-03-15 21:38:31,117 INFO L78 Accepts]: Start accepts. Automaton has 489 states and 1191 transitions. Word has length 27 [2022-03-15 21:38:31,117 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:31,118 INFO L470 AbstractCegarLoop]: Abstraction has 489 states and 1191 transitions. [2022-03-15 21:38:31,118 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:31,118 INFO L276 IsEmpty]: Start isEmpty. Operand 489 states and 1191 transitions. [2022-03-15 21:38:31,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:31,119 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:31,119 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:31,135 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:31,327 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,16 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:31,327 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:31,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:31,328 INFO L85 PathProgramCache]: Analyzing trace with hash -956192501, now seen corresponding path program 13 times [2022-03-15 21:38:31,328 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:31,328 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786429334] [2022-03-15 21:38:31,328 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:31,328 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:31,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:31,520 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:31,521 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:31,521 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786429334] [2022-03-15 21:38:31,521 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [786429334] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:31,521 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [229139153] [2022-03-15 21:38:31,521 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:38:31,521 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:31,521 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:31,522 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:31,523 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2022-03-15 21:38:31,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:31,548 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:31,548 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:31,815 INFO L353 Elim1Store]: treesize reduction 66, result has 1.5 percent of original size [2022-03-15 21:38:31,816 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:31,826 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:31,826 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:32,168 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:32,168 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:32,490 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 6 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:32,490 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [229139153] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:32,490 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:32,490 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 23 [2022-03-15 21:38:32,490 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [512359362] [2022-03-15 21:38:32,490 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:32,492 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:32,499 INFO L252 McrAutomatonBuilder]: Finished intersection with 63 states and 105 transitions. [2022-03-15 21:38:32,499 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:33,853 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 5 new interpolants: [17690#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 17689#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 17691#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 17688#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 17692#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:38:33,853 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2022-03-15 21:38:33,853 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:33,853 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2022-03-15 21:38:33,853 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=689, Unknown=0, NotChecked=0, Total=812 [2022-03-15 21:38:33,853 INFO L87 Difference]: Start difference. First operand 489 states and 1191 transitions. Second operand has 17 states, 17 states have (on average 3.4705882352941178) internal successors, (59), 16 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:34,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:34,222 INFO L93 Difference]: Finished difference Result 762 states and 1864 transitions. [2022-03-15 21:38:34,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:38:34,222 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 3.4705882352941178) internal successors, (59), 16 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:34,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:34,225 INFO L225 Difference]: With dead ends: 762 [2022-03-15 21:38:34,225 INFO L226 Difference]: Without dead ends: 753 [2022-03-15 21:38:34,226 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 52 SyntacticMatches, 19 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 507 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=225, Invalid=1257, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:38:34,226 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 91 mSDsluCounter, 101 mSDsCounter, 0 mSdLazyCounter, 442 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 472 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 442 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:34,226 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [91 Valid, 5 Invalid, 472 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 442 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:34,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 753 states. [2022-03-15 21:38:34,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 753 to 505. [2022-03-15 21:38:34,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 505 states, 504 states have (on average 2.4424603174603177) internal successors, (1231), 504 states have internal predecessors, (1231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:34,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 505 states to 505 states and 1231 transitions. [2022-03-15 21:38:34,238 INFO L78 Accepts]: Start accepts. Automaton has 505 states and 1231 transitions. Word has length 27 [2022-03-15 21:38:34,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:34,239 INFO L470 AbstractCegarLoop]: Abstraction has 505 states and 1231 transitions. [2022-03-15 21:38:34,239 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 3.4705882352941178) internal successors, (59), 16 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:34,239 INFO L276 IsEmpty]: Start isEmpty. Operand 505 states and 1231 transitions. [2022-03-15 21:38:34,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:34,240 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:34,240 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:34,263 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:34,461 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,17 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:34,462 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:34,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:34,462 INFO L85 PathProgramCache]: Analyzing trace with hash 2000018207, now seen corresponding path program 14 times [2022-03-15 21:38:34,463 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:34,463 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1375369665] [2022-03-15 21:38:34,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:34,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:34,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:34,677 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:34,677 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:34,677 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1375369665] [2022-03-15 21:38:34,678 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1375369665] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:34,678 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1029574986] [2022-03-15 21:38:34,678 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:34,678 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:34,678 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:34,680 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:34,710 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2022-03-15 21:38:34,716 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:34,716 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:34,717 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:34,718 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:35,081 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:35,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:35,085 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:35,098 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:35,098 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:35,481 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:35,481 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:35,907 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:35,908 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1029574986] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:35,908 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:35,908 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 24 [2022-03-15 21:38:35,908 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [934846179] [2022-03-15 21:38:35,908 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:35,910 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:35,927 INFO L252 McrAutomatonBuilder]: Finished intersection with 67 states and 115 transitions. [2022-03-15 21:38:35,927 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:37,549 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [19668#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0))), 19670#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 19666#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (= (select queue (+ front 1)) 1) (not (= (+ (select queue back) 1) 0))) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 19672#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 19667#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 19669#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 19671#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:38:37,550 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:38:37,550 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:37,550 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:38:37,551 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2022-03-15 21:38:37,551 INFO L87 Difference]: Start difference. First operand 505 states and 1231 transitions. Second operand has 19 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 18 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:37,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:37,969 INFO L93 Difference]: Finished difference Result 997 states and 2477 transitions. [2022-03-15 21:38:37,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:38:37,970 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 18 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:37,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:37,973 INFO L225 Difference]: With dead ends: 997 [2022-03-15 21:38:37,973 INFO L226 Difference]: Without dead ends: 953 [2022-03-15 21:38:37,974 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 56 SyntacticMatches, 16 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 573 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=252, Invalid=1470, Unknown=0, NotChecked=0, Total=1722 [2022-03-15 21:38:37,976 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 97 mSDsluCounter, 118 mSDsCounter, 0 mSdLazyCounter, 536 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 97 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 581 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 536 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:37,977 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [97 Valid, 8 Invalid, 581 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 536 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:37,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 953 states. [2022-03-15 21:38:37,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 953 to 553. [2022-03-15 21:38:37,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 552 states have (on average 2.447463768115942) internal successors, (1351), 552 states have internal predecessors, (1351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:37,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 1351 transitions. [2022-03-15 21:38:37,990 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 1351 transitions. Word has length 27 [2022-03-15 21:38:37,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:37,991 INFO L470 AbstractCegarLoop]: Abstraction has 553 states and 1351 transitions. [2022-03-15 21:38:37,991 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.4210526315789473) internal successors, (65), 18 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:37,991 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 1351 transitions. [2022-03-15 21:38:37,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:37,992 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:37,992 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:38,016 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:38,214 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20,18 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:38,214 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:38,215 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:38,215 INFO L85 PathProgramCache]: Analyzing trace with hash 1076286631, now seen corresponding path program 15 times [2022-03-15 21:38:38,215 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:38,215 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313772960] [2022-03-15 21:38:38,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:38,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:38,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:38,382 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:38,382 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:38,382 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313772960] [2022-03-15 21:38:38,382 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313772960] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:38,382 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [588642799] [2022-03-15 21:38:38,382 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:38:38,382 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:38,382 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:38,383 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:38,385 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2022-03-15 21:38:38,409 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2022-03-15 21:38:38,410 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:38,410 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:38,411 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:38,724 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,725 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,725 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,726 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,727 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,728 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,728 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,729 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:38,729 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:38,730 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:38,744 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:38,744 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:39,100 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:39,101 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:39,501 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 1 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:39,501 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [588642799] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:39,501 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:39,501 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 23 [2022-03-15 21:38:39,502 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1424083723] [2022-03-15 21:38:39,502 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:39,504 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:39,523 INFO L252 McrAutomatonBuilder]: Finished intersection with 75 states and 135 transitions. [2022-03-15 21:38:39,524 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:41,551 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [21978#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 21979#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 21980#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 21983#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 21982#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 21981#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 21977#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 21976#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum)))] [2022-03-15 21:38:41,551 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:38:41,551 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:41,552 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:38:41,552 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=833, Unknown=0, NotChecked=0, Total=992 [2022-03-15 21:38:41,552 INFO L87 Difference]: Start difference. First operand 553 states and 1351 transitions. Second operand has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:42,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:42,121 INFO L93 Difference]: Finished difference Result 1050 states and 2545 transitions. [2022-03-15 21:38:42,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:38:42,122 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:42,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:42,125 INFO L225 Difference]: With dead ends: 1050 [2022-03-15 21:38:42,125 INFO L226 Difference]: Without dead ends: 1034 [2022-03-15 21:38:42,125 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 60 SyntacticMatches, 20 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 772 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=302, Invalid=1590, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:38:42,125 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 112 mSDsluCounter, 167 mSDsCounter, 0 mSdLazyCounter, 515 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 560 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 515 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:42,126 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [112 Valid, 21 Invalid, 560 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 515 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:38:42,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1034 states. [2022-03-15 21:38:42,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1034 to 553. [2022-03-15 21:38:42,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 552 states have (on average 2.447463768115942) internal successors, (1351), 552 states have internal predecessors, (1351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:42,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 1351 transitions. [2022-03-15 21:38:42,139 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 1351 transitions. Word has length 27 [2022-03-15 21:38:42,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:42,139 INFO L470 AbstractCegarLoop]: Abstraction has 553 states and 1351 transitions. [2022-03-15 21:38:42,139 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.736842105263158) internal successors, (71), 18 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:42,139 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 1351 transitions. [2022-03-15 21:38:42,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:42,140 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:42,140 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:42,162 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:42,359 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21,19 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:42,360 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:42,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:42,360 INFO L85 PathProgramCache]: Analyzing trace with hash 682395743, now seen corresponding path program 16 times [2022-03-15 21:38:42,361 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:42,361 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179565185] [2022-03-15 21:38:42,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:42,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:42,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:42,531 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 23 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:42,531 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:42,531 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1179565185] [2022-03-15 21:38:42,531 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1179565185] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:42,531 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1490132230] [2022-03-15 21:38:42,531 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:38:42,531 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:42,532 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:42,532 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:42,534 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2022-03-15 21:38:42,563 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:38:42,563 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:42,564 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:42,564 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:42,873 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:42,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,875 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,875 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,877 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:42,877 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,878 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,878 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:42,879 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:42,881 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 6 disjoint index pairs (out of 21 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:42,895 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 7 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:42,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:43,297 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:43,298 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:43,778 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:43,778 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1490132230] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:43,778 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:43,778 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11] total 25 [2022-03-15 21:38:43,778 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1023510131] [2022-03-15 21:38:43,778 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:43,780 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:43,787 INFO L252 McrAutomatonBuilder]: Finished intersection with 71 states and 125 transitions. [2022-03-15 21:38:43,787 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:45,356 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [24346#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 24352#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 24348#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 24347#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 24350#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 24349#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 24351#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)))] [2022-03-15 21:38:45,356 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-03-15 21:38:45,356 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:45,356 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-03-15 21:38:45,357 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=907, Unknown=0, NotChecked=0, Total=1056 [2022-03-15 21:38:45,357 INFO L87 Difference]: Start difference. First operand 553 states and 1351 transitions. Second operand has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:45,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:45,702 INFO L93 Difference]: Finished difference Result 843 states and 2076 transitions. [2022-03-15 21:38:45,702 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:45,702 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:45,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:45,705 INFO L225 Difference]: With dead ends: 843 [2022-03-15 21:38:45,705 INFO L226 Difference]: Without dead ends: 833 [2022-03-15 21:38:45,706 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 63 SyntacticMatches, 12 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 590 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=225, Invalid=1415, Unknown=0, NotChecked=0, Total=1640 [2022-03-15 21:38:45,706 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 108 mSDsluCounter, 107 mSDsCounter, 0 mSdLazyCounter, 406 mSolverCounterSat, 32 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 438 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 32 IncrementalHoareTripleChecker+Valid, 406 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:45,707 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [108 Valid, 8 Invalid, 438 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [32 Valid, 406 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:45,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 833 states. [2022-03-15 21:38:45,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 833 to 553. [2022-03-15 21:38:45,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 553 states, 552 states have (on average 2.447463768115942) internal successors, (1351), 552 states have internal predecessors, (1351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:45,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 553 states to 553 states and 1351 transitions. [2022-03-15 21:38:45,719 INFO L78 Accepts]: Start accepts. Automaton has 553 states and 1351 transitions. Word has length 27 [2022-03-15 21:38:45,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:45,720 INFO L470 AbstractCegarLoop]: Abstraction has 553 states and 1351 transitions. [2022-03-15 21:38:45,720 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:45,720 INFO L276 IsEmpty]: Start isEmpty. Operand 553 states and 1351 transitions. [2022-03-15 21:38:45,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2022-03-15 21:38:45,721 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:45,721 INFO L514 BasicCegarLoop]: trace histogram [4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:45,747 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:45,943 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22,20 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:45,943 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:45,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:45,944 INFO L85 PathProgramCache]: Analyzing trace with hash -75877733, now seen corresponding path program 17 times [2022-03-15 21:38:45,944 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:45,944 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958091906] [2022-03-15 21:38:45,944 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:45,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:45,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:46,117 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:46,118 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:46,118 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958091906] [2022-03-15 21:38:46,118 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958091906] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:46,118 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1036662145] [2022-03-15 21:38:46,118 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:38:46,118 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:46,118 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:46,120 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:46,126 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2022-03-15 21:38:46,149 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 5 check-sat command(s) [2022-03-15 21:38:46,149 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:46,150 INFO L263 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 34 conjunts are in the unsatisfiable core [2022-03-15 21:38:46,150 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:46,503 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:46,504 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,505 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,505 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,506 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,507 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,508 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,508 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:46,509 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:46,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:46,511 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 6 disjoint index pairs (out of 21 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 29 [2022-03-15 21:38:46,525 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 4 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:46,525 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:46,943 INFO L353 Elim1Store]: treesize reduction 156, result has 49.5 percent of original size [2022-03-15 21:38:46,944 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 8 new quantified variables, introduced 28 case distinctions, treesize of input 76 treesize of output 186 [2022-03-15 21:38:47,430 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 5 proven. 23 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:47,431 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1036662145] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:47,431 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:47,431 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 26 [2022-03-15 21:38:47,431 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [401572495] [2022-03-15 21:38:47,431 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:47,433 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:47,439 INFO L252 McrAutomatonBuilder]: Finished intersection with 67 states and 115 transitions. [2022-03-15 21:38:47,439 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:48,898 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [26505#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 26506#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 26507#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 26502#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 26501#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 26503#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 26504#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:38:48,898 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2022-03-15 21:38:48,898 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:48,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2022-03-15 21:38:48,899 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=967, Unknown=0, NotChecked=0, Total=1122 [2022-03-15 21:38:48,899 INFO L87 Difference]: Start difference. First operand 553 states and 1351 transitions. Second operand has 19 states, 19 states have (on average 3.473684210526316) internal successors, (66), 18 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:49,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:49,582 INFO L93 Difference]: Finished difference Result 1151 states and 2805 transitions. [2022-03-15 21:38:49,582 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:38:49,583 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 3.473684210526316) internal successors, (66), 18 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 27 [2022-03-15 21:38:49,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:49,587 INFO L225 Difference]: With dead ends: 1151 [2022-03-15 21:38:49,587 INFO L226 Difference]: Without dead ends: 1106 [2022-03-15 21:38:49,587 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 63 SyntacticMatches, 7 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=292, Invalid=1870, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:38:49,588 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 148 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 750 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 148 SdHoareTripleChecker+Valid, 24 SdHoareTripleChecker+Invalid, 800 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 750 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:49,588 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [148 Valid, 24 Invalid, 800 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 750 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:38:49,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2022-03-15 21:38:49,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 545. [2022-03-15 21:38:49,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 545 states, 544 states have (on average 2.4375) internal successors, (1326), 544 states have internal predecessors, (1326), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:49,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 545 states to 545 states and 1326 transitions. [2022-03-15 21:38:49,604 INFO L78 Accepts]: Start accepts. Automaton has 545 states and 1326 transitions. Word has length 27 [2022-03-15 21:38:49,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:49,605 INFO L470 AbstractCegarLoop]: Abstraction has 545 states and 1326 transitions. [2022-03-15 21:38:49,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 3.473684210526316) internal successors, (66), 18 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:49,605 INFO L276 IsEmpty]: Start isEmpty. Operand 545 states and 1326 transitions. [2022-03-15 21:38:49,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2022-03-15 21:38:49,606 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:49,606 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:49,630 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:49,819 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 21 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable23 [2022-03-15 21:38:49,819 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:49,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:49,820 INFO L85 PathProgramCache]: Analyzing trace with hash -2103395191, now seen corresponding path program 18 times [2022-03-15 21:38:49,820 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:49,820 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910898857] [2022-03-15 21:38:49,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:49,821 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:49,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:49,859 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 25 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:49,859 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:49,859 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910898857] [2022-03-15 21:38:49,860 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [910898857] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:49,860 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [772091381] [2022-03-15 21:38:49,860 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:38:49,860 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:49,860 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:49,864 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:49,873 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2022-03-15 21:38:49,902 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:38:49,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:49,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 10 conjunts are in the unsatisfiable core [2022-03-15 21:38:49,903 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:49,948 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 25 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:49,948 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:49,999 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 25 proven. 11 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:38:49,999 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [772091381] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:49,999 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:49,999 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6] total 7 [2022-03-15 21:38:49,999 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1130730611] [2022-03-15 21:38:49,999 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:50,001 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:50,009 INFO L252 McrAutomatonBuilder]: Finished intersection with 67 states and 111 transitions. [2022-03-15 21:38:50,010 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:50,278 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:38:50,278 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2022-03-15 21:38:50,278 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:50,279 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2022-03-15 21:38:50,279 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2022-03-15 21:38:50,279 INFO L87 Difference]: Start difference. First operand 545 states and 1326 transitions. Second operand has 8 states, 8 states have (on average 4.5) internal successors, (36), 7 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:50,356 INFO L93 Difference]: Finished difference Result 840 states and 1985 transitions. [2022-03-15 21:38:50,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-03-15 21:38:50,357 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 4.5) internal successors, (36), 7 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 29 [2022-03-15 21:38:50,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:50,360 INFO L225 Difference]: With dead ends: 840 [2022-03-15 21:38:50,360 INFO L226 Difference]: Without dead ends: 838 [2022-03-15 21:38:50,360 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 91 SyntacticMatches, 6 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2022-03-15 21:38:50,361 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 95 mSDsluCounter, 64 mSDsCounter, 0 mSdLazyCounter, 88 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 95 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 102 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 88 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:50,361 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [95 Valid, 13 Invalid, 102 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 88 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:38:50,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 838 states. [2022-03-15 21:38:50,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 838 to 601. [2022-03-15 21:38:50,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 601 states, 600 states have (on average 2.4566666666666666) internal successors, (1474), 600 states have internal predecessors, (1474), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 601 states to 601 states and 1474 transitions. [2022-03-15 21:38:50,380 INFO L78 Accepts]: Start accepts. Automaton has 601 states and 1474 transitions. Word has length 29 [2022-03-15 21:38:50,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:50,380 INFO L470 AbstractCegarLoop]: Abstraction has 601 states and 1474 transitions. [2022-03-15 21:38:50,380 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 4.5) internal successors, (36), 7 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:50,381 INFO L276 IsEmpty]: Start isEmpty. Operand 601 states and 1474 transitions. [2022-03-15 21:38:50,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:38:50,382 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:50,382 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:50,407 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2022-03-15 21:38:50,595 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 22 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable24 [2022-03-15 21:38:50,595 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:50,596 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:50,596 INFO L85 PathProgramCache]: Analyzing trace with hash -482455030, now seen corresponding path program 19 times [2022-03-15 21:38:50,596 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:50,596 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086122739] [2022-03-15 21:38:50,596 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:50,596 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:50,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:50,774 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 36 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:38:50,774 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:50,774 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086122739] [2022-03-15 21:38:50,774 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086122739] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:50,775 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2001016231] [2022-03-15 21:38:50,775 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:38:50,775 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:50,775 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:50,776 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:50,808 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2022-03-15 21:38:50,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:50,816 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:38:50,817 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:51,304 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,305 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,306 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,307 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,307 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:51,308 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,309 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,311 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,312 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:51,313 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,313 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,314 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:51,315 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:51,316 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:38:51,330 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 10 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:51,330 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:51,918 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:38:51,918 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:38:52,607 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:52,607 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2001016231] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:52,608 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:52,608 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 13] total 29 [2022-03-15 21:38:52,608 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1127089319] [2022-03-15 21:38:52,608 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:52,610 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:52,620 INFO L252 McrAutomatonBuilder]: Finished intersection with 83 states and 147 transitions. [2022-03-15 21:38:52,620 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:54,623 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [31203#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 31205#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 31208#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 31206#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 31207#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 31204#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:38:54,624 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2022-03-15 21:38:54,624 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:54,624 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-03-15 21:38:54,624 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=175, Invalid=1085, Unknown=0, NotChecked=0, Total=1260 [2022-03-15 21:38:54,624 INFO L87 Difference]: Start difference. First operand 601 states and 1474 transitions. Second operand has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:54,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:54,970 INFO L93 Difference]: Finished difference Result 1011 states and 2503 transitions. [2022-03-15 21:38:54,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:38:54,970 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:38:54,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:54,973 INFO L225 Difference]: With dead ends: 1011 [2022-03-15 21:38:54,973 INFO L226 Difference]: Without dead ends: 1001 [2022-03-15 21:38:54,974 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 68 SyntacticMatches, 22 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 906 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=266, Invalid=1714, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:38:54,974 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 99 mSDsluCounter, 98 mSDsCounter, 0 mSdLazyCounter, 434 mSolverCounterSat, 33 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 99 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 467 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 33 IncrementalHoareTripleChecker+Valid, 434 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:54,974 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [99 Valid, 5 Invalid, 467 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [33 Valid, 434 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:54,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1001 states. [2022-03-15 21:38:54,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1001 to 713. [2022-03-15 21:38:54,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 713 states, 712 states have (on average 2.457865168539326) internal successors, (1750), 712 states have internal predecessors, (1750), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:54,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 713 states to 713 states and 1750 transitions. [2022-03-15 21:38:54,987 INFO L78 Accepts]: Start accepts. Automaton has 713 states and 1750 transitions. Word has length 31 [2022-03-15 21:38:54,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:54,987 INFO L470 AbstractCegarLoop]: Abstraction has 713 states and 1750 transitions. [2022-03-15 21:38:54,987 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 3.611111111111111) internal successors, (65), 17 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:54,987 INFO L276 IsEmpty]: Start isEmpty. Operand 713 states and 1750 transitions. [2022-03-15 21:38:54,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:38:54,988 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:54,989 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:55,013 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2022-03-15 21:38:55,210 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 23 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable25 [2022-03-15 21:38:55,211 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:38:55,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:38:55,211 INFO L85 PathProgramCache]: Analyzing trace with hash -390146594, now seen corresponding path program 20 times [2022-03-15 21:38:55,212 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:38:55,212 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [390082153] [2022-03-15 21:38:55,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:38:55,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:38:55,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:38:55,405 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 36 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:38:55,406 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:38:55,406 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [390082153] [2022-03-15 21:38:55,406 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [390082153] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:38:55,406 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2105679091] [2022-03-15 21:38:55,406 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:38:55,406 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:38:55,406 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:38:55,408 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:38:55,411 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2022-03-15 21:38:55,434 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:38:55,434 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:38:55,435 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:38:55,436 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:38:55,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,873 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:55,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,875 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,875 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:55,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,877 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,878 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,879 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,879 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:38:55,880 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,880 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:38:55,882 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:38:55,893 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 9 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:55,893 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:38:56,483 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:38:56,484 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:38:57,036 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:38:57,037 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2105679091] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:38:57,037 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:38:57,037 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 13] total 29 [2022-03-15 21:38:57,037 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [925500162] [2022-03-15 21:38:57,037 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:38:57,039 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:38:57,050 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:38:57,050 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:38:59,494 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [33879#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 33877#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 33874#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 33880#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 33881#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 33878#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 33875#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 33876#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 33882#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:38:59,494 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:38:59,494 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:38:59,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:38:59,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=221, Invalid=1261, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:38:59,495 INFO L87 Difference]: Start difference. First operand 713 states and 1750 transitions. Second operand has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:59,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:38:59,860 INFO L93 Difference]: Finished difference Result 1074 states and 2640 transitions. [2022-03-15 21:38:59,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2022-03-15 21:38:59,861 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:38:59,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:38:59,863 INFO L225 Difference]: With dead ends: 1074 [2022-03-15 21:38:59,864 INFO L226 Difference]: Without dead ends: 1041 [2022-03-15 21:38:59,864 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 71 SyntacticMatches, 24 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1228 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=321, Invalid=1841, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:38:59,864 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 101 mSDsluCounter, 127 mSDsCounter, 0 mSdLazyCounter, 449 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 101 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 504 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 449 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:38:59,864 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [101 Valid, 10 Invalid, 504 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 449 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:38:59,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1041 states. [2022-03-15 21:38:59,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1041 to 777. [2022-03-15 21:38:59,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 777 states, 776 states have (on average 2.445876288659794) internal successors, (1898), 776 states have internal predecessors, (1898), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:59,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 777 states to 777 states and 1898 transitions. [2022-03-15 21:38:59,878 INFO L78 Accepts]: Start accepts. Automaton has 777 states and 1898 transitions. Word has length 31 [2022-03-15 21:38:59,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:38:59,878 INFO L470 AbstractCegarLoop]: Abstraction has 777 states and 1898 transitions. [2022-03-15 21:38:59,878 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:38:59,878 INFO L276 IsEmpty]: Start isEmpty. Operand 777 states and 1898 transitions. [2022-03-15 21:38:59,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:38:59,880 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:38:59,880 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:38:59,902 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2022-03-15 21:39:00,099 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26,24 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:00,099 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:00,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:00,100 INFO L85 PathProgramCache]: Analyzing trace with hash -1242666790, now seen corresponding path program 21 times [2022-03-15 21:39:00,100 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:00,100 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053448954] [2022-03-15 21:39:00,100 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:00,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:00,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:00,281 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 37 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:39:00,281 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:00,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053448954] [2022-03-15 21:39:00,281 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2053448954] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:00,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1888902865] [2022-03-15 21:39:00,281 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:39:00,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:00,281 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:00,282 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:00,283 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Waiting until timeout for monitored process [2022-03-15 21:39:00,309 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-03-15 21:39:00,309 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:00,310 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:00,311 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:00,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,857 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,858 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,860 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,865 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,866 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:00,867 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,868 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:00,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:00,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:00,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:00,873 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 10 disjoint index pairs (out of 36 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 32 [2022-03-15 21:39:00,886 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:00,886 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:01,490 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,493 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,496 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,498 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,500 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,500 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,502 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,502 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,504 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,504 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,505 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,505 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,506 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,508 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,509 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:01,622 INFO L353 Elim1Store]: treesize reduction 48, result has 75.4 percent of original size [2022-03-15 21:39:01,623 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 26 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 19 case distinctions, treesize of input 88 treesize of output 186 [2022-03-15 21:39:02,060 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:02,061 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1888902865] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:02,061 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:02,061 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 13] total 31 [2022-03-15 21:39:02,061 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1452233313] [2022-03-15 21:39:02,061 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:02,063 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:02,073 INFO L252 McrAutomatonBuilder]: Finished intersection with 87 states and 157 transitions. [2022-03-15 21:39:02,073 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:04,290 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [36742#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 36740#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 36739#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 36745#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 36744#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 36746#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 36741#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 36743#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back)))] [2022-03-15 21:39:04,290 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-03-15 21:39:04,291 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:04,291 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-03-15 21:39:04,291 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=227, Invalid=1333, Unknown=0, NotChecked=0, Total=1560 [2022-03-15 21:39:04,291 INFO L87 Difference]: Start difference. First operand 777 states and 1898 transitions. Second operand has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:04,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:04,671 INFO L93 Difference]: Finished difference Result 1329 states and 3298 transitions. [2022-03-15 21:39:04,675 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:39:04,675 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:04,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:04,680 INFO L225 Difference]: With dead ends: 1329 [2022-03-15 21:39:04,680 INFO L226 Difference]: Without dead ends: 1313 [2022-03-15 21:39:04,680 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 71 SyntacticMatches, 19 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 879 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=343, Invalid=2009, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:39:04,681 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 131 mSDsluCounter, 125 mSDsCounter, 0 mSdLazyCounter, 427 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 470 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 427 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:04,681 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [131 Valid, 10 Invalid, 470 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 427 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:39:04,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1313 states. [2022-03-15 21:39:04,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1313 to 761. [2022-03-15 21:39:04,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 761 states, 760 states have (on average 2.45) internal successors, (1862), 760 states have internal predecessors, (1862), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:04,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 761 states to 761 states and 1862 transitions. [2022-03-15 21:39:04,696 INFO L78 Accepts]: Start accepts. Automaton has 761 states and 1862 transitions. Word has length 31 [2022-03-15 21:39:04,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:04,696 INFO L470 AbstractCegarLoop]: Abstraction has 761 states and 1862 transitions. [2022-03-15 21:39:04,696 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:04,696 INFO L276 IsEmpty]: Start isEmpty. Operand 761 states and 1862 transitions. [2022-03-15 21:39:04,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:04,697 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:04,698 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:04,722 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (25)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:04,919 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 25 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2022-03-15 21:39:04,920 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:04,920 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:04,920 INFO L85 PathProgramCache]: Analyzing trace with hash -1050959982, now seen corresponding path program 22 times [2022-03-15 21:39:04,921 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:04,921 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123011683] [2022-03-15 21:39:04,921 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:04,921 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:04,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:05,133 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 37 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:39:05,133 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:05,133 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123011683] [2022-03-15 21:39:05,133 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2123011683] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:05,133 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1590641211] [2022-03-15 21:39:05,133 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:39:05,133 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:05,133 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:05,134 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:05,135 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Waiting until timeout for monitored process [2022-03-15 21:39:05,163 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:39:05,164 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:05,164 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:05,166 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:05,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,616 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,619 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,622 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,623 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:05,623 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,624 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,624 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,625 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:05,625 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:05,626 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:05,626 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:05,638 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 9 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:05,638 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:06,216 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:06,216 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:06,769 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:06,769 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1590641211] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:06,769 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:06,769 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 13] total 29 [2022-03-15 21:39:06,770 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1309045511] [2022-03-15 21:39:06,770 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:06,773 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:06,786 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:39:06,787 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:09,294 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [39828#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 39826#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 39833#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 39832#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 39827#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 39831#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 39829#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 39830#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:39:09,295 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-03-15 21:39:09,295 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:09,295 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-03-15 21:39:09,295 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=1190, Unknown=0, NotChecked=0, Total=1406 [2022-03-15 21:39:09,296 INFO L87 Difference]: Start difference. First operand 761 states and 1862 transitions. Second operand has 20 states, 20 states have (on average 3.85) internal successors, (77), 19 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:09,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:09,627 INFO L93 Difference]: Finished difference Result 1256 states and 3082 transitions. [2022-03-15 21:39:09,627 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:39:09,627 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 3.85) internal successors, (77), 19 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:09,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:09,630 INFO L225 Difference]: With dead ends: 1256 [2022-03-15 21:39:09,630 INFO L226 Difference]: Without dead ends: 1217 [2022-03-15 21:39:09,631 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 80 SyntacticMatches, 16 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 912 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=326, Invalid=1836, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:39:09,631 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 109 mSDsluCounter, 95 mSDsCounter, 0 mSdLazyCounter, 360 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 360 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:09,632 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 8 Invalid, 428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 360 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:39:09,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1217 states. [2022-03-15 21:39:09,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1217 to 833. [2022-03-15 21:39:09,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 833 states, 832 states have (on average 2.449519230769231) internal successors, (2038), 832 states have internal predecessors, (2038), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:09,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 833 states to 833 states and 2038 transitions. [2022-03-15 21:39:09,647 INFO L78 Accepts]: Start accepts. Automaton has 833 states and 2038 transitions. Word has length 31 [2022-03-15 21:39:09,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:09,647 INFO L470 AbstractCegarLoop]: Abstraction has 833 states and 2038 transitions. [2022-03-15 21:39:09,653 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 3.85) internal successors, (77), 19 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:09,653 INFO L276 IsEmpty]: Start isEmpty. Operand 833 states and 2038 transitions. [2022-03-15 21:39:09,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:09,655 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:09,655 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:09,674 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (26)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:09,867 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 26 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2022-03-15 21:39:09,867 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:09,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:09,868 INFO L85 PathProgramCache]: Analyzing trace with hash -836634998, now seen corresponding path program 23 times [2022-03-15 21:39:09,869 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:09,869 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176317072] [2022-03-15 21:39:09,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:09,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:09,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:10,096 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:10,096 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:10,096 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176317072] [2022-03-15 21:39:10,096 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [176317072] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:10,096 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623340862] [2022-03-15 21:39:10,096 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:39:10,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:10,097 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:10,098 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:10,098 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Waiting until timeout for monitored process [2022-03-15 21:39:10,125 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:39:10,125 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:10,126 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 44 conjunts are in the unsatisfiable core [2022-03-15 21:39:10,127 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:10,597 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,598 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,599 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,600 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,600 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:10,601 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,601 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,603 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:10,603 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,604 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,606 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,606 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:10,607 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:10,609 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 36 [2022-03-15 21:39:10,620 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:10,620 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:11,047 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,051 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,053 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,053 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,054 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,054 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,055 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,055 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,055 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,056 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,057 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,057 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,058 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,058 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,059 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,060 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,060 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,061 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,061 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,061 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,062 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,063 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,063 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,064 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,064 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,066 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,066 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,067 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:11,116 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:39:11,116 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 30 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 15 case distinctions, treesize of input 94 treesize of output 208 [2022-03-15 21:39:11,396 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:11,396 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1623340862] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:11,396 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:11,397 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 30 [2022-03-15 21:39:11,397 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [926094786] [2022-03-15 21:39:11,397 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:11,399 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:11,409 INFO L252 McrAutomatonBuilder]: Finished intersection with 83 states and 147 transitions. [2022-03-15 21:39:11,409 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:13,442 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [42988#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 42986#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 42987#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 42985#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 42990#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 42989#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 42991#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:39:13,442 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-03-15 21:39:13,442 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:13,443 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-03-15 21:39:13,443 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=246, Invalid=1160, Unknown=0, NotChecked=0, Total=1406 [2022-03-15 21:39:13,443 INFO L87 Difference]: Start difference. First operand 833 states and 2038 transitions. Second operand has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:13,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:13,933 INFO L93 Difference]: Finished difference Result 1561 states and 3870 transitions. [2022-03-15 21:39:13,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:39:13,933 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:13,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:13,939 INFO L225 Difference]: With dead ends: 1561 [2022-03-15 21:39:13,939 INFO L226 Difference]: Without dead ends: 1545 [2022-03-15 21:39:13,940 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 72 SyntacticMatches, 16 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 884 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=387, Invalid=1965, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:39:13,940 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 105 mSDsluCounter, 187 mSDsCounter, 0 mSdLazyCounter, 736 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 775 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 736 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:13,941 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [105 Valid, 10 Invalid, 775 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 736 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:13,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1545 states. [2022-03-15 21:39:13,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1545 to 801. [2022-03-15 21:39:13,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 801 states, 800 states have (on average 2.4475) internal successors, (1958), 800 states have internal predecessors, (1958), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:13,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 801 states to 801 states and 1958 transitions. [2022-03-15 21:39:13,957 INFO L78 Accepts]: Start accepts. Automaton has 801 states and 1958 transitions. Word has length 31 [2022-03-15 21:39:13,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:13,957 INFO L470 AbstractCegarLoop]: Abstraction has 801 states and 1958 transitions. [2022-03-15 21:39:13,958 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 3.75) internal successors, (75), 19 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:13,958 INFO L276 IsEmpty]: Start isEmpty. Operand 801 states and 1958 transitions. [2022-03-15 21:39:13,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:13,959 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:13,959 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:13,983 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (27)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:14,183 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29,27 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:14,184 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:14,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:14,184 INFO L85 PathProgramCache]: Analyzing trace with hash -2095600762, now seen corresponding path program 24 times [2022-03-15 21:39:14,184 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:14,185 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [894934926] [2022-03-15 21:39:14,185 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:14,185 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:14,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:14,420 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:14,420 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:14,420 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [894934926] [2022-03-15 21:39:14,420 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [894934926] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:14,420 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1617880484] [2022-03-15 21:39:14,420 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:39:14,420 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:14,421 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:14,422 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:14,423 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Waiting until timeout for monitored process [2022-03-15 21:39:14,447 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:39:14,447 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:14,447 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:14,448 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:14,912 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:14,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,916 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,916 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,917 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:14,917 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,918 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,918 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,919 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:14,919 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,920 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:14,920 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:14,932 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:14,932 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:15,509 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:15,510 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:16,266 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:16,266 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1617880484] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:16,266 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:16,267 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 31 [2022-03-15 21:39:16,267 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [28338921] [2022-03-15 21:39:16,267 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:16,269 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:16,290 INFO L252 McrAutomatonBuilder]: Finished intersection with 79 states and 137 transitions. [2022-03-15 21:39:16,290 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:18,178 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [46393#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 46394#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 46392#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 46391#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 46389#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 46395#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 46390#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:39:18,178 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:39:18,178 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:18,178 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:39:18,179 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1283, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:39:18,179 INFO L87 Difference]: Start difference. First operand 801 states and 1958 transitions. Second operand has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:18,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:18,680 INFO L93 Difference]: Finished difference Result 1577 states and 3910 transitions. [2022-03-15 21:39:18,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:39:18,680 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:18,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:18,685 INFO L225 Difference]: With dead ends: 1577 [2022-03-15 21:39:18,685 INFO L226 Difference]: Without dead ends: 1561 [2022-03-15 21:39:18,686 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 70 SyntacticMatches, 13 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 728 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=328, Invalid=2222, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:39:18,686 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 109 mSDsluCounter, 151 mSDsCounter, 0 mSdLazyCounter, 626 mSolverCounterSat, 43 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 109 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 669 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 43 IncrementalHoareTripleChecker+Valid, 626 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:18,686 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [109 Valid, 8 Invalid, 669 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [43 Valid, 626 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:18,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1561 states. [2022-03-15 21:39:18,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1561 to 801. [2022-03-15 21:39:18,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 801 states, 800 states have (on average 2.4475) internal successors, (1958), 800 states have internal predecessors, (1958), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:18,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 801 states to 801 states and 1958 transitions. [2022-03-15 21:39:18,703 INFO L78 Accepts]: Start accepts. Automaton has 801 states and 1958 transitions. Word has length 31 [2022-03-15 21:39:18,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:18,703 INFO L470 AbstractCegarLoop]: Abstraction has 801 states and 1958 transitions. [2022-03-15 21:39:18,703 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:18,703 INFO L276 IsEmpty]: Start isEmpty. Operand 801 states and 1958 transitions. [2022-03-15 21:39:18,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:18,705 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:18,705 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:18,727 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (28)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:18,927 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,28 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:18,927 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:18,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:18,928 INFO L85 PathProgramCache]: Analyzing trace with hash -1496700834, now seen corresponding path program 25 times [2022-03-15 21:39:18,928 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:18,928 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [669856287] [2022-03-15 21:39:18,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:18,929 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:18,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:19,111 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 38 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:39:19,111 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:19,111 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [669856287] [2022-03-15 21:39:19,111 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [669856287] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:19,111 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1032993521] [2022-03-15 21:39:19,111 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:39:19,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:19,112 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:19,113 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:19,113 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Waiting until timeout for monitored process [2022-03-15 21:39:19,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:19,137 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:19,138 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:19,558 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,559 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,559 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,560 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,560 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,561 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,561 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:19,562 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,562 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,563 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,563 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,565 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,566 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,566 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,567 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,567 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:19,568 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:19,568 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:19,569 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 10 disjoint index pairs (out of 28 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:19,581 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 8 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:19,581 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:20,166 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:20,166 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:20,738 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:20,739 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1032993521] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:20,739 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:20,739 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13, 13] total 29 [2022-03-15 21:39:20,739 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [865048901] [2022-03-15 21:39:20,739 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:20,751 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:20,761 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:39:20,762 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:23,136 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [49817#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 49811#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 49810#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 49812#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 49809#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 49814#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 49815#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 49813#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 49816#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:39:23,136 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:39:23,136 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:23,137 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:39:23,137 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1269, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:39:23,137 INFO L87 Difference]: Start difference. First operand 801 states and 1958 transitions. Second operand has 21 states, 21 states have (on average 3.9047619047619047) internal successors, (82), 20 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:23,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:23,484 INFO L93 Difference]: Finished difference Result 1390 states and 3412 transitions. [2022-03-15 21:39:23,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-03-15 21:39:23,484 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.9047619047619047) internal successors, (82), 20 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:23,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:23,487 INFO L225 Difference]: With dead ends: 1390 [2022-03-15 21:39:23,487 INFO L226 Difference]: Without dead ends: 1353 [2022-03-15 21:39:23,488 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 76 SyntacticMatches, 19 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1026 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=324, Invalid=1932, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:39:23,488 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 123 mSDsluCounter, 84 mSDsCounter, 0 mSdLazyCounter, 339 mSolverCounterSat, 74 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 413 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 74 IncrementalHoareTripleChecker+Valid, 339 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:23,488 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [123 Valid, 6 Invalid, 413 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [74 Valid, 339 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:39:23,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1353 states. [2022-03-15 21:39:23,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1353 to 865. [2022-03-15 21:39:23,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 865 states, 864 states have (on average 2.4386574074074074) internal successors, (2107), 864 states have internal predecessors, (2107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:23,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 865 states to 865 states and 2107 transitions. [2022-03-15 21:39:23,502 INFO L78 Accepts]: Start accepts. Automaton has 865 states and 2107 transitions. Word has length 31 [2022-03-15 21:39:23,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:23,502 INFO L470 AbstractCegarLoop]: Abstraction has 865 states and 2107 transitions. [2022-03-15 21:39:23,502 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.9047619047619047) internal successors, (82), 20 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:23,502 INFO L276 IsEmpty]: Start isEmpty. Operand 865 states and 2107 transitions. [2022-03-15 21:39:23,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:23,504 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:23,504 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:23,525 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (29)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:23,720 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31,29 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:23,720 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:23,720 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:23,720 INFO L85 PathProgramCache]: Analyzing trace with hash -2115492846, now seen corresponding path program 26 times [2022-03-15 21:39:23,721 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:23,721 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232841084] [2022-03-15 21:39:23,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:23,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:23,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:23,939 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:23,939 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:23,939 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1232841084] [2022-03-15 21:39:23,939 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1232841084] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:23,939 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1486942620] [2022-03-15 21:39:23,939 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:39:23,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:23,939 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:23,940 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:23,941 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Waiting until timeout for monitored process [2022-03-15 21:39:23,965 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:39:23,965 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:23,966 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:23,966 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:24,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,397 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:24,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:24,399 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:24,413 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:24,413 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:24,980 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:24,981 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:25,514 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 41 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:25,515 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1486942620] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:25,515 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:25,515 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 28 [2022-03-15 21:39:25,515 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1901108475] [2022-03-15 21:39:25,515 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:25,517 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:25,528 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:39:25,528 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:28,510 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [53171#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 53170#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 53165#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 53169#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 53167#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 53172#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 53168#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 53166#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 53173#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))))] [2022-03-15 21:39:28,511 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-03-15 21:39:28,511 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:28,511 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-03-15 21:39:28,511 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=1194, Unknown=0, NotChecked=0, Total=1406 [2022-03-15 21:39:28,511 INFO L87 Difference]: Start difference. First operand 865 states and 2107 transitions. Second operand has 22 states, 22 states have (on average 3.772727272727273) internal successors, (83), 21 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:28,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:28,960 INFO L93 Difference]: Finished difference Result 1508 states and 3692 transitions. [2022-03-15 21:39:28,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:39:28,960 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.772727272727273) internal successors, (83), 21 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:28,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:28,963 INFO L225 Difference]: With dead ends: 1508 [2022-03-15 21:39:28,963 INFO L226 Difference]: Without dead ends: 1465 [2022-03-15 21:39:28,963 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 70 SyntacticMatches, 26 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1097 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=342, Invalid=1914, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:39:28,964 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 118 mSDsluCounter, 137 mSDsCounter, 0 mSdLazyCounter, 566 mSolverCounterSat, 77 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 643 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 77 IncrementalHoareTripleChecker+Valid, 566 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:28,964 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 8 Invalid, 643 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [77 Valid, 566 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:39:28,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1465 states. [2022-03-15 21:39:28,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1465 to 993. [2022-03-15 21:39:28,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 993 states, 992 states have (on average 2.442540322580645) internal successors, (2423), 992 states have internal predecessors, (2423), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:28,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 993 states to 993 states and 2423 transitions. [2022-03-15 21:39:28,978 INFO L78 Accepts]: Start accepts. Automaton has 993 states and 2423 transitions. Word has length 31 [2022-03-15 21:39:28,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:28,978 INFO L470 AbstractCegarLoop]: Abstraction has 993 states and 2423 transitions. [2022-03-15 21:39:28,978 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.772727272727273) internal successors, (83), 21 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:28,978 INFO L276 IsEmpty]: Start isEmpty. Operand 993 states and 2423 transitions. [2022-03-15 21:39:28,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:28,980 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:28,980 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:29,002 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (30)] Ended with exit code 0 [2022-03-15 21:39:29,202 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,30 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:29,202 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:29,202 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:29,203 INFO L85 PathProgramCache]: Analyzing trace with hash 1326954254, now seen corresponding path program 27 times [2022-03-15 21:39:29,203 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:29,203 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1453404000] [2022-03-15 21:39:29,204 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:29,204 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:29,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:29,406 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:29,406 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:29,406 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1453404000] [2022-03-15 21:39:29,406 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1453404000] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:29,406 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [691605598] [2022-03-15 21:39:29,406 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:39:29,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:29,407 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:29,408 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:29,409 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2022-03-15 21:39:29,433 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-03-15 21:39:29,433 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:29,434 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:29,434 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:29,860 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,860 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,865 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:29,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:29,867 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:29,878 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:29,878 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:30,439 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:30,439 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:31,165 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 41 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:31,165 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [691605598] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:31,165 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:31,165 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 28 [2022-03-15 21:39:31,165 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1055389209] [2022-03-15 21:39:31,165 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:31,167 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:31,180 INFO L252 McrAutomatonBuilder]: Finished intersection with 87 states and 157 transitions. [2022-03-15 21:39:31,180 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:33,904 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [56902#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 56903#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 56898#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 56899#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 56901#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 56900#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 56904#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 56897#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:39:33,904 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:39:33,904 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:33,904 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:39:33,905 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=179, Invalid=1153, Unknown=0, NotChecked=0, Total=1332 [2022-03-15 21:39:33,905 INFO L87 Difference]: Start difference. First operand 993 states and 2423 transitions. Second operand has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:34,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:34,415 INFO L93 Difference]: Finished difference Result 1849 states and 4571 transitions. [2022-03-15 21:39:34,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:39:34,416 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:34,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:34,419 INFO L225 Difference]: With dead ends: 1849 [2022-03-15 21:39:34,419 INFO L226 Difference]: Without dead ends: 1833 [2022-03-15 21:39:34,420 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 70 SyntacticMatches, 23 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 829 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=301, Invalid=1955, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:39:34,420 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 102 mSDsluCounter, 161 mSDsCounter, 0 mSdLazyCounter, 676 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 102 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 720 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 676 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:34,420 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [102 Valid, 7 Invalid, 720 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 676 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:34,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1833 states. [2022-03-15 21:39:34,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1833 to 969. [2022-03-15 21:39:34,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 968 states have (on average 2.4411157024793386) internal successors, (2363), 968 states have internal predecessors, (2363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:34,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 2363 transitions. [2022-03-15 21:39:34,436 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 2363 transitions. Word has length 31 [2022-03-15 21:39:34,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:34,436 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 2363 transitions. [2022-03-15 21:39:34,436 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.761904761904762) internal successors, (79), 20 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:34,436 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 2363 transitions. [2022-03-15 21:39:34,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:34,438 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:34,438 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:34,459 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Ended with exit code 0 [2022-03-15 21:39:34,654 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 31 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable33 [2022-03-15 21:39:34,654 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:34,655 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:34,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1134833670, now seen corresponding path program 28 times [2022-03-15 21:39:34,655 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:34,655 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [901056711] [2022-03-15 21:39:34,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:34,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:34,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:34,913 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:34,913 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:34,913 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [901056711] [2022-03-15 21:39:34,913 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [901056711] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:34,913 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2098866607] [2022-03-15 21:39:34,913 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:39:34,914 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:34,914 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:34,915 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:34,944 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2022-03-15 21:39:34,950 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:39:34,951 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:34,951 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:34,952 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:35,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,455 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:35,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:35,456 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:35,467 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:35,467 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:36,022 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:36,022 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:36,726 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 8 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:36,727 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2098866607] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:36,727 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:36,727 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 29 [2022-03-15 21:39:36,727 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [222296210] [2022-03-15 21:39:36,727 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:36,730 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:36,742 INFO L252 McrAutomatonBuilder]: Finished intersection with 79 states and 137 transitions. [2022-03-15 21:39:36,743 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:38,898 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [60928#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 60926#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 60929#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 60925#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 60930#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 60927#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 60924#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:39:38,899 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 21 states [2022-03-15 21:39:38,899 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:38,899 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2022-03-15 21:39:38,899 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=177, Invalid=1155, Unknown=0, NotChecked=0, Total=1332 [2022-03-15 21:39:38,899 INFO L87 Difference]: Start difference. First operand 969 states and 2363 transitions. Second operand has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:39,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:39,500 INFO L93 Difference]: Finished difference Result 1817 states and 4499 transitions. [2022-03-15 21:39:39,500 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:39:39,500 INFO L78 Accepts]: Start accepts. Automaton has has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:39,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:39,504 INFO L225 Difference]: With dead ends: 1817 [2022-03-15 21:39:39,504 INFO L226 Difference]: Without dead ends: 1801 [2022-03-15 21:39:39,504 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 62 SyntacticMatches, 23 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 807 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=309, Invalid=2043, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:39:39,505 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 105 mSDsluCounter, 198 mSDsCounter, 0 mSdLazyCounter, 852 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 105 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 889 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 852 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:39,505 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [105 Valid, 10 Invalid, 889 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 852 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:39,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1801 states. [2022-03-15 21:39:39,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1801 to 969. [2022-03-15 21:39:39,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 969 states, 968 states have (on average 2.4411157024793386) internal successors, (2363), 968 states have internal predecessors, (2363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:39,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 969 states to 969 states and 2363 transitions. [2022-03-15 21:39:39,522 INFO L78 Accepts]: Start accepts. Automaton has 969 states and 2363 transitions. Word has length 31 [2022-03-15 21:39:39,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:39,522 INFO L470 AbstractCegarLoop]: Abstraction has 969 states and 2363 transitions. [2022-03-15 21:39:39,522 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 21 states, 21 states have (on average 3.4761904761904763) internal successors, (73), 20 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:39,522 INFO L276 IsEmpty]: Start isEmpty. Operand 969 states and 2363 transitions. [2022-03-15 21:39:39,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:39,524 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:39,524 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:39,544 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:39,739 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,32 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:39,739 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:39,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:39,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1845455358, now seen corresponding path program 29 times [2022-03-15 21:39:39,740 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:39,740 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132586757] [2022-03-15 21:39:39,740 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:39,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:39,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:40,012 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:40,013 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:40,013 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132586757] [2022-03-15 21:39:40,013 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132586757] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:40,013 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [673884898] [2022-03-15 21:39:40,013 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:39:40,013 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:40,013 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:40,014 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:40,015 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2022-03-15 21:39:40,040 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:39:40,040 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:40,041 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 44 conjunts are in the unsatisfiable core [2022-03-15 21:39:40,041 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:40,517 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,518 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,518 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,519 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,520 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,520 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,521 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,524 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,525 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,526 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,526 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,531 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:40,531 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 36 [2022-03-15 21:39:40,542 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:40,542 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:40,946 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,948 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,950 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,950 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,950 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,951 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,951 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,953 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,955 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,956 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,957 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,957 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,957 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,958 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,958 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,959 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,959 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,959 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,960 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,961 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,962 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,963 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:40,963 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:41,025 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:39:41,026 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 30 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 15 case distinctions, treesize of input 94 treesize of output 208 [2022-03-15 21:39:41,477 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:41,478 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [673884898] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:41,478 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:41,478 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 29 [2022-03-15 21:39:41,478 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1125182969] [2022-03-15 21:39:41,478 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:41,480 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:41,489 INFO L252 McrAutomatonBuilder]: Finished intersection with 75 states and 127 transitions. [2022-03-15 21:39:41,489 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:43,402 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 6 new interpolants: [64921#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 64923#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 64920#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 64925#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 64922#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 64924#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:39:43,403 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 20 states [2022-03-15 21:39:43,403 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:43,403 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2022-03-15 21:39:43,403 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=228, Invalid=1032, Unknown=0, NotChecked=0, Total=1260 [2022-03-15 21:39:43,403 INFO L87 Difference]: Start difference. First operand 969 states and 2363 transitions. Second operand has 20 states, 20 states have (on average 3.45) internal successors, (69), 19 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:43,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:43,992 INFO L93 Difference]: Finished difference Result 1466 states and 3596 transitions. [2022-03-15 21:39:43,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:39:43,993 INFO L78 Accepts]: Start accepts. Automaton has has 20 states, 20 states have (on average 3.45) internal successors, (69), 19 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:43,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:43,995 INFO L225 Difference]: With dead ends: 1466 [2022-03-15 21:39:43,995 INFO L226 Difference]: Without dead ends: 1457 [2022-03-15 21:39:43,995 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 57 SyntacticMatches, 25 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 941 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=383, Invalid=1873, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:39:43,995 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 103 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 889 mSolverCounterSat, 31 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 103 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 920 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 31 IncrementalHoareTripleChecker+Valid, 889 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:43,996 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [103 Valid, 11 Invalid, 920 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [31 Valid, 889 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:43,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1457 states. [2022-03-15 21:39:44,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1457 to 985. [2022-03-15 21:39:44,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 985 states, 984 states have (on average 2.442073170731707) internal successors, (2403), 984 states have internal predecessors, (2403), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:44,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 985 states to 985 states and 2403 transitions. [2022-03-15 21:39:44,016 INFO L78 Accepts]: Start accepts. Automaton has 985 states and 2403 transitions. Word has length 31 [2022-03-15 21:39:44,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:44,017 INFO L470 AbstractCegarLoop]: Abstraction has 985 states and 2403 transitions. [2022-03-15 21:39:44,017 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 20 states, 20 states have (on average 3.45) internal successors, (69), 19 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:44,017 INFO L276 IsEmpty]: Start isEmpty. Operand 985 states and 2403 transitions. [2022-03-15 21:39:44,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:44,018 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:44,018 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:44,033 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:44,218 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35,33 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:44,219 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:44,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:44,219 INFO L85 PathProgramCache]: Analyzing trace with hash 208451806, now seen corresponding path program 30 times [2022-03-15 21:39:44,220 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:44,220 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372693948] [2022-03-15 21:39:44,220 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:44,220 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:44,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:44,459 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:44,459 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:44,459 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372693948] [2022-03-15 21:39:44,459 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372693948] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:44,459 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1237611789] [2022-03-15 21:39:44,460 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:39:44,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:44,460 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:44,461 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:44,462 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2022-03-15 21:39:44,492 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:39:44,492 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:44,493 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:44,494 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:44,963 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,964 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,965 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,965 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:44,966 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,966 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,967 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,967 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,968 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,968 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:44,969 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,969 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,970 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:44,970 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 10 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:44,982 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:44,982 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:45,556 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:45,556 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:46,063 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:46,063 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1237611789] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:46,063 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:46,063 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 29 [2022-03-15 21:39:46,063 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [264429825] [2022-03-15 21:39:46,063 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:46,065 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:46,076 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:39:46,076 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:49,089 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [68599#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 68596#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 68602#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 68600#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 68597#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 68601#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum) 0))), 68603#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 68605#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 68598#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 68604#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:39:49,089 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:39:49,089 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:49,090 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:39:49,090 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=223, Invalid=1337, Unknown=0, NotChecked=0, Total=1560 [2022-03-15 21:39:49,090 INFO L87 Difference]: Start difference. First operand 985 states and 2403 transitions. Second operand has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:49,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:49,556 INFO L93 Difference]: Finished difference Result 1684 states and 4128 transitions. [2022-03-15 21:39:49,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:39:49,557 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:49,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:49,560 INFO L225 Difference]: With dead ends: 1684 [2022-03-15 21:39:49,560 INFO L226 Difference]: Without dead ends: 1641 [2022-03-15 21:39:49,560 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 73 SyntacticMatches, 21 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1076 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=352, Invalid=2098, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:39:49,560 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 118 mSDsluCounter, 145 mSDsCounter, 0 mSdLazyCounter, 587 mSolverCounterSat, 75 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 662 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 75 IncrementalHoareTripleChecker+Valid, 587 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:49,561 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 10 Invalid, 662 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [75 Valid, 587 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:49,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1641 states. [2022-03-15 21:39:49,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1641 to 1089. [2022-03-15 21:39:49,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1088 states have (on average 2.4448529411764706) internal successors, (2660), 1088 states have internal predecessors, (2660), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:49,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 2660 transitions. [2022-03-15 21:39:49,580 INFO L78 Accepts]: Start accepts. Automaton has 1089 states and 2660 transitions. Word has length 31 [2022-03-15 21:39:49,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:49,580 INFO L470 AbstractCegarLoop]: Abstraction has 1089 states and 2660 transitions. [2022-03-15 21:39:49,580 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:49,580 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 2660 transitions. [2022-03-15 21:39:49,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:49,582 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:49,582 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:49,606 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:49,795 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 34 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable36 [2022-03-15 21:39:49,795 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:49,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:49,796 INFO L85 PathProgramCache]: Analyzing trace with hash -836188974, now seen corresponding path program 31 times [2022-03-15 21:39:49,797 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:49,797 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [324516596] [2022-03-15 21:39:49,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:49,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:49,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:50,028 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:50,029 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:50,029 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [324516596] [2022-03-15 21:39:50,029 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [324516596] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:50,029 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1947483006] [2022-03-15 21:39:50,029 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:39:50,029 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:50,029 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:50,030 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:50,030 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2022-03-15 21:39:50,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:50,055 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:50,056 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:50,497 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,498 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,498 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,499 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,499 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,500 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:50,500 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,501 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:50,501 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,502 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,503 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,503 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,504 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:50,505 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 10 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:50,516 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:50,516 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:51,098 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:51,098 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:51,761 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:51,762 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1947483006] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:51,762 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:51,762 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 30 [2022-03-15 21:39:51,762 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1525233403] [2022-03-15 21:39:51,762 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:51,765 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:51,775 INFO L252 McrAutomatonBuilder]: Finished intersection with 79 states and 137 transitions. [2022-03-15 21:39:51,775 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:53,951 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [72705#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 72702#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 72704#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 72706#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 72700#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 72701#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 72703#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front)))), 72699#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:39:53,952 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-03-15 21:39:53,952 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:53,952 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-03-15 21:39:53,952 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=194, Invalid=1288, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:39:53,953 INFO L87 Difference]: Start difference. First operand 1089 states and 2660 transitions. Second operand has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:54,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:54,549 INFO L93 Difference]: Finished difference Result 2005 states and 4986 transitions. [2022-03-15 21:39:54,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:39:54,549 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:54,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:54,554 INFO L225 Difference]: With dead ends: 2005 [2022-03-15 21:39:54,554 INFO L226 Difference]: Without dead ends: 1977 [2022-03-15 21:39:54,555 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 65 SyntacticMatches, 18 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 841 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=328, Invalid=2222, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:39:54,555 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 114 mSDsluCounter, 175 mSDsCounter, 0 mSdLazyCounter, 819 mSolverCounterSat, 42 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 861 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 42 IncrementalHoareTripleChecker+Valid, 819 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:54,555 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [114 Valid, 9 Invalid, 861 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [42 Valid, 819 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:39:54,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1977 states. [2022-03-15 21:39:54,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1977 to 1121. [2022-03-15 21:39:54,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1121 states, 1120 states have (on average 2.4464285714285716) internal successors, (2740), 1120 states have internal predecessors, (2740), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:54,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1121 states to 1121 states and 2740 transitions. [2022-03-15 21:39:54,584 INFO L78 Accepts]: Start accepts. Automaton has 1121 states and 2740 transitions. Word has length 31 [2022-03-15 21:39:54,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:54,584 INFO L470 AbstractCegarLoop]: Abstraction has 1121 states and 2740 transitions. [2022-03-15 21:39:54,584 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:54,584 INFO L276 IsEmpty]: Start isEmpty. Operand 1121 states and 2740 transitions. [2022-03-15 21:39:54,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:54,586 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:54,586 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:54,611 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Forceful destruction successful, exit code 0 [2022-03-15 21:39:54,811 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 35 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable37 [2022-03-15 21:39:54,812 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:39:54,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:39:54,812 INFO L85 PathProgramCache]: Analyzing trace with hash 256563934, now seen corresponding path program 32 times [2022-03-15 21:39:54,813 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:39:54,813 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897881931] [2022-03-15 21:39:54,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:39:54,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:39:54,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:39:55,051 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:55,052 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:39:55,052 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1897881931] [2022-03-15 21:39:55,052 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1897881931] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:39:55,052 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1269212846] [2022-03-15 21:39:55,052 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:39:55,052 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:39:55,052 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:39:55,053 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:39:55,055 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Waiting until timeout for monitored process [2022-03-15 21:39:55,087 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:39:55,088 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:39:55,089 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:39:55,089 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:39:55,538 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:55,539 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,539 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,540 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,540 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,541 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,542 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,542 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,543 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,543 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,544 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,544 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,545 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,545 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:39:55,546 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:39:55,546 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 10 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:39:55,558 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:55,558 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:39:56,158 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:39:56,158 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:39:56,689 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 1 proven. 43 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:39:56,689 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1269212846] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:39:56,689 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:39:56,689 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 29 [2022-03-15 21:39:56,689 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [897604171] [2022-03-15 21:39:56,690 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:39:56,692 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:39:56,702 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:39:56,703 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:39:59,366 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [77193#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 77188#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 77194#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 77192#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 77195#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 77190#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 77191#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 77197#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 77189#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 77196#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:39:59,367 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:39:59,367 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:39:59,367 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:39:59,367 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=1343, Unknown=0, NotChecked=0, Total=1560 [2022-03-15 21:39:59,367 INFO L87 Difference]: Start difference. First operand 1121 states and 2740 transitions. Second operand has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:59,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:39:59,784 INFO L93 Difference]: Finished difference Result 1722 states and 4214 transitions. [2022-03-15 21:39:59,784 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:39:59,784 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:39:59,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:39:59,787 INFO L225 Difference]: With dead ends: 1722 [2022-03-15 21:39:59,787 INFO L226 Difference]: Without dead ends: 1681 [2022-03-15 21:39:59,787 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 69 SyntacticMatches, 25 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1174 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=346, Invalid=2104, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:39:59,788 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 127 mSDsluCounter, 116 mSDsCounter, 0 mSdLazyCounter, 469 mSolverCounterSat, 85 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 554 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 85 IncrementalHoareTripleChecker+Valid, 469 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:39:59,788 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [127 Valid, 8 Invalid, 554 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [85 Valid, 469 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:39:59,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1681 states. [2022-03-15 21:39:59,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1681 to 1209. [2022-03-15 21:39:59,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1209 states, 1208 states have (on average 2.4503311258278146) internal successors, (2960), 1208 states have internal predecessors, (2960), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:59,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1209 states to 1209 states and 2960 transitions. [2022-03-15 21:39:59,808 INFO L78 Accepts]: Start accepts. Automaton has 1209 states and 2960 transitions. Word has length 31 [2022-03-15 21:39:59,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:39:59,808 INFO L470 AbstractCegarLoop]: Abstraction has 1209 states and 2960 transitions. [2022-03-15 21:39:59,808 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.739130434782609) internal successors, (86), 22 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:39:59,808 INFO L276 IsEmpty]: Start isEmpty. Operand 1209 states and 2960 transitions. [2022-03-15 21:39:59,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:39:59,810 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:39:59,810 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:39:59,832 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (36)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:00,032 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 36 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable38 [2022-03-15 21:40:00,032 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:00,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:00,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1699680674, now seen corresponding path program 33 times [2022-03-15 21:40:00,033 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:00,033 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230179425] [2022-03-15 21:40:00,033 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:00,033 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:00,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:00,270 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 38 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:40:00,270 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:00,270 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230179425] [2022-03-15 21:40:00,270 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [230179425] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:00,270 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1631540543] [2022-03-15 21:40:00,270 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:40:00,270 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:00,271 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:00,272 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:00,273 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Waiting until timeout for monitored process [2022-03-15 21:40:00,303 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-03-15 21:40:00,304 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:00,304 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:40:00,305 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:00,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,760 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,761 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,761 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,763 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,763 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,765 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:00,765 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,766 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,766 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,767 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,769 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:00,769 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,770 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,770 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,771 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:00,771 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:00,772 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:00,772 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 10 disjoint index pairs (out of 36 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:40:00,783 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 3 proven. 41 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:00,784 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:01,367 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:40:01,367 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:40:02,219 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 2 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:02,219 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1631540543] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:02,219 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:02,220 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 31 [2022-03-15 21:40:02,220 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1455938873] [2022-03-15 21:40:02,220 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:02,222 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:02,234 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 167 transitions. [2022-03-15 21:40:02,234 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:04,784 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [81570#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 81573#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 81576#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 81572#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 81575#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 81571#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 81578#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 81579#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 81577#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 81574#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:40:04,784 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:40:04,784 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:04,785 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:40:04,785 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=1484, Unknown=0, NotChecked=0, Total=1722 [2022-03-15 21:40:04,785 INFO L87 Difference]: Start difference. First operand 1209 states and 2960 transitions. Second operand has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 22 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:05,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:05,209 INFO L93 Difference]: Finished difference Result 1858 states and 4558 transitions. [2022-03-15 21:40:05,210 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2022-03-15 21:40:05,210 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 22 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:40:05,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:05,223 INFO L225 Difference]: With dead ends: 1858 [2022-03-15 21:40:05,224 INFO L226 Difference]: Without dead ends: 1817 [2022-03-15 21:40:05,224 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 80 SyntacticMatches, 12 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1003 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=362, Invalid=2290, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:40:05,224 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 141 mSDsluCounter, 120 mSDsCounter, 0 mSdLazyCounter, 450 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 141 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 534 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 450 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:05,224 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [141 Valid, 9 Invalid, 534 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 450 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:40:05,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1817 states. [2022-03-15 21:40:05,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1817 to 1353. [2022-03-15 21:40:05,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1353 states, 1352 states have (on average 2.4437869822485205) internal successors, (3304), 1352 states have internal predecessors, (3304), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:05,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1353 states to 1353 states and 3304 transitions. [2022-03-15 21:40:05,247 INFO L78 Accepts]: Start accepts. Automaton has 1353 states and 3304 transitions. Word has length 31 [2022-03-15 21:40:05,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:05,247 INFO L470 AbstractCegarLoop]: Abstraction has 1353 states and 3304 transitions. [2022-03-15 21:40:05,247 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.652173913043478) internal successors, (84), 22 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:05,247 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 3304 transitions. [2022-03-15 21:40:05,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:40:05,249 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:05,249 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:05,275 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (37)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:05,463 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 37 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable39 [2022-03-15 21:40:05,463 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:05,464 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:05,464 INFO L85 PathProgramCache]: Analyzing trace with hash -1485355690, now seen corresponding path program 34 times [2022-03-15 21:40:05,465 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:05,465 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568878769] [2022-03-15 21:40:05,465 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:05,465 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:05,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:05,686 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:05,687 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:05,687 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568878769] [2022-03-15 21:40:05,687 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1568878769] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:05,687 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1125580528] [2022-03-15 21:40:05,687 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:40:05,687 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:05,687 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:05,688 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:05,689 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Waiting until timeout for monitored process [2022-03-15 21:40:05,712 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:40:05,712 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:05,713 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:40:05,713 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:06,187 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,188 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:06,189 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,189 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,191 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,207 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,208 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,209 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:06,210 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,210 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,211 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:06,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:06,214 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:06,215 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 10 disjoint index pairs (out of 36 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:40:06,227 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:06,227 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:06,822 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:40:06,823 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:40:07,460 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 7 proven. 37 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:07,460 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1125580528] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:07,460 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:07,460 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 32 [2022-03-15 21:40:07,460 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [707236277] [2022-03-15 21:40:07,460 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:07,464 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:07,474 INFO L252 McrAutomatonBuilder]: Finished intersection with 83 states and 147 transitions. [2022-03-15 21:40:07,475 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:09,566 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [86383#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 86380#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 86382#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 86384#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 86379#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 86381#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 86377#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 86385#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 86378#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:40:09,567 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:40:09,567 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:09,567 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:40:09,567 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=1512, Unknown=0, NotChecked=0, Total=1722 [2022-03-15 21:40:09,567 INFO L87 Difference]: Start difference. First operand 1353 states and 3304 transitions. Second operand has 23 states, 23 states have (on average 3.4782608695652173) internal successors, (80), 22 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:10,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:10,104 INFO L93 Difference]: Finished difference Result 2401 states and 5936 transitions. [2022-03-15 21:40:10,104 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:40:10,104 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.4782608695652173) internal successors, (80), 22 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:40:10,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:10,108 INFO L225 Difference]: With dead ends: 2401 [2022-03-15 21:40:10,108 INFO L226 Difference]: Without dead ends: 2385 [2022-03-15 21:40:10,108 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 72 SyntacticMatches, 12 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 868 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=340, Invalid=2522, Unknown=0, NotChecked=0, Total=2862 [2022-03-15 21:40:10,108 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 158 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 683 mSolverCounterSat, 56 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 158 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 56 IncrementalHoareTripleChecker+Valid, 683 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:10,108 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [158 Valid, 8 Invalid, 739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [56 Valid, 683 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:40:10,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2385 states. [2022-03-15 21:40:10,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2385 to 1201. [2022-03-15 21:40:10,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1201 states, 1200 states have (on average 2.453333333333333) internal successors, (2944), 1200 states have internal predecessors, (2944), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:10,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1201 states to 1201 states and 2944 transitions. [2022-03-15 21:40:10,130 INFO L78 Accepts]: Start accepts. Automaton has 1201 states and 2944 transitions. Word has length 31 [2022-03-15 21:40:10,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:10,130 INFO L470 AbstractCegarLoop]: Abstraction has 1201 states and 2944 transitions. [2022-03-15 21:40:10,130 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.4782608695652173) internal successors, (80), 22 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:10,130 INFO L276 IsEmpty]: Start isEmpty. Operand 1201 states and 2944 transitions. [2022-03-15 21:40:10,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2022-03-15 21:40:10,131 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:10,131 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:10,147 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (38)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:10,332 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40,38 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:10,332 INFO L402 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:10,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:10,332 INFO L85 PathProgramCache]: Analyzing trace with hash 1550645842, now seen corresponding path program 35 times [2022-03-15 21:40:10,341 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:10,341 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523530390] [2022-03-15 21:40:10,341 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:10,341 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:10,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:10,555 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:10,555 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:10,555 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523530390] [2022-03-15 21:40:10,555 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [523530390] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:10,555 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [833679679] [2022-03-15 21:40:10,555 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:40:10,555 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:10,556 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:10,556 INFO L229 MonitoredProcess]: Starting monitored process 39 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:10,574 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Waiting until timeout for monitored process [2022-03-15 21:40:10,593 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:40:10,593 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:10,594 INFO L263 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 43 conjunts are in the unsatisfiable core [2022-03-15 21:40:10,594 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:11,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,077 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,080 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,080 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,081 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,081 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,085 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,085 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:11,086 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 10 disjoint index pairs (out of 36 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 32 [2022-03-15 21:40:11,097 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 5 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:11,098 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:11,465 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,466 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,467 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,467 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,469 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,469 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,469 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,470 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,471 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,471 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,471 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,473 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,474 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,474 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,475 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,476 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,476 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,476 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,477 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,478 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,478 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,478 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,479 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,480 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,482 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,482 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,482 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:11,529 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:40:11,529 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 30 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 15 case distinctions, treesize of input 94 treesize of output 208 [2022-03-15 21:40:11,869 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 8 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:11,869 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [833679679] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:11,869 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:11,869 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13] total 32 [2022-03-15 21:40:11,869 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1587884793] [2022-03-15 21:40:11,869 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:11,872 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:11,881 INFO L252 McrAutomatonBuilder]: Finished intersection with 79 states and 137 transitions. [2022-03-15 21:40:11,881 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:13,720 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [91430#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 91429#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 91428#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 91431#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 91426#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 91432#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 91433#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 91427#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:40:13,720 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-03-15 21:40:13,720 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:13,720 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-03-15 21:40:13,721 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=1425, Unknown=0, NotChecked=0, Total=1640 [2022-03-15 21:40:13,721 INFO L87 Difference]: Start difference. First operand 1201 states and 2944 transitions. Second operand has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:14,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:14,254 INFO L93 Difference]: Finished difference Result 1587 states and 3917 transitions. [2022-03-15 21:40:14,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:40:14,254 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 31 [2022-03-15 21:40:14,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:14,256 INFO L225 Difference]: With dead ends: 1587 [2022-03-15 21:40:14,256 INFO L226 Difference]: Without dead ends: 1577 [2022-03-15 21:40:14,257 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 72 SyntacticMatches, 9 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 779 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=347, Invalid=2409, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:40:14,257 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 124 mSDsluCounter, 155 mSDsCounter, 0 mSdLazyCounter, 725 mSolverCounterSat, 37 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 762 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 37 IncrementalHoareTripleChecker+Valid, 725 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:14,257 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [124 Valid, 7 Invalid, 762 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [37 Valid, 725 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:40:14,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1577 states. [2022-03-15 21:40:14,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1577 to 1161. [2022-03-15 21:40:14,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1161 states, 1160 states have (on average 2.4517241379310346) internal successors, (2844), 1160 states have internal predecessors, (2844), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:14,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1161 states to 1161 states and 2844 transitions. [2022-03-15 21:40:14,273 INFO L78 Accepts]: Start accepts. Automaton has 1161 states and 2844 transitions. Word has length 31 [2022-03-15 21:40:14,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:14,273 INFO L470 AbstractCegarLoop]: Abstraction has 1161 states and 2844 transitions. [2022-03-15 21:40:14,273 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.4545454545454546) internal successors, (76), 21 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:14,273 INFO L276 IsEmpty]: Start isEmpty. Operand 1161 states and 2844 transitions. [2022-03-15 21:40:14,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-03-15 21:40:14,275 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:14,275 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:14,298 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (39)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:14,489 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 39 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable41 [2022-03-15 21:40:14,489 INFO L402 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:14,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:14,490 INFO L85 PathProgramCache]: Analyzing trace with hash -1986508864, now seen corresponding path program 36 times [2022-03-15 21:40:14,490 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:14,490 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [198531709] [2022-03-15 21:40:14,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:14,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:14,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:14,538 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 19 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:14,538 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:14,539 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [198531709] [2022-03-15 21:40:14,539 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [198531709] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:14,539 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1781276226] [2022-03-15 21:40:14,539 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:40:14,539 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:14,539 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:14,540 INFO L229 MonitoredProcess]: Starting monitored process 40 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:14,569 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Waiting until timeout for monitored process [2022-03-15 21:40:14,579 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2022-03-15 21:40:14,579 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:14,580 INFO L263 TraceCheckSpWp]: Trace formula consists of 107 conjuncts, 12 conjunts are in the unsatisfiable core [2022-03-15 21:40:14,581 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:14,631 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:40:14,631 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:14,735 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 36 proven. 18 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:40:14,735 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1781276226] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:14,735 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:14,735 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 8 [2022-03-15 21:40:14,735 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1366156655] [2022-03-15 21:40:14,736 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:14,738 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:14,749 INFO L252 McrAutomatonBuilder]: Finished intersection with 79 states and 133 transitions. [2022-03-15 21:40:14,749 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:14,992 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:40:14,992 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-03-15 21:40:14,992 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:14,993 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-03-15 21:40:14,993 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2022-03-15 21:40:14,993 INFO L87 Difference]: Start difference. First operand 1161 states and 2844 transitions. Second operand has 9 states, 9 states have (on average 4.555555555555555) internal successors, (41), 8 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:15,073 INFO L93 Difference]: Finished difference Result 1563 states and 3758 transitions. [2022-03-15 21:40:15,074 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2022-03-15 21:40:15,074 INFO L78 Accepts]: Start accepts. Automaton has has 9 states, 9 states have (on average 4.555555555555555) internal successors, (41), 8 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-03-15 21:40:15,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:15,076 INFO L225 Difference]: With dead ends: 1563 [2022-03-15 21:40:15,076 INFO L226 Difference]: Without dead ends: 1561 [2022-03-15 21:40:15,076 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 108 SyntacticMatches, 6 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2022-03-15 21:40:15,076 INFO L933 BasicCegarLoop]: 3 mSDtfsCounter, 66 mSDsluCounter, 103 mSDsCounter, 0 mSdLazyCounter, 136 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 66 SdHoareTripleChecker+Valid, 20 SdHoareTripleChecker+Invalid, 152 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:15,076 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [66 Valid, 20 Invalid, 152 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 136 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:40:15,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1561 states. [2022-03-15 21:40:15,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1561 to 1241. [2022-03-15 21:40:15,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1241 states, 1240 states have (on average 2.4612903225806453) internal successors, (3052), 1240 states have internal predecessors, (3052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1241 states to 1241 states and 3052 transitions. [2022-03-15 21:40:15,091 INFO L78 Accepts]: Start accepts. Automaton has 1241 states and 3052 transitions. Word has length 33 [2022-03-15 21:40:15,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:15,091 INFO L470 AbstractCegarLoop]: Abstraction has 1241 states and 3052 transitions. [2022-03-15 21:40:15,091 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 9 states have (on average 4.555555555555555) internal successors, (41), 8 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:15,091 INFO L276 IsEmpty]: Start isEmpty. Operand 1241 states and 3052 transitions. [2022-03-15 21:40:15,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2022-03-15 21:40:15,092 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:15,093 INFO L514 BasicCegarLoop]: trace histogram [5, 5, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:15,108 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (40)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:15,293 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 40 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable42 [2022-03-15 21:40:15,293 INFO L402 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:15,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:15,293 INFO L85 PathProgramCache]: Analyzing trace with hash -242481293, now seen corresponding path program 37 times [2022-03-15 21:40:15,294 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:15,294 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977469487] [2022-03-15 21:40:15,294 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:15,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:15,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:15,514 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 5 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:15,514 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:15,514 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977469487] [2022-03-15 21:40:15,514 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977469487] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:15,514 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [149770282] [2022-03-15 21:40:15,514 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:40:15,514 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:15,514 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:15,515 INFO L229 MonitoredProcess]: Starting monitored process 41 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:15,516 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Waiting until timeout for monitored process [2022-03-15 21:40:15,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:15,547 INFO L263 TraceCheckSpWp]: Trace formula consists of 108 conjuncts, 42 conjunts are in the unsatisfiable core [2022-03-15 21:40:15,548 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:16,016 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:16,016 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,018 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,018 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,023 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:16,023 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:16,024 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 10 disjoint index pairs (out of 21 index pairs), introduced 5 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 34 [2022-03-15 21:40:16,035 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 5 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:16,035 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:16,627 INFO L353 Elim1Store]: treesize reduction 264, result has 47.7 percent of original size [2022-03-15 21:40:16,627 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 10 new quantified variables, introduced 45 case distinctions, treesize of input 94 treesize of output 280 [2022-03-15 21:40:17,128 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 8 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:17,128 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [149770282] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:17,129 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:17,129 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 13] total 29 [2022-03-15 21:40:17,129 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [967002694] [2022-03-15 21:40:17,129 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:17,131 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:17,153 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 173 transitions. [2022-03-15 21:40:17,154 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:19,688 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [99836#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 99837#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 99842#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 99843#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 99835#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 99838#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 99840#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 99839#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 99841#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)))] [2022-03-15 21:40:19,689 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 22 states [2022-03-15 21:40:19,689 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:19,689 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2022-03-15 21:40:19,689 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=1292, Unknown=0, NotChecked=0, Total=1482 [2022-03-15 21:40:19,689 INFO L87 Difference]: Start difference. First operand 1241 states and 3052 transitions. Second operand has 22 states, 22 states have (on average 3.909090909090909) internal successors, (86), 21 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:20,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:20,158 INFO L93 Difference]: Finished difference Result 1992 states and 4960 transitions. [2022-03-15 21:40:20,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:40:20,158 INFO L78 Accepts]: Start accepts. Automaton has has 22 states, 22 states have (on average 3.909090909090909) internal successors, (86), 21 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 33 [2022-03-15 21:40:20,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:20,160 INFO L225 Difference]: With dead ends: 1992 [2022-03-15 21:40:20,160 INFO L226 Difference]: Without dead ends: 1977 [2022-03-15 21:40:20,161 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 78 SyntacticMatches, 23 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 972 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=315, Invalid=2135, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:40:20,161 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 138 mSDsluCounter, 153 mSDsCounter, 0 mSdLazyCounter, 565 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 620 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 565 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:20,161 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 10 Invalid, 620 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 565 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:40:20,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1977 states. [2022-03-15 21:40:20,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1977 to 1169. [2022-03-15 21:40:20,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1169 states, 1168 states have (on average 2.462328767123288) internal successors, (2876), 1168 states have internal predecessors, (2876), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:20,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1169 states to 1169 states and 2876 transitions. [2022-03-15 21:40:20,177 INFO L78 Accepts]: Start accepts. Automaton has 1169 states and 2876 transitions. Word has length 33 [2022-03-15 21:40:20,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:20,177 INFO L470 AbstractCegarLoop]: Abstraction has 1169 states and 2876 transitions. [2022-03-15 21:40:20,177 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 22 states, 22 states have (on average 3.909090909090909) internal successors, (86), 21 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:20,178 INFO L276 IsEmpty]: Start isEmpty. Operand 1169 states and 2876 transitions. [2022-03-15 21:40:20,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:20,179 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:20,179 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:20,194 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (41)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:20,379 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 41 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable43 [2022-03-15 21:40:20,379 INFO L402 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:20,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:20,380 INFO L85 PathProgramCache]: Analyzing trace with hash -2012186911, now seen corresponding path program 38 times [2022-03-15 21:40:20,380 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:20,380 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [383285424] [2022-03-15 21:40:20,380 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:20,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:20,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:20,634 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:20,634 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:20,634 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [383285424] [2022-03-15 21:40:20,634 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [383285424] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:20,634 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [139738324] [2022-03-15 21:40:20,634 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:40:20,634 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:20,634 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:20,635 INFO L229 MonitoredProcess]: Starting monitored process 42 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:20,636 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Waiting until timeout for monitored process [2022-03-15 21:40:20,661 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:40:20,661 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:20,662 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:40:20,662 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:21,301 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,302 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,303 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:21,304 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,305 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,305 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,306 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,307 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,307 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,308 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,308 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,309 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,310 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,310 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:21,311 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,312 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,313 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,314 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,315 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:21,316 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,316 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:21,317 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,318 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:21,318 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 15 disjoint index pairs (out of 45 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:40:21,331 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:21,332 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:22,219 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:40:22,220 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:40:23,074 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:23,074 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [139738324] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:23,074 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:23,074 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 36 [2022-03-15 21:40:23,074 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1409303448] [2022-03-15 21:40:23,074 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:23,077 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:23,090 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 169 transitions. [2022-03-15 21:40:23,090 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:25,743 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [104442#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 104437#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 104443#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 104438#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 104439#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 104440#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 104444#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 104441#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:40:25,743 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:40:25,743 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:25,744 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:40:25,744 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=1731, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:40:25,744 INFO L87 Difference]: Start difference. First operand 1169 states and 2876 transitions. Second operand has 23 states, 23 states have (on average 3.6956521739130435) internal successors, (85), 22 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:26,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:26,362 INFO L93 Difference]: Finished difference Result 2039 states and 5095 transitions. [2022-03-15 21:40:26,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:40:26,362 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.6956521739130435) internal successors, (85), 22 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:40:26,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:26,365 INFO L225 Difference]: With dead ends: 2039 [2022-03-15 21:40:26,365 INFO L226 Difference]: Without dead ends: 2017 [2022-03-15 21:40:26,365 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 76 SyntacticMatches, 23 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1328 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=401, Invalid=2905, Unknown=0, NotChecked=0, Total=3306 [2022-03-15 21:40:26,366 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 117 mSDsluCounter, 189 mSDsCounter, 0 mSdLazyCounter, 807 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 117 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 855 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 807 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:26,366 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [117 Valid, 9 Invalid, 855 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 807 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:40:26,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2017 states. [2022-03-15 21:40:26,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2017 to 1249. [2022-03-15 21:40:26,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1249 states, 1248 states have (on average 2.4615384615384617) internal successors, (3072), 1248 states have internal predecessors, (3072), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:26,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1249 states to 1249 states and 3072 transitions. [2022-03-15 21:40:26,382 INFO L78 Accepts]: Start accepts. Automaton has 1249 states and 3072 transitions. Word has length 35 [2022-03-15 21:40:26,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:26,382 INFO L470 AbstractCegarLoop]: Abstraction has 1249 states and 3072 transitions. [2022-03-15 21:40:26,382 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.6956521739130435) internal successors, (85), 22 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:26,382 INFO L276 IsEmpty]: Start isEmpty. Operand 1249 states and 3072 transitions. [2022-03-15 21:40:26,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:26,383 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:26,384 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:26,399 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (42)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:26,584 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44,42 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:26,584 INFO L402 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:26,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:26,584 INFO L85 PathProgramCache]: Analyzing trace with hash 20292221, now seen corresponding path program 39 times [2022-03-15 21:40:26,585 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:26,585 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1189642770] [2022-03-15 21:40:26,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:26,585 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:26,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:26,852 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:26,852 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:26,852 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1189642770] [2022-03-15 21:40:26,852 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1189642770] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:26,852 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1799496704] [2022-03-15 21:40:26,852 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:40:26,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:26,853 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:26,854 INFO L229 MonitoredProcess]: Starting monitored process 43 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:26,855 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Waiting until timeout for monitored process [2022-03-15 21:40:26,887 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-03-15 21:40:26,887 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:26,888 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:40:26,889 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:27,629 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,630 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,631 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,631 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,632 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:27,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,634 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,635 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,635 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,636 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,637 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:27,637 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,638 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,639 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,639 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,640 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,641 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:27,641 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,642 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,643 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,645 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,645 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:27,646 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:27,648 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 15 disjoint index pairs (out of 45 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:40:27,662 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:27,663 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:28,570 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:40:28,571 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:40:29,450 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:29,450 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1799496704] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:29,450 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:29,450 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 15] total 34 [2022-03-15 21:40:29,450 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [989305470] [2022-03-15 21:40:29,450 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:29,453 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:29,468 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:40:29,469 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:32,821 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [109250#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 109251#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 109247#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 109253#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 109255#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 109256#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 109254#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 109252#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 109248#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 109249#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)))] [2022-03-15 21:40:32,821 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:40:32,821 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:32,821 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:40:32,822 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=1685, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:40:32,822 INFO L87 Difference]: Start difference. First operand 1249 states and 3072 transitions. Second operand has 23 states, 23 states have (on average 4.130434782608695) internal successors, (95), 22 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:33,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:33,280 INFO L93 Difference]: Finished difference Result 1851 states and 4553 transitions. [2022-03-15 21:40:33,280 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:40:33,280 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 4.130434782608695) internal successors, (95), 22 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:40:33,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:33,283 INFO L225 Difference]: With dead ends: 1851 [2022-03-15 21:40:33,284 INFO L226 Difference]: Without dead ends: 1841 [2022-03-15 21:40:33,284 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 84 SyntacticMatches, 27 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1625 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=444, Invalid=2636, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:40:33,284 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 111 mSDsluCounter, 129 mSDsCounter, 0 mSdLazyCounter, 500 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 545 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 500 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:33,285 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [111 Valid, 7 Invalid, 545 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 500 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:40:33,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1841 states. [2022-03-15 21:40:33,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1841 to 1257. [2022-03-15 21:40:33,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1257 states, 1256 states have (on average 2.4585987261146496) internal successors, (3088), 1256 states have internal predecessors, (3088), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:33,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1257 states to 1257 states and 3088 transitions. [2022-03-15 21:40:33,302 INFO L78 Accepts]: Start accepts. Automaton has 1257 states and 3088 transitions. Word has length 35 [2022-03-15 21:40:33,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:33,303 INFO L470 AbstractCegarLoop]: Abstraction has 1257 states and 3088 transitions. [2022-03-15 21:40:33,303 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 4.130434782608695) internal successors, (95), 22 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:33,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1257 states and 3088 transitions. [2022-03-15 21:40:33,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:33,304 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:33,305 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:33,321 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (43)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:33,507 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45,43 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:33,507 INFO L402 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:33,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:33,508 INFO L85 PathProgramCache]: Analyzing trace with hash -1958304995, now seen corresponding path program 40 times [2022-03-15 21:40:33,508 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:33,508 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646849946] [2022-03-15 21:40:33,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:33,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:33,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:33,785 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:33,785 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:33,785 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646849946] [2022-03-15 21:40:33,785 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646849946] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:33,785 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1079803513] [2022-03-15 21:40:33,785 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:40:33,785 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:33,785 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:33,786 INFO L229 MonitoredProcess]: Starting monitored process 44 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:33,787 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Waiting until timeout for monitored process [2022-03-15 21:40:33,812 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:40:33,812 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:33,813 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:40:33,813 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:34,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,476 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,482 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:34,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,483 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,483 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,485 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:34,485 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,486 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,487 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,487 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,488 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,488 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,489 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,489 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:34,490 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,490 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,491 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:34,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:34,492 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 15 disjoint index pairs (out of 45 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:40:34,503 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:34,503 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:35,411 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:40:35,411 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:40:36,376 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:36,377 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1079803513] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:36,377 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:36,377 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 37 [2022-03-15 21:40:36,377 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [427913429] [2022-03-15 21:40:36,377 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:36,379 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:36,392 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 159 transitions. [2022-03-15 21:40:36,392 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:38,845 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [113886#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 113888#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 113890#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 113891#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 113893#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 113889#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 113892#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 113887#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:40:38,845 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:40:38,845 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:38,846 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:40:38,846 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=1811, Unknown=0, NotChecked=0, Total=2070 [2022-03-15 21:40:38,846 INFO L87 Difference]: Start difference. First operand 1257 states and 3088 transitions. Second operand has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:39,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:39,471 INFO L93 Difference]: Finished difference Result 2083 states and 5165 transitions. [2022-03-15 21:40:39,471 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:40:39,471 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:40:39,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:39,474 INFO L225 Difference]: With dead ends: 2083 [2022-03-15 21:40:39,475 INFO L226 Difference]: Without dead ends: 2073 [2022-03-15 21:40:39,475 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 79 SyntacticMatches, 15 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1108 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=424, Invalid=3116, Unknown=0, NotChecked=0, Total=3540 [2022-03-15 21:40:39,475 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 123 mSDsluCounter, 144 mSDsCounter, 0 mSdLazyCounter, 683 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 727 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 683 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:39,476 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [123 Valid, 5 Invalid, 727 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 683 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:40:39,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2073 states. [2022-03-15 21:40:39,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2073 to 1273. [2022-03-15 21:40:39,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1273 states, 1272 states have (on average 2.459119496855346) internal successors, (3128), 1272 states have internal predecessors, (3128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:39,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1273 states to 1273 states and 3128 transitions. [2022-03-15 21:40:39,495 INFO L78 Accepts]: Start accepts. Automaton has 1273 states and 3128 transitions. Word has length 35 [2022-03-15 21:40:39,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:39,495 INFO L470 AbstractCegarLoop]: Abstraction has 1273 states and 3128 transitions. [2022-03-15 21:40:39,495 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:39,495 INFO L276 IsEmpty]: Start isEmpty. Operand 1273 states and 3128 transitions. [2022-03-15 21:40:39,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:39,496 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:39,497 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:39,512 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (44)] Ended with exit code 0 [2022-03-15 21:40:39,697 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 44 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable46 [2022-03-15 21:40:39,697 INFO L402 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:39,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:39,697 INFO L85 PathProgramCache]: Analyzing trace with hash -13197263, now seen corresponding path program 41 times [2022-03-15 21:40:39,698 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:39,698 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936814828] [2022-03-15 21:40:39,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:39,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:39,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:39,983 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:39,983 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:39,983 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [936814828] [2022-03-15 21:40:39,983 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [936814828] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:39,984 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1435853613] [2022-03-15 21:40:39,984 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:40:39,985 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:39,985 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:39,986 INFO L229 MonitoredProcess]: Starting monitored process 45 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:39,986 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Waiting until timeout for monitored process [2022-03-15 21:40:40,014 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:40:40,014 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:40,015 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 52 conjunts are in the unsatisfiable core [2022-03-15 21:40:40,016 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:40,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:40,687 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,688 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,690 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,690 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,691 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,692 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,692 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,694 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,694 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:40,695 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,695 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,696 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,697 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,697 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,698 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,698 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,699 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,699 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,700 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,701 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,701 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,702 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:40,702 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:40,702 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:40,703 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 15 disjoint index pairs (out of 45 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 43 [2022-03-15 21:40:40,714 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:40,714 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:41,303 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,303 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,304 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,305 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,305 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,306 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,307 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,307 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,308 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,308 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,308 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,309 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,310 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,310 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,310 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,311 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,312 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,313 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,315 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,316 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,316 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,316 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,317 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,317 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,318 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,319 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,320 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,320 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,320 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,321 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,321 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,321 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,322 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,322 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,323 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,324 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,324 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,324 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,325 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,325 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,327 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,328 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,328 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:41,398 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:40:41,399 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 45 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 21 case distinctions, treesize of input 112 treesize of output 284 [2022-03-15 21:40:42,035 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:42,035 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1435853613] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:42,035 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:42,035 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 37 [2022-03-15 21:40:42,036 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [858400730] [2022-03-15 21:40:42,036 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:42,038 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:42,051 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 169 transitions. [2022-03-15 21:40:42,052 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:44,860 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [118795#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 2 front)) 1)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 sum))), 118796#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 118793#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 118800#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 118797#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 118798#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 118801#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 118794#(and (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 3 front)))) (or (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 2 front)) 1)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not (= (+ (select queue back) 1) 0)) (<= 0 sum)) (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ front 1)))) (or (= (+ (- 1) (select queue front)) 0) (not (= (+ (select queue back) 1) 0)))), 118802#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 118799#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:40:44,860 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:40:44,860 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:44,860 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:40:44,861 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=1891, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:40:44,861 INFO L87 Difference]: Start difference. First operand 1273 states and 3128 transitions. Second operand has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:45,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:45,606 INFO L93 Difference]: Finished difference Result 2874 states and 7170 transitions. [2022-03-15 21:40:45,606 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:40:45,606 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:40:45,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:45,610 INFO L225 Difference]: With dead ends: 2874 [2022-03-15 21:40:45,610 INFO L226 Difference]: Without dead ends: 2809 [2022-03-15 21:40:45,610 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 80 SyntacticMatches, 16 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=577, Invalid=3205, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:40:45,611 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 126 mSDsluCounter, 229 mSDsCounter, 0 mSdLazyCounter, 1024 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 13 SdHoareTripleChecker+Invalid, 1093 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 1024 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:45,611 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [126 Valid, 13 Invalid, 1093 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 1024 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:40:45,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2809 states. [2022-03-15 21:40:45,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2809 to 1369. [2022-03-15 21:40:45,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1369 states, 1368 states have (on average 2.4590643274853803) internal successors, (3364), 1368 states have internal predecessors, (3364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:45,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1369 states to 1369 states and 3364 transitions. [2022-03-15 21:40:45,629 INFO L78 Accepts]: Start accepts. Automaton has 1369 states and 3364 transitions. Word has length 35 [2022-03-15 21:40:45,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:45,629 INFO L470 AbstractCegarLoop]: Abstraction has 1369 states and 3364 transitions. [2022-03-15 21:40:45,630 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:45,630 INFO L276 IsEmpty]: Start isEmpty. Operand 1369 states and 3364 transitions. [2022-03-15 21:40:45,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:45,631 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:45,631 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:45,651 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (45)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:45,843 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 45 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable47 [2022-03-15 21:40:45,843 INFO L402 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:45,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:45,844 INFO L85 PathProgramCache]: Analyzing trace with hash -1086262019, now seen corresponding path program 42 times [2022-03-15 21:40:45,845 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:45,846 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1207382294] [2022-03-15 21:40:45,846 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:45,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:45,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:46,112 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:46,112 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:46,112 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1207382294] [2022-03-15 21:40:46,112 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1207382294] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:46,112 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [938871239] [2022-03-15 21:40:46,112 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:40:46,112 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:46,112 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:46,114 INFO L229 MonitoredProcess]: Starting monitored process 46 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:46,117 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Waiting until timeout for monitored process [2022-03-15 21:40:46,142 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:40:46,142 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:40:46,143 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:40:46,143 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:46,777 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,777 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:46,778 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,778 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,779 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,779 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,780 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,781 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,781 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,782 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,782 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,783 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,783 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,784 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,785 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,785 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,786 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,786 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,787 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,788 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,788 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:46,789 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,789 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,790 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,790 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,791 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,792 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,792 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:46,793 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:46,793 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:46,794 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 15 disjoint index pairs (out of 45 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:40:46,806 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:46,806 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:47,690 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:40:47,690 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:40:48,505 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 2 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:48,505 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [938871239] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:48,505 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:48,505 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 35 [2022-03-15 21:40:48,505 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [462585895] [2022-03-15 21:40:48,505 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:48,508 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:48,523 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:40:48,524 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:51,949 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [124683#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 124692#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 124684#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 124686#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 124685#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 124693#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 124688#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 124690#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 1))), 124691#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 124687#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 124689#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:40:51,949 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:40:51,949 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:51,949 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:40:51,949 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=318, Invalid=1844, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:40:51,950 INFO L87 Difference]: Start difference. First operand 1369 states and 3364 transitions. Second operand has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:52,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:40:52,800 INFO L93 Difference]: Finished difference Result 2194 states and 5374 transitions. [2022-03-15 21:40:52,800 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-03-15 21:40:52,800 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:40:52,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:40:52,803 INFO L225 Difference]: With dead ends: 2194 [2022-03-15 21:40:52,803 INFO L226 Difference]: Without dead ends: 2178 [2022-03-15 21:40:52,803 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 91 SyntacticMatches, 18 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1403 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=538, Invalid=3244, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:40:52,814 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 132 mSDsluCounter, 270 mSDsCounter, 0 mSdLazyCounter, 869 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 132 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 922 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 869 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:40:52,815 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [132 Valid, 27 Invalid, 922 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 869 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:40:52,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2178 states. [2022-03-15 21:40:52,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2178 to 1377. [2022-03-15 21:40:52,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1377 states, 1376 states have (on average 2.458575581395349) internal successors, (3383), 1376 states have internal predecessors, (3383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:52,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1377 states to 1377 states and 3383 transitions. [2022-03-15 21:40:52,832 INFO L78 Accepts]: Start accepts. Automaton has 1377 states and 3383 transitions. Word has length 35 [2022-03-15 21:40:52,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:40:52,832 INFO L470 AbstractCegarLoop]: Abstraction has 1377 states and 3383 transitions. [2022-03-15 21:40:52,832 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:40:52,833 INFO L276 IsEmpty]: Start isEmpty. Operand 1377 states and 3383 transitions. [2022-03-15 21:40:52,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:40:52,835 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:40:52,835 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:40:52,856 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (46)] Forceful destruction successful, exit code 0 [2022-03-15 21:40:53,051 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 46 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable48 [2022-03-15 21:40:53,052 INFO L402 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:40:53,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:40:53,052 INFO L85 PathProgramCache]: Analyzing trace with hash 2006278653, now seen corresponding path program 43 times [2022-03-15 21:40:53,053 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:40:53,054 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [793169915] [2022-03-15 21:40:53,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:40:53,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:40:53,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:53,336 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:40:53,336 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:40:53,336 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [793169915] [2022-03-15 21:40:53,336 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [793169915] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:40:53,337 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159418261] [2022-03-15 21:40:53,337 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:40:53,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:40:53,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:40:53,338 INFO L229 MonitoredProcess]: Starting monitored process 47 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:40:53,339 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Waiting until timeout for monitored process [2022-03-15 21:40:53,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:40:53,370 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:40:53,371 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:40:54,056 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,057 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,057 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,058 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,059 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:54,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,061 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,061 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,064 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,067 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:40:54,067 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:40:54,068 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:40:54,079 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:54,079 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:40:54,948 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:40:54,949 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:40:56,012 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:40:56,012 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159418261] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:40:56,012 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:40:56,012 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 33 [2022-03-15 21:40:56,012 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [359985417] [2022-03-15 21:40:56,012 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:40:56,015 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:40:56,030 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:40:56,030 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:40:59,527 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [129914#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 129910#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 129919#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 129913#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 129912#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 129915#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 129917#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 129911#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 129918#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 129920#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 129916#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ front 1) back)) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:40:59,527 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:40:59,527 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:40:59,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:40:59,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=264, Invalid=1716, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:40:59,528 INFO L87 Difference]: Start difference. First operand 1377 states and 3383 transitions. Second operand has 25 states, 25 states have (on average 3.76) internal successors, (94), 24 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:00,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:00,027 INFO L93 Difference]: Finished difference Result 2147 states and 5300 transitions. [2022-03-15 21:41:00,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:41:00,028 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.76) internal successors, (94), 24 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:00,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:00,030 INFO L225 Difference]: With dead ends: 2147 [2022-03-15 21:41:00,030 INFO L226 Difference]: Without dead ends: 2137 [2022-03-15 21:41:00,031 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 76 SyntacticMatches, 35 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1773 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=415, Invalid=2665, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:41:00,031 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 118 mSDsluCounter, 146 mSDsCounter, 0 mSdLazyCounter, 564 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 617 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 564 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:00,031 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 9 Invalid, 617 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 564 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:41:00,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2137 states. [2022-03-15 21:41:00,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2137 to 1377. [2022-03-15 21:41:00,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1377 states, 1376 states have (on average 2.458575581395349) internal successors, (3383), 1376 states have internal predecessors, (3383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:00,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1377 states to 1377 states and 3383 transitions. [2022-03-15 21:41:00,054 INFO L78 Accepts]: Start accepts. Automaton has 1377 states and 3383 transitions. Word has length 35 [2022-03-15 21:41:00,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:00,054 INFO L470 AbstractCegarLoop]: Abstraction has 1377 states and 3383 transitions. [2022-03-15 21:41:00,054 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.76) internal successors, (94), 24 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:00,054 INFO L276 IsEmpty]: Start isEmpty. Operand 1377 states and 3383 transitions. [2022-03-15 21:41:00,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:00,056 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:00,056 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:00,082 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (47)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:00,274 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49,47 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:00,274 INFO L402 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:00,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:00,274 INFO L85 PathProgramCache]: Analyzing trace with hash 398110757, now seen corresponding path program 44 times [2022-03-15 21:41:00,275 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:00,275 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236853264] [2022-03-15 21:41:00,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:00,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:00,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:00,578 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:00,578 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:00,578 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236853264] [2022-03-15 21:41:00,578 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1236853264] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:00,578 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [417991684] [2022-03-15 21:41:00,578 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:41:00,578 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:00,578 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:00,584 INFO L229 MonitoredProcess]: Starting monitored process 48 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:00,586 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Waiting until timeout for monitored process [2022-03-15 21:41:00,615 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:41:00,615 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:00,616 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:00,617 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:01,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,370 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,371 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,371 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,372 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,373 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,376 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:01,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,381 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:01,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:01,384 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:01,398 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:01,399 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:02,274 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:02,275 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:03,295 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 3 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:03,295 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [417991684] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:03,295 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:03,295 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 34 [2022-03-15 21:41:03,296 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1173064557] [2022-03-15 21:41:03,296 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:03,298 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:03,312 INFO L252 McrAutomatonBuilder]: Finished intersection with 99 states and 179 transitions. [2022-03-15 21:41:03,312 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:06,582 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [135084#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 135089#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 135085#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 135090#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 135088#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 135091#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 135087#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 135086#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 135083#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:41:06,582 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:41:06,582 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:06,583 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:41:06,583 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=1654, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:41:06,583 INFO L87 Difference]: Start difference. First operand 1377 states and 3383 transitions. Second operand has 24 states, 24 states have (on average 3.7083333333333335) internal successors, (89), 23 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:07,207 INFO L93 Difference]: Finished difference Result 2731 states and 6794 transitions. [2022-03-15 21:41:07,207 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:41:07,208 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.7083333333333335) internal successors, (89), 23 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:07,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:07,211 INFO L225 Difference]: With dead ends: 2731 [2022-03-15 21:41:07,211 INFO L226 Difference]: Without dead ends: 2673 [2022-03-15 21:41:07,211 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 79 SyntacticMatches, 25 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1247 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=400, Invalid=2792, Unknown=0, NotChecked=0, Total=3192 [2022-03-15 21:41:07,211 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 118 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 662 mSolverCounterSat, 78 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 740 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 78 IncrementalHoareTripleChecker+Valid, 662 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:07,211 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 5 Invalid, 740 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [78 Valid, 662 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:41:07,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2673 states. [2022-03-15 21:41:07,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2673 to 1433. [2022-03-15 21:41:07,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1433 states, 1432 states have (on average 2.4574022346368714) internal successors, (3519), 1432 states have internal predecessors, (3519), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1433 states to 1433 states and 3519 transitions. [2022-03-15 21:41:07,231 INFO L78 Accepts]: Start accepts. Automaton has 1433 states and 3519 transitions. Word has length 35 [2022-03-15 21:41:07,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:07,231 INFO L470 AbstractCegarLoop]: Abstraction has 1433 states and 3519 transitions. [2022-03-15 21:41:07,231 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.7083333333333335) internal successors, (89), 23 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:07,231 INFO L276 IsEmpty]: Start isEmpty. Operand 1433 states and 3519 transitions. [2022-03-15 21:41:07,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:07,233 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:07,233 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:07,248 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (48)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:07,433 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50,48 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:07,433 INFO L402 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:07,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:07,434 INFO L85 PathProgramCache]: Analyzing trace with hash -1322388355, now seen corresponding path program 45 times [2022-03-15 21:41:07,434 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:07,435 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417297504] [2022-03-15 21:41:07,435 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:07,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:07,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:07,755 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:07,755 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:07,755 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417297504] [2022-03-15 21:41:07,755 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [417297504] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:07,756 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [363729427] [2022-03-15 21:41:07,756 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:41:07,756 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:07,756 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:07,757 INFO L229 MonitoredProcess]: Starting monitored process 49 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:07,758 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Waiting until timeout for monitored process [2022-03-15 21:41:07,785 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-03-15 21:41:07,785 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:07,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:07,786 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:08,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,389 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:08,389 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,393 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:08,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,399 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:08,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:08,400 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 15 disjoint index pairs (out of 36 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:08,411 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:08,412 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:09,308 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:09,308 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:10,264 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 3 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:10,264 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [363729427] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:10,264 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:10,265 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 36 [2022-03-15 21:41:10,265 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2055765856] [2022-03-15 21:41:10,265 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:10,267 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:10,283 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:41:10,284 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:13,625 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [140961#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 140966#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 140965#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 140960#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (= (select queue (+ front 1)) 1) (not v_assert) (< back (+ 2 front))) (or (not v_assert) (<= 1 sum))), 140963#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 140956#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 140967#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 140962#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (= (select queue front) 1))), 140957#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 140958#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 140964#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 140959#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (<= back front)) (or (not v_assert) (<= back (+ front 1)))), 140968#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:41:13,625 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:41:13,625 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:13,626 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:41:13,626 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=311, Invalid=2139, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:41:13,626 INFO L87 Difference]: Start difference. First operand 1433 states and 3519 transitions. Second operand has 29 states, 29 states have (on average 3.4827586206896552) internal successors, (101), 28 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:14,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:14,242 INFO L93 Difference]: Finished difference Result 2539 states and 6256 transitions. [2022-03-15 21:41:14,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:41:14,243 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.4827586206896552) internal successors, (101), 28 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:14,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:14,246 INFO L225 Difference]: With dead ends: 2539 [2022-03-15 21:41:14,246 INFO L226 Difference]: Without dead ends: 2529 [2022-03-15 21:41:14,246 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 85 SyntacticMatches, 21 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1729 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=496, Invalid=3536, Unknown=0, NotChecked=0, Total=4032 [2022-03-15 21:41:14,247 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 668 mSolverCounterSat, 65 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 733 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 65 IncrementalHoareTripleChecker+Valid, 668 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:14,247 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 7 Invalid, 733 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [65 Valid, 668 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:41:14,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2529 states. [2022-03-15 21:41:14,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2529 to 1529. [2022-03-15 21:41:14,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1529 states, 1528 states have (on average 2.457460732984293) internal successors, (3755), 1528 states have internal predecessors, (3755), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:14,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1529 states to 1529 states and 3755 transitions. [2022-03-15 21:41:14,270 INFO L78 Accepts]: Start accepts. Automaton has 1529 states and 3755 transitions. Word has length 35 [2022-03-15 21:41:14,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:14,270 INFO L470 AbstractCegarLoop]: Abstraction has 1529 states and 3755 transitions. [2022-03-15 21:41:14,270 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.4827586206896552) internal successors, (101), 28 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:14,270 INFO L276 IsEmpty]: Start isEmpty. Operand 1529 states and 3755 transitions. [2022-03-15 21:41:14,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:14,272 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:14,272 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:14,295 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (49)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:14,491 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51,49 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:14,491 INFO L402 AbstractCegarLoop]: === Iteration 53 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:14,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:14,492 INFO L85 PathProgramCache]: Analyzing trace with hash -420747523, now seen corresponding path program 46 times [2022-03-15 21:41:14,492 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:14,492 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078568516] [2022-03-15 21:41:14,492 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:14,492 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:14,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:14,758 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 55 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:41:14,758 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:14,758 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078568516] [2022-03-15 21:41:14,759 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1078568516] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:14,759 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1879045605] [2022-03-15 21:41:14,759 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:41:14,759 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:14,759 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:14,760 INFO L229 MonitoredProcess]: Starting monitored process 50 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:14,760 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Waiting until timeout for monitored process [2022-03-15 21:41:14,785 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:41:14,785 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:14,786 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:14,787 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:15,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,370 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,370 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,371 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,372 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,372 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,373 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,373 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,382 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:15,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:15,383 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:15,384 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:15,395 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:15,395 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:16,267 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:16,268 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:17,094 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:17,095 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1879045605] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:17,095 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:17,095 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 15, 15] total 32 [2022-03-15 21:41:17,095 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [732336311] [2022-03-15 21:41:17,095 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:17,097 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:17,113 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:41:17,113 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:20,735 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [146838#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 146834#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 146840#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 146839#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 146831#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 146837#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 146833#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 146836#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 146832#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 146835#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))))] [2022-03-15 21:41:20,735 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:41:20,735 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:20,736 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:41:20,736 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=254, Invalid=1552, Unknown=0, NotChecked=0, Total=1806 [2022-03-15 21:41:20,736 INFO L87 Difference]: Start difference. First operand 1529 states and 3755 transitions. Second operand has 23 states, 23 states have (on average 3.9565217391304346) internal successors, (91), 22 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:21,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:21,476 INFO L93 Difference]: Finished difference Result 2826 states and 6933 transitions. [2022-03-15 21:41:21,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2022-03-15 21:41:21,477 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.9565217391304346) internal successors, (91), 22 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:21,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:21,480 INFO L225 Difference]: With dead ends: 2826 [2022-03-15 21:41:21,480 INFO L226 Difference]: Without dead ends: 2810 [2022-03-15 21:41:21,481 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 78 SyntacticMatches, 35 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1681 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=448, Invalid=2744, Unknown=0, NotChecked=0, Total=3192 [2022-03-15 21:41:21,481 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 120 mSDsluCounter, 269 mSDsCounter, 0 mSdLazyCounter, 818 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 120 SdHoareTripleChecker+Valid, 31 SdHoareTripleChecker+Invalid, 867 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 818 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:21,481 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [120 Valid, 31 Invalid, 867 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 818 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:41:21,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2810 states. [2022-03-15 21:41:21,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2810 to 1601. [2022-03-15 21:41:21,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1601 states, 1600 states have (on average 2.459375) internal successors, (3935), 1600 states have internal predecessors, (3935), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:21,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1601 states to 1601 states and 3935 transitions. [2022-03-15 21:41:21,503 INFO L78 Accepts]: Start accepts. Automaton has 1601 states and 3935 transitions. Word has length 35 [2022-03-15 21:41:21,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:21,503 INFO L470 AbstractCegarLoop]: Abstraction has 1601 states and 3935 transitions. [2022-03-15 21:41:21,503 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.9565217391304346) internal successors, (91), 22 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:21,503 INFO L276 IsEmpty]: Start isEmpty. Operand 1601 states and 3935 transitions. [2022-03-15 21:41:21,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:21,505 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:21,505 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:21,521 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (50)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:21,705 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 50 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable52 [2022-03-15 21:41:21,706 INFO L402 AbstractCegarLoop]: === Iteration 54 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:21,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:21,706 INFO L85 PathProgramCache]: Analyzing trace with hash 1895622557, now seen corresponding path program 47 times [2022-03-15 21:41:21,707 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:21,707 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1346423890] [2022-03-15 21:41:21,707 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:21,707 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:21,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:22,050 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:22,050 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:22,051 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1346423890] [2022-03-15 21:41:22,051 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1346423890] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:22,051 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1170353963] [2022-03-15 21:41:22,051 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:41:22,051 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:22,051 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:22,056 INFO L229 MonitoredProcess]: Starting monitored process 51 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:22,058 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Waiting until timeout for monitored process [2022-03-15 21:41:22,091 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:41:22,091 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:22,092 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 51 conjunts are in the unsatisfiable core [2022-03-15 21:41:22,093 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:22,734 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,736 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,736 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,737 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,738 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,741 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,741 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,742 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,742 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,743 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,746 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,750 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,750 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,752 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:22,755 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:22,756 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 15 disjoint index pairs (out of 66 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 31 [2022-03-15 21:41:22,784 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:22,785 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:23,551 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,552 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,553 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,553 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,554 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,554 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,556 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,556 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,557 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,557 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,557 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,558 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,558 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,559 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,559 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,559 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,560 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,565 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,566 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,567 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,567 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,568 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,569 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,569 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,570 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,570 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,571 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,571 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,572 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,572 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,572 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,573 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,574 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,574 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,574 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,575 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,576 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,576 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,577 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,577 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,579 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,579 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,580 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:23,651 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:41:23,652 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 45 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 21 case distinctions, treesize of input 112 treesize of output 284 [2022-03-15 21:41:24,123 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:24,123 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1170353963] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:24,123 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:24,123 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 40 [2022-03-15 21:41:24,123 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1023435113] [2022-03-15 21:41:24,123 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:24,127 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:24,140 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 159 transitions. [2022-03-15 21:41:24,140 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:26,958 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [153142#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 153146#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 153148#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 153145#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 153149#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 153147#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 153143#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 153144#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:41:26,958 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:41:26,958 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:26,959 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:41:26,959 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=346, Invalid=2006, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:41:26,959 INFO L87 Difference]: Start difference. First operand 1601 states and 3935 transitions. Second operand has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:27,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:27,728 INFO L93 Difference]: Finished difference Result 3133 states and 7815 transitions. [2022-03-15 21:41:27,728 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:41:27,728 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:27,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:27,732 INFO L225 Difference]: With dead ends: 3133 [2022-03-15 21:41:27,732 INFO L226 Difference]: Without dead ends: 3073 [2022-03-15 21:41:27,733 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 70 SyntacticMatches, 21 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1347 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=562, Invalid=3344, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:41:27,733 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 123 mSDsluCounter, 132 mSDsCounter, 0 mSdLazyCounter, 712 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 123 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 772 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 712 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:27,733 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [123 Valid, 4 Invalid, 772 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 712 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:41:27,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3073 states. [2022-03-15 21:41:27,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3073 to 1657. [2022-03-15 21:41:27,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1657 states, 1656 states have (on average 2.4607487922705316) internal successors, (4075), 1656 states have internal predecessors, (4075), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:27,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1657 states to 1657 states and 4075 transitions. [2022-03-15 21:41:27,764 INFO L78 Accepts]: Start accepts. Automaton has 1657 states and 4075 transitions. Word has length 35 [2022-03-15 21:41:27,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:27,765 INFO L470 AbstractCegarLoop]: Abstraction has 1657 states and 4075 transitions. [2022-03-15 21:41:27,765 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.4583333333333335) internal successors, (83), 23 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:27,765 INFO L276 IsEmpty]: Start isEmpty. Operand 1657 states and 4075 transitions. [2022-03-15 21:41:27,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:27,767 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:27,768 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:27,795 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (51)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:27,990 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 51 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable53 [2022-03-15 21:41:27,990 INFO L402 AbstractCegarLoop]: === Iteration 55 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:27,990 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:27,991 INFO L85 PathProgramCache]: Analyzing trace with hash -603570187, now seen corresponding path program 48 times [2022-03-15 21:41:27,991 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:27,991 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012232446] [2022-03-15 21:41:27,991 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:27,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:27,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:28,321 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:28,322 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:28,322 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012232446] [2022-03-15 21:41:28,322 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1012232446] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:28,322 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1252410637] [2022-03-15 21:41:28,322 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:41:28,322 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:28,322 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:28,323 INFO L229 MonitoredProcess]: Starting monitored process 52 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:28,324 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Waiting until timeout for monitored process [2022-03-15 21:41:28,355 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:41:28,355 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:28,356 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:28,357 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:29,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,089 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,092 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,092 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:29,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,094 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,094 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:29,095 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,096 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,097 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:29,097 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:29,112 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:29,112 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:29,990 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:29,990 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:31,092 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 3 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:31,093 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1252410637] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:31,093 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:31,093 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 34 [2022-03-15 21:41:31,093 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1559558137] [2022-03-15 21:41:31,093 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:31,097 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:31,115 INFO L252 McrAutomatonBuilder]: Finished intersection with 99 states and 179 transitions. [2022-03-15 21:41:31,115 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:34,549 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [159865#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (= (select queue (+ front 1)) 1) (not (= (+ (select queue back) 1) 0))) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 2 front)))) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 159868#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 1))), 159866#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0))), 159869#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 159867#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 159870#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 159864#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 159871#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 159873#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 159872#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:41:34,549 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:41:34,549 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:34,549 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:41:34,549 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=263, Invalid=1717, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:41:34,550 INFO L87 Difference]: Start difference. First operand 1657 states and 4075 transitions. Second operand has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:35,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:35,189 INFO L93 Difference]: Finished difference Result 3473 states and 8613 transitions. [2022-03-15 21:41:35,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:41:35,190 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:35,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:35,194 INFO L225 Difference]: With dead ends: 3473 [2022-03-15 21:41:35,194 INFO L226 Difference]: Without dead ends: 3417 [2022-03-15 21:41:35,195 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 76 SyntacticMatches, 27 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1401 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=433, Invalid=2873, Unknown=0, NotChecked=0, Total=3306 [2022-03-15 21:41:35,195 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 116 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 753 mSolverCounterSat, 68 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 821 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 68 IncrementalHoareTripleChecker+Valid, 753 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:35,195 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [116 Valid, 5 Invalid, 821 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [68 Valid, 753 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:41:35,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3417 states. [2022-03-15 21:41:35,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3417 to 1809. [2022-03-15 21:41:35,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1809 states, 1808 states have (on average 2.4640486725663715) internal successors, (4455), 1808 states have internal predecessors, (4455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:35,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1809 states to 1809 states and 4455 transitions. [2022-03-15 21:41:35,227 INFO L78 Accepts]: Start accepts. Automaton has 1809 states and 4455 transitions. Word has length 35 [2022-03-15 21:41:35,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:35,227 INFO L470 AbstractCegarLoop]: Abstraction has 1809 states and 4455 transitions. [2022-03-15 21:41:35,227 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:35,227 INFO L276 IsEmpty]: Start isEmpty. Operand 1809 states and 4455 transitions. [2022-03-15 21:41:35,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:35,230 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:35,230 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:35,252 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (52)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:35,451 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable54,52 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:35,451 INFO L402 AbstractCegarLoop]: === Iteration 56 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:35,452 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:35,452 INFO L85 PathProgramCache]: Analyzing trace with hash -1527301763, now seen corresponding path program 49 times [2022-03-15 21:41:35,452 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:35,452 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [333510425] [2022-03-15 21:41:35,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:35,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:35,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:35,743 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:35,743 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:35,743 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [333510425] [2022-03-15 21:41:35,743 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [333510425] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:35,743 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1575848847] [2022-03-15 21:41:35,743 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:41:35,743 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:35,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:35,744 INFO L229 MonitoredProcess]: Starting monitored process 53 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:35,745 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Waiting until timeout for monitored process [2022-03-15 21:41:35,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:35,770 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:35,770 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:36,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,365 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,366 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,366 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:36,366 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,367 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,368 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,368 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:36,370 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:36,370 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 15 disjoint index pairs (out of 28 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:36,381 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:36,382 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:37,265 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:37,265 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:38,166 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 9 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:38,166 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1575848847] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:38,166 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:38,167 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 33 [2022-03-15 21:41:38,167 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [621686708] [2022-03-15 21:41:38,167 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:38,169 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:38,184 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:41:38,185 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:41,975 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [167232#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 167230#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 167239#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 167229#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 167235#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 167236#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0))), 167234#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 167233#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 167237#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 167231#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 167238#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:41:41,975 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:41:41,975 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:41,975 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:41:41,975 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=279, Invalid=1701, Unknown=0, NotChecked=0, Total=1980 [2022-03-15 21:41:41,976 INFO L87 Difference]: Start difference. First operand 1809 states and 4455 transitions. Second operand has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:42,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:42,863 INFO L93 Difference]: Finished difference Result 3090 states and 7588 transitions. [2022-03-15 21:41:42,864 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-03-15 21:41:42,864 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:42,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:42,868 INFO L225 Difference]: With dead ends: 3090 [2022-03-15 21:41:42,868 INFO L226 Difference]: Without dead ends: 3074 [2022-03-15 21:41:42,868 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 81 SyntacticMatches, 30 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1562 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=496, Invalid=3044, Unknown=0, NotChecked=0, Total=3540 [2022-03-15 21:41:42,868 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 153 mSDsluCounter, 287 mSDsCounter, 0 mSdLazyCounter, 876 mSolverCounterSat, 72 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 948 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 72 IncrementalHoareTripleChecker+Valid, 876 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:42,868 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [153 Valid, 34 Invalid, 948 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [72 Valid, 876 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:41:42,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3074 states. [2022-03-15 21:41:42,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3074 to 1809. [2022-03-15 21:41:42,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1809 states, 1808 states have (on average 2.4640486725663715) internal successors, (4455), 1808 states have internal predecessors, (4455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:42,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1809 states to 1809 states and 4455 transitions. [2022-03-15 21:41:42,902 INFO L78 Accepts]: Start accepts. Automaton has 1809 states and 4455 transitions. Word has length 35 [2022-03-15 21:41:42,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:42,902 INFO L470 AbstractCegarLoop]: Abstraction has 1809 states and 4455 transitions. [2022-03-15 21:41:42,902 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:42,902 INFO L276 IsEmpty]: Start isEmpty. Operand 1809 states and 4455 transitions. [2022-03-15 21:41:42,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:42,904 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:42,904 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:42,920 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (53)] Ended with exit code 0 [2022-03-15 21:41:43,105 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 53 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable55 [2022-03-15 21:41:43,105 INFO L402 AbstractCegarLoop]: === Iteration 57 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:43,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:43,106 INFO L85 PathProgramCache]: Analyzing trace with hash 2136536281, now seen corresponding path program 50 times [2022-03-15 21:41:43,106 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:43,106 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029273780] [2022-03-15 21:41:43,107 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:43,107 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:43,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:43,459 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:43,460 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:43,460 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029273780] [2022-03-15 21:41:43,460 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1029273780] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:43,460 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1303298200] [2022-03-15 21:41:43,460 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:41:43,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:43,460 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:43,476 INFO L229 MonitoredProcess]: Starting monitored process 54 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:43,477 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Waiting until timeout for monitored process [2022-03-15 21:41:43,507 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:41:43,507 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:43,508 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:43,508 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:44,021 INFO L353 Elim1Store]: treesize reduction 170, result has 0.6 percent of original size [2022-03-15 21:41:44,022 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 6 new quantified variables, introduced 15 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:44,033 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:44,033 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:44,888 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:44,888 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:45,683 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:45,683 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1303298200] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:45,683 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:45,683 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 33 [2022-03-15 21:41:45,683 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1793001658] [2022-03-15 21:41:45,683 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:45,686 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:45,698 INFO L252 McrAutomatonBuilder]: Finished intersection with 87 states and 149 transitions. [2022-03-15 21:41:45,698 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:48,321 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 7 new interpolants: [174221#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 174216#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 174219#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 174218#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 174217#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 174220#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 174222#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:41:48,321 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:41:48,321 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:48,321 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:41:48,321 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=1425, Unknown=0, NotChecked=0, Total=1640 [2022-03-15 21:41:48,321 INFO L87 Difference]: Start difference. First operand 1809 states and 4455 transitions. Second operand has 23 states, 23 states have (on average 3.4347826086956523) internal successors, (79), 22 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:49,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:49,030 INFO L93 Difference]: Finished difference Result 2906 states and 7184 transitions. [2022-03-15 21:41:49,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:41:49,030 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.4347826086956523) internal successors, (79), 22 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:49,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:49,034 INFO L225 Difference]: With dead ends: 2906 [2022-03-15 21:41:49,034 INFO L226 Difference]: Without dead ends: 2897 [2022-03-15 21:41:49,035 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 62 SyntacticMatches, 33 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1185 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=392, Invalid=2578, Unknown=0, NotChecked=0, Total=2970 [2022-03-15 21:41:49,035 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 121 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 909 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 948 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 909 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:49,035 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [121 Valid, 8 Invalid, 948 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 909 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:41:49,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2897 states. [2022-03-15 21:41:49,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2897 to 1825. [2022-03-15 21:41:49,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1825 states, 1824 states have (on average 2.464364035087719) internal successors, (4495), 1824 states have internal predecessors, (4495), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:49,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1825 states to 1825 states and 4495 transitions. [2022-03-15 21:41:49,059 INFO L78 Accepts]: Start accepts. Automaton has 1825 states and 4495 transitions. Word has length 35 [2022-03-15 21:41:49,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:49,059 INFO L470 AbstractCegarLoop]: Abstraction has 1825 states and 4495 transitions. [2022-03-15 21:41:49,059 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.4347826086956523) internal successors, (79), 22 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:49,060 INFO L276 IsEmpty]: Start isEmpty. Operand 1825 states and 4495 transitions. [2022-03-15 21:41:49,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:49,062 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:49,062 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:49,077 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (54)] Forceful destruction successful, exit code 0 [2022-03-15 21:41:49,262 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 54 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable56 [2022-03-15 21:41:49,262 INFO L402 AbstractCegarLoop]: === Iteration 58 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:49,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:49,262 INFO L85 PathProgramCache]: Analyzing trace with hash -1220674323, now seen corresponding path program 51 times [2022-03-15 21:41:49,263 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:49,263 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172761460] [2022-03-15 21:41:49,263 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:49,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:49,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:49,590 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:49,590 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:49,590 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172761460] [2022-03-15 21:41:49,590 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172761460] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:49,590 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1211897032] [2022-03-15 21:41:49,590 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:41:49,590 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:49,590 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:49,591 INFO L229 MonitoredProcess]: Starting monitored process 55 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:49,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Waiting until timeout for monitored process [2022-03-15 21:41:49,621 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2022-03-15 21:41:49,621 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:49,622 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:49,623 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:50,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,238 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:50,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,240 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,241 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,241 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:50,246 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:50,258 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:50,258 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:51,119 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:51,119 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:52,372 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:52,372 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1211897032] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:52,372 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:52,372 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 34 [2022-03-15 21:41:52,372 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1467262797] [2022-03-15 21:41:52,372 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:52,375 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:52,392 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 159 transitions. [2022-03-15 21:41:52,392 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:41:55,494 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [181049#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0))), 181050#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 181051#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 181047#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 181052#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 181046#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 181048#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (= (+ (select queue (+ front 4)) 1) 0) (not (= (+ (select queue back) 1) 0))) (or (= (select queue (+ front 1)) 1) (not (= (+ (select queue back) 1) 0))) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 3 front)) 1)) (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 181053#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 181054#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:41:55,494 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:41:55,494 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:41:55,494 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:41:55,494 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=242, Invalid=1650, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:41:55,494 INFO L87 Difference]: Start difference. First operand 1825 states and 4495 transitions. Second operand has 25 states, 25 states have (on average 3.4) internal successors, (85), 24 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:41:56,312 INFO L93 Difference]: Finished difference Result 3473 states and 8671 transitions. [2022-03-15 21:41:56,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:41:56,313 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.4) internal successors, (85), 24 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:41:56,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:41:56,317 INFO L225 Difference]: With dead ends: 3473 [2022-03-15 21:41:56,317 INFO L226 Difference]: Without dead ends: 3417 [2022-03-15 21:41:56,318 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 66 SyntacticMatches, 30 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1354 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=422, Invalid=2884, Unknown=0, NotChecked=0, Total=3306 [2022-03-15 21:41:56,318 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 110 mSDsluCounter, 210 mSDsCounter, 0 mSdLazyCounter, 1054 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 110 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 1107 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 1054 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:41:56,318 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [110 Valid, 8 Invalid, 1107 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 1054 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:41:56,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3417 states. [2022-03-15 21:41:56,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3417 to 1873. [2022-03-15 21:41:56,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1873 states, 1872 states have (on average 2.4652777777777777) internal successors, (4615), 1872 states have internal predecessors, (4615), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1873 states to 1873 states and 4615 transitions. [2022-03-15 21:41:56,342 INFO L78 Accepts]: Start accepts. Automaton has 1873 states and 4615 transitions. Word has length 35 [2022-03-15 21:41:56,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:41:56,343 INFO L470 AbstractCegarLoop]: Abstraction has 1873 states and 4615 transitions. [2022-03-15 21:41:56,343 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.4) internal successors, (85), 24 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:41:56,343 INFO L276 IsEmpty]: Start isEmpty. Operand 1873 states and 4615 transitions. [2022-03-15 21:41:56,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:41:56,346 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:41:56,346 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:41:56,363 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (55)] Ended with exit code 0 [2022-03-15 21:41:56,555 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable57,55 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:56,555 INFO L402 AbstractCegarLoop]: === Iteration 59 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:41:56,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:41:56,556 INFO L85 PathProgramCache]: Analyzing trace with hash 1149694581, now seen corresponding path program 52 times [2022-03-15 21:41:56,556 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:41:56,556 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533073411] [2022-03-15 21:41:56,557 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:41:56,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:41:56,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:41:56,845 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:56,845 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:41:56,845 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533073411] [2022-03-15 21:41:56,845 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1533073411] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:41:56,845 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [802213265] [2022-03-15 21:41:56,845 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:41:56,845 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:41:56,846 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:41:56,846 INFO L229 MonitoredProcess]: Starting monitored process 56 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:41:56,847 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Waiting until timeout for monitored process [2022-03-15 21:41:56,872 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:41:56,872 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:41:56,872 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:41:56,873 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:41:57,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,466 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:41:57,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,470 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:41:57,472 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:41:57,483 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:57,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:41:58,343 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:41:58,344 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:41:59,311 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 12 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:41:59,311 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [802213265] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:41:59,311 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:41:59,311 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 33 [2022-03-15 21:41:59,312 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1780847234] [2022-03-15 21:41:59,312 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:41:59,314 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:41:59,329 INFO L252 McrAutomatonBuilder]: Finished intersection with 99 states and 179 transitions. [2022-03-15 21:41:59,329 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:02,976 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [188541#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (= (select queue (+ front 1)) 1) (not (= (+ (select queue back) 1) 0))) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 2 front)))) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum))), 188547#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0))), 188543#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 188544#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 188548#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 188546#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 188549#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= (+ front 4) back))), 188540#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 188545#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 188542#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:42:02,977 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:42:02,977 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:02,977 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:42:02,977 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=247, Invalid=1645, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:42:02,977 INFO L87 Difference]: Start difference. First operand 1873 states and 4615 transitions. Second operand has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:03,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:03,711 INFO L93 Difference]: Finished difference Result 4097 states and 10197 transitions. [2022-03-15 21:42:03,711 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:42:03,711 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:03,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:03,716 INFO L225 Difference]: With dead ends: 4097 [2022-03-15 21:42:03,717 INFO L226 Difference]: Without dead ends: 4041 [2022-03-15 21:42:03,717 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 70 SyntacticMatches, 34 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1524 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=416, Invalid=2776, Unknown=0, NotChecked=0, Total=3192 [2022-03-15 21:42:03,717 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 106 mSDsluCounter, 189 mSDsCounter, 0 mSdLazyCounter, 953 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 106 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 1008 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 953 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:03,717 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [106 Valid, 8 Invalid, 1008 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 953 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:42:03,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4041 states. [2022-03-15 21:42:03,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4041 to 1961. [2022-03-15 21:42:03,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1961 states, 1960 states have (on average 2.4668367346938775) internal successors, (4835), 1960 states have internal predecessors, (4835), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:03,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1961 states to 1961 states and 4835 transitions. [2022-03-15 21:42:03,753 INFO L78 Accepts]: Start accepts. Automaton has 1961 states and 4835 transitions. Word has length 35 [2022-03-15 21:42:03,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:03,753 INFO L470 AbstractCegarLoop]: Abstraction has 1961 states and 4835 transitions. [2022-03-15 21:42:03,754 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.64) internal successors, (91), 24 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:03,754 INFO L276 IsEmpty]: Start isEmpty. Operand 1961 states and 4835 transitions. [2022-03-15 21:42:03,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:03,757 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:03,757 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:03,780 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (56)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:03,980 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable58,56 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:03,980 INFO L402 AbstractCegarLoop]: === Iteration 60 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:03,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:03,980 INFO L85 PathProgramCache]: Analyzing trace with hash 225963005, now seen corresponding path program 53 times [2022-03-15 21:42:03,981 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:03,981 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1321078370] [2022-03-15 21:42:03,981 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:03,981 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:03,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:04,280 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:04,280 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:04,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1321078370] [2022-03-15 21:42:04,281 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1321078370] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:04,281 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1267066403] [2022-03-15 21:42:04,281 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:42:04,281 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:04,281 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:04,282 INFO L229 MonitoredProcess]: Starting monitored process 57 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:04,282 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Waiting until timeout for monitored process [2022-03-15 21:42:04,310 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2022-03-15 21:42:04,310 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:04,311 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 51 conjunts are in the unsatisfiable core [2022-03-15 21:42:04,312 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:04,906 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,907 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,907 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,909 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,909 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,910 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,910 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,911 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,913 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:04,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:04,916 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 41 [2022-03-15 21:42:04,927 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:04,927 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:05,489 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,490 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,491 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,492 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,494 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,494 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,494 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,495 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,496 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,498 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,500 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,501 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,502 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,503 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,504 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,504 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,505 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,505 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,506 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,507 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,508 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,509 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,509 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,509 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,510 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,510 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,510 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,511 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,512 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,512 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,514 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,514 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,515 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:05,589 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:42:05,589 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 45 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 21 case distinctions, treesize of input 112 treesize of output 284 [2022-03-15 21:42:05,911 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:05,912 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1267066403] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:05,912 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:05,912 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 32 [2022-03-15 21:42:05,912 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1705547534] [2022-03-15 21:42:05,912 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:05,914 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:05,930 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 199 transitions. [2022-03-15 21:42:05,930 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:10,127 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [196832#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 196836#(and (or (not v_assert) (= back front) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1) (not (= (+ (select queue front) 1) 0))) (or (not v_assert) (not (= (+ (select queue front) 1) 0)) (<= 1 sum))), 196841#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 196833#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 196837#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 196835#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 196840#(and (or (not v_assert) (<= 0 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ 3 front))) 0)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 0)) (or (not v_assert) (<= (+ front 4) back))), 196839#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0))), 196838#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 196842#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 196834#(and (or (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not (= (+ (select queue back) 1) 0)) (<= 1 sum)))] [2022-03-15 21:42:10,127 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:42:10,127 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:10,127 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:42:10,127 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=319, Invalid=1573, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:42:10,127 INFO L87 Difference]: Start difference. First operand 1961 states and 4835 transitions. Second operand has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:11,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:11,058 INFO L93 Difference]: Finished difference Result 3106 states and 7653 transitions. [2022-03-15 21:42:11,058 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2022-03-15 21:42:11,058 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:11,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:11,062 INFO L225 Difference]: With dead ends: 3106 [2022-03-15 21:42:11,062 INFO L226 Difference]: Without dead ends: 3090 [2022-03-15 21:42:11,063 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 75 SyntacticMatches, 37 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1830 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=563, Invalid=2859, Unknown=0, NotChecked=0, Total=3422 [2022-03-15 21:42:11,063 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 136 mSDsluCounter, 317 mSDsCounter, 0 mSdLazyCounter, 990 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 35 SdHoareTripleChecker+Invalid, 1051 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 990 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:11,063 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 35 Invalid, 1051 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 990 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:42:11,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3090 states. [2022-03-15 21:42:11,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3090 to 1961. [2022-03-15 21:42:11,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1961 states, 1960 states have (on average 2.4668367346938775) internal successors, (4835), 1960 states have internal predecessors, (4835), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:11,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1961 states to 1961 states and 4835 transitions. [2022-03-15 21:42:11,086 INFO L78 Accepts]: Start accepts. Automaton has 1961 states and 4835 transitions. Word has length 35 [2022-03-15 21:42:11,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:11,086 INFO L470 AbstractCegarLoop]: Abstraction has 1961 states and 4835 transitions. [2022-03-15 21:42:11,086 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:11,086 INFO L276 IsEmpty]: Start isEmpty. Operand 1961 states and 4835 transitions. [2022-03-15 21:42:11,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:11,088 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:11,088 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:11,103 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (57)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:11,288 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 57 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable59 [2022-03-15 21:42:11,289 INFO L402 AbstractCegarLoop]: === Iteration 61 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:11,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:11,289 INFO L85 PathProgramCache]: Analyzing trace with hash 1246901865, now seen corresponding path program 54 times [2022-03-15 21:42:11,290 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:11,290 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1856256029] [2022-03-15 21:42:11,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:11,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:11,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:11,624 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:11,624 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:11,624 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1856256029] [2022-03-15 21:42:11,624 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1856256029] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:11,624 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [174197480] [2022-03-15 21:42:11,624 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:42:11,625 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:11,625 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:11,628 INFO L229 MonitoredProcess]: Starting monitored process 58 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:11,629 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Waiting until timeout for monitored process [2022-03-15 21:42:11,661 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2022-03-15 21:42:11,662 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:11,663 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 49 conjunts are in the unsatisfiable core [2022-03-15 21:42:11,664 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:15,134 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,135 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,136 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,136 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,137 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,137 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:15,138 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,138 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,139 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,140 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,141 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,142 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,143 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,143 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,144 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:15,144 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:15,145 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,145 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,146 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,146 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,147 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,148 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,148 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,149 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:15,149 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,150 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:15,150 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:15,151 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 15 disjoint index pairs (out of 55 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 37 [2022-03-15 21:42:15,174 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:15,174 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:17,020 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,021 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,022 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,022 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,023 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,025 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,026 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,026 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,027 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,028 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,030 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,031 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,031 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,032 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,040 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,041 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,041 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,042 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,042 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,042 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,043 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,044 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,045 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,045 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,047 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,049 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,050 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,051 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,051 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,051 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,053 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,054 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,056 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,058 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,058 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,059 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:17,268 INFO L353 Elim1Store]: treesize reduction 75, result has 74.9 percent of original size [2022-03-15 21:42:17,269 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 36 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 30 case distinctions, treesize of input 104 treesize of output 269 [2022-03-15 21:42:18,256 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:18,256 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [174197480] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:18,257 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:18,257 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 39 [2022-03-15 21:42:18,257 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1375071032] [2022-03-15 21:42:18,257 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:18,259 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:18,277 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 159 transitions. [2022-03-15 21:42:18,277 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:21,257 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [204148#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front)))), 204149#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 204145#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 204150#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 204146#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 204152#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 204147#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 204151#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 204153#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:42:21,258 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:42:21,258 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:21,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:42:21,258 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=301, Invalid=2050, Unknown=1, NotChecked=0, Total=2352 [2022-03-15 21:42:21,258 INFO L87 Difference]: Start difference. First operand 1961 states and 4835 transitions. Second operand has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:22,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:22,169 INFO L93 Difference]: Finished difference Result 3737 states and 9279 transitions. [2022-03-15 21:42:22,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:42:22,169 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:22,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:22,174 INFO L225 Difference]: With dead ends: 3737 [2022-03-15 21:42:22,174 INFO L226 Difference]: Without dead ends: 3721 [2022-03-15 21:42:22,174 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 74 SyntacticMatches, 17 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1077 ImplicationChecksByTransitivity, 5.0s TimeCoverageRelationStatistics Valid=487, Invalid=3418, Unknown=1, NotChecked=0, Total=3906 [2022-03-15 21:42:22,175 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 214 mSDsCounter, 0 mSdLazyCounter, 1010 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1054 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 1010 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:22,175 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 9 Invalid, 1054 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 1010 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:42:22,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3721 states. [2022-03-15 21:42:22,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3721 to 1961. [2022-03-15 21:42:22,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1961 states, 1960 states have (on average 2.4668367346938775) internal successors, (4835), 1960 states have internal predecessors, (4835), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:22,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1961 states to 1961 states and 4835 transitions. [2022-03-15 21:42:22,202 INFO L78 Accepts]: Start accepts. Automaton has 1961 states and 4835 transitions. Word has length 35 [2022-03-15 21:42:22,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:22,202 INFO L470 AbstractCegarLoop]: Abstraction has 1961 states and 4835 transitions. [2022-03-15 21:42:22,202 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:22,202 INFO L276 IsEmpty]: Start isEmpty. Operand 1961 states and 4835 transitions. [2022-03-15 21:42:22,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:22,204 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:22,204 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:22,220 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (58)] Ended with exit code 0 [2022-03-15 21:42:22,405 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable60,58 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:22,405 INFO L402 AbstractCegarLoop]: === Iteration 62 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:22,406 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:22,406 INFO L85 PathProgramCache]: Analyzing trace with hash 873275633, now seen corresponding path program 55 times [2022-03-15 21:42:22,406 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:22,406 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048183893] [2022-03-15 21:42:22,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:22,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:22,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:22,687 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:22,688 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:22,688 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048183893] [2022-03-15 21:42:22,688 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048183893] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:22,688 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2125216695] [2022-03-15 21:42:22,688 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:42:22,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:22,688 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:22,689 INFO L229 MonitoredProcess]: Starting monitored process 59 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:22,716 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Waiting until timeout for monitored process [2022-03-15 21:42:22,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:22,726 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:42:22,727 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:23,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,382 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:23,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:23,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:23,388 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:23,389 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 15 disjoint index pairs (out of 36 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:42:23,400 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:23,401 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:24,303 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:42:24,303 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:42:25,440 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 8 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:25,440 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2125216695] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:25,440 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:25,440 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15, 15] total 34 [2022-03-15 21:42:25,440 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1413458503] [2022-03-15 21:42:25,440 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:25,443 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:25,457 INFO L252 McrAutomatonBuilder]: Finished intersection with 99 states and 179 transitions. [2022-03-15 21:42:25,458 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:28,404 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [212087#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 212084#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 212080#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 212082#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 212086#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 212083#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 212088#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 212081#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 212085#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:42:28,404 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 23 states [2022-03-15 21:42:28,405 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:28,405 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2022-03-15 21:42:28,405 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=229, Invalid=1663, Unknown=0, NotChecked=0, Total=1892 [2022-03-15 21:42:28,405 INFO L87 Difference]: Start difference. First operand 1961 states and 4835 transitions. Second operand has 23 states, 23 states have (on average 3.9130434782608696) internal successors, (90), 22 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:28,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:28,987 INFO L93 Difference]: Finished difference Result 3459 states and 8580 transitions. [2022-03-15 21:42:28,987 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:42:28,988 INFO L78 Accepts]: Start accepts. Automaton has has 23 states, 23 states have (on average 3.9130434782608696) internal successors, (90), 22 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:28,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:28,992 INFO L225 Difference]: With dead ends: 3459 [2022-03-15 21:42:28,992 INFO L226 Difference]: Without dead ends: 3449 [2022-03-15 21:42:28,993 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 78 SyntacticMatches, 26 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1319 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=366, Invalid=2714, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:42:28,993 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 145 mSDsluCounter, 199 mSDsCounter, 0 mSdLazyCounter, 759 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 807 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 759 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:28,993 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [145 Valid, 11 Invalid, 807 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 759 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:42:28,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3449 states. [2022-03-15 21:42:29,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3449 to 1969. [2022-03-15 21:42:29,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1969 states, 1968 states have (on average 2.466971544715447) internal successors, (4855), 1968 states have internal predecessors, (4855), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:29,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1969 states to 1969 states and 4855 transitions. [2022-03-15 21:42:29,020 INFO L78 Accepts]: Start accepts. Automaton has 1969 states and 4855 transitions. Word has length 35 [2022-03-15 21:42:29,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:29,021 INFO L470 AbstractCegarLoop]: Abstraction has 1969 states and 4855 transitions. [2022-03-15 21:42:29,021 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 23 states, 23 states have (on average 3.9130434782608696) internal successors, (90), 22 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:29,021 INFO L276 IsEmpty]: Start isEmpty. Operand 1969 states and 4855 transitions. [2022-03-15 21:42:29,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:29,023 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:29,023 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:29,038 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (59)] Ended with exit code 0 [2022-03-15 21:42:29,223 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 59 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable61 [2022-03-15 21:42:29,224 INFO L402 AbstractCegarLoop]: === Iteration 63 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:29,224 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:29,224 INFO L85 PathProgramCache]: Analyzing trace with hash 902568749, now seen corresponding path program 56 times [2022-03-15 21:42:29,225 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:29,225 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1201319610] [2022-03-15 21:42:29,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:29,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:29,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:29,485 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:42:29,485 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:29,485 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1201319610] [2022-03-15 21:42:29,485 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1201319610] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:29,485 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1977468528] [2022-03-15 21:42:29,485 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:42:29,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:29,486 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:29,486 INFO L229 MonitoredProcess]: Starting monitored process 60 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:29,487 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Waiting until timeout for monitored process [2022-03-15 21:42:29,512 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:42:29,512 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:29,513 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 52 conjunts are in the unsatisfiable core [2022-03-15 21:42:29,513 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:30,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,195 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,195 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,196 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:30,196 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,202 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,206 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:30,207 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,208 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,210 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:30,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,211 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,212 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,214 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:30,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,215 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:30,215 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:30,216 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 15 disjoint index pairs (out of 55 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 39 [2022-03-15 21:42:30,227 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 3 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:30,227 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:31,155 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:42:31,156 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:42:31,793 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 3 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:31,794 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1977468528] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:31,794 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:31,794 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 15] total 37 [2022-03-15 21:42:31,794 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1911604502] [2022-03-15 21:42:31,794 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:31,797 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:31,831 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 169 transitions. [2022-03-15 21:42:31,831 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:34,645 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [219753#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 219758#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 219760#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 219755#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 219759#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 219756#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 219754#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 219752#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 219757#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:42:34,645 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:42:34,645 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:34,645 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:42:34,646 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=259, Invalid=1903, Unknown=0, NotChecked=0, Total=2162 [2022-03-15 21:42:34,646 INFO L87 Difference]: Start difference. First operand 1969 states and 4855 transitions. Second operand has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:35,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:35,252 INFO L93 Difference]: Finished difference Result 3603 states and 8932 transitions. [2022-03-15 21:42:35,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:42:35,252 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:35,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:35,257 INFO L225 Difference]: With dead ends: 3603 [2022-03-15 21:42:35,257 INFO L226 Difference]: Without dead ends: 3593 [2022-03-15 21:42:35,257 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 72 SyntacticMatches, 25 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1558 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=397, Invalid=3025, Unknown=0, NotChecked=0, Total=3422 [2022-03-15 21:42:35,258 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 148 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 791 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 148 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 838 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 791 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:35,258 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [148 Valid, 11 Invalid, 838 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 791 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:42:35,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3593 states. [2022-03-15 21:42:35,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3593 to 2049. [2022-03-15 21:42:35,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2049 states, 2048 states have (on average 2.46044921875) internal successors, (5039), 2048 states have internal predecessors, (5039), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:35,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2049 states to 2049 states and 5039 transitions. [2022-03-15 21:42:35,285 INFO L78 Accepts]: Start accepts. Automaton has 2049 states and 5039 transitions. Word has length 35 [2022-03-15 21:42:35,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:35,286 INFO L470 AbstractCegarLoop]: Abstraction has 2049 states and 5039 transitions. [2022-03-15 21:42:35,286 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:35,286 INFO L276 IsEmpty]: Start isEmpty. Operand 2049 states and 5039 transitions. [2022-03-15 21:42:35,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:35,288 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:35,288 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:35,304 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (60)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:35,489 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 60 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable62 [2022-03-15 21:42:35,489 INFO L402 AbstractCegarLoop]: === Iteration 64 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:35,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:35,489 INFO L85 PathProgramCache]: Analyzing trace with hash 88702893, now seen corresponding path program 57 times [2022-03-15 21:42:35,490 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:35,490 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628090236] [2022-03-15 21:42:35,490 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:35,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:35,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:35,787 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:35,787 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:35,787 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1628090236] [2022-03-15 21:42:35,787 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1628090236] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:35,787 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [541974455] [2022-03-15 21:42:35,788 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:42:35,788 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:35,788 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:35,789 INFO L229 MonitoredProcess]: Starting monitored process 61 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:35,791 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Waiting until timeout for monitored process [2022-03-15 21:42:35,817 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2022-03-15 21:42:35,817 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:35,818 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:42:35,819 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:36,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,510 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,511 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,511 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,512 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:36,512 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,513 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,514 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,514 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,515 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,515 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,516 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:36,516 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,517 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,517 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,518 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,518 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,519 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,520 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,520 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,521 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:36,521 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,522 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,522 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,523 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,524 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,524 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,525 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,525 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,526 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:36,526 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:36,527 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:36,527 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 15 disjoint index pairs (out of 55 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:42:36,539 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 0 proven. 63 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:36,539 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:37,468 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:42:37,468 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:42:38,364 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 2 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:38,364 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [541974455] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:38,364 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:38,364 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 38 [2022-03-15 21:42:38,364 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2062731443] [2022-03-15 21:42:38,365 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:38,367 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:38,380 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 169 transitions. [2022-03-15 21:42:38,380 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:41,125 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [227729#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 227738#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 227734#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 227737#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 227736#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 227732#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 227731#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 227735#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 227733#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 227730#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:42:41,125 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:42:41,125 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:41,125 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:42:41,126 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=2081, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:42:41,126 INFO L87 Difference]: Start difference. First operand 2049 states and 5039 transitions. Second operand has 26 states, 26 states have (on average 3.4615384615384617) internal successors, (90), 25 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:42,097 INFO L93 Difference]: Finished difference Result 4329 states and 10716 transitions. [2022-03-15 21:42:42,097 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-03-15 21:42:42,097 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.4615384615384617) internal successors, (90), 25 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:42,097 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:42,103 INFO L225 Difference]: With dead ends: 4329 [2022-03-15 21:42:42,103 INFO L226 Difference]: Without dead ends: 4266 [2022-03-15 21:42:42,103 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 76 SyntacticMatches, 19 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1519 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=485, Invalid=3805, Unknown=0, NotChecked=0, Total=4290 [2022-03-15 21:42:42,103 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 218 mSDsluCounter, 277 mSDsCounter, 0 mSdLazyCounter, 1024 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 218 SdHoareTripleChecker+Valid, 28 SdHoareTripleChecker+Invalid, 1114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 1024 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:42,104 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [218 Valid, 28 Invalid, 1114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 1024 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:42:42,108 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4266 states. [2022-03-15 21:42:42,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4266 to 2049. [2022-03-15 21:42:42,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2049 states, 2048 states have (on average 2.4638671875) internal successors, (5046), 2048 states have internal predecessors, (5046), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2049 states to 2049 states and 5046 transitions. [2022-03-15 21:42:42,147 INFO L78 Accepts]: Start accepts. Automaton has 2049 states and 5046 transitions. Word has length 35 [2022-03-15 21:42:42,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:42,147 INFO L470 AbstractCegarLoop]: Abstraction has 2049 states and 5046 transitions. [2022-03-15 21:42:42,147 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.4615384615384617) internal successors, (90), 25 states have internal predecessors, (90), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:42,147 INFO L276 IsEmpty]: Start isEmpty. Operand 2049 states and 5046 transitions. [2022-03-15 21:42:42,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:42,150 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:42,150 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:42,176 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (61)] Ended with exit code 0 [2022-03-15 21:42:42,371 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable63,61 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:42,371 INFO L402 AbstractCegarLoop]: === Iteration 65 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:42,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:42,372 INFO L85 PathProgramCache]: Analyzing trace with hash 142584809, now seen corresponding path program 58 times [2022-03-15 21:42:42,372 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:42,372 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [914781138] [2022-03-15 21:42:42,372 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:42,373 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:42,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:42,664 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:42,665 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:42,665 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [914781138] [2022-03-15 21:42:42,665 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [914781138] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:42,665 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [45798489] [2022-03-15 21:42:42,665 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:42:42,665 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:42,665 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:42,668 INFO L229 MonitoredProcess]: Starting monitored process 62 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:42,671 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Waiting until timeout for monitored process [2022-03-15 21:42:42,697 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:42:42,697 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:42,698 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:42:42,699 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:43,389 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,395 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:43,395 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:43,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,400 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,400 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:43,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,406 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:43,406 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:43,407 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:43,407 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 15 disjoint index pairs (out of 55 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:42:43,419 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:43,419 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:44,342 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:42:44,342 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:42:45,154 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 12 proven. 51 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:45,154 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [45798489] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:45,154 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:45,154 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 38 [2022-03-15 21:42:45,154 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1560089750] [2022-03-15 21:42:45,154 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:45,156 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:45,169 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 159 transitions. [2022-03-15 21:42:45,170 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:47,596 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [236444#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 236451#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 236443#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 236446#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 236449#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 236445#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 236447#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 236448#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 236450#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front)))] [2022-03-15 21:42:47,596 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:42:47,596 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:47,596 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:42:47,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=1984, Unknown=0, NotChecked=0, Total=2256 [2022-03-15 21:42:47,597 INFO L87 Difference]: Start difference. First operand 2049 states and 5046 transitions. Second operand has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:48,390 INFO L93 Difference]: Finished difference Result 3027 states and 7491 transitions. [2022-03-15 21:42:48,390 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:42:48,390 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:48,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:48,394 INFO L225 Difference]: With dead ends: 3027 [2022-03-15 21:42:48,394 INFO L226 Difference]: Without dead ends: 3017 [2022-03-15 21:42:48,395 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 81 SyntacticMatches, 11 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1121 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=433, Invalid=3349, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:42:48,395 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 134 mSDsluCounter, 237 mSDsCounter, 0 mSdLazyCounter, 1100 mSolverCounterSat, 38 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 134 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1138 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 38 IncrementalHoareTripleChecker+Valid, 1100 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:48,395 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [134 Valid, 9 Invalid, 1138 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [38 Valid, 1100 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:42:48,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3017 states. [2022-03-15 21:42:48,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3017 to 2041. [2022-03-15 21:42:48,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2041 states, 2040 states have (on average 2.4637254901960786) internal successors, (5026), 2040 states have internal predecessors, (5026), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2041 states to 2041 states and 5026 transitions. [2022-03-15 21:42:48,420 INFO L78 Accepts]: Start accepts. Automaton has 2041 states and 5026 transitions. Word has length 35 [2022-03-15 21:42:48,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:48,420 INFO L470 AbstractCegarLoop]: Abstraction has 2041 states and 5026 transitions. [2022-03-15 21:42:48,421 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.44) internal successors, (86), 24 states have internal predecessors, (86), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:48,421 INFO L276 IsEmpty]: Start isEmpty. Operand 2041 states and 5026 transitions. [2022-03-15 21:42:48,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2022-03-15 21:42:48,423 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:48,423 INFO L514 BasicCegarLoop]: trace histogram [6, 6, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:48,438 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (62)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:48,623 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable64,62 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:48,623 INFO L402 AbstractCegarLoop]: === Iteration 66 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:48,624 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:48,624 INFO L85 PathProgramCache]: Analyzing trace with hash 2087692541, now seen corresponding path program 59 times [2022-03-15 21:42:48,624 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:48,625 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [329612775] [2022-03-15 21:42:48,625 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:48,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:48,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:48,925 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:48,925 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:48,925 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [329612775] [2022-03-15 21:42:48,925 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [329612775] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:48,925 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2002412843] [2022-03-15 21:42:48,925 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:42:48,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:48,926 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:48,928 INFO L229 MonitoredProcess]: Starting monitored process 63 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:48,928 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Waiting until timeout for monitored process [2022-03-15 21:42:48,958 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 7 check-sat command(s) [2022-03-15 21:42:48,958 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:48,959 INFO L263 TraceCheckSpWp]: Trace formula consists of 114 conjuncts, 50 conjunts are in the unsatisfiable core [2022-03-15 21:42:48,959 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:49,652 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:49,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,654 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,656 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,661 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:49,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,663 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,665 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,666 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,666 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,667 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,668 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:49,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,670 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,670 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,671 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:49,673 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,674 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,674 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,675 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:49,676 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:49,676 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 15 disjoint index pairs (out of 55 index pairs), introduced 6 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 39 [2022-03-15 21:42:49,691 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 6 proven. 57 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:49,691 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:50,600 INFO L353 Elim1Store]: treesize reduction 400, result has 46.6 percent of original size [2022-03-15 21:42:50,600 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 12 new quantified variables, introduced 66 case distinctions, treesize of input 112 treesize of output 394 [2022-03-15 21:42:51,356 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 10 proven. 53 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:51,357 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2002412843] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:51,357 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:51,357 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15] total 38 [2022-03-15 21:42:51,357 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [68100645] [2022-03-15 21:42:51,357 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:51,360 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:51,377 INFO L252 McrAutomatonBuilder]: Finished intersection with 95 states and 169 transitions. [2022-03-15 21:42:51,377 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:54,260 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [243837#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 243834#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 2 front)) 1)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 sum))), 243835#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 243838#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 243839#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 243833#(and (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 3 front)))) (or (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 2 front)) 1)) (or (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not (= (+ (select queue back) 1) 0)) (<= 0 sum)) (or (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ front 1)))) (or (= (+ (- 1) (select queue front)) 0) (not (= (+ (select queue back) 1) 0)))), 243842#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 243841#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 243836#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 243832#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 243840#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1))))] [2022-03-15 21:42:54,260 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:42:54,260 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:54,260 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:42:54,260 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=285, Invalid=2165, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:42:54,261 INFO L87 Difference]: Start difference. First operand 2041 states and 5026 transitions. Second operand has 27 states, 27 states have (on average 3.4074074074074074) internal successors, (92), 26 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:55,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:55,317 INFO L93 Difference]: Finished difference Result 3369 states and 8331 transitions. [2022-03-15 21:42:55,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-03-15 21:42:55,318 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.4074074074074074) internal successors, (92), 26 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2022-03-15 21:42:55,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:55,322 INFO L225 Difference]: With dead ends: 3369 [2022-03-15 21:42:55,322 INFO L226 Difference]: Without dead ends: 3306 [2022-03-15 21:42:55,323 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 82 SyntacticMatches, 12 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1360 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=503, Invalid=3919, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:42:55,323 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 175 mSDsluCounter, 333 mSDsCounter, 0 mSdLazyCounter, 1266 mSolverCounterSat, 73 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 175 SdHoareTripleChecker+Valid, 34 SdHoareTripleChecker+Invalid, 1339 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 73 IncrementalHoareTripleChecker+Valid, 1266 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:55,323 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [175 Valid, 34 Invalid, 1339 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [73 Valid, 1266 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:42:55,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3306 states. [2022-03-15 21:42:55,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3306 to 2041. [2022-03-15 21:42:55,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2041 states, 2040 states have (on average 2.4593137254901962) internal successors, (5017), 2040 states have internal predecessors, (5017), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:55,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2041 states to 2041 states and 5017 transitions. [2022-03-15 21:42:55,347 INFO L78 Accepts]: Start accepts. Automaton has 2041 states and 5017 transitions. Word has length 35 [2022-03-15 21:42:55,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:55,347 INFO L470 AbstractCegarLoop]: Abstraction has 2041 states and 5017 transitions. [2022-03-15 21:42:55,347 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.4074074074074074) internal successors, (92), 26 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:55,348 INFO L276 IsEmpty]: Start isEmpty. Operand 2041 states and 5017 transitions. [2022-03-15 21:42:55,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2022-03-15 21:42:55,350 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:55,350 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:55,365 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (63)] Ended with exit code 0 [2022-03-15 21:42:55,551 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 63 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable65 [2022-03-15 21:42:55,551 INFO L402 AbstractCegarLoop]: === Iteration 67 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:55,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:55,551 INFO L85 PathProgramCache]: Analyzing trace with hash -2108404521, now seen corresponding path program 60 times [2022-03-15 21:42:55,552 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:55,552 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724808858] [2022-03-15 21:42:55,552 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:55,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:55,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:55,608 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 49 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:55,609 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:55,609 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724808858] [2022-03-15 21:42:55,609 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724808858] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:55,609 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1791440038] [2022-03-15 21:42:55,609 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:42:55,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:55,609 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:55,610 INFO L229 MonitoredProcess]: Starting monitored process 64 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:55,641 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Waiting until timeout for monitored process [2022-03-15 21:42:55,653 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:42:55,653 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:42:55,654 INFO L263 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 14 conjunts are in the unsatisfiable core [2022-03-15 21:42:55,654 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:55,714 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 49 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:42:55,714 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:55,777 INFO L134 CoverageAnalysis]: Checked inductivity of 76 backedges. 49 proven. 26 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:42:55,778 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1791440038] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:42:55,778 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:42:55,778 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 9 [2022-03-15 21:42:55,778 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1877805279] [2022-03-15 21:42:55,778 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:42:55,781 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:42:55,800 INFO L252 McrAutomatonBuilder]: Finished intersection with 91 states and 155 transitions. [2022-03-15 21:42:55,800 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:42:56,165 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 0 new interpolants: [] [2022-03-15 21:42:56,165 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-03-15 21:42:56,165 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:42:56,165 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-03-15 21:42:56,165 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2022-03-15 21:42:56,165 INFO L87 Difference]: Start difference. First operand 2041 states and 5017 transitions. Second operand has 10 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:56,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:42:56,258 INFO L93 Difference]: Finished difference Result 2518 states and 6106 transitions. [2022-03-15 21:42:56,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-03-15 21:42:56,258 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 37 [2022-03-15 21:42:56,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:42:56,261 INFO L225 Difference]: With dead ends: 2518 [2022-03-15 21:42:56,261 INFO L226 Difference]: Without dead ends: 2516 [2022-03-15 21:42:56,261 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 125 SyntacticMatches, 6 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2022-03-15 21:42:56,261 INFO L933 BasicCegarLoop]: 2 mSDtfsCounter, 91 mSDsluCounter, 114 mSDsCounter, 0 mSdLazyCounter, 142 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 91 SdHoareTripleChecker+Valid, 21 SdHoareTripleChecker+Invalid, 162 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-03-15 21:42:56,262 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [91 Valid, 21 Invalid, 162 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 142 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-03-15 21:42:56,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2516 states. [2022-03-15 21:42:56,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2516 to 2121. [2022-03-15 21:42:56,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2121 states, 2120 states have (on average 2.464622641509434) internal successors, (5225), 2120 states have internal predecessors, (5225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:56,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2121 states to 2121 states and 5225 transitions. [2022-03-15 21:42:56,291 INFO L78 Accepts]: Start accepts. Automaton has 2121 states and 5225 transitions. Word has length 37 [2022-03-15 21:42:56,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:42:56,291 INFO L470 AbstractCegarLoop]: Abstraction has 2121 states and 5225 transitions. [2022-03-15 21:42:56,291 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 4.6) internal successors, (46), 9 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:42:56,291 INFO L276 IsEmpty]: Start isEmpty. Operand 2121 states and 5225 transitions. [2022-03-15 21:42:56,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:42:56,294 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:42:56,294 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:42:56,316 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (64)] Forceful destruction successful, exit code 0 [2022-03-15 21:42:56,516 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 64 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable66 [2022-03-15 21:42:56,516 INFO L402 AbstractCegarLoop]: === Iteration 68 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:42:56,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:42:56,516 INFO L85 PathProgramCache]: Analyzing trace with hash -787153316, now seen corresponding path program 61 times [2022-03-15 21:42:56,517 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:42:56,517 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844157913] [2022-03-15 21:42:56,517 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:42:56,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:42:56,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:56,829 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:42:56,829 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:42:56,829 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844157913] [2022-03-15 21:42:56,829 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844157913] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:42:56,829 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [276566171] [2022-03-15 21:42:56,829 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:42:56,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:42:56,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:42:56,830 INFO L229 MonitoredProcess]: Starting monitored process 65 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:42:56,831 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Waiting until timeout for monitored process [2022-03-15 21:42:56,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:42:56,858 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:42:56,858 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:42:57,680 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,681 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,682 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,682 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,683 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,683 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,684 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,685 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,685 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,686 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:57,687 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,687 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,688 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,689 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,690 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,691 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,691 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:57,691 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,692 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,693 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,694 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,694 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,695 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,695 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:57,696 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,697 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,697 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,698 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:57,698 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,699 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,699 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,700 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,700 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:42:57,701 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:42:57,701 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:42:57,713 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 12 proven. 74 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:42:57,713 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:42:59,045 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:42:59,046 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:43:00,027 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:00,027 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [276566171] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:00,027 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:00,027 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:43:00,027 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [785097611] [2022-03-15 21:43:00,027 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:00,030 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:00,054 INFO L252 McrAutomatonBuilder]: Finished intersection with 111 states and 201 transitions. [2022-03-15 21:43:00,055 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:03,715 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [258587#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 258585#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 258584#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 258592#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 258591#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 258590#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 258589#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 258588#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 258586#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:43:03,715 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:43:03,715 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:03,716 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:43:03,716 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=2246, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:43:03,716 INFO L87 Difference]: Start difference. First operand 2121 states and 5225 transitions. Second operand has 25 states, 25 states have (on average 3.56) internal successors, (89), 24 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:04,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:04,460 INFO L93 Difference]: Finished difference Result 3611 states and 8950 transitions. [2022-03-15 21:43:04,461 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:43:04,461 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.56) internal successors, (89), 24 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:04,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:04,465 INFO L225 Difference]: With dead ends: 3611 [2022-03-15 21:43:04,466 INFO L226 Difference]: Without dead ends: 3601 [2022-03-15 21:43:04,466 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 78 SyntacticMatches, 37 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2169 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=469, Invalid=3563, Unknown=0, NotChecked=0, Total=4032 [2022-03-15 21:43:04,466 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 256 mSDsCounter, 0 mSdLazyCounter, 1050 mSolverCounterSat, 44 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 1094 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 44 IncrementalHoareTripleChecker+Valid, 1050 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:04,466 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 12 Invalid, 1094 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [44 Valid, 1050 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:43:04,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3601 states. [2022-03-15 21:43:04,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3601 to 2265. [2022-03-15 21:43:04,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2265 states, 2264 states have (on average 2.466872791519435) internal successors, (5585), 2264 states have internal predecessors, (5585), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:04,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2265 states to 2265 states and 5585 transitions. [2022-03-15 21:43:04,492 INFO L78 Accepts]: Start accepts. Automaton has 2265 states and 5585 transitions. Word has length 39 [2022-03-15 21:43:04,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:04,493 INFO L470 AbstractCegarLoop]: Abstraction has 2265 states and 5585 transitions. [2022-03-15 21:43:04,493 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.56) internal successors, (89), 24 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:04,493 INFO L276 IsEmpty]: Start isEmpty. Operand 2265 states and 5585 transitions. [2022-03-15 21:43:04,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:04,496 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:04,496 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:04,512 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (65)] Forceful destruction successful, exit code 0 [2022-03-15 21:43:04,696 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable67,65 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:04,696 INFO L402 AbstractCegarLoop]: === Iteration 69 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:04,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:04,697 INFO L85 PathProgramCache]: Analyzing trace with hash 527524952, now seen corresponding path program 62 times [2022-03-15 21:43:04,697 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:04,698 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823542375] [2022-03-15 21:43:04,698 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:04,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:04,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:04,983 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:43:04,984 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:04,984 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823542375] [2022-03-15 21:43:04,984 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [823542375] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:04,984 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1924872950] [2022-03-15 21:43:04,984 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:43:04,984 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:04,984 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:04,985 INFO L229 MonitoredProcess]: Starting monitored process 66 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:04,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Waiting until timeout for monitored process [2022-03-15 21:43:05,011 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:43:05,011 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:05,012 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:05,012 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:05,848 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,851 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,853 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,853 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,854 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,857 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,857 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,858 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:05,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,860 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,860 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:05,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,865 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:05,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,867 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,867 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,871 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:05,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:05,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:05,872 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:43:05,884 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 5 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:05,884 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:07,202 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:43:07,203 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:43:08,404 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:08,404 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1924872950] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:08,404 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:08,404 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:43:08,405 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [869154034] [2022-03-15 21:43:08,405 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:08,407 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:08,425 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:43:08,425 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:11,686 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [267037#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 267035#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 267034#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 267036#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 267031#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 267032#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 267033#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 267030#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:43:11,686 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:43:11,686 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:11,686 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:43:11,687 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=298, Invalid=2152, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:43:11,687 INFO L87 Difference]: Start difference. First operand 2265 states and 5585 transitions. Second operand has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:12,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:12,352 INFO L93 Difference]: Finished difference Result 3979 states and 9870 transitions. [2022-03-15 21:43:12,352 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:43:12,352 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:12,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:12,357 INFO L225 Difference]: With dead ends: 3979 [2022-03-15 21:43:12,357 INFO L226 Difference]: Without dead ends: 3969 [2022-03-15 21:43:12,358 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 77 SyntacticMatches, 35 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2012 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=458, Invalid=3448, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:43:12,358 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 130 mSDsluCounter, 175 mSDsCounter, 0 mSdLazyCounter, 773 mSolverCounterSat, 45 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 818 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 45 IncrementalHoareTripleChecker+Valid, 773 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:12,358 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [130 Valid, 8 Invalid, 818 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [45 Valid, 773 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:43:12,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3969 states. [2022-03-15 21:43:12,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3969 to 2281. [2022-03-15 21:43:12,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2281 states, 2280 states have (on average 2.4671052631578947) internal successors, (5625), 2280 states have internal predecessors, (5625), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:12,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 2281 states and 5625 transitions. [2022-03-15 21:43:12,395 INFO L78 Accepts]: Start accepts. Automaton has 2281 states and 5625 transitions. Word has length 39 [2022-03-15 21:43:12,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:12,395 INFO L470 AbstractCegarLoop]: Abstraction has 2281 states and 5625 transitions. [2022-03-15 21:43:12,395 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 3.5416666666666665) internal successors, (85), 23 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:12,395 INFO L276 IsEmpty]: Start isEmpty. Operand 2281 states and 5625 transitions. [2022-03-15 21:43:12,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:12,397 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:12,397 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:12,413 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (66)] Ended with exit code 0 [2022-03-15 21:43:12,599 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 66 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable68 [2022-03-15 21:43:12,599 INFO L402 AbstractCegarLoop]: === Iteration 70 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:12,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:12,600 INFO L85 PathProgramCache]: Analyzing trace with hash 1536791336, now seen corresponding path program 63 times [2022-03-15 21:43:12,600 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:12,600 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769507087] [2022-03-15 21:43:12,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:12,600 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:12,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:12,902 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:43:12,902 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:12,902 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769507087] [2022-03-15 21:43:12,902 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769507087] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:12,902 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [556315927] [2022-03-15 21:43:12,902 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:43:12,902 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:12,902 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:12,903 INFO L229 MonitoredProcess]: Starting monitored process 67 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:12,904 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Waiting until timeout for monitored process [2022-03-15 21:43:12,931 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:43:12,931 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:12,932 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:12,933 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:13,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,753 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,753 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:13,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,756 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,757 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,757 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,758 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,758 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,760 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,761 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,761 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,763 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,764 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,765 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,765 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,766 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:13,766 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,767 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,767 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,768 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,769 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,770 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,770 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,771 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:13,771 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,771 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:13,772 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,773 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,773 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:13,773 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:13,774 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:43:13,786 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 5 proven. 81 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:13,786 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:15,116 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:43:15,117 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:43:16,773 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 2 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:16,773 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [556315927] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:16,773 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:16,773 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:43:16,773 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1433037433] [2022-03-15 21:43:16,774 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:16,776 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:16,794 INFO L252 McrAutomatonBuilder]: Finished intersection with 111 states and 201 transitions. [2022-03-15 21:43:16,794 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:20,253 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [275882#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (not v_assert) (<= back front)) (or (not v_assert) (<= front back))), 275879#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 275883#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 275878#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 275880#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front)))), 275884#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 275876#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 275877#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 275881#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 275875#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:43:20,253 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:43:20,253 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:20,254 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:43:20,254 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=306, Invalid=2346, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:43:20,254 INFO L87 Difference]: Start difference. First operand 2281 states and 5625 transitions. Second operand has 26 states, 26 states have (on average 3.5384615384615383) internal successors, (92), 25 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:20,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:20,915 INFO L93 Difference]: Finished difference Result 3851 states and 9542 transitions. [2022-03-15 21:43:20,915 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:43:20,915 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.5384615384615383) internal successors, (92), 25 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:20,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:20,920 INFO L225 Difference]: With dead ends: 3851 [2022-03-15 21:43:20,920 INFO L226 Difference]: Without dead ends: 3841 [2022-03-15 21:43:20,921 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 82 SyntacticMatches, 32 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2047 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=472, Invalid=3688, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:43:20,921 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 134 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 819 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 134 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 869 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 819 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:20,921 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [134 Valid, 10 Invalid, 869 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 819 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:43:20,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3841 states. [2022-03-15 21:43:20,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3841 to 2289. [2022-03-15 21:43:20,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2289 states, 2288 states have (on average 2.4672202797202796) internal successors, (5645), 2288 states have internal predecessors, (5645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:20,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 2289 states and 5645 transitions. [2022-03-15 21:43:20,949 INFO L78 Accepts]: Start accepts. Automaton has 2289 states and 5645 transitions. Word has length 39 [2022-03-15 21:43:20,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:20,949 INFO L470 AbstractCegarLoop]: Abstraction has 2289 states and 5645 transitions. [2022-03-15 21:43:20,949 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.5384615384615383) internal successors, (92), 25 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:20,949 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 5645 transitions. [2022-03-15 21:43:20,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:20,951 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:20,951 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:20,967 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (67)] Forceful destruction successful, exit code 0 [2022-03-15 21:43:21,152 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 67 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable69 [2022-03-15 21:43:21,152 INFO L402 AbstractCegarLoop]: === Iteration 71 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:21,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:21,152 INFO L85 PathProgramCache]: Analyzing trace with hash -371341144, now seen corresponding path program 64 times [2022-03-15 21:43:21,153 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:21,153 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763906370] [2022-03-15 21:43:21,153 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:21,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:21,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:21,457 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:43:21,457 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:21,457 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763906370] [2022-03-15 21:43:21,457 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763906370] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:21,457 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [799836361] [2022-03-15 21:43:21,457 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:43:21,457 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:21,458 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:21,459 INFO L229 MonitoredProcess]: Starting monitored process 68 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:21,461 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Waiting until timeout for monitored process [2022-03-15 21:43:21,487 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:43:21,487 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:21,488 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:21,488 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:22,343 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,344 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,344 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,345 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,345 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,346 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,347 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,347 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,348 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:22,349 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,349 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,350 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,350 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,351 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,352 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,353 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,353 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,354 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,354 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:22,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,355 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,356 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,357 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,358 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:22,358 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,359 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:22,359 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,360 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,361 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,362 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,363 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:22,364 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:22,364 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:43:22,376 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:22,376 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:23,724 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:43:23,724 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:43:25,459 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:25,459 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [799836361] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:25,459 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:25,459 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:43:25,460 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [497317488] [2022-03-15 21:43:25,460 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:25,463 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:25,511 INFO L252 McrAutomatonBuilder]: Finished intersection with 111 states and 201 transitions. [2022-03-15 21:43:25,511 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:28,761 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [284616#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 284612#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ front 1) back)) (or (not v_assert) (<= 1 sum))), 284619#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 284615#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 284618#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 284613#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ front 1) (+ back 1)))), 284617#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 284610#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 284611#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 284614#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back)))] [2022-03-15 21:43:28,761 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:43:28,761 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:28,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:43:28,762 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=2353, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:43:28,762 INFO L87 Difference]: Start difference. First operand 2289 states and 5645 transitions. Second operand has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:29,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:29,469 INFO L93 Difference]: Finished difference Result 4043 states and 10034 transitions. [2022-03-15 21:43:29,470 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:43:29,470 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:29,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:29,475 INFO L225 Difference]: With dead ends: 4043 [2022-03-15 21:43:29,475 INFO L226 Difference]: Without dead ends: 4033 [2022-03-15 21:43:29,475 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 87 SyntacticMatches, 27 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1838 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=461, Invalid=3699, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:43:29,476 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 157 mSDsluCounter, 232 mSDsCounter, 0 mSdLazyCounter, 935 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 987 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 935 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:29,476 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [157 Valid, 12 Invalid, 987 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 935 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:43:29,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4033 states. [2022-03-15 21:43:29,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4033 to 2289. [2022-03-15 21:43:29,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2289 states, 2288 states have (on average 2.4672202797202796) internal successors, (5645), 2288 states have internal predecessors, (5645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:29,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 2289 states and 5645 transitions. [2022-03-15 21:43:29,502 INFO L78 Accepts]: Start accepts. Automaton has 2289 states and 5645 transitions. Word has length 39 [2022-03-15 21:43:29,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:29,502 INFO L470 AbstractCegarLoop]: Abstraction has 2289 states and 5645 transitions. [2022-03-15 21:43:29,502 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:29,502 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 5645 transitions. [2022-03-15 21:43:29,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:29,504 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:29,504 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:29,520 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (68)] Ended with exit code 0 [2022-03-15 21:43:29,704 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable70,68 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:29,705 INFO L402 AbstractCegarLoop]: === Iteration 72 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:29,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:29,705 INFO L85 PathProgramCache]: Analyzing trace with hash 1620055784, now seen corresponding path program 65 times [2022-03-15 21:43:29,706 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:29,706 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [732357286] [2022-03-15 21:43:29,706 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:29,706 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:29,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:29,988 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 75 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-03-15 21:43:29,988 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:29,988 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [732357286] [2022-03-15 21:43:29,988 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [732357286] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:29,988 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1016572970] [2022-03-15 21:43:29,988 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:43:29,988 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:29,988 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:29,989 INFO L229 MonitoredProcess]: Starting monitored process 69 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:29,990 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Waiting until timeout for monitored process [2022-03-15 21:43:30,019 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:43:30,019 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:30,020 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:30,020 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:30,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,865 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,865 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,866 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,867 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:30,867 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,868 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,869 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,870 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,871 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,872 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:30,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,873 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,874 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,874 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:30,875 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,876 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,877 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,877 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,878 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,879 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,879 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,879 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:30,880 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,880 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:30,881 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,882 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,882 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:30,883 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:43:30,894 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 13 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:30,895 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:32,191 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:43:32,192 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:43:33,878 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:33,878 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1016572970] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:33,878 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:33,879 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 17] total 39 [2022-03-15 21:43:33,879 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [363281828] [2022-03-15 21:43:33,879 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:33,881 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:33,902 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:43:33,903 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:38,408 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [293539#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 293535#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 293538#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 293537#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 293543#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 293544#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 293541#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 293542#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 293540#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 293536#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)))] [2022-03-15 21:43:38,408 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 24 states [2022-03-15 21:43:38,408 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:38,408 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2022-03-15 21:43:38,408 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=2099, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:43:38,408 INFO L87 Difference]: Start difference. First operand 2289 states and 5645 transitions. Second operand has 24 states, 24 states have (on average 4.041666666666667) internal successors, (97), 23 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:38,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:38,925 INFO L93 Difference]: Finished difference Result 2955 states and 7297 transitions. [2022-03-15 21:43:38,925 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:43:38,925 INFO L78 Accepts]: Start accepts. Automaton has has 24 states, 24 states have (on average 4.041666666666667) internal successors, (97), 23 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:38,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:38,929 INFO L225 Difference]: With dead ends: 2955 [2022-03-15 21:43:38,929 INFO L226 Difference]: Without dead ends: 2945 [2022-03-15 21:43:38,929 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 96 SyntacticMatches, 32 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2058 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=509, Invalid=3151, Unknown=0, NotChecked=0, Total=3660 [2022-03-15 21:43:38,929 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 116 mSDsluCounter, 128 mSDsCounter, 0 mSdLazyCounter, 543 mSolverCounterSat, 52 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 116 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 595 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 52 IncrementalHoareTripleChecker+Valid, 543 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:38,929 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [116 Valid, 5 Invalid, 595 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [52 Valid, 543 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:43:38,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2945 states. [2022-03-15 21:43:38,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2945 to 2257. [2022-03-15 21:43:38,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2257 states, 2256 states have (on average 2.466755319148936) internal successors, (5565), 2256 states have internal predecessors, (5565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:38,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2257 states to 2257 states and 5565 transitions. [2022-03-15 21:43:38,953 INFO L78 Accepts]: Start accepts. Automaton has 2257 states and 5565 transitions. Word has length 39 [2022-03-15 21:43:38,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:38,953 INFO L470 AbstractCegarLoop]: Abstraction has 2257 states and 5565 transitions. [2022-03-15 21:43:38,953 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 24 states, 24 states have (on average 4.041666666666667) internal successors, (97), 23 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:38,953 INFO L276 IsEmpty]: Start isEmpty. Operand 2257 states and 5565 transitions. [2022-03-15 21:43:38,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:38,955 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:38,955 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:38,971 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (69)] Forceful destruction successful, exit code 0 [2022-03-15 21:43:39,156 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 69 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable71 [2022-03-15 21:43:39,156 INFO L402 AbstractCegarLoop]: === Iteration 73 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:39,156 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:39,156 INFO L85 PathProgramCache]: Analyzing trace with hash 575415004, now seen corresponding path program 66 times [2022-03-15 21:43:39,157 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:39,157 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859512281] [2022-03-15 21:43:39,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:39,157 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:39,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:39,492 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:39,492 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:39,493 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859512281] [2022-03-15 21:43:39,493 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1859512281] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:39,493 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2137368537] [2022-03-15 21:43:39,493 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:43:39,493 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:39,493 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:39,494 INFO L229 MonitoredProcess]: Starting monitored process 70 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:39,494 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Waiting until timeout for monitored process [2022-03-15 21:43:39,522 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:43:39,522 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:43:39,523 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:39,524 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:48,068 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,069 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,070 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,070 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,071 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,072 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,073 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,073 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:48,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,074 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,075 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,076 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,077 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,078 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,079 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,079 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:48,080 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:48,080 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,081 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,082 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,083 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,089 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:48,091 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:48,091 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:48,092 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:43:48,109 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:48,109 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:50,134 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,136 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,137 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,138 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,138 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,141 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,142 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,142 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,143 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,144 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,145 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,145 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,145 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,146 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,147 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,149 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,149 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,149 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,155 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,155 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,162 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,167 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,170 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,173 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,173 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:50,431 INFO L353 Elim1Store]: treesize reduction 83, result has 77.1 percent of original size [2022-03-15 21:43:50,432 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 57 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 34 case distinctions, treesize of input 124 treesize of output 331 [2022-03-15 21:43:51,634 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:51,635 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2137368537] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:43:51,635 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:43:51,635 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:43:51,635 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [798020487] [2022-03-15 21:43:51,635 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:43:51,637 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:43:51,655 INFO L252 McrAutomatonBuilder]: Finished intersection with 111 states and 201 transitions. [2022-03-15 21:43:51,655 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:43:55,338 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [301312#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 301308#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 301306#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 301309#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 301307#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 301310#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 301314#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 301313#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 301311#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:43:55,338 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:43:55,338 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:43:55,338 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:43:55,339 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=350, Invalid=2197, Unknown=3, NotChecked=0, Total=2550 [2022-03-15 21:43:55,339 INFO L87 Difference]: Start difference. First operand 2257 states and 5565 transitions. Second operand has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:56,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:43:56,126 INFO L93 Difference]: Finished difference Result 3963 states and 9817 transitions. [2022-03-15 21:43:56,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:43:56,126 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:43:56,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:43:56,131 INFO L225 Difference]: With dead ends: 3963 [2022-03-15 21:43:56,131 INFO L226 Difference]: Without dead ends: 3953 [2022-03-15 21:43:56,131 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 87 SyntacticMatches, 28 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1770 ImplicationChecksByTransitivity, 9.9s TimeCoverageRelationStatistics Valid=543, Invalid=3614, Unknown=3, NotChecked=0, Total=4160 [2022-03-15 21:43:56,131 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 136 mSDsluCounter, 224 mSDsCounter, 0 mSdLazyCounter, 910 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 960 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 910 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:43:56,132 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 10 Invalid, 960 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 910 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:43:56,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3953 states. [2022-03-15 21:43:56,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3953 to 2281. [2022-03-15 21:43:56,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2281 states, 2280 states have (on average 2.4671052631578947) internal successors, (5625), 2280 states have internal predecessors, (5625), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:56,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2281 states to 2281 states and 5625 transitions. [2022-03-15 21:43:56,162 INFO L78 Accepts]: Start accepts. Automaton has 2281 states and 5625 transitions. Word has length 39 [2022-03-15 21:43:56,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:43:56,162 INFO L470 AbstractCegarLoop]: Abstraction has 2281 states and 5625 transitions. [2022-03-15 21:43:56,162 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.88) internal successors, (97), 24 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:43:56,162 INFO L276 IsEmpty]: Start isEmpty. Operand 2281 states and 5625 transitions. [2022-03-15 21:43:56,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:43:56,164 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:43:56,164 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:43:56,179 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (70)] Ended with exit code 0 [2022-03-15 21:43:56,364 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable72,70 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:56,364 INFO L402 AbstractCegarLoop]: === Iteration 74 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:43:56,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:43:56,365 INFO L85 PathProgramCache]: Analyzing trace with hash 1890093272, now seen corresponding path program 67 times [2022-03-15 21:43:56,366 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:43:56,366 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402174745] [2022-03-15 21:43:56,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:43:56,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:43:56,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:56,683 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:56,684 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:43:56,684 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402174745] [2022-03-15 21:43:56,684 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [402174745] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:43:56,684 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [978434144] [2022-03-15 21:43:56,684 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:43:56,684 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:43:56,684 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:43:56,685 INFO L229 MonitoredProcess]: Starting monitored process 71 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:43:56,685 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Waiting until timeout for monitored process [2022-03-15 21:43:56,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:43:56,715 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:43:56,715 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:43:57,600 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,601 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,602 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,603 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,604 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,604 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,605 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,606 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,606 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,607 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,608 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,608 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,609 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:57,609 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,610 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,610 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,611 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,612 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,612 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,616 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:57,616 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,618 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:57,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,619 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,622 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,622 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,622 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:57,623 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:43:57,624 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:43:57,624 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:43:57,636 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:43:57,636 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:43:58,969 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:43:58,969 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:44:00,272 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:00,273 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [978434144] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:00,273 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:00,273 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 17] total 42 [2022-03-15 21:44:00,273 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2037052176] [2022-03-15 21:44:00,273 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:00,275 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:00,293 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:44:00,293 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:03,713 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [310142#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 310144#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 310140#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 310139#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 310147#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 310146#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 310143#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 310141#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 310145#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:44:03,713 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:44:03,713 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:03,713 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:44:03,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=2340, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:44:03,714 INFO L87 Difference]: Start difference. First operand 2281 states and 5625 transitions. Second operand has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:04,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:04,583 INFO L93 Difference]: Finished difference Result 4161 states and 10340 transitions. [2022-03-15 21:44:04,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:44:04,583 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:04,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:04,588 INFO L225 Difference]: With dead ends: 4161 [2022-03-15 21:44:04,589 INFO L226 Difference]: Without dead ends: 4145 [2022-03-15 21:44:04,589 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 81 SyntacticMatches, 29 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1838 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=498, Invalid=3924, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:44:04,589 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 138 mSDsluCounter, 250 mSDsCounter, 0 mSdLazyCounter, 1061 mSolverCounterSat, 53 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 1114 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 53 IncrementalHoareTripleChecker+Valid, 1061 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:04,589 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 11 Invalid, 1114 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [53 Valid, 1061 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:44:04,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4145 states. [2022-03-15 21:44:04,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4145 to 2289. [2022-03-15 21:44:04,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2289 states, 2288 states have (on average 2.4672202797202796) internal successors, (5645), 2288 states have internal predecessors, (5645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:04,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2289 states to 2289 states and 5645 transitions. [2022-03-15 21:44:04,620 INFO L78 Accepts]: Start accepts. Automaton has 2289 states and 5645 transitions. Word has length 39 [2022-03-15 21:44:04,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:04,620 INFO L470 AbstractCegarLoop]: Abstraction has 2289 states and 5645 transitions. [2022-03-15 21:44:04,620 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:04,620 INFO L276 IsEmpty]: Start isEmpty. Operand 2289 states and 5645 transitions. [2022-03-15 21:44:04,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:04,622 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:04,622 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:04,638 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (71)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:04,823 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable73,71 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:04,823 INFO L402 AbstractCegarLoop]: === Iteration 75 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:04,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:04,823 INFO L85 PathProgramCache]: Analyzing trace with hash -302854732, now seen corresponding path program 68 times [2022-03-15 21:44:04,824 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:04,824 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [256967217] [2022-03-15 21:44:04,824 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:04,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:04,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:05,090 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 78 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:44:05,091 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:05,091 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [256967217] [2022-03-15 21:44:05,091 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [256967217] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:05,091 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1954666767] [2022-03-15 21:44:05,091 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:44:05,091 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:05,091 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:05,092 INFO L229 MonitoredProcess]: Starting monitored process 72 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:05,092 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Waiting until timeout for monitored process [2022-03-15 21:44:05,118 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:44:05,118 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:44:05,119 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:44:05,120 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:05,926 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,927 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,928 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,928 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:05,929 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,929 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,930 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,930 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,931 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,932 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,932 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,933 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,933 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,934 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,934 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,935 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,936 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,936 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:05,937 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,937 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,938 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,938 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,939 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:05,939 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,940 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,941 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,941 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,942 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,943 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,943 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,944 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:05,944 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,944 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:05,945 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,946 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,946 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:05,947 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:44:05,959 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:05,959 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:07,287 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:44:07,288 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:44:08,916 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:08,917 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1954666767] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:08,917 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:08,917 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 17] total 39 [2022-03-15 21:44:08,917 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [238104766] [2022-03-15 21:44:08,917 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:08,919 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:08,939 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:44:08,939 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:13,080 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [319190#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 319188#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 319191#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 319185#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 319187#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 319192#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 319189#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 319186#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 319195#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 319193#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 319194#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:44:13,081 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:44:13,081 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:13,081 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:44:13,081 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=338, Invalid=2212, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:44:13,081 INFO L87 Difference]: Start difference. First operand 2289 states and 5645 transitions. Second operand has 25 states, 25 states have (on average 4.24) internal successors, (106), 24 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:13,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:13,638 INFO L93 Difference]: Finished difference Result 2551 states and 6288 transitions. [2022-03-15 21:44:13,638 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:44:13,638 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 4.24) internal successors, (106), 24 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:13,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:13,641 INFO L225 Difference]: With dead ends: 2551 [2022-03-15 21:44:13,641 INFO L226 Difference]: Without dead ends: 2545 [2022-03-15 21:44:13,642 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 95 SyntacticMatches, 32 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2218 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=495, Invalid=3287, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:44:13,642 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 135 mSDsluCounter, 186 mSDsCounter, 0 mSdLazyCounter, 695 mSolverCounterSat, 57 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 135 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 752 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 57 IncrementalHoareTripleChecker+Valid, 695 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:13,642 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [135 Valid, 9 Invalid, 752 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [57 Valid, 695 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:44:13,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2545 states. [2022-03-15 21:44:13,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2545 to 2065. [2022-03-15 21:44:13,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2065 states, 2064 states have (on average 2.47577519379845) internal successors, (5110), 2064 states have internal predecessors, (5110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:13,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2065 states to 2065 states and 5110 transitions. [2022-03-15 21:44:13,661 INFO L78 Accepts]: Start accepts. Automaton has 2065 states and 5110 transitions. Word has length 39 [2022-03-15 21:44:13,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:13,662 INFO L470 AbstractCegarLoop]: Abstraction has 2065 states and 5110 transitions. [2022-03-15 21:44:13,662 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 4.24) internal successors, (106), 24 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:13,662 INFO L276 IsEmpty]: Start isEmpty. Operand 2065 states and 5110 transitions. [2022-03-15 21:44:13,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:13,663 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:13,664 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:13,679 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (72)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:13,864 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable74,72 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:13,864 INFO L402 AbstractCegarLoop]: === Iteration 76 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:13,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:13,864 INFO L85 PathProgramCache]: Analyzing trace with hash 806189928, now seen corresponding path program 69 times [2022-03-15 21:44:13,865 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:13,865 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481497411] [2022-03-15 21:44:13,865 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:13,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:13,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:14,181 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:44:14,181 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:14,181 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481497411] [2022-03-15 21:44:14,181 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [481497411] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:14,181 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [934065691] [2022-03-15 21:44:14,181 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:44:14,181 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:14,181 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:14,182 INFO L229 MonitoredProcess]: Starting monitored process 73 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:14,183 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Waiting until timeout for monitored process [2022-03-15 21:44:14,212 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:44:14,212 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:44:14,213 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:44:14,214 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:15,838 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,839 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,840 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,840 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:15,842 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,843 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,844 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,844 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,845 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,846 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,846 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,847 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,847 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,848 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,848 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:15,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,851 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,851 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,852 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:15,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,857 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,858 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,859 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,860 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,860 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:15,861 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,862 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,863 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:15,863 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,864 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:15,865 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:44:15,877 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:15,877 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:18,349 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,352 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,354 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,354 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,355 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,356 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,359 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,360 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,360 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,362 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,364 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,367 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,369 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,371 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,372 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,373 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,374 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,374 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,375 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,375 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,377 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,379 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,380 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,382 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,382 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,383 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,387 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,387 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,387 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,388 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,389 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,389 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,389 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,390 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,390 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,390 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,393 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,393 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,393 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:18,672 INFO L353 Elim1Store]: treesize reduction 159, result has 63.4 percent of original size [2022-03-15 21:44:18,672 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 51 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 40 case distinctions, treesize of input 124 treesize of output 327 [2022-03-15 21:44:20,207 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:20,207 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [934065691] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:20,207 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:20,207 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 40 [2022-03-15 21:44:20,207 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1458897091] [2022-03-15 21:44:20,207 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:20,209 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:20,230 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:44:20,230 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:25,029 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [326172#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 326174#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 326171#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 326173#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 326168#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 326169#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 326178#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 326176#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 326170#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 326175#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 326177#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:44:25,029 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:44:25,029 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:25,030 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:44:25,030 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=386, Invalid=2266, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:44:25,030 INFO L87 Difference]: Start difference. First operand 2065 states and 5110 transitions. Second operand has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:25,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:25,857 INFO L93 Difference]: Finished difference Result 2980 states and 7395 transitions. [2022-03-15 21:44:25,857 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:44:25,857 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:25,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:25,861 INFO L225 Difference]: With dead ends: 2980 [2022-03-15 21:44:25,861 INFO L226 Difference]: Without dead ends: 2929 [2022-03-15 21:44:25,861 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 103 SyntacticMatches, 23 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=582, Invalid=3450, Unknown=0, NotChecked=0, Total=4032 [2022-03-15 21:44:25,861 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 108 mSDsluCounter, 196 mSDsCounter, 0 mSdLazyCounter, 931 mSolverCounterSat, 67 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 108 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 998 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 67 IncrementalHoareTripleChecker+Valid, 931 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:25,861 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [108 Valid, 7 Invalid, 998 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [67 Valid, 931 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:44:25,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2929 states. [2022-03-15 21:44:25,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2929 to 2233. [2022-03-15 21:44:25,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2233 states, 2232 states have (on average 2.475806451612903) internal successors, (5526), 2232 states have internal predecessors, (5526), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:25,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2233 states to 2233 states and 5526 transitions. [2022-03-15 21:44:25,883 INFO L78 Accepts]: Start accepts. Automaton has 2233 states and 5526 transitions. Word has length 39 [2022-03-15 21:44:25,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:25,883 INFO L470 AbstractCegarLoop]: Abstraction has 2233 states and 5526 transitions. [2022-03-15 21:44:25,883 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:25,883 INFO L276 IsEmpty]: Start isEmpty. Operand 2233 states and 5526 transitions. [2022-03-15 21:44:25,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:25,885 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:25,885 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:25,901 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (73)] Ended with exit code 0 [2022-03-15 21:44:26,085 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 73 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable75 [2022-03-15 21:44:26,085 INFO L402 AbstractCegarLoop]: === Iteration 77 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:26,086 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:26,086 INFO L85 PathProgramCache]: Analyzing trace with hash 1020514912, now seen corresponding path program 70 times [2022-03-15 21:44:26,086 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:26,086 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330139458] [2022-03-15 21:44:26,087 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:26,087 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:26,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:26,473 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:26,473 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:26,474 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [330139458] [2022-03-15 21:44:26,474 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [330139458] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:26,474 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [856768548] [2022-03-15 21:44:26,474 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:44:26,474 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:26,474 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:26,475 INFO L229 MonitoredProcess]: Starting monitored process 74 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:26,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Waiting until timeout for monitored process [2022-03-15 21:44:26,502 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:44:26,502 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:44:26,503 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:44:26,503 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:27,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,389 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,391 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:27,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,392 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,393 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,394 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,395 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:27,395 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,396 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,397 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,398 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,399 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,400 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,400 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,401 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:27,401 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,402 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,405 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:27,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:27,406 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:27,406 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:44:27,418 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:27,418 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:28,752 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:44:28,753 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:44:30,546 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:30,547 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [856768548] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:30,547 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:30,547 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 41 [2022-03-15 21:44:30,547 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1482345584] [2022-03-15 21:44:30,547 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:30,549 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:30,568 INFO L252 McrAutomatonBuilder]: Finished intersection with 115 states and 211 transitions. [2022-03-15 21:44:30,568 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:34,813 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [333921#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 333923#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 333928#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 333925#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 333927#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 333920#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 333919#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 333926#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 333924#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 333922#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0)) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:44:34,813 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:44:34,813 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:34,814 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:44:34,814 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=331, Invalid=2321, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:44:34,814 INFO L87 Difference]: Start difference. First operand 2233 states and 5526 transitions. Second operand has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:35,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:35,647 INFO L93 Difference]: Finished difference Result 4089 states and 10186 transitions. [2022-03-15 21:44:35,647 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:44:35,647 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:35,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:35,652 INFO L225 Difference]: With dead ends: 4089 [2022-03-15 21:44:35,652 INFO L226 Difference]: Without dead ends: 4073 [2022-03-15 21:44:35,652 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 182 GetRequests, 91 SyntacticMatches, 27 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1776 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=514, Invalid=3776, Unknown=0, NotChecked=0, Total=4290 [2022-03-15 21:44:35,652 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 124 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 977 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 1025 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 977 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:35,652 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [124 Valid, 8 Invalid, 1025 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 977 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:44:35,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4073 states. [2022-03-15 21:44:35,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4073 to 2177. [2022-03-15 21:44:35,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2177 states, 2176 states have (on average 2.4751838235294117) internal successors, (5386), 2176 states have internal predecessors, (5386), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:35,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2177 states to 2177 states and 5386 transitions. [2022-03-15 21:44:35,676 INFO L78 Accepts]: Start accepts. Automaton has 2177 states and 5386 transitions. Word has length 39 [2022-03-15 21:44:35,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:35,676 INFO L470 AbstractCegarLoop]: Abstraction has 2177 states and 5386 transitions. [2022-03-15 21:44:35,676 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:35,676 INFO L276 IsEmpty]: Start isEmpty. Operand 2177 states and 5386 transitions. [2022-03-15 21:44:35,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:35,678 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:35,678 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:35,694 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (74)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:35,879 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable76,74 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:35,880 INFO L402 AbstractCegarLoop]: === Iteration 78 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:35,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:35,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1076227416, now seen corresponding path program 71 times [2022-03-15 21:44:35,881 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:35,881 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294284071] [2022-03-15 21:44:35,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:35,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:35,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:36,315 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:36,316 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:36,316 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294284071] [2022-03-15 21:44:36,316 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294284071] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:36,316 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [242501724] [2022-03-15 21:44:36,316 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:44:36,316 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:36,316 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:36,317 INFO L229 MonitoredProcess]: Starting monitored process 75 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:36,342 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Waiting until timeout for monitored process [2022-03-15 21:44:36,359 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:44:36,359 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:44:36,360 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 60 conjunts are in the unsatisfiable core [2022-03-15 21:44:36,361 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:37,415 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,416 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,418 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,419 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,419 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,420 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,420 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,421 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,423 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,423 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,424 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,425 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,425 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,426 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,426 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,427 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:37,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,431 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,431 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:37,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,433 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:37,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,436 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:37,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,438 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:37,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:37,439 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 48 [2022-03-15 21:44:37,451 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:37,451 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:38,332 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,333 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,333 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,334 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,334 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,334 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,335 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,335 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,336 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,336 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,337 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,339 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,340 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,340 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,341 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,342 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,342 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,342 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,343 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,345 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,345 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,346 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,347 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,347 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,348 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,349 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,350 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,350 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,350 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,351 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,352 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,353 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,354 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,355 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,355 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,356 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,356 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,356 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,357 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,357 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,357 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,358 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,358 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,360 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,360 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,361 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,362 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,362 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,362 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,363 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,364 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,366 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,366 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,366 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,367 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,368 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,368 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:38,473 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:44:38,473 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:44:39,229 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:39,229 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [242501724] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:39,229 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:39,229 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 43 [2022-03-15 21:44:39,229 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [749192692] [2022-03-15 21:44:39,229 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:39,231 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:39,250 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:44:39,250 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:42,901 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [342677#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 342680#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 342676#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 342673#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 342679#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 342675#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 342681#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 342678#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 342672#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 342674#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:44:42,902 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:44:42,902 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:42,902 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:44:42,902 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=464, Invalid=2398, Unknown=0, NotChecked=0, Total=2862 [2022-03-15 21:44:42,902 INFO L87 Difference]: Start difference. First operand 2177 states and 5386 transitions. Second operand has 28 states, 28 states have (on average 3.4642857142857144) internal successors, (97), 27 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:43,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:43,792 INFO L93 Difference]: Finished difference Result 4369 states and 10886 transitions. [2022-03-15 21:44:43,792 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:44:43,792 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.4642857142857144) internal successors, (97), 27 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:43,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:43,798 INFO L225 Difference]: With dead ends: 4369 [2022-03-15 21:44:43,798 INFO L226 Difference]: Without dead ends: 4353 [2022-03-15 21:44:43,799 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 87 SyntacticMatches, 21 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1855 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=728, Invalid=4102, Unknown=0, NotChecked=0, Total=4830 [2022-03-15 21:44:43,799 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 146 mSDsluCounter, 221 mSDsCounter, 0 mSdLazyCounter, 995 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 1049 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 995 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:43,799 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [146 Valid, 8 Invalid, 1049 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 995 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:44:43,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4353 states. [2022-03-15 21:44:43,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4353 to 2145. [2022-03-15 21:44:43,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2145 states, 2144 states have (on average 2.474813432835821) internal successors, (5306), 2144 states have internal predecessors, (5306), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:43,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2145 states to 2145 states and 5306 transitions. [2022-03-15 21:44:43,827 INFO L78 Accepts]: Start accepts. Automaton has 2145 states and 5306 transitions. Word has length 39 [2022-03-15 21:44:43,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:43,827 INFO L470 AbstractCegarLoop]: Abstraction has 2145 states and 5306 transitions. [2022-03-15 21:44:43,827 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.4642857142857144) internal successors, (97), 27 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:43,827 INFO L276 IsEmpty]: Start isEmpty. Operand 2145 states and 5306 transitions. [2022-03-15 21:44:43,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:43,829 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:43,829 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:43,845 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (75)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:44,029 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable77,75 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:44,029 INFO L402 AbstractCegarLoop]: === Iteration 79 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:44,030 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:44,030 INFO L85 PathProgramCache]: Analyzing trace with hash 1761657940, now seen corresponding path program 72 times [2022-03-15 21:44:44,030 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:44,031 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [799586654] [2022-03-15 21:44:44,031 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:44,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:44,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:44,465 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:44,465 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:44,465 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [799586654] [2022-03-15 21:44:44,465 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [799586654] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:44,465 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [104330577] [2022-03-15 21:44:44,465 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:44:44,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:44,465 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:44,466 INFO L229 MonitoredProcess]: Starting monitored process 76 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:44,495 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (76)] Waiting until timeout for monitored process [2022-03-15 21:44:44,508 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:44:44,508 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:44:44,509 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:44:44,510 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:45,426 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,427 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,428 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,429 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,430 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,431 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,431 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:45,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,432 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,441 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:45,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,442 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,442 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,443 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,446 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,446 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:45,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:45,451 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:45,451 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:45,452 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:44:45,465 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:45,465 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:46,774 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:44:46,775 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:44:47,747 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:47,747 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [104330577] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:47,747 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:47,747 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 43 [2022-03-15 21:44:47,747 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [905628825] [2022-03-15 21:44:47,748 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:47,750 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:47,767 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:44:47,767 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:44:50,906 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [351653#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 351651#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 351647#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 351648#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 351646#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 351649#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 351652#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 351650#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 351645#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (= (select queue (+ 5 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:44:50,907 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:44:50,907 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:44:50,907 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:44:50,907 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=334, Invalid=2422, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:44:50,907 INFO L87 Difference]: Start difference. First operand 2145 states and 5306 transitions. Second operand has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:51,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:44:51,774 INFO L93 Difference]: Finished difference Result 3939 states and 9791 transitions. [2022-03-15 21:44:51,774 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:44:51,774 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:44:51,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:44:51,779 INFO L225 Difference]: With dead ends: 3939 [2022-03-15 21:44:51,779 INFO L226 Difference]: Without dead ends: 3929 [2022-03-15 21:44:51,780 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 88 SyntacticMatches, 17 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1515 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=541, Invalid=4151, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:44:51,780 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 145 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 885 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 934 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 885 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:44:51,780 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [145 Valid, 6 Invalid, 934 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 885 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:44:51,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3929 states. [2022-03-15 21:44:51,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3929 to 2153. [2022-03-15 21:44:51,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2153 states, 2152 states have (on average 2.474907063197026) internal successors, (5326), 2152 states have internal predecessors, (5326), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:51,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2153 states to 2153 states and 5326 transitions. [2022-03-15 21:44:51,807 INFO L78 Accepts]: Start accepts. Automaton has 2153 states and 5326 transitions. Word has length 39 [2022-03-15 21:44:51,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:44:51,807 INFO L470 AbstractCegarLoop]: Abstraction has 2153 states and 5326 transitions. [2022-03-15 21:44:51,807 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:44:51,807 INFO L276 IsEmpty]: Start isEmpty. Operand 2153 states and 5326 transitions. [2022-03-15 21:44:51,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:44:51,810 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:44:51,810 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:44:51,825 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (76)] Forceful destruction successful, exit code 0 [2022-03-15 21:44:52,011 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 76 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable78 [2022-03-15 21:44:52,011 INFO L402 AbstractCegarLoop]: === Iteration 80 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:44:52,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:44:52,011 INFO L85 PathProgramCache]: Analyzing trace with hash 734006580, now seen corresponding path program 73 times [2022-03-15 21:44:52,012 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:44:52,012 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008370593] [2022-03-15 21:44:52,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:44:52,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:44:52,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:52,307 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:44:52,307 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:44:52,307 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008370593] [2022-03-15 21:44:52,307 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008370593] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:44:52,307 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2109370303] [2022-03-15 21:44:52,307 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:44:52,307 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:44:52,308 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:44:52,316 INFO L229 MonitoredProcess]: Starting monitored process 77 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:44:52,317 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (77)] Waiting until timeout for monitored process [2022-03-15 21:44:52,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:44:52,349 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:44:52,349 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:44:53,184 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,185 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:53,186 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,187 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,187 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,188 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,189 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,189 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,190 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,191 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,192 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,193 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,193 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:53,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,194 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,195 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,196 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,196 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,197 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,197 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:53,198 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,198 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,199 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,199 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,200 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,201 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,202 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,202 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:53,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,203 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,204 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,204 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:44:53,205 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:44:53,205 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:44:53,217 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:53,217 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:44:54,545 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:44:54,545 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:44:55,778 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 9 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:44:55,779 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2109370303] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:44:55,779 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:44:55,779 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 40 [2022-03-15 21:44:55,779 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [398392948] [2022-03-15 21:44:55,779 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:44:55,781 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:44:55,801 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:44:55,801 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:00,767 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [360202#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 360201#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 360207#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 360203#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 360208#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 3 front))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 sum))), 360204#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 360211#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 360200#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 360209#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 360210#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 360205#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 360206#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:45:00,767 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:45:00,767 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:00,767 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:45:00,767 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=366, Invalid=2390, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:45:00,767 INFO L87 Difference]: Start difference. First operand 2153 states and 5326 transitions. Second operand has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:01,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:01,526 INFO L93 Difference]: Finished difference Result 3228 states and 7990 transitions. [2022-03-15 21:45:01,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:45:01,526 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:01,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:01,530 INFO L225 Difference]: With dead ends: 3228 [2022-03-15 21:45:01,530 INFO L226 Difference]: Without dead ends: 3177 [2022-03-15 21:45:01,531 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 100 SyntacticMatches, 25 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1955 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=543, Invalid=3617, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:45:01,531 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 131 mSDsluCounter, 205 mSDsCounter, 0 mSdLazyCounter, 938 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1028 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 938 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:01,531 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [131 Valid, 9 Invalid, 1028 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 938 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:45:01,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3177 states. [2022-03-15 21:45:01,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3177 to 2265. [2022-03-15 21:45:01,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2265 states, 2264 states have (on average 2.474381625441696) internal successors, (5602), 2264 states have internal predecessors, (5602), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:01,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2265 states to 2265 states and 5602 transitions. [2022-03-15 21:45:01,553 INFO L78 Accepts]: Start accepts. Automaton has 2265 states and 5602 transitions. Word has length 39 [2022-03-15 21:45:01,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:01,553 INFO L470 AbstractCegarLoop]: Abstraction has 2265 states and 5602 transitions. [2022-03-15 21:45:01,553 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:01,553 INFO L276 IsEmpty]: Start isEmpty. Operand 2265 states and 5602 transitions. [2022-03-15 21:45:01,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:01,555 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:01,555 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:01,571 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (77)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:01,756 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 77 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable79 [2022-03-15 21:45:01,756 INFO L402 AbstractCegarLoop]: === Iteration 81 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:01,756 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:01,756 INFO L85 PathProgramCache]: Analyzing trace with hash 1004044068, now seen corresponding path program 74 times [2022-03-15 21:45:01,757 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:01,757 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [85449521] [2022-03-15 21:45:01,757 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:01,757 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:01,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:02,117 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:02,117 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:02,117 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [85449521] [2022-03-15 21:45:02,117 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [85449521] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:02,117 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [701343601] [2022-03-15 21:45:02,117 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:45:02,117 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:02,117 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:02,118 INFO L229 MonitoredProcess]: Starting monitored process 78 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:02,119 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (78)] Waiting until timeout for monitored process [2022-03-15 21:45:02,144 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:45:02,144 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:02,145 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:45:02,146 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:03,047 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:03,048 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,049 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,049 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,050 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,050 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,051 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,052 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,052 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,053 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,054 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,055 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,055 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,056 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:03,056 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,057 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,057 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,058 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,058 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,059 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:03,059 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,060 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,061 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,062 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,063 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,064 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,064 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:03,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,065 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,066 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,067 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:03,067 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:03,068 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:45:03,080 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:03,080 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:04,396 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:45:04,397 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:45:05,525 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 2 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:05,525 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [701343601] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:05,525 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:05,525 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 43 [2022-03-15 21:45:05,525 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [373065946] [2022-03-15 21:45:05,525 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:05,527 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:05,551 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:45:05,552 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:09,256 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [368272#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 368269#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 368268#(and (or (<= (+ 3 front) back) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ front 1)))) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 3 front))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 sum))), 368267#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 368275#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 368274#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 368270#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 368266#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 368271#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 368273#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 368276#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:45:09,257 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:45:09,257 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:09,257 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:45:09,257 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=334, Invalid=2636, Unknown=0, NotChecked=0, Total=2970 [2022-03-15 21:45:09,257 INFO L87 Difference]: Start difference. First operand 2265 states and 5602 transitions. Second operand has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:10,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:10,287 INFO L93 Difference]: Finished difference Result 4413 states and 11032 transitions. [2022-03-15 21:45:10,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:45:10,287 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:10,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:10,293 INFO L225 Difference]: With dead ends: 4413 [2022-03-15 21:45:10,293 INFO L226 Difference]: Without dead ends: 4385 [2022-03-15 21:45:10,294 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 85 SyntacticMatches, 22 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1792 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=541, Invalid=4429, Unknown=0, NotChecked=0, Total=4970 [2022-03-15 21:45:10,294 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 151 mSDsluCounter, 294 mSDsCounter, 0 mSdLazyCounter, 1307 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 1367 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 1307 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:10,294 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [151 Valid, 12 Invalid, 1367 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 1307 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:45:10,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4385 states. [2022-03-15 21:45:10,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4385 to 1985. [2022-03-15 21:45:10,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1985 states, 1984 states have (on average 2.472782258064516) internal successors, (4906), 1984 states have internal predecessors, (4906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:10,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1985 states to 1985 states and 4906 transitions. [2022-03-15 21:45:10,336 INFO L78 Accepts]: Start accepts. Automaton has 1985 states and 4906 transitions. Word has length 39 [2022-03-15 21:45:10,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:10,336 INFO L470 AbstractCegarLoop]: Abstraction has 1985 states and 4906 transitions. [2022-03-15 21:45:10,336 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:10,336 INFO L276 IsEmpty]: Start isEmpty. Operand 1985 states and 4906 transitions. [2022-03-15 21:45:10,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:10,339 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:10,339 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:10,364 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (78)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:10,555 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable80,78 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:10,555 INFO L402 AbstractCegarLoop]: === Iteration 82 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:10,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:10,556 INFO L85 PathProgramCache]: Analyzing trace with hash 957407284, now seen corresponding path program 75 times [2022-03-15 21:45:10,556 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:10,556 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703075913] [2022-03-15 21:45:10,556 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:10,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:10,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:10,906 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 78 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:45:10,906 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:10,906 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703075913] [2022-03-15 21:45:10,906 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1703075913] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:10,907 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2117462184] [2022-03-15 21:45:10,907 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:45:10,907 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:10,907 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:10,908 INFO L229 MonitoredProcess]: Starting monitored process 79 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:10,909 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Waiting until timeout for monitored process [2022-03-15 21:45:10,944 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:45:10,944 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:10,945 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 59 conjunts are in the unsatisfiable core [2022-03-15 21:45:10,946 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:11,907 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,908 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,909 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,909 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,910 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,911 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,911 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,912 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:11,912 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,913 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,914 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,915 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,916 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:11,916 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,917 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,917 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,918 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,919 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,919 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:11,920 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,920 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,921 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,922 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,922 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,923 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,923 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,924 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:11,924 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,925 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,925 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:11,926 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,927 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,927 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:11,928 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 12 select indices, 12 select index equivalence classes, 21 disjoint index pairs (out of 66 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 44 [2022-03-15 21:45:11,940 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:11,940 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:12,944 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,945 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,945 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,946 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,946 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,946 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,947 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,948 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,951 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,951 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,951 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,952 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,953 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,954 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,958 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,959 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,963 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,964 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,964 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,967 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,968 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,969 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,970 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,970 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,971 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,972 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,973 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,973 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,974 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,974 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,975 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,976 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,976 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,977 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,977 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,978 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,978 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,980 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,980 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,980 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,981 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,981 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,982 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,982 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:12,983 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:13,250 INFO L353 Elim1Store]: treesize reduction 157, result has 64.7 percent of original size [2022-03-15 21:45:13,251 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 51 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 40 case distinctions, treesize of input 128 treesize of output 339 [2022-03-15 21:45:13,747 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:13,747 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2117462184] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:13,747 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:13,747 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 40 [2022-03-15 21:45:13,747 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1693076793] [2022-03-15 21:45:13,748 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:13,750 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:13,771 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:45:13,772 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:18,151 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [376970#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 1))), 376968#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 376972#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 376963#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 376971#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 376967#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 376962#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 376965#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 376961#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 376964#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 376969#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 376966#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:45:18,152 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:45:18,152 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:18,152 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:45:18,152 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=427, Invalid=2329, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:45:18,152 INFO L87 Difference]: Start difference. First operand 1985 states and 4906 transitions. Second operand has 27 states, 27 states have (on average 4.0) internal successors, (108), 26 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:18,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:18,885 INFO L93 Difference]: Finished difference Result 2978 states and 7372 transitions. [2022-03-15 21:45:18,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:45:18,886 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 4.0) internal successors, (108), 26 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:18,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:18,889 INFO L225 Difference]: With dead ends: 2978 [2022-03-15 21:45:18,889 INFO L226 Difference]: Without dead ends: 2929 [2022-03-15 21:45:18,889 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 102 SyntacticMatches, 23 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1627 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=644, Invalid=3516, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:45:18,890 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 140 mSDsluCounter, 215 mSDsCounter, 0 mSdLazyCounter, 920 mSolverCounterSat, 89 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 1009 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 89 IncrementalHoareTripleChecker+Valid, 920 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:18,890 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [140 Valid, 11 Invalid, 1009 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [89 Valid, 920 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:45:18,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2929 states. [2022-03-15 21:45:18,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2929 to 2129. [2022-03-15 21:45:18,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2129 states, 2128 states have (on average 2.469454887218045) internal successors, (5255), 2128 states have internal predecessors, (5255), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:18,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2129 states to 2129 states and 5255 transitions. [2022-03-15 21:45:18,911 INFO L78 Accepts]: Start accepts. Automaton has 2129 states and 5255 transitions. Word has length 39 [2022-03-15 21:45:18,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:18,911 INFO L470 AbstractCegarLoop]: Abstraction has 2129 states and 5255 transitions. [2022-03-15 21:45:18,911 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 4.0) internal successors, (108), 26 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:18,911 INFO L276 IsEmpty]: Start isEmpty. Operand 2129 states and 5255 transitions. [2022-03-15 21:45:18,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:18,913 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:18,913 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:18,929 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (79)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:19,113 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable81,79 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:19,113 INFO L402 AbstractCegarLoop]: === Iteration 83 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:19,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:19,113 INFO L85 PathProgramCache]: Analyzing trace with hash -1486435020, now seen corresponding path program 76 times [2022-03-15 21:45:19,114 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:19,114 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187466642] [2022-03-15 21:45:19,114 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:19,114 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:19,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:19,452 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 76 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-03-15 21:45:19,452 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:19,452 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187466642] [2022-03-15 21:45:19,452 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1187466642] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:19,453 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [409385195] [2022-03-15 21:45:19,453 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:45:19,453 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:19,453 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:19,454 INFO L229 MonitoredProcess]: Starting monitored process 80 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:19,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (80)] Waiting until timeout for monitored process [2022-03-15 21:45:19,494 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:45:19,494 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:19,495 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:45:19,496 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:20,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,253 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,259 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,259 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,260 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,266 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:20,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,268 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,271 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,272 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:20,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:20,273 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:20,274 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:45:20,285 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 16 proven. 70 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:20,285 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:21,596 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:45:21,597 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:45:22,973 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:22,973 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [409385195] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:22,973 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:22,973 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 38 [2022-03-15 21:45:22,973 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [547293678] [2022-03-15 21:45:22,973 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:22,975 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:22,995 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:45:22,995 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:27,318 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [384502#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 384504#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 384507#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 384510#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 384503#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 384508#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 384506#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 384509#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 384511#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 384500#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 384505#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 384501#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum)))] [2022-03-15 21:45:27,318 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:45:27,318 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:27,318 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:45:27,318 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=331, Invalid=2219, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:45:27,318 INFO L87 Difference]: Start difference. First operand 2129 states and 5255 transitions. Second operand has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:27,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:27,839 INFO L93 Difference]: Finished difference Result 3054 states and 7541 transitions. [2022-03-15 21:45:27,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2022-03-15 21:45:27,840 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:27,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:27,843 INFO L225 Difference]: With dead ends: 3054 [2022-03-15 21:45:27,843 INFO L226 Difference]: Without dead ends: 3009 [2022-03-15 21:45:27,843 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 91 SyntacticMatches, 36 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2215 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=498, Invalid=3284, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:45:27,844 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 143 mSDsluCounter, 109 mSDsCounter, 0 mSdLazyCounter, 497 mSolverCounterSat, 90 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 143 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 587 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 90 IncrementalHoareTripleChecker+Valid, 497 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:27,844 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [143 Valid, 6 Invalid, 587 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [90 Valid, 497 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2022-03-15 21:45:27,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3009 states. [2022-03-15 21:45:27,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3009 to 2337. [2022-03-15 21:45:27,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2337 states, 2336 states have (on average 2.4601883561643834) internal successors, (5747), 2336 states have internal predecessors, (5747), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:27,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2337 states to 2337 states and 5747 transitions. [2022-03-15 21:45:27,868 INFO L78 Accepts]: Start accepts. Automaton has 2337 states and 5747 transitions. Word has length 39 [2022-03-15 21:45:27,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:27,868 INFO L470 AbstractCegarLoop]: Abstraction has 2337 states and 5747 transitions. [2022-03-15 21:45:27,868 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:27,868 INFO L276 IsEmpty]: Start isEmpty. Operand 2337 states and 5747 transitions. [2022-03-15 21:45:27,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:27,871 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:27,871 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:27,888 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (80)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:28,075 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 80 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable82 [2022-03-15 21:45:28,075 INFO L402 AbstractCegarLoop]: === Iteration 84 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:28,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:28,076 INFO L85 PathProgramCache]: Analyzing trace with hash 1956012080, now seen corresponding path program 77 times [2022-03-15 21:45:28,076 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:28,076 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1450136508] [2022-03-15 21:45:28,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:28,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:28,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:28,368 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:45:28,368 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:28,368 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1450136508] [2022-03-15 21:45:28,368 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1450136508] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:28,368 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1319166319] [2022-03-15 21:45:28,369 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:45:28,369 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:28,369 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:28,370 INFO L229 MonitoredProcess]: Starting monitored process 81 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:28,370 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (81)] Waiting until timeout for monitored process [2022-03-15 21:45:28,400 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 11 check-sat command(s) [2022-03-15 21:45:28,401 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:28,401 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:45:28,402 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:29,213 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,214 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,215 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,215 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,216 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,216 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,217 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,218 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,218 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,219 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,219 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,220 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,220 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,221 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,221 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,222 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,222 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,224 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,224 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,225 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,225 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,226 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,226 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,227 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,228 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,228 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,229 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,231 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,232 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,232 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,234 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,234 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,235 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,235 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,236 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,236 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,239 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,240 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:29,240 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:29,241 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 21 disjoint index pairs (out of 91 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 32 [2022-03-15 21:45:29,260 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 15 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:29,260 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:30,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,162 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,170 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,173 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,173 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,174 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,174 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,174 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,176 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,180 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,180 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,180 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,187 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,187 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,187 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,189 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,192 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:30,295 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:45:30,296 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:45:31,183 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:31,183 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1319166319] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:31,183 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:31,183 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 43 [2022-03-15 21:45:31,183 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [494647537] [2022-03-15 21:45:31,183 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:31,185 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:31,204 INFO L252 McrAutomatonBuilder]: Finished intersection with 119 states and 221 transitions. [2022-03-15 21:45:31,204 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:35,339 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [392535#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 392537#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 392542#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 392534#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 392541#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 392544#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 392539#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 392543#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 392536#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (= back front))), 392538#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 392540#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:45:35,340 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:45:35,340 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:35,340 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:45:35,340 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=2590, Unknown=0, NotChecked=0, Total=2970 [2022-03-15 21:45:35,340 INFO L87 Difference]: Start difference. First operand 2337 states and 5747 transitions. Second operand has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:36,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:36,040 INFO L93 Difference]: Finished difference Result 4249 states and 10547 transitions. [2022-03-15 21:45:36,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:45:36,041 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:36,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:36,046 INFO L225 Difference]: With dead ends: 4249 [2022-03-15 21:45:36,047 INFO L226 Difference]: Without dead ends: 4233 [2022-03-15 21:45:36,047 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 90 SyntacticMatches, 29 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2021 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=574, Invalid=3848, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:45:36,047 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 146 mSDsluCounter, 181 mSDsCounter, 0 mSdLazyCounter, 757 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 812 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 757 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:36,047 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [146 Valid, 8 Invalid, 812 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 757 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:45:36,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4233 states. [2022-03-15 21:45:36,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4233 to 2313. [2022-03-15 21:45:36,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2313 states, 2312 states have (on average 2.461505190311419) internal successors, (5691), 2312 states have internal predecessors, (5691), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:36,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2313 states to 2313 states and 5691 transitions. [2022-03-15 21:45:36,078 INFO L78 Accepts]: Start accepts. Automaton has 2313 states and 5691 transitions. Word has length 39 [2022-03-15 21:45:36,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:36,078 INFO L470 AbstractCegarLoop]: Abstraction has 2313 states and 5691 transitions. [2022-03-15 21:45:36,078 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.8846153846153846) internal successors, (101), 25 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:36,078 INFO L276 IsEmpty]: Start isEmpty. Operand 2313 states and 5691 transitions. [2022-03-15 21:45:36,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:36,080 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:36,080 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:36,095 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (81)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:36,280 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable83,81 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:36,280 INFO L402 AbstractCegarLoop]: === Iteration 85 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:36,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:36,281 INFO L85 PathProgramCache]: Analyzing trace with hash 1701978036, now seen corresponding path program 78 times [2022-03-15 21:45:36,282 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:36,282 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523915644] [2022-03-15 21:45:36,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:36,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:36,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:36,610 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:36,610 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:36,610 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523915644] [2022-03-15 21:45:36,610 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1523915644] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:36,610 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1404733372] [2022-03-15 21:45:36,610 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:45:36,610 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:36,610 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:36,611 INFO L229 MonitoredProcess]: Starting monitored process 82 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:36,612 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Waiting until timeout for monitored process [2022-03-15 21:45:36,640 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 10 check-sat command(s) [2022-03-15 21:45:36,640 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:36,641 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 60 conjunts are in the unsatisfiable core [2022-03-15 21:45:36,642 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:37,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,445 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,446 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,448 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:37,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,452 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:37,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,456 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:37,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:37,463 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:37,464 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 21 disjoint index pairs (out of 55 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 44 [2022-03-15 21:45:37,476 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:37,476 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:38,833 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:45:38,834 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:45:40,361 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:40,361 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1404733372] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:40,361 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:40,361 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 42 [2022-03-15 21:45:40,361 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [917592471] [2022-03-15 21:45:40,361 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:40,363 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:40,384 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:45:40,384 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:44,732 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 15 new interpolants: [401721#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 401725#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 401716#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 401728#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 401715#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 401718#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 401729#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 401723#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 401720#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 401717#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (= (select queue (+ front 1)) 1) (not v_assert) (< back (+ 2 front))) (or (not v_assert) (<= 1 sum))), 401724#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= sum 0)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (<= back front)) (or (not v_assert) (<= back (+ front 1)))), 401722#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 401719#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 401727#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 401726#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:45:44,732 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 33 states [2022-03-15 21:45:44,732 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:44,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2022-03-15 21:45:44,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=387, Invalid=2919, Unknown=0, NotChecked=0, Total=3306 [2022-03-15 21:45:44,733 INFO L87 Difference]: Start difference. First operand 2313 states and 5691 transitions. Second operand has 33 states, 33 states have (on average 3.515151515151515) internal successors, (116), 32 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:45,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:45,909 INFO L93 Difference]: Finished difference Result 3720 states and 9127 transitions. [2022-03-15 21:45:45,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2022-03-15 21:45:45,910 INFO L78 Accepts]: Start accepts. Automaton has has 33 states, 33 states have (on average 3.515151515151515) internal successors, (116), 32 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:45,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:45,914 INFO L225 Difference]: With dead ends: 3720 [2022-03-15 21:45:45,914 INFO L226 Difference]: Without dead ends: 3661 [2022-03-15 21:45:45,915 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 86 SyntacticMatches, 34 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2907 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=700, Invalid=5306, Unknown=0, NotChecked=0, Total=6006 [2022-03-15 21:45:45,915 INFO L933 BasicCegarLoop]: 4 mSDtfsCounter, 194 mSDsluCounter, 289 mSDsCounter, 0 mSdLazyCounter, 1108 mSolverCounterSat, 121 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 194 SdHoareTripleChecker+Valid, 27 SdHoareTripleChecker+Invalid, 1229 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 121 IncrementalHoareTripleChecker+Valid, 1108 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:45,915 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [194 Valid, 27 Invalid, 1229 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [121 Valid, 1108 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:45:45,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3661 states. [2022-03-15 21:45:45,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3661 to 2721. [2022-03-15 21:45:45,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2721 states, 2720 states have (on average 2.455514705882353) internal successors, (6679), 2720 states have internal predecessors, (6679), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:45,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2721 states to 2721 states and 6679 transitions. [2022-03-15 21:45:45,942 INFO L78 Accepts]: Start accepts. Automaton has 2721 states and 6679 transitions. Word has length 39 [2022-03-15 21:45:45,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:45,942 INFO L470 AbstractCegarLoop]: Abstraction has 2721 states and 6679 transitions. [2022-03-15 21:45:45,942 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 33 states, 33 states have (on average 3.515151515151515) internal successors, (116), 32 states have internal predecessors, (116), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:45,943 INFO L276 IsEmpty]: Start isEmpty. Operand 2721 states and 6679 transitions. [2022-03-15 21:45:45,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:45,945 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:45,945 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:45,967 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (82)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:46,162 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable84,82 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:46,163 INFO L402 AbstractCegarLoop]: === Iteration 86 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:46,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:46,163 INFO L85 PathProgramCache]: Analyzing trace with hash -839724492, now seen corresponding path program 79 times [2022-03-15 21:45:46,164 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:46,164 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376136497] [2022-03-15 21:45:46,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:46,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:46,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:46,446 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:45:46,447 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:46,447 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376136497] [2022-03-15 21:45:46,447 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1376136497] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:46,447 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [460181382] [2022-03-15 21:45:46,447 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:45:46,447 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:46,447 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:46,448 INFO L229 MonitoredProcess]: Starting monitored process 83 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:46,448 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (83)] Waiting until timeout for monitored process [2022-03-15 21:45:46,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:46,475 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:45:46,476 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:47,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,258 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:47,259 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,260 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,266 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:47,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,267 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:47,268 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:47,271 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:45:47,282 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:47,282 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:48,563 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:45:48,563 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:45:49,980 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:49,980 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [460181382] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:49,980 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:49,980 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 38 [2022-03-15 21:45:49,980 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1932759882] [2022-03-15 21:45:49,980 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:49,982 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:50,003 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:45:50,003 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:45:54,534 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [411201#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 411207#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 411203#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 411210#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 411204#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 411205#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 411208#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 411200#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 411206#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 411199#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 411202#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 411209#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:45:54,534 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:45:54,534 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:45:54,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:45:54,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=322, Invalid=2228, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:45:54,535 INFO L87 Difference]: Start difference. First operand 2721 states and 6679 transitions. Second operand has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:55,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:45:55,219 INFO L93 Difference]: Finished difference Result 3666 states and 9013 transitions. [2022-03-15 21:45:55,219 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:45:55,219 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:45:55,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:45:55,224 INFO L225 Difference]: With dead ends: 3666 [2022-03-15 21:45:55,224 INFO L226 Difference]: Without dead ends: 3617 [2022-03-15 21:45:55,235 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 87 SyntacticMatches, 40 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2306 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=496, Invalid=3410, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:45:55,235 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 154 mSDsluCounter, 174 mSDsCounter, 0 mSdLazyCounter, 782 mSolverCounterSat, 111 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 154 SdHoareTripleChecker+Valid, 8 SdHoareTripleChecker+Invalid, 893 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 111 IncrementalHoareTripleChecker+Valid, 782 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:45:55,235 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [154 Valid, 8 Invalid, 893 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [111 Valid, 782 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:45:55,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3617 states. [2022-03-15 21:45:55,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3617 to 2585. [2022-03-15 21:45:55,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2585 states, 2584 states have (on average 2.4593653250773992) internal successors, (6355), 2584 states have internal predecessors, (6355), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:55,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2585 states to 2585 states and 6355 transitions. [2022-03-15 21:45:55,263 INFO L78 Accepts]: Start accepts. Automaton has 2585 states and 6355 transitions. Word has length 39 [2022-03-15 21:45:55,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:45:55,263 INFO L470 AbstractCegarLoop]: Abstraction has 2585 states and 6355 transitions. [2022-03-15 21:45:55,264 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.925925925925926) internal successors, (106), 26 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:45:55,264 INFO L276 IsEmpty]: Start isEmpty. Operand 2585 states and 6355 transitions. [2022-03-15 21:45:55,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:45:55,266 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:45:55,266 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:45:55,283 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (83)] Forceful destruction successful, exit code 0 [2022-03-15 21:45:55,466 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 83 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable85 [2022-03-15 21:45:55,467 INFO L402 AbstractCegarLoop]: === Iteration 87 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:45:55,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:45:55,468 INFO L85 PathProgramCache]: Analyzing trace with hash 269320168, now seen corresponding path program 80 times [2022-03-15 21:45:55,469 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:45:55,469 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [393157376] [2022-03-15 21:45:55,469 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:45:55,469 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:45:55,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:45:55,804 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:45:55,804 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:45:55,804 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [393157376] [2022-03-15 21:45:55,804 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [393157376] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:45:55,805 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1905349041] [2022-03-15 21:45:55,805 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:45:55,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:45:55,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:45:55,807 INFO L229 MonitoredProcess]: Starting monitored process 84 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:45:55,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (84)] Waiting until timeout for monitored process [2022-03-15 21:45:55,837 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:45:55,837 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:45:55,838 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:45:55,839 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:45:56,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,662 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:56,663 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,665 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,665 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,666 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,666 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:56,667 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,667 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,668 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,668 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,669 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,670 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,670 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:45:56,671 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,672 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,672 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,673 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,673 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,674 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,674 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,675 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,676 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:45:56,676 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:45:56,688 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 4 proven. 82 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:56,688 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:45:58,007 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:45:58,007 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:45:59,660 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:45:59,660 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1905349041] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:45:59,660 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:45:59,660 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 38 [2022-03-15 21:45:59,660 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1150268388] [2022-03-15 21:45:59,660 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:45:59,662 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:45:59,682 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:45:59,682 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:04,764 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [420342#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 420345#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 420338#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 420348#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 420346#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 420339#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 420343#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 420344#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 420347#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 420340#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 420341#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back)))] [2022-03-15 21:46:04,764 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:46:04,765 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:04,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:46:04,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=329, Invalid=2121, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:46:04,765 INFO L87 Difference]: Start difference. First operand 2585 states and 6355 transitions. Second operand has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:05,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:05,557 INFO L93 Difference]: Finished difference Result 3892 states and 9600 transitions. [2022-03-15 21:46:05,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2022-03-15 21:46:05,557 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:05,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:05,563 INFO L225 Difference]: With dead ends: 3892 [2022-03-15 21:46:05,563 INFO L226 Difference]: Without dead ends: 3841 [2022-03-15 21:46:05,564 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 96 SyntacticMatches, 32 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1834 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=502, Invalid=3280, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:46:05,564 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 130 mSDsluCounter, 204 mSDsCounter, 0 mSdLazyCounter, 916 mSolverCounterSat, 84 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 1000 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 84 IncrementalHoareTripleChecker+Valid, 916 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:05,564 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [130 Valid, 11 Invalid, 1000 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [84 Valid, 916 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:46:05,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3841 states. [2022-03-15 21:46:05,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3841 to 2857. [2022-03-15 21:46:05,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2857 states, 2856 states have (on average 2.460434173669468) internal successors, (7027), 2856 states have internal predecessors, (7027), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:05,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2857 states to 2857 states and 7027 transitions. [2022-03-15 21:46:05,605 INFO L78 Accepts]: Start accepts. Automaton has 2857 states and 7027 transitions. Word has length 39 [2022-03-15 21:46:05,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:05,605 INFO L470 AbstractCegarLoop]: Abstraction has 2857 states and 7027 transitions. [2022-03-15 21:46:05,605 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.9615384615384617) internal successors, (103), 25 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:05,605 INFO L276 IsEmpty]: Start isEmpty. Operand 2857 states and 7027 transitions. [2022-03-15 21:46:05,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:05,609 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:05,609 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:05,628 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (84)] Forceful destruction successful, exit code 0 [2022-03-15 21:46:05,812 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable86,84 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:05,812 INFO L402 AbstractCegarLoop]: === Iteration 88 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:05,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:05,812 INFO L85 PathProgramCache]: Analyzing trace with hash -583200028, now seen corresponding path program 81 times [2022-03-15 21:46:05,813 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:05,814 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498159186] [2022-03-15 21:46:05,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:05,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:05,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:06,159 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 77 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2022-03-15 21:46:06,159 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:06,159 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498159186] [2022-03-15 21:46:06,159 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1498159186] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:06,159 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1959131067] [2022-03-15 21:46:06,159 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:46:06,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:06,160 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:06,161 INFO L229 MonitoredProcess]: Starting monitored process 85 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:06,162 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (85)] Waiting until timeout for monitored process [2022-03-15 21:46:06,204 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:46:06,204 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:46:06,205 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:46:06,206 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:06,997 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:06,998 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:06,998 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:06,999 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,000 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,000 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,002 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,003 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,003 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,004 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,004 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:07,005 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,005 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,006 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,006 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,007 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,008 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,008 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,009 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,010 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,010 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,011 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,013 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,013 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,014 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,015 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,015 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,016 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,016 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:07,017 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:07,017 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:07,018 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:46:07,030 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 2 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:07,030 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:08,307 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:46:08,307 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:46:10,170 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:10,170 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1959131067] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:10,170 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:10,170 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 17] total 38 [2022-03-15 21:46:10,171 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [518664273] [2022-03-15 21:46:10,171 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:10,173 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:10,217 INFO L252 McrAutomatonBuilder]: Finished intersection with 119 states and 221 transitions. [2022-03-15 21:46:10,217 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:14,987 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [430251#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 430248#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 430254#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 430247#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 430252#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 430246#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 430255#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 430249#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 430250#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 430253#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:46:14,988 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 25 states [2022-03-15 21:46:14,988 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:14,988 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2022-03-15 21:46:14,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=2047, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:46:14,988 INFO L87 Difference]: Start difference. First operand 2857 states and 7027 transitions. Second operand has 25 states, 25 states have (on average 3.96) internal successors, (99), 24 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:15,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:15,794 INFO L93 Difference]: Finished difference Result 4753 states and 11771 transitions. [2022-03-15 21:46:15,795 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:46:15,795 INFO L78 Accepts]: Start accepts. Automaton has has 25 states, 25 states have (on average 3.96) internal successors, (99), 24 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:15,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:15,801 INFO L225 Difference]: With dead ends: 4753 [2022-03-15 21:46:15,801 INFO L226 Difference]: Without dead ends: 4737 [2022-03-15 21:46:15,802 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 96 SyntacticMatches, 29 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1543 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=476, Invalid=3306, Unknown=0, NotChecked=0, Total=3782 [2022-03-15 21:46:15,802 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 111 mSDsluCounter, 202 mSDsCounter, 0 mSdLazyCounter, 915 mSolverCounterSat, 47 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 111 SdHoareTripleChecker+Valid, 6 SdHoareTripleChecker+Invalid, 962 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 47 IncrementalHoareTripleChecker+Valid, 915 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:15,802 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [111 Valid, 6 Invalid, 962 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [47 Valid, 915 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:46:15,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4737 states. [2022-03-15 21:46:15,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4737 to 2801. [2022-03-15 21:46:15,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2801 states, 2800 states have (on average 2.4596428571428572) internal successors, (6887), 2800 states have internal predecessors, (6887), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:15,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2801 states to 2801 states and 6887 transitions. [2022-03-15 21:46:15,832 INFO L78 Accepts]: Start accepts. Automaton has 2801 states and 6887 transitions. Word has length 39 [2022-03-15 21:46:15,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:15,832 INFO L470 AbstractCegarLoop]: Abstraction has 2801 states and 6887 transitions. [2022-03-15 21:46:15,832 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 25 states, 25 states have (on average 3.96) internal successors, (99), 24 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:15,832 INFO L276 IsEmpty]: Start isEmpty. Operand 2801 states and 6887 transitions. [2022-03-15 21:46:15,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:15,835 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:15,835 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:15,850 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (85)] Ended with exit code 0 [2022-03-15 21:46:16,035 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable87,85 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:16,035 INFO L402 AbstractCegarLoop]: === Iteration 89 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:16,035 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:16,035 INFO L85 PathProgramCache]: Analyzing trace with hash 539357656, now seen corresponding path program 82 times [2022-03-15 21:46:16,037 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:16,037 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1940753075] [2022-03-15 21:46:16,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:16,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:16,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:16,398 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:16,399 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:16,399 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1940753075] [2022-03-15 21:46:16,399 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1940753075] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:16,399 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1177608532] [2022-03-15 21:46:16,399 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:46:16,399 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:16,399 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:16,400 INFO L229 MonitoredProcess]: Starting monitored process 86 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:16,401 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (86)] Waiting until timeout for monitored process [2022-03-15 21:46:16,427 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:46:16,427 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:46:16,428 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:46:16,429 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:17,261 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,262 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,262 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:17,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,263 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,264 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,265 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,266 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,267 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,268 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,268 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,269 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,270 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:17,270 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,271 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,272 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,273 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,274 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,275 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,275 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,276 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,277 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:17,278 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:17,278 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:46:17,291 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:17,291 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:18,559 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:46:18,559 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:46:19,622 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:19,622 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1177608532] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:19,622 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:19,622 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 17] total 40 [2022-03-15 21:46:19,622 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1936555128] [2022-03-15 21:46:19,622 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:19,625 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:19,642 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:46:19,643 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:23,513 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [440909#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 440908#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 440912#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 440911#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 440907#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 440914#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 440913#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 440910#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 440906#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:46:23,513 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:46:23,513 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:23,513 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:46:23,513 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=2151, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:46:23,513 INFO L87 Difference]: Start difference. First operand 2801 states and 6887 transitions. Second operand has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:24,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:24,426 INFO L93 Difference]: Finished difference Result 5285 states and 13153 transitions. [2022-03-15 21:46:24,426 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:46:24,426 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:24,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:24,434 INFO L225 Difference]: With dead ends: 5285 [2022-03-15 21:46:24,434 INFO L226 Difference]: Without dead ends: 5257 [2022-03-15 21:46:24,434 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 79 SyntacticMatches, 33 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1735 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=493, Invalid=3667, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:46:24,434 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 247 mSDsCounter, 0 mSdLazyCounter, 1079 mSolverCounterSat, 48 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 1127 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 48 IncrementalHoareTripleChecker+Valid, 1079 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:24,434 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 12 Invalid, 1127 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [48 Valid, 1079 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:46:24,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5257 states. [2022-03-15 21:46:24,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5257 to 2793. [2022-03-15 21:46:24,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2793 states, 2792 states have (on average 2.4595272206303727) internal successors, (6867), 2792 states have internal predecessors, (6867), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:24,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2793 states to 2793 states and 6867 transitions. [2022-03-15 21:46:24,467 INFO L78 Accepts]: Start accepts. Automaton has 2793 states and 6867 transitions. Word has length 39 [2022-03-15 21:46:24,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:24,467 INFO L470 AbstractCegarLoop]: Abstraction has 2793 states and 6867 transitions. [2022-03-15 21:46:24,468 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.6538461538461537) internal successors, (95), 25 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:24,468 INFO L276 IsEmpty]: Start isEmpty. Operand 2793 states and 6867 transitions. [2022-03-15 21:46:24,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:24,471 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:24,471 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:24,496 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (86)] Forceful destruction successful, exit code 0 [2022-03-15 21:46:24,693 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 86 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable88 [2022-03-15 21:46:24,694 INFO L402 AbstractCegarLoop]: === Iteration 90 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:24,694 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:24,694 INFO L85 PathProgramCache]: Analyzing trace with hash 1224788180, now seen corresponding path program 83 times [2022-03-15 21:46:24,695 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:24,695 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [461986253] [2022-03-15 21:46:24,695 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:24,695 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:24,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:25,083 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:25,083 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:25,083 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [461986253] [2022-03-15 21:46:25,083 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [461986253] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:25,083 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [727812173] [2022-03-15 21:46:25,083 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:46:25,083 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:25,083 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:25,084 INFO L229 MonitoredProcess]: Starting monitored process 87 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:25,085 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (87)] Waiting until timeout for monitored process [2022-03-15 21:46:25,114 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:46:25,114 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:46:25,115 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 60 conjunts are in the unsatisfiable core [2022-03-15 21:46:25,116 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:26,001 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,002 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,003 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,003 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,004 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,004 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,005 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,012 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,013 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,013 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,014 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,015 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,015 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,016 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,017 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,018 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,019 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,020 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,020 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,021 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,022 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,023 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,024 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:26,025 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 48 [2022-03-15 21:46:26,039 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:26,039 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:26,881 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,882 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,882 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,883 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,883 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,883 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,884 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,884 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,885 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,885 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,886 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,888 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,888 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,888 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,889 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,889 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,891 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,891 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,891 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,891 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,892 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,894 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,895 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,895 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,896 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,896 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,898 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,898 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,899 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,899 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,899 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,900 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,901 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,902 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,902 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,903 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,904 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,904 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,905 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,905 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,905 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,906 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,906 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,906 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,907 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,907 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,909 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,909 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,910 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,911 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,911 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,911 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,912 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,912 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,912 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,913 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,913 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,915 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,915 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,916 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,916 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,917 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:26,917 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:27,022 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:46:27,023 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:46:27,719 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:27,719 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [727812173] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:27,719 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:27,719 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 41 [2022-03-15 21:46:27,719 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [250322042] [2022-03-15 21:46:27,719 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:27,721 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:27,739 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:46:27,739 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:31,357 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [452088#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 452090#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 452087#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (= (select queue (+ 5 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 452086#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 452093#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 452092#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 452091#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 452089#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 452094#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front)))] [2022-03-15 21:46:31,357 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:46:31,357 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:31,357 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:46:31,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=2124, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:46:31,358 INFO L87 Difference]: Start difference. First operand 2793 states and 6867 transitions. Second operand has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:32,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:32,457 INFO L93 Difference]: Finished difference Result 5049 states and 12527 transitions. [2022-03-15 21:46:32,458 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:46:32,458 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:32,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:32,464 INFO L225 Difference]: With dead ends: 5049 [2022-03-15 21:46:32,464 INFO L226 Difference]: Without dead ends: 5033 [2022-03-15 21:46:32,465 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 80 SyntacticMatches, 27 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1751 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=689, Invalid=3733, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:46:32,465 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 129 mSDsluCounter, 333 mSDsCounter, 0 mSdLazyCounter, 1474 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 14 SdHoareTripleChecker+Invalid, 1520 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 1474 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:32,465 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [129 Valid, 14 Invalid, 1520 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 1474 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:46:32,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5033 states. [2022-03-15 21:46:32,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5033 to 2785. [2022-03-15 21:46:32,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2785 states, 2784 states have (on average 2.45941091954023) internal successors, (6847), 2784 states have internal predecessors, (6847), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:32,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2785 states to 2785 states and 6847 transitions. [2022-03-15 21:46:32,498 INFO L78 Accepts]: Start accepts. Automaton has 2785 states and 6847 transitions. Word has length 39 [2022-03-15 21:46:32,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:32,498 INFO L470 AbstractCegarLoop]: Abstraction has 2785 states and 6847 transitions. [2022-03-15 21:46:32,498 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:32,498 INFO L276 IsEmpty]: Start isEmpty. Operand 2785 states and 6847 transitions. [2022-03-15 21:46:32,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:32,500 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:32,500 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:32,516 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (87)] Forceful destruction successful, exit code 0 [2022-03-15 21:46:32,701 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable89,87 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:32,701 INFO L402 AbstractCegarLoop]: === Iteration 91 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:32,701 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:32,701 INFO L85 PathProgramCache]: Analyzing trace with hash 420537524, now seen corresponding path program 84 times [2022-03-15 21:46:32,702 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:32,702 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862536315] [2022-03-15 21:46:32,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:32,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:32,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:33,033 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:33,033 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:33,034 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862536315] [2022-03-15 21:46:33,034 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1862536315] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:33,034 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [787537942] [2022-03-15 21:46:33,034 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:46:33,034 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:33,034 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:33,035 INFO L229 MonitoredProcess]: Starting monitored process 88 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:33,035 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (88)] Waiting until timeout for monitored process [2022-03-15 21:46:33,063 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:46:33,064 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:46:33,064 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:46:33,065 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:34,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,223 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,224 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,225 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,225 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,226 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,226 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,227 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,228 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,228 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:34,229 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,229 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,230 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,231 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,231 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,232 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,233 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,234 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,234 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,235 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,236 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,236 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,237 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,238 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,239 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,240 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,241 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,241 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:34,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:34,243 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:34,243 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 21 disjoint index pairs (out of 45 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:46:34,255 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:34,256 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:36,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,673 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,673 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,676 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,676 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,677 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,677 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,677 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,679 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,679 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,681 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,682 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,682 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,688 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,691 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,692 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,692 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,693 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,694 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,696 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,697 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,697 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,698 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,700 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,701 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,702 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,702 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,703 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,703 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,704 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,704 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,704 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,705 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,705 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,706 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,706 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,707 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,710 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,710 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,710 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,711 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,711 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,713 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,714 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,716 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,717 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,717 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:36,974 INFO L353 Elim1Store]: treesize reduction 83, result has 77.1 percent of original size [2022-03-15 21:46:36,974 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 57 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 34 case distinctions, treesize of input 124 treesize of output 331 [2022-03-15 21:46:38,124 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 2 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:38,124 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [787537942] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:38,124 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:38,124 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 39 [2022-03-15 21:46:38,124 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2030083430] [2022-03-15 21:46:38,124 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:38,126 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:38,147 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:46:38,147 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:43,043 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [463023#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 463025#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 463024#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 463014#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 463018#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 463016#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 463021#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 463026#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 463019#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 463015#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 463022#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 463017#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 463020#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0)))] [2022-03-15 21:46:43,043 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:46:43,043 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:43,043 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:46:43,043 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=391, Invalid=2365, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:46:43,043 INFO L87 Difference]: Start difference. First operand 2785 states and 6847 transitions. Second operand has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:43,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:43,889 INFO L93 Difference]: Finished difference Result 3678 states and 9053 transitions. [2022-03-15 21:46:43,889 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:46:43,889 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:43,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:43,895 INFO L225 Difference]: With dead ends: 3678 [2022-03-15 21:46:43,895 INFO L226 Difference]: Without dead ends: 3625 [2022-03-15 21:46:43,895 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 90 SyntacticMatches, 35 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2131 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=601, Invalid=3689, Unknown=0, NotChecked=0, Total=4290 [2022-03-15 21:46:43,896 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 180 mSDsluCounter, 212 mSDsCounter, 0 mSdLazyCounter, 934 mSolverCounterSat, 126 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 180 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 1060 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 126 IncrementalHoareTripleChecker+Valid, 934 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:43,896 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [180 Valid, 10 Invalid, 1060 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [126 Valid, 934 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:46:43,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3625 states. [2022-03-15 21:46:43,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3625 to 2553. [2022-03-15 21:46:43,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2553 states, 2552 states have (on average 2.4619905956112853) internal successors, (6283), 2552 states have internal predecessors, (6283), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:43,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2553 states to 2553 states and 6283 transitions. [2022-03-15 21:46:43,945 INFO L78 Accepts]: Start accepts. Automaton has 2553 states and 6283 transitions. Word has length 39 [2022-03-15 21:46:43,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:43,945 INFO L470 AbstractCegarLoop]: Abstraction has 2553 states and 6283 transitions. [2022-03-15 21:46:43,946 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:43,946 INFO L276 IsEmpty]: Start isEmpty. Operand 2553 states and 6283 transitions. [2022-03-15 21:46:43,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:43,949 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:43,949 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:43,976 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (88)] Forceful destruction successful, exit code 0 [2022-03-15 21:46:44,160 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable90,88 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:44,161 INFO L402 AbstractCegarLoop]: === Iteration 92 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:44,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:44,162 INFO L85 PathProgramCache]: Analyzing trace with hash -171719576, now seen corresponding path program 85 times [2022-03-15 21:46:44,163 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:44,163 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641110551] [2022-03-15 21:46:44,163 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:44,163 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:44,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:44,564 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:44,565 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:44,565 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641110551] [2022-03-15 21:46:44,565 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [641110551] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:44,565 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [807603779] [2022-03-15 21:46:44,565 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:46:44,565 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:44,565 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:44,566 INFO L229 MonitoredProcess]: Starting monitored process 89 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:44,567 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (89)] Waiting until timeout for monitored process [2022-03-15 21:46:44,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:44,593 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:46:44,594 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:45,368 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,369 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,370 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,371 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,371 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,372 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:45,372 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,373 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,373 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,374 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,375 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:45,389 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:46:45,405 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 9 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:45,406 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:46,730 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:46:46,730 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:46:47,959 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 17 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:47,960 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [807603779] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:47,960 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:47,960 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 37 [2022-03-15 21:46:47,960 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1837609958] [2022-03-15 21:46:47,960 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:47,962 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:48,005 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:46:48,005 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:46:53,457 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [472103#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 6 front) back)) (or (not v_assert) (<= back (+ 6 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 472113#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 472114#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 472104#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 472107#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 472112#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 472105#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 472106#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 472111#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 472109#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 472110#(and (or (not v_assert) (<= 0 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))) 1) (not v_assert)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))))) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 0))), 472108#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))))] [2022-03-15 21:46:53,457 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:46:53,457 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:46:53,457 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:46:53,457 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=324, Invalid=2126, Unknown=0, NotChecked=0, Total=2450 [2022-03-15 21:46:53,457 INFO L87 Difference]: Start difference. First operand 2553 states and 6283 transitions. Second operand has 28 states, 28 states have (on average 3.892857142857143) internal successors, (109), 27 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:54,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:46:54,225 INFO L93 Difference]: Finished difference Result 3752 states and 9256 transitions. [2022-03-15 21:46:54,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:46:54,225 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.892857142857143) internal successors, (109), 27 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:46:54,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:46:54,230 INFO L225 Difference]: With dead ends: 3752 [2022-03-15 21:46:54,230 INFO L226 Difference]: Without dead ends: 3697 [2022-03-15 21:46:54,230 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 88 SyntacticMatches, 40 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2008 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=521, Invalid=3385, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:46:54,231 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 136 mSDsluCounter, 134 mSDsCounter, 0 mSdLazyCounter, 695 mSolverCounterSat, 111 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 136 SdHoareTripleChecker+Valid, 4 SdHoareTripleChecker+Invalid, 806 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 111 IncrementalHoareTripleChecker+Valid, 695 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2022-03-15 21:46:54,231 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [136 Valid, 4 Invalid, 806 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [111 Valid, 695 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2022-03-15 21:46:54,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3697 states. [2022-03-15 21:46:54,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3697 to 2809. [2022-03-15 21:46:54,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2809 states, 2808 states have (on average 2.464031339031339) internal successors, (6919), 2808 states have internal predecessors, (6919), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:54,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2809 states to 2809 states and 6919 transitions. [2022-03-15 21:46:54,263 INFO L78 Accepts]: Start accepts. Automaton has 2809 states and 6919 transitions. Word has length 39 [2022-03-15 21:46:54,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:46:54,263 INFO L470 AbstractCegarLoop]: Abstraction has 2809 states and 6919 transitions. [2022-03-15 21:46:54,263 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.892857142857143) internal successors, (109), 27 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:46:54,263 INFO L276 IsEmpty]: Start isEmpty. Operand 2809 states and 6919 transitions. [2022-03-15 21:46:54,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:46:54,266 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:46:54,266 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:46:54,282 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (89)] Forceful destruction successful, exit code 0 [2022-03-15 21:46:54,466 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable91,89 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:54,466 INFO L402 AbstractCegarLoop]: === Iteration 93 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:46:54,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:46:54,466 INFO L85 PathProgramCache]: Analyzing trace with hash -1024239772, now seen corresponding path program 86 times [2022-03-15 21:46:54,467 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:46:54,467 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108010677] [2022-03-15 21:46:54,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:46:54,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:46:54,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:46:54,859 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:54,859 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:46:54,859 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108010677] [2022-03-15 21:46:54,859 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1108010677] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:46:54,859 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [868630506] [2022-03-15 21:46:54,859 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:46:54,859 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:46:54,859 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:46:54,860 INFO L229 MonitoredProcess]: Starting monitored process 90 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:46:54,863 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (90)] Waiting until timeout for monitored process [2022-03-15 21:46:54,888 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:46:54,888 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:46:54,889 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:46:54,890 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:46:55,650 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,650 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,654 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,654 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,656 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,662 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:46:55,663 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,664 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:46:55,664 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:46:55,676 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:55,676 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:46:56,939 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:46:56,940 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:46:58,189 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:46:58,189 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [868630506] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:46:58,189 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:46:58,189 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 37 [2022-03-15 21:46:58,189 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [887634569] [2022-03-15 21:46:58,189 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:46:58,191 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:46:58,210 INFO L252 McrAutomatonBuilder]: Finished intersection with 119 states and 221 transitions. [2022-03-15 21:46:58,210 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:03,447 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [481780#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 6 front) back)) (or (not v_assert) (<= back (+ 6 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 481786#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 481787#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 481779#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 481778#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 481785#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 481781#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 481777#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 481783#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 481784#(and (or (not v_assert) (= (- 1) (select queue (+ front 4)))) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 481782#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:47:03,447 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:47:03,447 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:03,447 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:47:03,448 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=283, Invalid=2069, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:47:03,448 INFO L87 Difference]: Start difference. First operand 2809 states and 6919 transitions. Second operand has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:04,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:04,360 INFO L93 Difference]: Finished difference Result 4865 states and 12067 transitions. [2022-03-15 21:47:04,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:47:04,360 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:04,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:04,366 INFO L225 Difference]: With dead ends: 4865 [2022-03-15 21:47:04,366 INFO L226 Difference]: Without dead ends: 4849 [2022-03-15 21:47:04,366 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 84 SyntacticMatches, 41 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1817 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=469, Invalid=3437, Unknown=0, NotChecked=0, Total=3906 [2022-03-15 21:47:04,366 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 118 mSDsluCounter, 273 mSDsCounter, 0 mSdLazyCounter, 1165 mSolverCounterSat, 51 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 118 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 1216 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 51 IncrementalHoareTripleChecker+Valid, 1165 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:04,366 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [118 Valid, 10 Invalid, 1216 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [51 Valid, 1165 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:47:04,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4849 states. [2022-03-15 21:47:04,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4849 to 2769. [2022-03-15 21:47:04,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2769 states, 2768 states have (on average 2.4635115606936417) internal successors, (6819), 2768 states have internal predecessors, (6819), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:04,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2769 states to 2769 states and 6819 transitions. [2022-03-15 21:47:04,398 INFO L78 Accepts]: Start accepts. Automaton has 2769 states and 6819 transitions. Word has length 39 [2022-03-15 21:47:04,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:04,398 INFO L470 AbstractCegarLoop]: Abstraction has 2769 states and 6819 transitions. [2022-03-15 21:47:04,398 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.888888888888889) internal successors, (105), 26 states have internal predecessors, (105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:04,398 INFO L276 IsEmpty]: Start isEmpty. Operand 2769 states and 6819 transitions. [2022-03-15 21:47:04,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:04,402 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:04,402 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:04,425 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (90)] Forceful destruction successful, exit code 0 [2022-03-15 21:47:04,615 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 90 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable92 [2022-03-15 21:47:04,615 INFO L402 AbstractCegarLoop]: === Iteration 94 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:04,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:04,616 INFO L85 PathProgramCache]: Analyzing trace with hash -1216360356, now seen corresponding path program 87 times [2022-03-15 21:47:04,616 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:04,616 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [376090758] [2022-03-15 21:47:04,616 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:04,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:04,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:05,003 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:05,004 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:05,004 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [376090758] [2022-03-15 21:47:05,004 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [376090758] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:05,004 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2090031300] [2022-03-15 21:47:05,004 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:47:05,004 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:05,004 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:05,005 INFO L229 MonitoredProcess]: Starting monitored process 91 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:05,006 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (91)] Waiting until timeout for monitored process [2022-03-15 21:47:05,036 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:47:05,036 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:47:05,037 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:47:05,038 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:08,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,403 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,404 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,405 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,406 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,406 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:08,407 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,407 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,408 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,408 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,409 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,410 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,410 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,411 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,412 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,412 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,413 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,413 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,414 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,414 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:08,415 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,416 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,416 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,417 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,418 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,418 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,419 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,419 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:08,420 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,421 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,421 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:08,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,422 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:08,423 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 21 disjoint index pairs (out of 55 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:47:08,435 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:08,435 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:10,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,155 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,155 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,155 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,158 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,160 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,161 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,165 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,166 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,167 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,167 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,167 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,168 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,175 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,175 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,176 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,179 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,181 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,182 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,182 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,184 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,187 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,188 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,189 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,192 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:10,470 INFO L353 Elim1Store]: treesize reduction 159, result has 63.4 percent of original size [2022-03-15 21:47:10,470 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 51 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 40 case distinctions, treesize of input 124 treesize of output 327 [2022-03-15 21:47:11,238 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:11,239 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2090031300] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:47:11,239 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:47:11,239 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 17] total 41 [2022-03-15 21:47:11,239 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [670307637] [2022-03-15 21:47:11,239 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:47:11,241 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:47:11,259 INFO L252 McrAutomatonBuilder]: Finished intersection with 111 states and 201 transitions. [2022-03-15 21:47:11,259 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:15,978 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [492492#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 492491#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 492498#(and (or (not v_assert) (= (- 1) (select queue (+ front 4)))) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 492489#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 492496#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 492493#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 492495#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 492494#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 492497#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 492490#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 6 front) back)) (or (not v_assert) (<= back (+ 6 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:47:15,978 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:47:15,978 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:15,979 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:47:15,979 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=365, Invalid=2287, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:47:15,979 INFO L87 Difference]: Start difference. First operand 2769 states and 6819 transitions. Second operand has 27 states, 27 states have (on average 3.6666666666666665) internal successors, (99), 26 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:16,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:16,960 INFO L93 Difference]: Finished difference Result 5177 states and 12859 transitions. [2022-03-15 21:47:16,961 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:47:16,961 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.6666666666666665) internal successors, (99), 26 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:16,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:16,967 INFO L225 Difference]: With dead ends: 5177 [2022-03-15 21:47:16,967 INFO L226 Difference]: Without dead ends: 5161 [2022-03-15 21:47:16,967 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 73 SyntacticMatches, 41 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2346 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=595, Invalid=3827, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:47:16,968 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 121 mSDsluCounter, 183 mSDsCounter, 0 mSdLazyCounter, 882 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 121 SdHoareTripleChecker+Valid, 5 SdHoareTripleChecker+Invalid, 931 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 882 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:16,968 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [121 Valid, 5 Invalid, 931 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 882 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:47:16,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5161 states. [2022-03-15 21:47:17,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5161 to 2785. [2022-03-15 21:47:17,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2785 states, 2784 states have (on average 2.463721264367816) internal successors, (6859), 2784 states have internal predecessors, (6859), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:17,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2785 states to 2785 states and 6859 transitions. [2022-03-15 21:47:17,005 INFO L78 Accepts]: Start accepts. Automaton has 2785 states and 6859 transitions. Word has length 39 [2022-03-15 21:47:17,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:17,005 INFO L470 AbstractCegarLoop]: Abstraction has 2785 states and 6859 transitions. [2022-03-15 21:47:17,005 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.6666666666666665) internal successors, (99), 26 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:17,005 INFO L276 IsEmpty]: Start isEmpty. Operand 2785 states and 6859 transitions. [2022-03-15 21:47:17,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:17,008 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:17,008 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:17,024 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (91)] Forceful destruction successful, exit code 0 [2022-03-15 21:47:17,208 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable93,91 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:17,209 INFO L402 AbstractCegarLoop]: === Iteration 95 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:17,209 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:17,209 INFO L85 PathProgramCache]: Analyzing trace with hash 783748436, now seen corresponding path program 88 times [2022-03-15 21:47:17,210 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:17,210 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1689168305] [2022-03-15 21:47:17,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:17,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:17,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:17,587 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:17,587 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:17,587 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1689168305] [2022-03-15 21:47:17,588 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1689168305] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:17,588 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1656901693] [2022-03-15 21:47:17,588 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:47:17,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:17,588 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:17,589 INFO L229 MonitoredProcess]: Starting monitored process 92 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:17,589 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (92)] Waiting until timeout for monitored process [2022-03-15 21:47:17,618 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:47:17,619 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:47:17,619 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:47:17,620 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:18,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,433 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,434 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,434 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:18,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,435 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,436 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,437 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,438 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,439 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,440 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,441 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,442 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,442 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,443 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,443 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,444 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:18,445 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:47:18,456 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:18,456 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:19,762 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:47:19,762 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:47:21,104 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 17 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:21,104 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1656901693] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:47:21,104 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:47:21,105 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 39 [2022-03-15 21:47:21,105 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [998821995] [2022-03-15 21:47:21,105 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:47:21,107 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:47:21,124 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:47:21,125 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:24,894 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 9 new interpolants: [503546#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 503550#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 503547#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 503548#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 503551#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 503545#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 503549#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 503544#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 6 front) back)) (or (not v_assert) (<= back (+ 6 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 503552#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (= (select queue (+ 5 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:47:24,894 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 27 states [2022-03-15 21:47:24,894 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:24,895 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2022-03-15 21:47:24,895 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=282, Invalid=2070, Unknown=0, NotChecked=0, Total=2352 [2022-03-15 21:47:24,895 INFO L87 Difference]: Start difference. First operand 2785 states and 6859 transitions. Second operand has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:25,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:25,865 INFO L93 Difference]: Finished difference Result 5065 states and 12583 transitions. [2022-03-15 21:47:25,865 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:47:25,865 INFO L78 Accepts]: Start accepts. Automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:25,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:25,871 INFO L225 Difference]: With dead ends: 5065 [2022-03-15 21:47:25,871 INFO L226 Difference]: Without dead ends: 5049 [2022-03-15 21:47:25,871 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 74 SyntacticMatches, 35 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1714 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=496, Invalid=3664, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:47:25,872 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 131 mSDsluCounter, 235 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1157 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:25,872 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [131 Valid, 9 Invalid, 1157 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:47:25,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5049 states. [2022-03-15 21:47:25,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5049 to 2785. [2022-03-15 21:47:25,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2785 states, 2784 states have (on average 2.463721264367816) internal successors, (6859), 2784 states have internal predecessors, (6859), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:25,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2785 states to 2785 states and 6859 transitions. [2022-03-15 21:47:25,906 INFO L78 Accepts]: Start accepts. Automaton has 2785 states and 6859 transitions. Word has length 39 [2022-03-15 21:47:25,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:25,907 INFO L470 AbstractCegarLoop]: Abstraction has 2785 states and 6859 transitions. [2022-03-15 21:47:25,907 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 27 states, 27 states have (on average 3.4444444444444446) internal successors, (93), 26 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:25,907 INFO L276 IsEmpty]: Start isEmpty. Operand 2785 states and 6859 transitions. [2022-03-15 21:47:25,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:25,909 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:25,909 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:25,931 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (92)] Ended with exit code 0 [2022-03-15 21:47:26,123 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable94,92 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:26,123 INFO L402 AbstractCegarLoop]: === Iteration 96 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:26,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:26,124 INFO L85 PathProgramCache]: Analyzing trace with hash -1942481584, now seen corresponding path program 89 times [2022-03-15 21:47:26,124 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:26,124 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596988353] [2022-03-15 21:47:26,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:26,125 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:26,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:26,496 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:26,496 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:26,496 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596988353] [2022-03-15 21:47:26,496 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [596988353] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:26,496 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1054144998] [2022-03-15 21:47:26,496 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:47:26,496 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:26,496 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:26,497 INFO L229 MonitoredProcess]: Starting monitored process 93 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:26,498 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (93)] Waiting until timeout for monitored process [2022-03-15 21:47:26,539 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:47:26,539 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:47:26,546 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 59 conjunts are in the unsatisfiable core [2022-03-15 21:47:26,547 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:27,470 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,474 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,474 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,476 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,476 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,478 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,483 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,485 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,485 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,486 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,487 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,487 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,488 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,488 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,489 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,489 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,490 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,490 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,491 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,492 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,492 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,493 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,493 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,494 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,494 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,495 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,495 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,496 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,497 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:27,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,497 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:27,499 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 21 disjoint index pairs (out of 91 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 32 [2022-03-15 21:47:27,520 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:27,521 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:28,664 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,665 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,666 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,666 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,666 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,667 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,667 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,667 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,668 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,669 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,669 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,671 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,671 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,672 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,674 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,675 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,675 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,678 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,678 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,678 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,679 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,679 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,681 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,682 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,682 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,682 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,683 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,683 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,684 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,685 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,686 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,687 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,688 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,688 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,688 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,689 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,690 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,692 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,693 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,693 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,694 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,694 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,694 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,695 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,695 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,695 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,696 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,696 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,698 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,698 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,699 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,700 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,700 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,700 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:28,805 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:47:28,805 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:47:29,569 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:29,570 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1054144998] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:47:29,570 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:47:29,570 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 46 [2022-03-15 21:47:29,570 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1201219513] [2022-03-15 21:47:29,570 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:47:29,572 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:47:29,590 INFO L252 McrAutomatonBuilder]: Finished intersection with 99 states and 171 transitions. [2022-03-15 21:47:29,590 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:33,258 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 8 new interpolants: [514496#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 6 front) back)) (or (not v_assert) (<= back (+ 6 front))) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 514502#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 514495#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 6 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ 5 front)))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 514499#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 514500#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 514497#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 514501#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 514498#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:47:33,258 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 26 states [2022-03-15 21:47:33,258 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:33,259 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2022-03-15 21:47:33,259 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=440, Invalid=2530, Unknown=0, NotChecked=0, Total=2970 [2022-03-15 21:47:33,259 INFO L87 Difference]: Start difference. First operand 2785 states and 6859 transitions. Second operand has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:34,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:34,375 INFO L93 Difference]: Finished difference Result 4386 states and 10844 transitions. [2022-03-15 21:47:34,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:47:34,375 INFO L78 Accepts]: Start accepts. Automaton has has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:34,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:34,380 INFO L225 Difference]: With dead ends: 4386 [2022-03-15 21:47:34,380 INFO L226 Difference]: Without dead ends: 4377 [2022-03-15 21:47:34,380 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 68 SyntacticMatches, 31 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1717 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=708, Invalid=4262, Unknown=0, NotChecked=0, Total=4970 [2022-03-15 21:47:34,381 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 258 mSDsCounter, 0 mSdLazyCounter, 1142 mSolverCounterSat, 39 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 14 SdHoareTripleChecker+Invalid, 1181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 39 IncrementalHoareTripleChecker+Valid, 1142 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:34,381 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 14 Invalid, 1181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [39 Valid, 1142 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:47:34,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4377 states. [2022-03-15 21:47:34,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4377 to 2801. [2022-03-15 21:47:34,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2801 states, 2800 states have (on average 2.4639285714285712) internal successors, (6899), 2800 states have internal predecessors, (6899), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:34,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2801 states to 2801 states and 6899 transitions. [2022-03-15 21:47:34,410 INFO L78 Accepts]: Start accepts. Automaton has 2801 states and 6899 transitions. Word has length 39 [2022-03-15 21:47:34,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:34,410 INFO L470 AbstractCegarLoop]: Abstraction has 2801 states and 6899 transitions. [2022-03-15 21:47:34,410 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 26 states, 26 states have (on average 3.423076923076923) internal successors, (89), 25 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:34,411 INFO L276 IsEmpty]: Start isEmpty. Operand 2801 states and 6899 transitions. [2022-03-15 21:47:34,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:34,413 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:34,413 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:34,429 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (93)] Forceful destruction successful, exit code 0 [2022-03-15 21:47:34,613 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable95,93 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:34,613 INFO L402 AbstractCegarLoop]: === Iteration 97 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:34,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:34,614 INFO L85 PathProgramCache]: Analyzing trace with hash -820440268, now seen corresponding path program 90 times [2022-03-15 21:47:34,614 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:34,614 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641427821] [2022-03-15 21:47:34,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:34,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:34,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:34,953 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:34,953 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:34,954 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641427821] [2022-03-15 21:47:34,954 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1641427821] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:34,954 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1587757634] [2022-03-15 21:47:34,954 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:47:34,954 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:34,954 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:34,955 INFO L229 MonitoredProcess]: Starting monitored process 94 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:34,955 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (94)] Waiting until timeout for monitored process [2022-03-15 21:47:34,983 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:47:34,983 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:47:34,984 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:47:34,985 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:36,241 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,242 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,243 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,244 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,245 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,246 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,246 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,247 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,247 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:36,248 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,248 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,249 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,250 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,251 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,251 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,252 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,253 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,253 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,254 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,255 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,256 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,256 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:36,257 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:36,257 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 21 disjoint index pairs (out of 36 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:47:36,269 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:36,269 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:38,151 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,152 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,153 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,153 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,154 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,156 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,157 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,159 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,163 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,164 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,168 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,168 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,168 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,169 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,171 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,172 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,175 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,176 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,176 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,178 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,180 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,182 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,182 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,183 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,185 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,186 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,189 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,189 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,190 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,191 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,192 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,192 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,192 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,193 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,193 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,194 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,194 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,195 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,195 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,198 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,198 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,198 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,199 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,201 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,202 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,203 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,203 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:38,461 INFO L353 Elim1Store]: treesize reduction 83, result has 77.1 percent of original size [2022-03-15 21:47:38,461 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 57 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 34 case distinctions, treesize of input 124 treesize of output 331 [2022-03-15 21:47:39,260 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:39,261 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1587757634] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:47:39,261 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:47:39,261 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 38 [2022-03-15 21:47:39,261 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2051694400] [2022-03-15 21:47:39,261 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:47:39,263 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:47:39,283 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:47:39,283 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:44,936 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [524792#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 524793#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 524791#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 524802#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 524801#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 524798#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 524797#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= back (+ front 4)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (<= 0 (+ (select queue front) sum)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ front 4) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum) 0))), 524799#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 524796#(and (or (not v_assert) (= (- 1) (select queue (+ front 4)))) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)))), 524790#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 524795#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 524800#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 524794#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back)))] [2022-03-15 21:47:44,936 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:47:44,936 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:44,936 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:47:44,936 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=372, Invalid=2280, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:47:44,937 INFO L87 Difference]: Start difference. First operand 2801 states and 6899 transitions. Second operand has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:45,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:45,772 INFO L93 Difference]: Finished difference Result 4112 states and 10148 transitions. [2022-03-15 21:47:45,772 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:47:45,772 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:45,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:45,777 INFO L225 Difference]: With dead ends: 4112 [2022-03-15 21:47:45,777 INFO L226 Difference]: Without dead ends: 4057 [2022-03-15 21:47:45,777 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 86 SyntacticMatches, 40 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2080 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=587, Invalid=3573, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:47:45,778 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 158 mSDsluCounter, 177 mSDsCounter, 0 mSdLazyCounter, 795 mSolverCounterSat, 126 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 158 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 921 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 126 IncrementalHoareTripleChecker+Valid, 795 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:45,778 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [158 Valid, 9 Invalid, 921 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [126 Valid, 795 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:47:45,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4057 states. [2022-03-15 21:47:45,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4057 to 3065. [2022-03-15 21:47:45,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3065 states, 3064 states have (on average 2.4657310704960835) internal successors, (7555), 3064 states have internal predecessors, (7555), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:45,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3065 states to 3065 states and 7555 transitions. [2022-03-15 21:47:45,815 INFO L78 Accepts]: Start accepts. Automaton has 3065 states and 7555 transitions. Word has length 39 [2022-03-15 21:47:45,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:45,815 INFO L470 AbstractCegarLoop]: Abstraction has 3065 states and 7555 transitions. [2022-03-15 21:47:45,815 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:45,815 INFO L276 IsEmpty]: Start isEmpty. Operand 3065 states and 7555 transitions. [2022-03-15 21:47:45,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:45,817 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:45,817 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:45,833 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (94)] Ended with exit code 0 [2022-03-15 21:47:46,018 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable96,94 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:46,018 INFO L402 AbstractCegarLoop]: === Iteration 98 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:46,018 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:46,018 INFO L85 PathProgramCache]: Analyzing trace with hash -1672960464, now seen corresponding path program 91 times [2022-03-15 21:47:46,019 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:46,019 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501660825] [2022-03-15 21:47:46,019 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:46,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:46,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:46,341 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:46,341 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:46,341 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501660825] [2022-03-15 21:47:46,341 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [501660825] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:46,341 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [392722446] [2022-03-15 21:47:46,341 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:47:46,341 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:46,341 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:46,344 INFO L229 MonitoredProcess]: Starting monitored process 95 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:46,345 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (95)] Waiting until timeout for monitored process [2022-03-15 21:47:46,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:46,378 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:47:46,379 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:47,163 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,164 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,164 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,165 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,165 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,166 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,166 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,167 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,168 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,168 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,169 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,170 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,170 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:47,170 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,171 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,172 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,172 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,173 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,173 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,174 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,174 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,175 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,175 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,176 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,177 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,177 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:47,178 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:47,178 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 21 disjoint index pairs (out of 36 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:47:47,189 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:47,190 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:48,480 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:47:48,480 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:47:49,831 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 13 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:49,831 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [392722446] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:47:49,831 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:47:49,831 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 38 [2022-03-15 21:47:49,831 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1163957475] [2022-03-15 21:47:49,832 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:47:49,833 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:47:49,853 INFO L252 McrAutomatonBuilder]: Finished intersection with 119 states and 221 transitions. [2022-03-15 21:47:49,853 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:47:55,349 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [535342#(and (or (not v_assert) (<= 0 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))) 1) (not v_assert)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))))) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 0))), 535346#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 535349#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 535344#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 535341#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 535339#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 535348#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 535343#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 0 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= back (+ front 4)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (<= 0 (+ (select queue front) sum)) (not (= (+ (select queue back) 1) 0))) (or (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1)) (select queue (+ 3 front))) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ front 4) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 0))), 535347#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 535338#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 535345#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 535340#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))))] [2022-03-15 21:47:55,349 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:47:55,349 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:47:55,349 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:47:55,349 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=306, Invalid=2244, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:47:55,349 INFO L87 Difference]: Start difference. First operand 3065 states and 7555 transitions. Second operand has 28 states, 28 states have (on average 3.857142857142857) internal successors, (108), 27 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:56,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:47:56,317 INFO L93 Difference]: Finished difference Result 5049 states and 12518 transitions. [2022-03-15 21:47:56,317 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2022-03-15 21:47:56,317 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.857142857142857) internal successors, (108), 27 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:47:56,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:47:56,323 INFO L225 Difference]: With dead ends: 5049 [2022-03-15 21:47:56,323 INFO L226 Difference]: Without dead ends: 5033 [2022-03-15 21:47:56,323 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 89 SyntacticMatches, 34 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1729 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=497, Invalid=3663, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:47:56,324 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 126 mSDsluCounter, 262 mSDsCounter, 0 mSdLazyCounter, 1141 mSolverCounterSat, 54 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 1195 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 54 IncrementalHoareTripleChecker+Valid, 1141 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:47:56,324 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [126 Valid, 10 Invalid, 1195 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [54 Valid, 1141 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:47:56,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5033 states. [2022-03-15 21:47:56,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5033 to 2905. [2022-03-15 21:47:56,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2905 states, 2904 states have (on average 2.465220385674931) internal successors, (7159), 2904 states have internal predecessors, (7159), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:56,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2905 states to 2905 states and 7159 transitions. [2022-03-15 21:47:56,360 INFO L78 Accepts]: Start accepts. Automaton has 2905 states and 7159 transitions. Word has length 39 [2022-03-15 21:47:56,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:47:56,360 INFO L470 AbstractCegarLoop]: Abstraction has 2905 states and 7159 transitions. [2022-03-15 21:47:56,360 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.857142857142857) internal successors, (108), 27 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:47:56,361 INFO L276 IsEmpty]: Start isEmpty. Operand 2905 states and 7159 transitions. [2022-03-15 21:47:56,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:47:56,363 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:47:56,363 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:47:56,379 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (95)] Forceful destruction successful, exit code 0 [2022-03-15 21:47:56,563 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 95 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable97 [2022-03-15 21:47:56,563 INFO L402 AbstractCegarLoop]: === Iteration 99 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:47:56,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:47:56,564 INFO L85 PathProgramCache]: Analyzing trace with hash 135027744, now seen corresponding path program 92 times [2022-03-15 21:47:56,564 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:47:56,564 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [779851643] [2022-03-15 21:47:56,564 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:47:56,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:47:56,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:47:56,955 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:56,956 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:47:56,956 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [779851643] [2022-03-15 21:47:56,956 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [779851643] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:47:56,956 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [738662055] [2022-03-15 21:47:56,956 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:47:56,956 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:47:56,956 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:47:56,957 INFO L229 MonitoredProcess]: Starting monitored process 96 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:47:56,957 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (96)] Waiting until timeout for monitored process [2022-03-15 21:47:56,982 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:47:56,983 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:47:56,983 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:47:56,984 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:47:57,803 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,804 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,804 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,805 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,805 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,806 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,806 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,807 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,808 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,808 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,808 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:57,809 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,810 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,810 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,811 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,811 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,812 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,812 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,813 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,813 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,814 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:47:57,814 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,815 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,815 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,816 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,816 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,817 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:47:57,817 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 21 disjoint index pairs (out of 36 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:47:57,829 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:47:57,829 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:47:59,123 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:47:59,123 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:48:00,176 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:00,176 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [738662055] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:00,176 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:00,176 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 40 [2022-03-15 21:48:00,176 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2122232197] [2022-03-15 21:48:00,176 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:00,178 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:00,197 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:48:00,197 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:04,000 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [546513#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 546512#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 546507#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (= (select queue (+ 5 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 546509#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 546511#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 546506#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 546508#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= back (+ front 4)) (not (= (+ (select queue back) 1) 0))) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ front 4) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue (+ 2 front)) 1) 0))), 546514#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 546515#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 546510#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:48:04,000 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:48:04,000 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:04,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:48:04,001 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=302, Invalid=2248, Unknown=0, NotChecked=0, Total=2550 [2022-03-15 21:48:04,001 INFO L87 Difference]: Start difference. First operand 2905 states and 7159 transitions. Second operand has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:04,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:04,989 INFO L93 Difference]: Finished difference Result 5397 states and 13449 transitions. [2022-03-15 21:48:04,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:48:04,989 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:04,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:04,996 INFO L225 Difference]: With dead ends: 5397 [2022-03-15 21:48:04,996 INFO L226 Difference]: Without dead ends: 5369 [2022-03-15 21:48:04,996 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 75 SyntacticMatches, 32 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1728 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=518, Invalid=3904, Unknown=0, NotChecked=0, Total=4422 [2022-03-15 21:48:04,996 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 138 mSDsluCounter, 209 mSDsCounter, 0 mSdLazyCounter, 1075 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 138 SdHoareTripleChecker+Valid, 7 SdHoareTripleChecker+Invalid, 1124 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 1075 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:04,996 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [138 Valid, 7 Invalid, 1124 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 1075 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:48:05,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5369 states. [2022-03-15 21:48:05,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5369 to 2937. [2022-03-15 21:48:05,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2937 states, 2936 states have (on average 2.4655994550408717) internal successors, (7239), 2936 states have internal predecessors, (7239), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:05,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2937 states to 2937 states and 7239 transitions. [2022-03-15 21:48:05,034 INFO L78 Accepts]: Start accepts. Automaton has 2937 states and 7239 transitions. Word has length 39 [2022-03-15 21:48:05,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:05,034 INFO L470 AbstractCegarLoop]: Abstraction has 2937 states and 7239 transitions. [2022-03-15 21:48:05,034 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:05,034 INFO L276 IsEmpty]: Start isEmpty. Operand 2937 states and 7239 transitions. [2022-03-15 21:48:05,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:05,036 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:05,036 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:05,052 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (96)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:05,237 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 96 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable98 [2022-03-15 21:48:05,237 INFO L402 AbstractCegarLoop]: === Iteration 100 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:05,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:05,237 INFO L85 PathProgramCache]: Analyzing trace with hash 303445300, now seen corresponding path program 93 times [2022-03-15 21:48:05,238 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:05,238 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877986697] [2022-03-15 21:48:05,238 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:05,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:05,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:05,568 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:05,568 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:05,568 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877986697] [2022-03-15 21:48:05,568 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1877986697] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:05,568 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1792200188] [2022-03-15 21:48:05,568 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:48:05,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:05,569 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:05,570 INFO L229 MonitoredProcess]: Starting monitored process 97 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:05,570 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (97)] Waiting until timeout for monitored process [2022-03-15 21:48:05,598 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:48:05,599 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:48:05,599 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:05,600 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:06,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,376 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,377 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,378 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,379 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,380 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,381 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,382 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,383 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,384 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,385 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:06,385 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,386 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,387 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,388 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,388 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:06,389 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,390 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,391 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:06,391 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 21 disjoint index pairs (out of 36 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:48:06,403 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 2 proven. 84 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:06,403 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:48:07,734 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:48:07,735 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:48:09,386 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:09,386 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1792200188] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:09,386 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:09,386 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 38 [2022-03-15 21:48:09,386 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [459736774] [2022-03-15 21:48:09,386 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:09,388 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:09,409 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:48:09,409 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:14,588 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [558092#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 558098#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 558091#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue front) 1))), 558088#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 558096#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 558097#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 558094#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 558087#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 558090#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum) 0))), 558093#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 558089#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 558086#(and (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0)) (or (not v_assert) (<= 0 sum) (not (= (select queue front) 1))) (or (not v_assert) (< front (+ back 1)))), 558095#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ (select queue front) sum) 1)))] [2022-03-15 21:48:14,589 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:48:14,589 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:14,589 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:48:14,589 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=310, Invalid=2342, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:48:14,589 INFO L87 Difference]: Start difference. First operand 2937 states and 7239 transitions. Second operand has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:15,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:15,380 INFO L93 Difference]: Finished difference Result 4296 states and 10596 transitions. [2022-03-15 21:48:15,380 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:48:15,381 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:15,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:15,386 INFO L225 Difference]: With dead ends: 4296 [2022-03-15 21:48:15,386 INFO L226 Difference]: Without dead ends: 4241 [2022-03-15 21:48:15,386 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 92 SyntacticMatches, 34 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1862 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=494, Invalid=3666, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:48:15,386 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 133 mSDsluCounter, 190 mSDsCounter, 0 mSdLazyCounter, 892 mSolverCounterSat, 98 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 133 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 990 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 98 IncrementalHoareTripleChecker+Valid, 892 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:15,386 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [133 Valid, 9 Invalid, 990 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [98 Valid, 892 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:48:15,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4241 states. [2022-03-15 21:48:15,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4241 to 3297. [2022-03-15 21:48:15,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3297 states, 3296 states have (on average 2.467233009708738) internal successors, (8132), 3296 states have internal predecessors, (8132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:15,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3297 states to 3297 states and 8132 transitions. [2022-03-15 21:48:15,419 INFO L78 Accepts]: Start accepts. Automaton has 3297 states and 8132 transitions. Word has length 39 [2022-03-15 21:48:15,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:15,419 INFO L470 AbstractCegarLoop]: Abstraction has 3297 states and 8132 transitions. [2022-03-15 21:48:15,419 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:15,419 INFO L276 IsEmpty]: Start isEmpty. Operand 3297 states and 8132 transitions. [2022-03-15 21:48:15,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:15,422 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:15,422 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:15,437 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (97)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:15,622 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 97 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable99 [2022-03-15 21:48:15,622 INFO L402 AbstractCegarLoop]: === Iteration 101 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:15,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:15,622 INFO L85 PathProgramCache]: Analyzing trace with hash 351557428, now seen corresponding path program 94 times [2022-03-15 21:48:15,623 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:15,623 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1791293621] [2022-03-15 21:48:15,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:15,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:15,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:15,933 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:15,933 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:15,933 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1791293621] [2022-03-15 21:48:15,933 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1791293621] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:15,934 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1099865052] [2022-03-15 21:48:15,934 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:48:15,934 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:15,934 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:15,935 INFO L229 MonitoredProcess]: Starting monitored process 98 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:15,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (98)] Waiting until timeout for monitored process [2022-03-15 21:48:15,960 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:48:15,960 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:48:15,961 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:15,961 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:16,734 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,735 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,736 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,736 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,737 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,737 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,741 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,741 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,742 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,743 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,743 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,747 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:16,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,750 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,750 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:16,751 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:16,752 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 21 disjoint index pairs (out of 36 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:48:16,763 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 9 proven. 77 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:16,763 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:48:18,073 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:48:18,073 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:48:19,471 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 13 proven. 73 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:19,471 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1099865052] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:19,471 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:19,471 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 38 [2022-03-15 21:48:19,471 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1026834990] [2022-03-15 21:48:19,472 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:19,473 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:19,494 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:48:19,494 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:24,494 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [569286#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 569282#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (<= (+ 5 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 569293#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 569292#(and (or (not v_assert) (<= 0 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ 3 front))) 0)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 0)) (or (not v_assert) (<= (+ front 4) back))), 569284#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 569285#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 569283#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 569291#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0))), 569288#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (<= back front)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (<= front back))), 569294#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 569287#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 569289#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 569290#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))))] [2022-03-15 21:48:24,494 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:48:24,494 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:24,495 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:48:24,495 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=2325, Unknown=0, NotChecked=0, Total=2652 [2022-03-15 21:48:24,495 INFO L87 Difference]: Start difference. First operand 3297 states and 8132 transitions. Second operand has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:25,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:25,275 INFO L93 Difference]: Finished difference Result 4734 states and 11674 transitions. [2022-03-15 21:48:25,275 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:48:25,276 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:25,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:25,281 INFO L225 Difference]: With dead ends: 4734 [2022-03-15 21:48:25,281 INFO L226 Difference]: Without dead ends: 4681 [2022-03-15 21:48:25,282 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 84 SyntacticMatches, 42 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2308 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=522, Invalid=3638, Unknown=0, NotChecked=0, Total=4160 [2022-03-15 21:48:25,282 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 160 mSDsluCounter, 193 mSDsCounter, 0 mSdLazyCounter, 865 mSolverCounterSat, 111 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 160 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 976 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 111 IncrementalHoareTripleChecker+Valid, 865 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:25,282 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [160 Valid, 10 Invalid, 976 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [111 Valid, 865 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:48:25,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4681 states. [2022-03-15 21:48:25,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4681 to 3873. [2022-03-15 21:48:25,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3873 states, 3872 states have (on average 2.4628099173553717) internal successors, (9536), 3872 states have internal predecessors, (9536), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:25,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3873 states to 3873 states and 9536 transitions. [2022-03-15 21:48:25,336 INFO L78 Accepts]: Start accepts. Automaton has 3873 states and 9536 transitions. Word has length 39 [2022-03-15 21:48:25,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:25,336 INFO L470 AbstractCegarLoop]: Abstraction has 3873 states and 9536 transitions. [2022-03-15 21:48:25,336 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.8620689655172415) internal successors, (112), 28 states have internal predecessors, (112), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:25,336 INFO L276 IsEmpty]: Start isEmpty. Operand 3873 states and 9536 transitions. [2022-03-15 21:48:25,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:25,339 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:25,339 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:25,355 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (98)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:25,540 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable100,98 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:25,540 INFO L402 AbstractCegarLoop]: === Iteration 102 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:25,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:25,541 INFO L85 PathProgramCache]: Analyzing trace with hash -1924757324, now seen corresponding path program 95 times [2022-03-15 21:48:25,542 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:25,542 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1119971216] [2022-03-15 21:48:25,542 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:25,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:25,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:25,872 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 78 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:48:25,872 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:25,872 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1119971216] [2022-03-15 21:48:25,872 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1119971216] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:25,872 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [953364457] [2022-03-15 21:48:25,872 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:48:25,872 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:25,872 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:25,873 INFO L229 MonitoredProcess]: Starting monitored process 99 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:25,874 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (99)] Waiting until timeout for monitored process [2022-03-15 21:48:25,902 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:48:25,902 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:48:25,903 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:25,904 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:26,737 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,738 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,739 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,740 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,741 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,741 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,742 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,742 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,743 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,744 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,745 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,746 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,747 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,748 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,749 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,749 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,750 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,750 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,751 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,751 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,752 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,753 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,754 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,755 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,756 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,756 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,757 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,758 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,758 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,759 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,760 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,760 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,761 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,761 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,762 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,763 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:26,763 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,763 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:26,764 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 21 disjoint index pairs (out of 91 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 32 [2022-03-15 21:48:26,784 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 12 proven. 74 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:26,784 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:48:27,806 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,807 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,808 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,808 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,808 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,809 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,809 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,809 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,810 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,811 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,811 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,813 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,813 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,814 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,814 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,814 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,816 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,816 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,816 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,817 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,817 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,819 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,820 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,820 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,821 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,821 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,823 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,824 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,824 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,824 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,825 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,825 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,826 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,827 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,828 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,829 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,830 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,830 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,830 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,831 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,831 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,831 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,832 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,832 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,832 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,834 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,835 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,835 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,836 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,836 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,836 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,837 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,837 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,837 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,840 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,840 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,841 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,842 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,842 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,842 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:27,962 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:48:27,963 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:48:28,476 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:28,476 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [953364457] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:28,476 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:28,476 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 44 [2022-03-15 21:48:28,476 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [598355013] [2022-03-15 21:48:28,476 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:28,478 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:28,498 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:48:28,498 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:33,814 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [582083#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 582079#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 582081#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 582084#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 582082#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (<= 0 (+ (select queue front) sum)) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ (select queue front) sum) 0))), 582075#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 582074#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 582078#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 582076#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 582077#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 582085#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 582086#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 582080#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:48:33,815 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:48:33,815 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:33,815 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:48:33,815 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=444, Invalid=2862, Unknown=0, NotChecked=0, Total=3306 [2022-03-15 21:48:33,815 INFO L87 Difference]: Start difference. First operand 3873 states and 9536 transitions. Second operand has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:34,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:34,706 INFO L93 Difference]: Finished difference Result 5312 states and 13089 transitions. [2022-03-15 21:48:34,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:48:34,706 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:34,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:34,712 INFO L225 Difference]: With dead ends: 5312 [2022-03-15 21:48:34,712 INFO L226 Difference]: Without dead ends: 5257 [2022-03-15 21:48:34,712 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 98 SyntacticMatches, 22 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1583 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=688, Invalid=4282, Unknown=0, NotChecked=0, Total=4970 [2022-03-15 21:48:34,712 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 125 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 923 mSolverCounterSat, 92 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 125 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1015 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 92 IncrementalHoareTripleChecker+Valid, 923 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:34,712 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [125 Valid, 9 Invalid, 1015 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [92 Valid, 923 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:48:34,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5257 states. [2022-03-15 21:48:34,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5257 to 4201. [2022-03-15 21:48:34,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4201 states, 4200 states have (on average 2.4638095238095237) internal successors, (10348), 4200 states have internal predecessors, (10348), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:34,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4201 states to 4201 states and 10348 transitions. [2022-03-15 21:48:34,752 INFO L78 Accepts]: Start accepts. Automaton has 4201 states and 10348 transitions. Word has length 39 [2022-03-15 21:48:34,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:34,752 INFO L470 AbstractCegarLoop]: Abstraction has 4201 states and 10348 transitions. [2022-03-15 21:48:34,752 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:34,752 INFO L276 IsEmpty]: Start isEmpty. Operand 4201 states and 10348 transitions. [2022-03-15 21:48:34,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:34,755 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:34,755 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:34,771 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (99)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:34,957 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 99 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable101 [2022-03-15 21:48:34,957 INFO L402 AbstractCegarLoop]: === Iteration 103 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:34,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:34,958 INFO L85 PathProgramCache]: Analyzing trace with hash -1654719836, now seen corresponding path program 96 times [2022-03-15 21:48:34,958 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:34,959 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216750649] [2022-03-15 21:48:34,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:34,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:34,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:35,362 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:35,363 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:35,363 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1216750649] [2022-03-15 21:48:35,363 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1216750649] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:35,363 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [142266680] [2022-03-15 21:48:35,363 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:48:35,363 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:35,363 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:35,364 INFO L229 MonitoredProcess]: Starting monitored process 100 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:35,364 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (100)] Waiting until timeout for monitored process [2022-03-15 21:48:35,392 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:48:35,392 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:48:35,393 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:35,393 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:40,834 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,835 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,835 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,836 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,837 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,837 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,838 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,838 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,839 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,839 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,840 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,841 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,841 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,842 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,843 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,843 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,844 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,844 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,845 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,845 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,846 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:40,846 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,847 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,848 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,848 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,849 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,850 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,851 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,851 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,852 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:40,852 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,853 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,853 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,854 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,855 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,855 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:40,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,856 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:40,856 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:40,857 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 21 disjoint index pairs (out of 55 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 44 [2022-03-15 21:48:40,869 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:40,869 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:48:42,835 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,836 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,838 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,841 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,842 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,843 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,843 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,843 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,844 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,844 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,845 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,845 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,846 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,846 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,847 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,847 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,849 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,849 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,850 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,852 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,853 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,853 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,854 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,855 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,855 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,855 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,856 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,857 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,858 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,858 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,859 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,860 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,861 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,861 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,861 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,863 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,863 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,864 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,864 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,865 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,866 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,866 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,866 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,867 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,867 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,869 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,869 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,870 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,870 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,872 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,873 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:42,874 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:43,146 INFO L353 Elim1Store]: treesize reduction 83, result has 77.1 percent of original size [2022-03-15 21:48:43,146 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 57 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 34 case distinctions, treesize of input 124 treesize of output 331 [2022-03-15 21:48:43,863 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:43,863 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [142266680] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:43,863 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:43,863 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 42 [2022-03-15 21:48:43,863 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1164962401] [2022-03-15 21:48:43,863 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:43,865 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:43,883 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:48:43,884 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:47,798 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [596101#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 596106#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 596104#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 596103#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 596099#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front)))), 596108#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 596105#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 596100#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 596098#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 596107#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 596102#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:48:47,798 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:48:47,798 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:47,799 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:48:47,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=363, Invalid=2498, Unknown=1, NotChecked=0, Total=2862 [2022-03-15 21:48:47,799 INFO L87 Difference]: Start difference. First operand 4201 states and 10348 transitions. Second operand has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:48,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:48,847 INFO L93 Difference]: Finished difference Result 7597 states and 18890 transitions. [2022-03-15 21:48:48,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:48:48,847 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:48,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:48,857 INFO L225 Difference]: With dead ends: 7597 [2022-03-15 21:48:48,857 INFO L226 Difference]: Without dead ends: 7569 [2022-03-15 21:48:48,858 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 82 SyntacticMatches, 26 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1816 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=592, Invalid=4237, Unknown=1, NotChecked=0, Total=4830 [2022-03-15 21:48:48,858 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 157 mSDsluCounter, 259 mSDsCounter, 0 mSdLazyCounter, 1204 mSolverCounterSat, 59 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1263 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 59 IncrementalHoareTripleChecker+Valid, 1204 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:48,858 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [157 Valid, 9 Invalid, 1263 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [59 Valid, 1204 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:48:48,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7569 states. [2022-03-15 21:48:48,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7569 to 4233. [2022-03-15 21:48:48,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4233 states, 4232 states have (on average 2.4640831758034025) internal successors, (10428), 4232 states have internal predecessors, (10428), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:48,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4233 states to 4233 states and 10428 transitions. [2022-03-15 21:48:48,916 INFO L78 Accepts]: Start accepts. Automaton has 4233 states and 10428 transitions. Word has length 39 [2022-03-15 21:48:48,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:48,916 INFO L470 AbstractCegarLoop]: Abstraction has 4233 states and 10428 transitions. [2022-03-15 21:48:48,916 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:48,917 INFO L276 IsEmpty]: Start isEmpty. Operand 4233 states and 10428 transitions. [2022-03-15 21:48:48,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:48,920 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:48,920 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:48,936 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (100)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:49,120 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable102,100 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:49,121 INFO L402 AbstractCegarLoop]: === Iteration 104 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:49,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:49,121 INFO L85 PathProgramCache]: Analyzing trace with hash -969289312, now seen corresponding path program 97 times [2022-03-15 21:48:49,122 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:49,122 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2072274315] [2022-03-15 21:48:49,122 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:49,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:49,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:49,494 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:49,494 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:49,494 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2072274315] [2022-03-15 21:48:49,495 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2072274315] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:49,495 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [339854735] [2022-03-15 21:48:49,495 INFO L93 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2022-03-15 21:48:49,495 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:49,495 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:49,497 INFO L229 MonitoredProcess]: Starting monitored process 101 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:49,497 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (101)] Waiting until timeout for monitored process [2022-03-15 21:48:49,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:49,526 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:49,527 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:50,447 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,448 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,451 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:50,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,453 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:50,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,459 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:50,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,462 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:50,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:50,465 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 21 disjoint index pairs (out of 55 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:48:50,476 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:50,476 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:48:51,795 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:48:51,795 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:48:53,091 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 11 proven. 75 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:53,091 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [339854735] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:48:53,091 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:48:53,091 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 42 [2022-03-15 21:48:53,091 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1177925511] [2022-03-15 21:48:53,091 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:48:53,093 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:48:53,110 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:48:53,111 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:48:56,560 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 10 new interpolants: [612483#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 612484#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 612475#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 612478#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 612480#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 612481#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 612476#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (= (+ (select queue front) 1) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (= (select queue (+ front 1)) 1) (not v_assert) (not (= (+ (select queue back) 1) 0))) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= (+ 2 front) back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back (+ 2 front)))), 612477#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (= (select queue (+ 5 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 612479#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 612482#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))))] [2022-03-15 21:48:56,560 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 28 states [2022-03-15 21:48:56,560 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:48:56,560 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2022-03-15 21:48:56,560 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=328, Invalid=2428, Unknown=0, NotChecked=0, Total=2756 [2022-03-15 21:48:56,561 INFO L87 Difference]: Start difference. First operand 4233 states and 10428 transitions. Second operand has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:57,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:48:57,557 INFO L93 Difference]: Finished difference Result 5875 states and 14533 transitions. [2022-03-15 21:48:57,557 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:48:57,557 INFO L78 Accepts]: Start accepts. Automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:48:57,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:48:57,564 INFO L225 Difference]: With dead ends: 5875 [2022-03-15 21:48:57,564 INFO L226 Difference]: Without dead ends: 5865 [2022-03-15 21:48:57,565 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 83 SyntacticMatches, 22 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1613 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=540, Invalid=4152, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:48:57,565 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 130 mSDsluCounter, 248 mSDsCounter, 0 mSdLazyCounter, 1178 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 9 SdHoareTripleChecker+Invalid, 1224 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 1178 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2022-03-15 21:48:57,565 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [130 Valid, 9 Invalid, 1224 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 1178 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2022-03-15 21:48:57,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5865 states. [2022-03-15 21:48:57,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5865 to 4233. [2022-03-15 21:48:57,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4233 states, 4232 states have (on average 2.4640831758034025) internal successors, (10428), 4232 states have internal predecessors, (10428), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:57,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4233 states to 4233 states and 10428 transitions. [2022-03-15 21:48:57,608 INFO L78 Accepts]: Start accepts. Automaton has 4233 states and 10428 transitions. Word has length 39 [2022-03-15 21:48:57,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:48:57,608 INFO L470 AbstractCegarLoop]: Abstraction has 4233 states and 10428 transitions. [2022-03-15 21:48:57,608 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 28 states, 28 states have (on average 3.4285714285714284) internal successors, (96), 27 states have internal predecessors, (96), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:48:57,608 INFO L276 IsEmpty]: Start isEmpty. Operand 4233 states and 10428 transitions. [2022-03-15 21:48:57,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:48:57,612 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:48:57,612 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:48:57,628 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (101)] Forceful destruction successful, exit code 0 [2022-03-15 21:48:57,812 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 101 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable103 [2022-03-15 21:48:57,812 INFO L402 AbstractCegarLoop]: === Iteration 105 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:48:57,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:48:57,812 INFO L85 PathProgramCache]: Analyzing trace with hash 626543524, now seen corresponding path program 98 times [2022-03-15 21:48:57,813 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:48:57,813 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [124736881] [2022-03-15 21:48:57,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:48:57,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:48:57,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:48:58,144 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:58,145 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:48:58,145 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [124736881] [2022-03-15 21:48:58,145 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [124736881] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:48:58,145 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [625689671] [2022-03-15 21:48:58,145 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2022-03-15 21:48:58,145 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:48:58,145 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:48:58,146 INFO L229 MonitoredProcess]: Starting monitored process 102 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:48:58,147 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (102)] Waiting until timeout for monitored process [2022-03-15 21:48:58,172 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2022-03-15 21:48:58,172 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:48:58,172 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:48:58,173 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:48:59,083 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,084 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,085 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,086 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,087 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,088 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,089 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,089 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,090 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,090 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,091 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,092 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,092 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,093 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,094 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,095 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,095 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,096 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,096 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,097 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,097 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,098 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,099 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,099 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,100 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,100 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,101 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,101 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,102 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,102 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,103 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,103 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,104 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,104 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,105 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,106 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:48:59,106 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:48:59,106 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 13 select indices, 13 select index equivalence classes, 21 disjoint index pairs (out of 78 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:48:59,118 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:48:59,118 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:49:00,466 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:49:00,466 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:49:01,704 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:01,704 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [625689671] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:49:01,704 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:49:01,704 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 44 [2022-03-15 21:49:01,705 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1644292136] [2022-03-15 21:49:01,705 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:49:01,706 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:49:01,724 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:49:01,725 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:49:05,186 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [627138#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 627132#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 627136#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 627133#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 627131#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 627134#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 627135#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 627140#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 627141#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 627139#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 627137#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:49:05,187 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:49:05,187 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:49:05,187 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:49:05,187 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=333, Invalid=2747, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:49:05,187 INFO L87 Difference]: Start difference. First operand 4233 states and 10428 transitions. Second operand has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:06,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:49:06,080 INFO L93 Difference]: Finished difference Result 9341 states and 23234 transitions. [2022-03-15 21:49:06,081 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:49:06,081 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:49:06,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:49:06,093 INFO L225 Difference]: With dead ends: 9341 [2022-03-15 21:49:06,093 INFO L226 Difference]: Without dead ends: 9313 [2022-03-15 21:49:06,093 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 81 SyntacticMatches, 25 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1965 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=533, Invalid=4579, Unknown=0, NotChecked=0, Total=5112 [2022-03-15 21:49:06,093 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 216 mSDsluCounter, 222 mSDsCounter, 0 mSdLazyCounter, 973 mSolverCounterSat, 77 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 216 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 1050 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 77 IncrementalHoareTripleChecker+Valid, 973 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:49:06,094 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [216 Valid, 10 Invalid, 1050 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [77 Valid, 973 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:49:06,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9313 states. [2022-03-15 21:49:06,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9313 to 3977. [2022-03-15 21:49:06,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3977 states, 3976 states have (on average 2.471830985915493) internal successors, (9828), 3976 states have internal predecessors, (9828), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:06,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3977 states to 3977 states and 9828 transitions. [2022-03-15 21:49:06,160 INFO L78 Accepts]: Start accepts. Automaton has 3977 states and 9828 transitions. Word has length 39 [2022-03-15 21:49:06,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:49:06,160 INFO L470 AbstractCegarLoop]: Abstraction has 3977 states and 9828 transitions. [2022-03-15 21:49:06,160 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:06,161 INFO L276 IsEmpty]: Start isEmpty. Operand 3977 states and 9828 transitions. [2022-03-15 21:49:06,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:49:06,164 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:49:06,164 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:49:06,180 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (102)] Forceful destruction successful, exit code 0 [2022-03-15 21:49:06,364 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable104,102 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:06,365 INFO L402 AbstractCegarLoop]: === Iteration 106 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:49:06,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:49:06,365 INFO L85 PathProgramCache]: Analyzing trace with hash -457359820, now seen corresponding path program 99 times [2022-03-15 21:49:06,366 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:49:06,366 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495366806] [2022-03-15 21:49:06,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:49:06,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:49:06,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:49:06,710 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 78 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2022-03-15 21:49:06,710 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:49:06,710 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495366806] [2022-03-15 21:49:06,710 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495366806] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:49:06,711 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1022495531] [2022-03-15 21:49:06,711 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2022-03-15 21:49:06,711 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:06,711 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:49:06,712 INFO L229 MonitoredProcess]: Starting monitored process 103 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:49:06,712 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (103)] Waiting until timeout for monitored process [2022-03-15 21:49:06,739 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2022-03-15 21:49:06,739 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:49:06,740 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:49:06,741 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:49:07,639 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,640 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,640 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,641 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,641 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,642 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,643 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,643 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,644 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,645 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,646 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,646 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,647 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,647 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,648 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,648 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,649 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,649 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,650 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,650 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,651 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,652 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,653 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,654 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,654 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,655 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,656 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,656 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,657 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,658 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,659 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,660 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,660 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,661 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,662 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,663 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:07,663 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,664 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:07,664 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 13 select indices, 13 select index equivalence classes, 21 disjoint index pairs (out of 78 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:49:07,676 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 3 proven. 83 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:07,676 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:49:09,007 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:49:09,007 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:49:10,373 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 8 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:10,373 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1022495531] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:49:10,374 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:49:10,374 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17, 17] total 42 [2022-03-15 21:49:10,374 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [560921239] [2022-03-15 21:49:10,374 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:49:10,376 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:49:10,396 INFO L252 McrAutomatonBuilder]: Finished intersection with 123 states and 231 transitions. [2022-03-15 21:49:10,397 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:49:15,193 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 13 new interpolants: [644748#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 644742#(and (or (not v_assert) (not (= (+ (- 1) (select queue front)) 0)) (<= 0 sum)) (or (= (+ (- 1) (select queue front)) 0) (not v_assert) (= back front)) (or (not v_assert) (not (= (select queue front) 1)) (<= sum 0))), 644743#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 644746#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (<= (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))) 1)) (or (not v_assert) (<= 1 (+ (select queue front) (select queue (+ 2 front)) sum (select queue (+ front 1))))) (or (not v_assert) (<= (+ front 4) back))), 644749#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 644744#(and (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 1 (+ (select queue front) sum))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ (select queue front) sum) 1)) (or (not v_assert) (<= (+ 2 front) back))), 644745#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 1)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))) (or (not v_assert) (<= 1 (+ (select queue front) sum (select queue (+ front 1)))))), 644750#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 644751#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 644752#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 644741#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum))), 644740#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 644747#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert)))] [2022-03-15 21:49:15,193 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:49:15,193 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:49:15,194 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:49:15,194 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=2702, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:49:15,194 INFO L87 Difference]: Start difference. First operand 3977 states and 9828 transitions. Second operand has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:16,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:49:16,038 INFO L93 Difference]: Finished difference Result 5526 states and 13682 transitions. [2022-03-15 21:49:16,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2022-03-15 21:49:16,038 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:49:16,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:49:16,045 INFO L225 Difference]: With dead ends: 5526 [2022-03-15 21:49:16,045 INFO L226 Difference]: Without dead ends: 5473 [2022-03-15 21:49:16,046 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 103 SyntacticMatches, 19 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1896 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=565, Invalid=4127, Unknown=0, NotChecked=0, Total=4692 [2022-03-15 21:49:16,046 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 151 mSDsluCounter, 231 mSDsCounter, 0 mSdLazyCounter, 1007 mSolverCounterSat, 93 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 11 SdHoareTripleChecker+Invalid, 1100 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 93 IncrementalHoareTripleChecker+Valid, 1007 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:49:16,046 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [151 Valid, 11 Invalid, 1100 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [93 Valid, 1007 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:49:16,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5473 states. [2022-03-15 21:49:16,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5473 to 4257. [2022-03-15 21:49:16,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4257 states, 4256 states have (on average 2.468984962406015) internal successors, (10508), 4256 states have internal predecessors, (10508), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:16,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4257 states to 4257 states and 10508 transitions. [2022-03-15 21:49:16,109 INFO L78 Accepts]: Start accepts. Automaton has 4257 states and 10508 transitions. Word has length 39 [2022-03-15 21:49:16,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:49:16,110 INFO L470 AbstractCegarLoop]: Abstraction has 4257 states and 10508 transitions. [2022-03-15 21:49:16,110 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.793103448275862) internal successors, (110), 28 states have internal predecessors, (110), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:16,110 INFO L276 IsEmpty]: Start isEmpty. Operand 4257 states and 10508 transitions. [2022-03-15 21:49:16,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:49:16,113 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:49:16,113 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:49:16,129 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (103)] Forceful destruction successful, exit code 0 [2022-03-15 21:49:16,314 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 103 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable105 [2022-03-15 21:49:16,314 INFO L402 AbstractCegarLoop]: === Iteration 107 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:49:16,315 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:49:16,315 INFO L85 PathProgramCache]: Analyzing trace with hash -243034836, now seen corresponding path program 100 times [2022-03-15 21:49:16,315 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:49:16,315 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691680718] [2022-03-15 21:49:16,316 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:49:16,316 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:49:16,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:49:16,663 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:16,664 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:49:16,664 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691680718] [2022-03-15 21:49:16,664 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1691680718] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:49:16,664 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1867538478] [2022-03-15 21:49:16,664 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2022-03-15 21:49:16,664 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:16,664 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:49:16,665 INFO L229 MonitoredProcess]: Starting monitored process 104 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:49:16,665 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (104)] Waiting until timeout for monitored process [2022-03-15 21:49:16,691 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2022-03-15 21:49:16,691 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:49:16,692 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:49:16,692 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:49:17,611 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,611 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,612 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,612 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,613 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,614 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,615 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,616 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,616 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,617 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,618 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,619 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,619 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,620 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,621 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,622 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,623 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,623 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,624 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,624 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,625 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,626 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,626 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,627 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,627 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,628 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,628 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,629 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,629 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,630 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,630 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,631 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,632 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,632 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,633 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,634 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,634 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:17,635 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:17,635 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 13 select indices, 13 select index equivalence classes, 21 disjoint index pairs (out of 78 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:49:17,647 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:17,647 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:49:19,003 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:49:19,003 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:49:20,415 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 15 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:20,416 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1867538478] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:49:20,416 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:49:20,416 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 17, 17] total 43 [2022-03-15 21:49:20,416 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1871097505] [2022-03-15 21:49:20,416 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:49:20,418 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:49:20,438 INFO L252 McrAutomatonBuilder]: Finished intersection with 115 states and 211 transitions. [2022-03-15 21:49:20,439 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:49:24,836 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 12 new interpolants: [659095#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 659099#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 659096#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back))), 659091#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 659094#(and (or (not v_assert) (<= (+ (select queue front) sum (select queue (+ front 1))) 0)) (or (not v_assert) (= (+ (select queue (+ front 1)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum (select queue (+ front 1))))) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (+ (- 1) (select queue (+ 2 front))) 0)) (or (not v_assert) (<= (+ front 4) back))), 659102#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 659092#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 659098#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 659097#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 659100#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 659101#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 659093#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ 2 front)))) (or (not v_assert) (<= back (+ 3 front))) (or (not v_assert) (= (+ (- 1) (select queue (+ front 1))) 0)) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= (+ (select queue front) sum) 0)) (or (not v_assert) (<= 0 (+ (select queue front) sum))))] [2022-03-15 21:49:24,836 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:49:24,836 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:49:24,836 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:49:24,837 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=352, Invalid=2728, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:49:24,837 INFO L87 Difference]: Start difference. First operand 4257 states and 10508 transitions. Second operand has 29 states, 29 states have (on average 3.6551724137931036) internal successors, (106), 28 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:25,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:49:25,757 INFO L93 Difference]: Finished difference Result 7657 states and 19024 transitions. [2022-03-15 21:49:25,758 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2022-03-15 21:49:25,758 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.6551724137931036) internal successors, (106), 28 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:49:25,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:49:25,769 INFO L225 Difference]: With dead ends: 7657 [2022-03-15 21:49:25,769 INFO L226 Difference]: Without dead ends: 7641 [2022-03-15 21:49:25,769 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 91 SyntacticMatches, 23 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1930 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=549, Invalid=4421, Unknown=0, NotChecked=0, Total=4970 [2022-03-15 21:49:25,769 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 177 mSDsluCounter, 246 mSDsCounter, 0 mSdLazyCounter, 1030 mSolverCounterSat, 67 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 177 SdHoareTripleChecker+Valid, 10 SdHoareTripleChecker+Invalid, 1097 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 67 IncrementalHoareTripleChecker+Valid, 1030 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2022-03-15 21:49:25,769 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [177 Valid, 10 Invalid, 1097 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [67 Valid, 1030 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2022-03-15 21:49:25,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7641 states. [2022-03-15 21:49:25,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7641 to 4169. [2022-03-15 21:49:25,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4169 states, 4168 states have (on average 2.468330134357006) internal successors, (10288), 4168 states have internal predecessors, (10288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:25,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4169 states to 4169 states and 10288 transitions. [2022-03-15 21:49:25,845 INFO L78 Accepts]: Start accepts. Automaton has 4169 states and 10288 transitions. Word has length 39 [2022-03-15 21:49:25,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:49:25,846 INFO L470 AbstractCegarLoop]: Abstraction has 4169 states and 10288 transitions. [2022-03-15 21:49:25,846 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.6551724137931036) internal successors, (106), 28 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:25,846 INFO L276 IsEmpty]: Start isEmpty. Operand 4169 states and 10288 transitions. [2022-03-15 21:49:25,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:49:25,850 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:49:25,850 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:49:25,865 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (104)] Ended with exit code 0 [2022-03-15 21:49:26,050 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable106,104 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:26,050 INFO L402 AbstractCegarLoop]: === Iteration 108 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:49:26,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:49:26,052 INFO L85 PathProgramCache]: Analyzing trace with hash -187322332, now seen corresponding path program 101 times [2022-03-15 21:49:26,052 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:49:26,052 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683219209] [2022-03-15 21:49:26,052 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:49:26,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:49:26,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:49:26,481 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:26,482 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:49:26,482 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683219209] [2022-03-15 21:49:26,482 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [683219209] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:49:26,482 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1691495068] [2022-03-15 21:49:26,482 INFO L93 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2022-03-15 21:49:26,482 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:26,482 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:49:26,483 INFO L229 MonitoredProcess]: Starting monitored process 105 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:49:26,484 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (105)] Waiting until timeout for monitored process [2022-03-15 21:49:26,519 INFO L228 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2022-03-15 21:49:26,519 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:49:26,520 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 59 conjunts are in the unsatisfiable core [2022-03-15 21:49:26,521 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:49:27,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,463 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,470 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,470 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,473 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,474 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,474 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,475 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,476 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,477 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,478 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,479 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,479 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,480 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,481 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,482 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,483 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,483 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,484 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:27,484 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:27,485 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 13 select indices, 13 select index equivalence classes, 21 disjoint index pairs (out of 78 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 42 [2022-03-15 21:49:27,496 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:27,496 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:49:28,227 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,228 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,229 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,230 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,230 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,230 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,231 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,231 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,232 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,234 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,234 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,235 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,235 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,235 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,237 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,237 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,237 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,238 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,238 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,240 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,241 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,241 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,242 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,242 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,244 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,245 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,245 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,245 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,246 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,246 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,247 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,248 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,249 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,249 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,250 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,251 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,251 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,251 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,252 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,252 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,252 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,253 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,253 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,253 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,255 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,256 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,256 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,257 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,257 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,258 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,258 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,258 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,259 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,261 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,262 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,262 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,263 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,263 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,263 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:28,387 INFO L353 Elim1Store]: treesize reduction 0, result has 100.0 percent of original size [2022-03-15 21:49:28,387 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 63 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 28 case distinctions, treesize of input 130 treesize of output 372 [2022-03-15 21:49:29,156 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 15 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:29,156 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1691495068] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:49:29,156 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:49:29,156 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 44 [2022-03-15 21:49:29,156 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [623353534] [2022-03-15 21:49:29,156 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:49:29,158 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:49:29,176 INFO L252 McrAutomatonBuilder]: Finished intersection with 107 states and 191 transitions. [2022-03-15 21:49:29,176 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider [2022-03-15 21:49:32,764 INFO L301 McrAutomatonBuilder]: Construction finished. MCR generated 11 new interpolants: [675409#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (= (+ back (* (- 1) front)) 0)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1))), 675402#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (= (- 1) (select queue (+ 3 front)))) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= (select queue (+ front 4)) 1)) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (- 1) (select queue (+ front 1))))), 675410#(and (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (= back front))), 675408#(and (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= 1 sum)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= front back)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= sum 1)) (or (not v_assert) (not (= (+ (select queue back) 1) 0)) (<= back front))), 675405#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 3 front))) (or (<= (+ 3 front) back) (not v_assert)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 675401#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (= (select queue (+ 2 front)) 1)) (or (not v_assert) (= (+ (select queue (+ 3 front)) 1) 0)) (or (not v_assert) (= (- 1) (select queue (+ front 1)))) (or (not v_assert) (<= (+ front 4) back))), 675411#(and (or (= (+ (- 1) (select queue front)) 0) (not v_assert)) (or (not v_assert) (<= sum 0)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= 0 sum)) (or (not v_assert) (<= back (+ front 1)))), 675406#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= back (+ 2 front))) (or (not v_assert) (<= (+ 2 front) back)) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 675403#(and (or (not v_assert) (= (+ (select queue (+ front 4)) 1) 0)) (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (<= back (+ 5 front))) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= 1 sum)) (or (not v_assert) (<= (+ 5 front) back)) (or (= (select queue (+ front 1)) 1) (not v_assert))), 675407#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (<= (+ front 1) back)) (or (not v_assert) (<= back (+ front 1))) (or (not v_assert) (<= 1 sum))), 675404#(and (or (not v_assert) (= (+ (select queue front) 1) 0)) (or (not v_assert) (<= sum 1)) (or (not v_assert) (= (+ (select queue (+ 2 front)) 1) 0)) (or (not v_assert) (= (select queue (+ 3 front)) 1)) (or (not v_assert) (<= back (+ front 4))) (or (not v_assert) (<= 1 sum)) (or (= (select queue (+ front 1)) 1) (not v_assert)) (or (not v_assert) (<= (+ front 4) back)))] [2022-03-15 21:49:32,764 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 29 states [2022-03-15 21:49:32,764 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-15 21:49:32,764 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2022-03-15 21:49:32,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=348, Invalid=2732, Unknown=0, NotChecked=0, Total=3080 [2022-03-15 21:49:32,765 INFO L87 Difference]: Start difference. First operand 4169 states and 10288 transitions. Second operand has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:33,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-03-15 21:49:33,853 INFO L93 Difference]: Finished difference Result 5985 states and 14860 transitions. [2022-03-15 21:49:33,853 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2022-03-15 21:49:33,854 INFO L78 Accepts]: Start accepts. Automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 39 [2022-03-15 21:49:33,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-03-15 21:49:33,861 INFO L225 Difference]: With dead ends: 5985 [2022-03-15 21:49:33,861 INFO L226 Difference]: Without dead ends: 5969 [2022-03-15 21:49:33,862 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 89 SyntacticMatches, 17 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1750 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=558, Invalid=4554, Unknown=0, NotChecked=0, Total=5112 [2022-03-15 21:49:33,862 INFO L933 BasicCegarLoop]: 1 mSDtfsCounter, 146 mSDsluCounter, 304 mSDsCounter, 0 mSdLazyCounter, 1378 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 12 SdHoareTripleChecker+Invalid, 1428 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 1378 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2022-03-15 21:49:33,862 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [146 Valid, 12 Invalid, 1428 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 1378 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2022-03-15 21:49:33,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5969 states. [2022-03-15 21:49:33,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5969 to 4169. [2022-03-15 21:49:33,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4169 states, 4168 states have (on average 2.468330134357006) internal successors, (10288), 4168 states have internal predecessors, (10288), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:33,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4169 states to 4169 states and 10288 transitions. [2022-03-15 21:49:33,918 INFO L78 Accepts]: Start accepts. Automaton has 4169 states and 10288 transitions. Word has length 39 [2022-03-15 21:49:33,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-03-15 21:49:33,918 INFO L470 AbstractCegarLoop]: Abstraction has 4169 states and 10288 transitions. [2022-03-15 21:49:33,918 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 29 states, 29 states have (on average 3.4482758620689653) internal successors, (100), 28 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-15 21:49:33,918 INFO L276 IsEmpty]: Start isEmpty. Operand 4169 states and 10288 transitions. [2022-03-15 21:49:33,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2022-03-15 21:49:33,922 INFO L506 BasicCegarLoop]: Found error trace [2022-03-15 21:49:33,922 INFO L514 BasicCegarLoop]: trace histogram [7, 7, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-03-15 21:49:33,937 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (105)] Ended with exit code 0 [2022-03-15 21:49:34,122 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable107,105 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:34,123 INFO L402 AbstractCegarLoop]: === Iteration 109 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION] === [2022-03-15 21:49:34,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-15 21:49:34,123 INFO L85 PathProgramCache]: Analyzing trace with hash 498108192, now seen corresponding path program 102 times [2022-03-15 21:49:34,123 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-15 21:49:34,123 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387018041] [2022-03-15 21:49:34,124 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-15 21:49:34,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-15 21:49:34,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-15 21:49:34,478 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 7 proven. 79 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:34,479 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-15 21:49:34,479 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387018041] [2022-03-15 21:49:34,479 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [387018041] provided 0 perfect and 1 imperfect interpolant sequences [2022-03-15 21:49:34,479 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [768129819] [2022-03-15 21:49:34,479 INFO L93 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2022-03-15 21:49:34,479 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2022-03-15 21:49:34,479 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-15 21:49:34,480 INFO L229 MonitoredProcess]: Starting monitored process 106 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2022-03-15 21:49:34,480 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (106)] Waiting until timeout for monitored process [2022-03-15 21:49:34,507 INFO L228 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2022-03-15 21:49:34,507 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2022-03-15 21:49:34,508 INFO L263 TraceCheckSpWp]: Trace formula consists of 127 conjuncts, 58 conjunts are in the unsatisfiable core [2022-03-15 21:49:34,509 INFO L286 TraceCheckSpWp]: Computing forward predicates... [2022-03-15 21:49:35,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,449 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,450 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,451 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,452 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,453 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,454 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,454 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,455 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,456 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,457 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,458 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,459 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,460 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,460 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,461 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,461 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,462 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,463 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,464 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,465 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,465 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,466 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,467 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,468 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,469 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,470 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,470 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,471 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,472 INFO L190 IndexEqualityManager]: detected not equals via solver [2022-03-15 21:49:35,472 INFO L173 IndexEqualityManager]: detected equality via solver [2022-03-15 21:49:35,473 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 13 select indices, 13 select index equivalence classes, 21 disjoint index pairs (out of 78 index pairs), introduced 7 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 44 [2022-03-15 21:49:35,484 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 0 proven. 86 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:35,484 INFO L328 TraceCheckSpWp]: Computing backward predicates... [2022-03-15 21:49:36,830 INFO L353 Elim1Store]: treesize reduction 564, result has 45.8 percent of original size [2022-03-15 21:49:36,830 INFO L387 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 14 new quantified variables, introduced 91 case distinctions, treesize of input 130 treesize of output 528 [2022-03-15 21:49:38,448 INFO L134 CoverageAnalysis]: Checked inductivity of 86 backedges. 10 proven. 76 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-15 21:49:38,448 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleZ3 [768129819] provided 0 perfect and 2 imperfect interpolant sequences [2022-03-15 21:49:38,448 INFO L191 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2022-03-15 21:49:38,448 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 44 [2022-03-15 21:49:38,448 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1189970920] [2022-03-15 21:49:38,449 INFO L194 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2022-03-15 21:49:38,450 INFO L249 McrAutomatonBuilder]: Started intersection. [2022-03-15 21:49:38,468 INFO L252 McrAutomatonBuilder]: Finished intersection with 103 states and 181 transitions. [2022-03-15 21:49:38,469 INFO L276 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton with interpolants from WpInterpolantProvider Received shutdown request... [2022-03-15 21:49:38,640 WARN L244 SmtUtils]: Removed 2 from assertion stack [2022-03-15 21:49:38,641 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0ASSERT_VIOLATIONASSERT (3 of 4 remaining) [2022-03-15 21:49:38,642 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (106)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2022-03-15 21:49:38,650 WARN L340 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Timeout while monitored process is still running, waiting 1000 ms for graceful end [2022-03-15 21:49:38,657 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (106)] Forceful destruction successful, exit code 0 [2022-03-15 21:49:38,843 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 106 /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable108 [2022-03-15 21:49:38,843 WARN L594 AbstractCegarLoop]: Verification canceled: while BasicCegarLoop was analyzing trace of length 40 with TraceHistMax 7,while SimplifyDDAWithTimeout was simplifying term of DAG size 7 for 2ms.. [2022-03-15 21:49:38,845 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr0INUSE_VIOLATION (2 of 4 remaining) [2022-03-15 21:49:38,845 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr1INUSE_VIOLATION (1 of 4 remaining) [2022-03-15 21:49:38,845 INFO L764 garLoopResultBuilder]: Registering result TIMEOUT for location ULTIMATE.startErr2INUSE_VIOLATION (0 of 4 remaining) [2022-03-15 21:49:38,846 INFO L732 BasicCegarLoop]: Path program histogram: [102, 3, 2, 1, 1] [2022-03-15 21:49:38,848 INFO L230 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-03-15 21:49:38,848 INFO L180 ceAbstractionStarter]: Computing trace abstraction results [2022-03-15 21:49:38,849 INFO L202 PluginConnector]: Adding new model send-receive.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 15.03 09:49:38 BasicIcfg [2022-03-15 21:49:38,849 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-03-15 21:49:38,849 INFO L158 Benchmark]: Toolchain (without parser) took 700879.18ms. Allocated memory was 199.2MB in the beginning and 716.2MB in the end (delta: 516.9MB). Free memory was 162.2MB in the beginning and 220.4MB in the end (delta: -58.2MB). Peak memory consumption was 460.3MB. Max. memory is 8.0GB. [2022-03-15 21:49:38,849 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.11ms. Allocated memory is still 199.2MB. Free memory is still 163.3MB. There was no memory consumed. Max. memory is 8.0GB. [2022-03-15 21:49:38,849 INFO L158 Benchmark]: Boogie Procedure Inliner took 24.59ms. Allocated memory is still 199.2MB. Free memory was 162.1MB in the beginning and 160.6MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-03-15 21:49:38,849 INFO L158 Benchmark]: Boogie Preprocessor took 18.24ms. Allocated memory is still 199.2MB. Free memory was 160.6MB in the beginning and 159.6MB in the end (delta: 966.3kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-03-15 21:49:38,849 INFO L158 Benchmark]: RCFGBuilder took 234.75ms. Allocated memory is still 199.2MB. Free memory was 159.6MB in the beginning and 150.3MB in the end (delta: 9.3MB). Peak memory consumption was 9.4MB. Max. memory is 8.0GB. [2022-03-15 21:49:38,849 INFO L158 Benchmark]: TraceAbstraction took 700595.54ms. Allocated memory was 199.2MB in the beginning and 716.2MB in the end (delta: 516.9MB). Free memory was 149.7MB in the beginning and 220.4MB in the end (delta: -70.7MB). Peak memory consumption was 447.7MB. Max. memory is 8.0GB. [2022-03-15 21:49:38,850 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.11ms. Allocated memory is still 199.2MB. Free memory is still 163.3MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 24.59ms. Allocated memory is still 199.2MB. Free memory was 162.1MB in the beginning and 160.6MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * Boogie Preprocessor took 18.24ms. Allocated memory is still 199.2MB. Free memory was 160.6MB in the beginning and 159.6MB in the end (delta: 966.3kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 234.75ms. Allocated memory is still 199.2MB. Free memory was 159.6MB in the beginning and 150.3MB in the end (delta: 9.3MB). Peak memory consumption was 9.4MB. Max. memory is 8.0GB. * TraceAbstraction took 700595.54ms. Allocated memory was 199.2MB in the beginning and 716.2MB in the end (delta: 516.9MB). Free memory was 149.7MB in the beginning and 220.4MB in the end (delta: -70.7MB). Peak memory consumption was 447.7MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks Lipton Reduction Statistics: ReductionTime: 0.4s, 37 PlacesBefore, 28 PlacesAfterwards, 30 TransitionsBefore, 21 TransitionsAfterwards, 168 CoEnabledTransitionPairs, 3 FixpointIterations, 4 TrivialSequentialCompositions, 5 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 2 ConcurrentYvCompositions, 0 ChoiceCompositions, 11 TotalNumberOfCompositions, 381 MoverChecksTotal, Independence Relation Statistics: CachedIndependenceRelation.Independence Queries: [ total: 193, positive: 157, positive conditional: 0, positive unconditional: 157, negative: 36, negative conditional: 0, negative unconditional: 36, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 87, positive: 74, positive conditional: 0, positive unconditional: 74, negative: 13, negative conditional: 0, negative unconditional: 13, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 193, positive: 83, positive conditional: 0, positive unconditional: 83, negative: 23, negative conditional: 0, negative unconditional: 23, unknown: 87, unknown conditional: 0, unknown unconditional: 87] , Statistics on independence cache: Total cache size (in pairs): 24, Positive cache size: 17, Positive conditional cache size: 0, Positive unconditional cache size: 17, Negative cache size: 7, Negative conditional cache size: 0, Negative unconditional cache size: 7 - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - TimeoutResultAtElement [Line: 69]: Timeout (TraceAbstraction) Unable to prove that assertion always holds Cancelled while BasicCegarLoop was analyzing trace of length 40 with TraceHistMax 7,while SimplifyDDAWithTimeout was simplifying term of DAG size 7 for 2ms.. - TimeoutResultAtElement [Line: 63]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Cancelled while BasicCegarLoop was analyzing trace of length 40 with TraceHistMax 7,while SimplifyDDAWithTimeout was simplifying term of DAG size 7 for 2ms.. - TimeoutResultAtElement [Line: 63]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Cancelled while BasicCegarLoop was analyzing trace of length 40 with TraceHistMax 7,while SimplifyDDAWithTimeout was simplifying term of DAG size 7 for 2ms.. - TimeoutResultAtElement [Line: 64]: Timeout (TraceAbstraction) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Cancelled while BasicCegarLoop was analyzing trace of length 40 with TraceHistMax 7,while SimplifyDDAWithTimeout was simplifying term of DAG size 7 for 2ms.. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 7 procedures, 45 locations, 4 error locations. Started 1 CEGAR loops. OverallTime: 700.5s, OverallIterations: 109, TraceHistogramMax: 7, PathProgramHistogramMax: 102, EmptinessCheckTime: 0.2s, AutomataDifference: 66.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.5s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12700 SdHoareTripleChecker+Valid, 32.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12700 mSDsluCounter, 1135 SdHoareTripleChecker+Invalid, 27.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 18420 mSDsCounter, 5687 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 76233 IncrementalHoareTripleChecker+Invalid, 81920 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 5687 mSolverCounterUnsat, 150 mSDtfsCounter, 76233 mSolverCounterSat, 0.2s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 15639 GetRequests, 7964 SyntacticMatches, 2327 SemanticMatches, 5348 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 133834 ImplicationChecksByTransitivity, 188.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=4257occurred in iteration=106, InterpolantAutomatonStates: 1578, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.6s AutomataMinimizationTime, 108 MinimizatonAttempts, 113049 StatesRemovedByMinimization, 104 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 1.7s SatisfiabilityAnalysisTime, 289.4s InterpolantComputationTime, 7038 NumberOfCodeBlocks, 7038 NumberOfCodeBlocksAsserted, 568 NumberOfCheckSat, 10200 ConstructedInterpolants, 688 QuantifiedInterpolants, 337203 SizeOfPredicates, 309 NumberOfNonLiveVariables, 11379 ConjunctsInSsa, 4758 ConjunctsInUnsatCore, 315 InterpolantComputations, 5 PerfectInterpolantSequences, 2002/18742 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Completed graceful shutdown