/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-MCRwithoutDepranks-Lazy.epf -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.2-wip.dk.mcr-reduction-c7b2d19 [2022-03-16 21:29:04,125 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-03-16 21:29:04,127 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-03-16 21:29:04,188 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-03-16 21:29:04,244 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-MCRwithoutDepranks-Lazy.epf [2022-03-16 21:29:04,280 INFO L113 SettingsManager]: Loading preferences was successful [2022-03-16 21:29:04,281 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-03-16 21:29:04,281 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-03-16 21:29:04,281 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-03-16 21:29:04,282 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-03-16 21:29:04,282 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-03-16 21:29:04,282 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-03-16 21:29:04,282 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * Use SBE=true [2022-03-16 21:29:04,283 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * sizeof long=4 [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-03-16 21:29:04,283 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * sizeof long double=12 [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * Use constant arrays=true [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-03-16 21:29:04,284 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-03-16 21:29:04,284 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-16 21:29:04,285 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * Construct finite automaton lazily=true [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-03-16 21:29:04,285 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * Partial Order Reduction in concurrent analysis=MCR_WITHOUT_DEPRANKS [2022-03-16 21:29:04,286 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-03-16 21:29:04,558 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-03-16 21:29:04,579 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-03-16 21:29:04,581 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-03-16 21:29:04,582 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2022-03-16 21:29:04,584 INFO L275 PluginConnector]: Boogie PL CUP Parser initialized [2022-03-16 21:29:04,585 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl [2022-03-16 21:29:04,585 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/concurrent/bpl/regression/showcase/PetersonWithBug.bpl' [2022-03-16 21:29:04,604 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-03-16 21:29:04,606 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-03-16 21:29:04,608 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-03-16 21:29:04,608 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-03-16 21:29:04,608 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-03-16 21:29:04,618 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,624 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,629 INFO L137 Inliner]: procedures = 3, calls = 2, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2022-03-16 21:29:04,630 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-03-16 21:29:04,632 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-03-16 21:29:04,632 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-03-16 21:29:04,632 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-03-16 21:29:04,639 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,639 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,640 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,641 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,644 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,647 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,648 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,649 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-03-16 21:29:04,650 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-03-16 21:29:04,650 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-03-16 21:29:04,650 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-03-16 21:29:04,651 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/1) ... [2022-03-16 21:29:04,663 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-03-16 21:29:04,674 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-16 21:29:04,688 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-03-16 21:29:04,704 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-03-16 21:29:04,723 INFO L124 BoogieDeclarations]: Specification and implementation of procedure Process0 given in one single declaration [2022-03-16 21:29:04,723 INFO L130 BoogieDeclarations]: Found specification of procedure Process0 [2022-03-16 21:29:04,723 INFO L138 BoogieDeclarations]: Found implementation of procedure Process0 [2022-03-16 21:29:04,723 INFO L124 BoogieDeclarations]: Specification and implementation of procedure Process1 given in one single declaration [2022-03-16 21:29:04,723 INFO L130 BoogieDeclarations]: Found specification of procedure Process1 [2022-03-16 21:29:04,723 INFO L138 BoogieDeclarations]: Found implementation of procedure Process1 [2022-03-16 21:29:04,724 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2022-03-16 21:29:04,724 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-03-16 21:29:04,724 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-03-16 21:29:04,724 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-03-16 21:29:04,764 INFO L234 CfgBuilder]: Building ICFG [2022-03-16 21:29:04,765 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-03-16 21:29:04,862 INFO L275 CfgBuilder]: Performing block encoding [2022-03-16 21:29:04,868 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-03-16 21:29:04,868 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-03-16 21:29:04,869 INFO L202 PluginConnector]: Adding new model PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.03 09:29:04 BoogieIcfgContainer [2022-03-16 21:29:04,869 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-03-16 21:29:04,871 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-03-16 21:29:04,871 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-03-16 21:29:04,892 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-03-16 21:29:04,892 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 16.03 09:29:04" (1/2) ... [2022-03-16 21:29:04,906 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66f338da and model type PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 16.03 09:29:04, skipping insertion in model container [2022-03-16 21:29:04,906 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 16.03 09:29:04" (2/2) ... [2022-03-16 21:29:04,916 INFO L111 eAbstractionObserver]: Analyzing ICFG PetersonWithBug.bpl [2022-03-16 21:29:04,927 WARN L150 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-03-16 21:29:04,927 INFO L205 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-03-16 21:29:04,927 INFO L164 ceAbstractionStarter]: Applying trace abstraction to program that has 2 error locations. [2022-03-16 21:29:04,927 INFO L534 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-03-16 21:29:04,949 WARN L322 ript$VariableManager]: TermVariabe Process0Thread1of1ForFork0_x not constructed by VariableManager. Cannot ensure absence of name clashes. [2022-03-16 21:29:04,949 WARN L322 ript$VariableManager]: TermVariabe Process0Thread1of1ForFork0_y not constructed by VariableManager. Cannot ensure absence of name clashes. [2022-03-16 21:29:04,962 WARN L322 ript$VariableManager]: TermVariabe Process1Thread1of1ForFork1_a not constructed by VariableManager. Cannot ensure absence of name clashes. [2022-03-16 21:29:04,963 WARN L322 ript$VariableManager]: TermVariabe Process1Thread1of1ForFork1_b not constructed by VariableManager. Cannot ensure absence of name clashes. [2022-03-16 21:29:04,963 INFO L148 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-03-16 21:29:05,025 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-03-16 21:29:05,026 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-03-16 21:29:05,028 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-03-16 21:29:05,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2022-03-16 21:29:05,054 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-03-16 21:29:05,060 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mLazyFiniteAutomaton=true, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR, mMcrOptimizeForkJoin=true, mMcrOverapproximateWrwc=true [2022-03-16 21:29:05,060 INFO L340 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2022-03-16 21:29:05,122 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 12 transitions and produced 13 states. [2022-03-16 21:29:05,124 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:05,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:05,135 INFO L85 PathProgramCache]: Analyzing trace with hash -2134110811, now seen corresponding path program 1 times [2022-03-16 21:29:05,142 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:05,144 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432541924] [2022-03-16 21:29:05,144 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:05,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:05,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-16 21:29:05,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-03-16 21:29:05,290 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-16 21:29:05,290 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432541924] [2022-03-16 21:29:05,291 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432541924] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-16 21:29:05,291 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-16 21:29:05,291 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2022-03-16 21:29:05,292 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370674043] [2022-03-16 21:29:05,293 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-03-16 21:29:05,297 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-03-16 21:29:05,297 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-16 21:29:05,314 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-03-16 21:29:05,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-03-16 21:29:05,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:05,317 INFO L470 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-03-16 21:29:05,318 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 2 states have (on average 3.0) internal successors, (6), 2 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-16 21:29:05,319 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:05,600 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 257 transitions and produced 252 states. [2022-03-16 21:29:05,601 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:05,601 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-03-16 21:29:05,602 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting Process0Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:05,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:05,605 INFO L85 PathProgramCache]: Analyzing trace with hash 1802261814, now seen corresponding path program 1 times [2022-03-16 21:29:05,605 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:05,605 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [188090765] [2022-03-16 21:29:05,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:05,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:05,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-16 21:29:05,778 INFO L134 CoverageAnalysis]: Checked inductivity of 510 backedges. 302 proven. 0 refuted. 0 times theorem prover too weak. 208 trivial. 0 not checked. [2022-03-16 21:29:05,778 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-16 21:29:05,778 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [188090765] [2022-03-16 21:29:05,779 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [188090765] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-16 21:29:05,779 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-16 21:29:05,779 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-03-16 21:29:05,779 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1832112919] [2022-03-16 21:29:05,780 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-03-16 21:29:05,781 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-16 21:29:05,781 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-16 21:29:05,781 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-16 21:29:05,781 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-16 21:29:05,782 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:05,782 INFO L470 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-03-16 21:29:05,782 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.75) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-16 21:29:05,782 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:05,782 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:07,717 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 3285 transitions and produced 2962 states. [2022-03-16 21:29:07,718 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:07,719 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:07,720 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-03-16 21:29:07,720 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting Process1Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:07,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:07,722 INFO L85 PathProgramCache]: Analyzing trace with hash -705968544, now seen corresponding path program 1 times [2022-03-16 21:29:07,723 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:07,724 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87002182] [2022-03-16 21:29:07,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:07,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:07,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-16 21:29:08,327 INFO L134 CoverageAnalysis]: Checked inductivity of 55709 backedges. 14163 proven. 0 refuted. 0 times theorem prover too weak. 41546 trivial. 0 not checked. [2022-03-16 21:29:08,328 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-16 21:29:08,328 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87002182] [2022-03-16 21:29:08,329 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [87002182] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-16 21:29:08,330 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-16 21:29:08,330 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-03-16 21:29:08,330 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121260083] [2022-03-16 21:29:08,331 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-03-16 21:29:08,334 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-16 21:29:08,334 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-16 21:29:08,336 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-16 21:29:08,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-16 21:29:08,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:08,336 INFO L470 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-03-16 21:29:08,337 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 10.5) internal successors, (42), 4 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-16 21:29:08,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:08,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:08,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:10,284 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 4561 transitions and produced 3822 states. [2022-03-16 21:29:10,284 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:10,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:10,285 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:10,285 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-03-16 21:29:10,286 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting Process1Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:10,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:10,287 INFO L85 PathProgramCache]: Analyzing trace with hash -487924434, now seen corresponding path program 2 times [2022-03-16 21:29:10,287 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:10,287 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767433119] [2022-03-16 21:29:10,287 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:10,287 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-16 21:29:11,263 INFO L134 CoverageAnalysis]: Checked inductivity of 67929 backedges. 25053 proven. 0 refuted. 0 times theorem prover too weak. 42876 trivial. 0 not checked. [2022-03-16 21:29:11,264 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-16 21:29:11,264 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767433119] [2022-03-16 21:29:11,264 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [767433119] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-16 21:29:11,264 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-16 21:29:11,265 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-03-16 21:29:11,265 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28603277] [2022-03-16 21:29:11,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-03-16 21:29:11,266 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-16 21:29:11,266 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-16 21:29:11,267 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-16 21:29:11,267 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-16 21:29:11,267 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:11,267 INFO L470 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-03-16 21:29:11,267 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-16 21:29:11,267 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:11,268 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:11,268 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:11,268 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:13,505 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 6064 transitions and produced 5034 states. [2022-03-16 21:29:13,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:13,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,507 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-03-16 21:29:13,509 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting Process1Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:13,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:13,510 INFO L85 PathProgramCache]: Analyzing trace with hash -195733676, now seen corresponding path program 3 times [2022-03-16 21:29:13,510 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:13,510 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46722401] [2022-03-16 21:29:13,511 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:13,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:13,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-03-16 21:29:13,914 INFO L134 CoverageAnalysis]: Checked inductivity of 100817 backedges. 44570 proven. 0 refuted. 0 times theorem prover too weak. 56247 trivial. 0 not checked. [2022-03-16 21:29:13,914 INFO L144 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-03-16 21:29:13,914 INFO L338 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46722401] [2022-03-16 21:29:13,915 INFO L165 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [46722401] provided 1 perfect and 0 imperfect interpolant sequences [2022-03-16 21:29:13,915 INFO L191 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-03-16 21:29:13,915 INFO L204 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-03-16 21:29:13,915 INFO L118 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828255478] [2022-03-16 21:29:13,915 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-03-16 21:29:13,916 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-03-16 21:29:13,916 INFO L108 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-03-16 21:29:13,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-03-16 21:29:13,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2022-03-16 21:29:13,917 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:13,918 INFO L470 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-03-16 21:29:13,918 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-03-16 21:29:13,918 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:13,918 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,918 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,918 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:13,918 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-03-16 21:29:15,953 INFO L104 alCausalityReduction]: MaximalCausalityReduction evaluated 6655 transitions and produced 5474 states. [2022-03-16 21:29:15,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-03-16 21:29:15,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:15,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:15,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:15,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-03-16 21:29:15,954 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-03-16 21:29:15,954 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting Process1Err0ASSERT_VIOLATIONASSERT === [Process0Err0ASSERT_VIOLATIONASSERT, Process1Err0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION (and 2 more)] === [2022-03-16 21:29:15,955 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-03-16 21:29:15,955 INFO L85 PathProgramCache]: Analyzing trace with hash -163786086, now seen corresponding path program 4 times [2022-03-16 21:29:15,956 INFO L126 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-03-16 21:29:15,956 INFO L338 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [542766036] [2022-03-16 21:29:15,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-03-16 21:29:15,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-03-16 21:29:16,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-03-16 21:29:16,053 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-03-16 21:29:16,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-03-16 21:29:16,375 INFO L138 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-03-16 21:29:16,375 INFO L628 BasicCegarLoop]: Counterexample is feasible [2022-03-16 21:29:16,376 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location Process1Err0ASSERT_VIOLATIONASSERT (5 of 6 remaining) [2022-03-16 21:29:16,378 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location Process0Err0ASSERT_VIOLATIONASSERT (4 of 6 remaining) [2022-03-16 21:29:16,378 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location Process1Err0ASSERT_VIOLATIONASSERT (3 of 6 remaining) [2022-03-16 21:29:16,379 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0INUSE_VIOLATION (2 of 6 remaining) [2022-03-16 21:29:16,379 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1INUSE_VIOLATION (1 of 6 remaining) [2022-03-16 21:29:16,379 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location Process0Err0ASSERT_VIOLATIONASSERT (0 of 6 remaining) [2022-03-16 21:29:16,379 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-03-16 21:29:16,385 INFO L732 BasicCegarLoop]: Path program histogram: [4, 1, 1] [2022-03-16 21:29:16,393 INFO L230 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-03-16 21:29:16,393 INFO L180 ceAbstractionStarter]: Computing trace abstraction results [2022-03-16 21:29:16,554 INFO L202 PluginConnector]: Adding new model PetersonWithBug.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 16.03 09:29:16 BasicIcfg [2022-03-16 21:29:16,554 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-03-16 21:29:16,555 INFO L158 Benchmark]: Toolchain (without parser) took 11948.48ms. Allocated memory was 176.2MB in the beginning and 2.5GB in the end (delta: 2.3GB). Free memory was 135.9MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2022-03-16 21:29:16,555 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.12ms. Allocated memory is still 176.2MB. Free memory is still 137.0MB. There was no memory consumed. Max. memory is 8.0GB. [2022-03-16 21:29:16,558 INFO L158 Benchmark]: Boogie Procedure Inliner took 22.80ms. Allocated memory is still 176.2MB. Free memory was 135.8MB in the beginning and 134.4MB in the end (delta: 1.4MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2022-03-16 21:29:16,559 INFO L158 Benchmark]: Boogie Preprocessor took 17.41ms. Allocated memory is still 176.2MB. Free memory was 134.3MB in the beginning and 133.4MB in the end (delta: 906.2kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-03-16 21:29:16,559 INFO L158 Benchmark]: RCFGBuilder took 219.38ms. Allocated memory is still 176.2MB. Free memory was 133.4MB in the beginning and 125.3MB in the end (delta: 8.1MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. [2022-03-16 21:29:16,560 INFO L158 Benchmark]: TraceAbstraction took 11682.78ms. Allocated memory was 176.2MB in the beginning and 2.5GB in the end (delta: 2.3GB). Free memory was 124.8MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. [2022-03-16 21:29:16,561 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.12ms. Allocated memory is still 176.2MB. Free memory is still 137.0MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 22.80ms. Allocated memory is still 176.2MB. Free memory was 135.8MB in the beginning and 134.4MB in the end (delta: 1.4MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 17.41ms. Allocated memory is still 176.2MB. Free memory was 134.3MB in the beginning and 133.4MB in the end (delta: 906.2kB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 219.38ms. Allocated memory is still 176.2MB. Free memory was 133.4MB in the beginning and 125.3MB in the end (delta: 8.1MB). Peak memory consumption was 7.3MB. Max. memory is 8.0GB. * TraceAbstraction took 11682.78ms. Allocated memory was 176.2MB in the beginning and 2.5GB in the end (delta: 2.3GB). Free memory was 124.8MB in the beginning and 1.2GB in the end (delta: -1.1GB). Peak memory consumption was 1.2GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation benchmarks ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: DisjunctiveConditionalIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , DisjunctiveConditionalIndependenceRelation.Statistics on underlying relation: ConditionTransformingIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ConditionTransformingIndependenceRelation.Statistics on underlying relation: SemanticConditionEliminator.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticConditionEliminator.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: UnionIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , UnionIndependenceRelation.Statistics on underlying relations: [ SyntacticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , SemanticIndependenceRelation.Query Time [ms]: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] ], Cache Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Statistics on independence cache: Total cache size (in pairs): 0, Positive cache size: 0, Positive conditional cache size: 0, Positive unconditional cache size: 0, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0, Eliminated conditions: 0, Maximal queried relation: -1, Independence queries for same thread: 0 - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 59]: assertion can be violated assertion can be violated We found a FailurePath: [L25] 0 critical := 0; VAL [critical=0] [L26] FORK 0 fork 0 Process0(); VAL [critical=0] [L37] 1 turn := 1; VAL [critical=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L27] FORK 0 fork 1 Process1(); VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=0] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=0] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=0, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=0, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L59] 2 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L60] 2 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=1] [L61] 2 critical := 0; VAL [critical=0, flag0=1, flag1=1, turn=1] [L62] 2 flag1 := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=0, turn=1] [L42] 1 critical := 0; VAL [critical=0, flag0=1, flag1=0, turn=1] [L56] 2 flag1 := 1; VAL [critical=0, flag0=1, flag1=1, turn=1] [L43] 1 flag0 := 0; VAL [critical=0, flag0=0, flag1=1, turn=1] [L37] 1 turn := 1; VAL [critical=0, flag0=0, flag1=1, turn=1] [L57] 2 turn := 0; VAL [critical=0, flag0=0, flag1=1, turn=0] [L58] 2 assume flag0 == 0 || turn == 1; VAL [critical=0, flag0=0, flag1=1, turn=0] [L38] 1 flag0 := 1; VAL [critical=0, flag0=1, flag1=1, turn=0] [L39] 1 assume flag1 == 0 || turn == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L40] 1 assert critical == 0; VAL [critical=0, flag0=1, flag1=1, turn=0] [L41] 1 critical := 1; VAL [critical=1, flag0=1, flag1=1, turn=0] [L59] 2 assert critical == 0; VAL [critical=1, flag0=1, flag1=1, turn=0] - UnprovableResult [Line: 40]: Unable to prove that assertion always holds Unable to prove that assertion always holds Reason: Not analyzed. - UnprovableResult [Line: 26]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Reason: Not analyzed. - UnprovableResult [Line: 26]: Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Unable to prove that petrification did provide enough thread instances (tool internal message, not intended for end users) Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data with 1 thread instances CFG has 5 procedures, 47 locations, 6 error locations. Started 1 CEGAR loops. OverallTime: 11.4s, OverallIterations: 6, TraceHistogramMax: 0, PathProgramHistogramMax: 4, EmptinessCheckTime: 0.0s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 8.5s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 5811 NumberOfCodeBlocks, 5811 NumberOfCodeBlocksAsserted, 6 NumberOfCheckSat, 4162 ConstructedInterpolants, 0 QuantifiedInterpolants, 4254 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 5 InterpolantComputations, 5 PerfectInterpolantSequences, 224965/224965 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-03-16 21:29:16,599 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2022-03-16 21:29:16,808 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...