/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-deagle/airline-20.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:40:26,382 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:40:26,384 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:40:26,438 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:40:26,445 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-26 13:40:26,445 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-26 13:40:26,446 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-26 13:40:26,446 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-26 13:40:26,463 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-26 13:40:26,464 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-26 13:40:26,465 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-26 13:40:26,466 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-26 13:40:26,467 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-26 13:40:26,468 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-26 13:40:26,469 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-26 13:40:26,470 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-26 13:40:26,470 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-26 13:40:26,473 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-07-26 13:40:26,479 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-26 13:40:26,479 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-26 13:40:26,487 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-26 13:40:26,488 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:40:26,509 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:40:26,509 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:40:26,509 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:40:26,509 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:40:26,510 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:40:26,510 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:40:26,510 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:40:26,511 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:40:26,511 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:40:26,511 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:40:26,515 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:40:26,516 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:40:26,516 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:40:26,517 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:40:26,518 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:40:26,518 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:40:26,518 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:40:26,519 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:40:26,519 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:40:26,519 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:40:26,519 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:40:26,522 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:40:26,522 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:40:26,692 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:40:26,712 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:40:26,714 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:40:26,715 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:40:26,718 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:40:26,718 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-deagle/airline-20.i [2022-07-26 13:40:26,777 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af5e984a7/afc97195014b44b5aef75fed801f5054/FLAG5317b004f [2022-07-26 13:40:27,163 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:40:27,164 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-20.i [2022-07-26 13:40:27,180 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af5e984a7/afc97195014b44b5aef75fed801f5054/FLAG5317b004f [2022-07-26 13:40:27,528 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/af5e984a7/afc97195014b44b5aef75fed801f5054 [2022-07-26 13:40:27,530 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:40:27,532 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:40:27,532 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:40:27,532 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:40:27,535 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:40:27,535 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:27,536 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79730853 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27, skipping insertion in model container [2022-07-26 13:40:27,536 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:27,545 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:40:27,583 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:40:27,852 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-20.i[32101,32114] [2022-07-26 13:40:27,853 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:40:27,860 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:40:27,911 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-20.i[32101,32114] [2022-07-26 13:40:27,927 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:40:27,952 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:40:27,953 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27 WrapperNode [2022-07-26 13:40:27,953 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:40:27,954 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:40:27,955 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:40:27,955 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:40:27,960 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:27,973 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:27,986 INFO L137 Inliner]: procedures = 162, calls = 23, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 61 [2022-07-26 13:40:27,987 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:40:27,991 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:40:27,991 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:40:27,995 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:40:28,001 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,001 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,003 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,003 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,007 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,010 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,011 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,013 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:40:28,013 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:40:28,013 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:40:28,013 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:40:28,014 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (1/1) ... [2022-07-26 13:40:28,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:40:28,030 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:40:28,043 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:40:28,050 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure salethread [2022-07-26 13:40:28,074 INFO L138 BoogieDeclarations]: Found implementation of procedure salethread [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-26 13:40:28,074 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:40:28,074 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:40:28,075 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:40:28,159 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:40:28,160 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:40:28,316 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:40:28,320 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:40:28,320 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-26 13:40:28,322 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:40:28 BoogieIcfgContainer [2022-07-26 13:40:28,322 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:40:28,323 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:40:28,323 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:40:28,339 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:40:28,339 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:40:28,340 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:40:27" (1/3) ... [2022-07-26 13:40:28,340 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@823415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:40:28, skipping insertion in model container [2022-07-26 13:40:28,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:40:28,341 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:40:27" (2/3) ... [2022-07-26 13:40:28,341 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@823415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:40:28, skipping insertion in model container [2022-07-26 13:40:28,341 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:40:28,341 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:40:28" (3/3) ... [2022-07-26 13:40:28,342 INFO L322 chiAutomizerObserver]: Analyzing ICFG airline-20.i [2022-07-26 13:40:28,382 INFO L144 ThreadInstanceAdder]: Constructed 1 joinOtherThreadTransitions. [2022-07-26 13:40:28,401 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 65 places, 69 transitions, 146 flow [2022-07-26 13:40:28,422 INFO L129 PetriNetUnfolder]: 10/91 cut-off events. [2022-07-26 13:40:28,423 INFO L130 PetriNetUnfolder]: For 1/1 co-relation queries the response was YES. [2022-07-26 13:40:28,425 INFO L84 FinitePrefix]: Finished finitePrefix Result has 97 conditions, 91 events. 10/91 cut-off events. For 1/1 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 126 event pairs, 0 based on Foata normal form. 0/79 useless extension candidates. Maximal degree in co-relation 46. Up to 4 conditions per place. [2022-07-26 13:40:28,425 INFO L82 GeneralOperation]: Start removeDead. Operand has 65 places, 69 transitions, 146 flow [2022-07-26 13:40:28,429 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 65 places, 69 transitions, 146 flow [2022-07-26 13:40:28,438 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:40:28,438 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:40:28,438 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:40:28,438 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:40:28,438 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:40:28,438 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:40:28,438 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:40:28,438 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:40:28,439 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:40:28,520 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 9 [2022-07-26 13:40:28,521 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:28,521 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:28,526 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:28,527 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:28,527 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:40:28,527 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 281 states, but on-demand construction may add more states [2022-07-26 13:40:28,542 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 9 [2022-07-26 13:40:28,542 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:28,542 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:28,544 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:28,544 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:28,556 INFO L733 eck$LassoCheckResult]: Stem: 68#[ULTIMATE.startENTRY]don't care [151] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 71#[L-1]don't care [136] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 73#[L-1-1]don't care [156] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 75#[L-1-2]don't care [159] L-1-2-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 77#[L23]don't care [116] L23-->L23-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 79#[L23-1]don't care [121] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 81#[L23-2]don't care [125] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 83#[L23-3]don't care [162] L23-3-->L23-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 85#[L23-4]don't care [119] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 87#[L23-5]don't care [128] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 89#[L718]don't care [120] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 91#[L719]don't care [101] L719-->L-1-3: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 93#[L-1-3]don't care [160] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 95#[L-1-4]don't care [142] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 97#[L-1-5]don't care [117] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 99#[L-1-6]don't care [140] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 101#[L-1-7]don't care [112] L-1-7-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~i~1#1=|v_ULTIMATE.start_main_~i~1#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_1|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_1|, ULTIMATE.start_main_#t~post4#1=|v_ULTIMATE.start_main_#t~post4#1_1|, ULTIMATE.start_main_#t~mem5#1=|v_ULTIMATE.start_main_#t~mem5#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~i~1#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_#t~post4#1, ULTIMATE.start_main_#t~mem5#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 103#[L735]don't care [157] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 105#[L735-1]don't care [163] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 107#[L736]don't care [130] L736-->L736-1: Formula: (and (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 80) |v_#length_3|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 1) |v_#valid_4|) (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_4|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_2|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 109#[L736-1]don't care [161] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 20) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 111#[L739]don't care [100] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 113#[L742]don't care [134] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 115#[L745]don't care [106] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 117#[L746-5]don't care [133] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 121#[L747]don't care [111] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 125#[L747-1]don't care [143] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 131#[L747-2]don't care [144] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 137#[L747-3]don't care [179] L747-3-->salethreadENTRY: Formula: (and (= |v_ULTIMATE.start_main_#t~pre2#1_6| v_salethreadThread1of1ForFork0_thidvar0_2) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread1of1ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_4|, salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_4, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_4, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_4|, salethreadThread1of1ForFork0_thidvar0=v_salethreadThread1of1ForFork0_thidvar0_2, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_4|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0, salethreadThread1of1ForFork0_#in~arg.base, salethreadThread1of1ForFork0_thidvar0, salethreadThread1of1ForFork0_#in~arg.offset, salethreadThread1of1ForFork0_#res.offset] 143#[L747-4, salethreadENTRY]don't care [149] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 149#[L747-5, salethreadENTRY]don't care [147] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 155#[L746-2, salethreadENTRY]don't care [118] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 165#[L746-3, salethreadENTRY]don't care [141] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 181#[L746-4, salethreadENTRY]don't care [107] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 205#[L746-5, salethreadENTRY]don't care [133] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 231#[L747, salethreadENTRY]don't care [111] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 259#[L747-1, salethreadENTRY]don't care [143] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 287#[L747-2, salethreadENTRY]don't care [144] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 321#[L747-3, salethreadENTRY]don't care [177] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 365#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY]don't care [2022-07-26 13:40:28,559 INFO L735 eck$LassoCheckResult]: Loop: 365#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY]don't care [178] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 365#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY]don't care [2022-07-26 13:40:28,567 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:28,567 INFO L85 PathProgramCache]: Analyzing trace with hash 595434379, now seen corresponding path program 1 times [2022-07-26 13:40:28,575 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:28,576 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [516869964] [2022-07-26 13:40:28,576 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:28,577 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:28,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,722 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:28,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,784 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:28,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:28,786 INFO L85 PathProgramCache]: Analyzing trace with hash 209, now seen corresponding path program 1 times [2022-07-26 13:40:28,786 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:28,787 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481802597] [2022-07-26 13:40:28,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:28,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:28,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,808 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:28,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,810 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:28,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:28,811 INFO L85 PathProgramCache]: Analyzing trace with hash 1278596743, now seen corresponding path program 1 times [2022-07-26 13:40:28,812 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:28,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [409279863] [2022-07-26 13:40:28,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:28,812 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:28,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,852 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:28,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:28,887 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:29,462 WARN L146 chiAutomizerObserver]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:40:29,471 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-26 13:40:29,475 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 76 places, 81 transitions, 180 flow [2022-07-26 13:40:29,492 INFO L129 PetriNetUnfolder]: 19/155 cut-off events. [2022-07-26 13:40:29,492 INFO L130 PetriNetUnfolder]: For 6/6 co-relation queries the response was YES. [2022-07-26 13:40:29,493 INFO L84 FinitePrefix]: Finished finitePrefix Result has 169 conditions, 155 events. 19/155 cut-off events. For 6/6 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 278 event pairs, 0 based on Foata normal form. 0/133 useless extension candidates. Maximal degree in co-relation 92. Up to 8 conditions per place. [2022-07-26 13:40:29,493 INFO L82 GeneralOperation]: Start removeDead. Operand has 76 places, 81 transitions, 180 flow [2022-07-26 13:40:29,495 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 76 places, 81 transitions, 180 flow [2022-07-26 13:40:29,495 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:40:29,495 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:40:29,495 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:40:29,495 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:40:29,495 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:40:29,495 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:40:29,495 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:40:29,507 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:40:29,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:40:29,662 INFO L131 ngComponentsAnalysis]: Automaton has 81 accepting balls. 81 [2022-07-26 13:40:29,662 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:29,662 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:29,663 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:29,663 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:29,663 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:40:29,663 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 2576 states, but on-demand construction may add more states [2022-07-26 13:40:29,687 INFO L131 ngComponentsAnalysis]: Automaton has 81 accepting balls. 81 [2022-07-26 13:40:29,687 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:29,687 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:29,688 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:29,688 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:29,689 INFO L733 eck$LassoCheckResult]: Stem: 79#[ULTIMATE.startENTRY]don't care [232] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 82#[L-1]don't care [217] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 84#[L-1-1]don't care [237] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 86#[L-1-2]don't care [240] L-1-2-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 88#[L23]don't care [197] L23-->L23-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 90#[L23-1]don't care [202] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 92#[L23-2]don't care [206] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 94#[L23-3]don't care [243] L23-3-->L23-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 96#[L23-4]don't care [200] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 98#[L23-5]don't care [209] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 100#[L718]don't care [201] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 102#[L719]don't care [182] L719-->L-1-3: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 104#[L-1-3]don't care [241] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 106#[L-1-4]don't care [223] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 108#[L-1-5]don't care [198] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 110#[L-1-6]don't care [221] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 112#[L-1-7]don't care [193] L-1-7-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~i~1#1=|v_ULTIMATE.start_main_~i~1#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_1|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_1|, ULTIMATE.start_main_#t~post4#1=|v_ULTIMATE.start_main_#t~post4#1_1|, ULTIMATE.start_main_#t~mem5#1=|v_ULTIMATE.start_main_#t~mem5#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~i~1#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_#t~post4#1, ULTIMATE.start_main_#t~mem5#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 114#[L735]don't care [238] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 116#[L735-1]don't care [244] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 118#[L736]don't care [211] L736-->L736-1: Formula: (and (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 80) |v_#length_3|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 1) |v_#valid_4|) (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_4|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_2|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 120#[L736-1]don't care [242] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 20) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 122#[L739]don't care [181] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 124#[L742]don't care [215] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 126#[L745]don't care [187] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 128#[L746-5]don't care [214] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 132#[L747]don't care [192] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 136#[L747-1]don't care [224] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 142#[L747-2]don't care [225] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 148#[L747-3]don't care [270] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] 154#[salethreadENTRY, L747-4]don't care [230] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 160#[salethreadENTRY, L747-5]don't care [228] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 166#[salethreadENTRY, L746-2]don't care [199] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 176#[salethreadENTRY, L746-3]don't care [222] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 192#[salethreadENTRY, L746-4]don't care [188] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 216#[L746-5, salethreadENTRY]don't care [214] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 242#[salethreadENTRY, L747]don't care [192] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 270#[salethreadENTRY, L747-1]don't care [224] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 298#[salethreadENTRY, L747-2]don't care [225] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 332#[L747-3, salethreadENTRY]don't care [271] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] 376#[salethreadENTRY, salethreadENTRY, L747-4]don't care [230] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 426#[salethreadENTRY, salethreadENTRY, L747-5]don't care [228] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 486#[L746-2, salethreadENTRY, salethreadENTRY]don't care [199] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 556#[L746-3, salethreadENTRY, salethreadENTRY]don't care [222] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 646#[salethreadENTRY, salethreadENTRY, L746-4]don't care [188] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 760#[salethreadENTRY, salethreadENTRY, L746-5]don't care [214] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 902#[salethreadENTRY, salethreadENTRY, L747]don't care [192] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1070#[salethreadENTRY, salethreadENTRY, L747-1]don't care [224] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 1264#[L747-2, salethreadENTRY, salethreadENTRY]don't care [225] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 1474#[L747-3, salethreadENTRY, salethreadENTRY]don't care [268] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1718#[salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:40:29,689 INFO L735 eck$LassoCheckResult]: Loop: 1718#[salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [269] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1718#[salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:40:29,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:29,690 INFO L85 PathProgramCache]: Analyzing trace with hash -146347827, now seen corresponding path program 1 times [2022-07-26 13:40:29,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:29,690 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [86183359] [2022-07-26 13:40:29,690 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:29,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:29,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,706 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:29,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,721 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:29,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:29,722 INFO L85 PathProgramCache]: Analyzing trace with hash 300, now seen corresponding path program 1 times [2022-07-26 13:40:29,722 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:29,722 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711460986] [2022-07-26 13:40:29,722 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:29,722 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:29,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,725 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:29,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,727 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:29,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:29,727 INFO L85 PathProgramCache]: Analyzing trace with hash -241815072, now seen corresponding path program 1 times [2022-07-26 13:40:29,727 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:29,727 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79765206] [2022-07-26 13:40:29,727 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:29,727 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:29,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,741 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:29,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:29,754 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:30,302 WARN L146 chiAutomizerObserver]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:40:30,318 INFO L144 ThreadInstanceAdder]: Constructed 3 joinOtherThreadTransitions. [2022-07-26 13:40:30,326 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 87 places, 93 transitions, 216 flow [2022-07-26 13:40:30,365 INFO L129 PetriNetUnfolder]: 35/262 cut-off events. [2022-07-26 13:40:30,365 INFO L130 PetriNetUnfolder]: For 19/19 co-relation queries the response was YES. [2022-07-26 13:40:30,366 INFO L84 FinitePrefix]: Finished finitePrefix Result has 290 conditions, 262 events. 35/262 cut-off events. For 19/19 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 639 event pairs, 1 based on Foata normal form. 0/224 useless extension candidates. Maximal degree in co-relation 162. Up to 16 conditions per place. [2022-07-26 13:40:30,366 INFO L82 GeneralOperation]: Start removeDead. Operand has 87 places, 93 transitions, 216 flow [2022-07-26 13:40:30,369 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 87 places, 93 transitions, 216 flow [2022-07-26 13:40:30,369 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:40:30,370 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:40:30,370 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:40:30,370 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:40:30,370 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:40:30,370 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:40:30,370 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:40:30,370 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:40:30,370 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:40:31,909 INFO L131 ngComponentsAnalysis]: Automaton has 729 accepting balls. 729 [2022-07-26 13:40:31,910 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:31,910 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:31,912 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:31,912 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:31,912 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:40:31,913 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 24851 states, but on-demand construction may add more states [2022-07-26 13:40:32,354 INFO L131 ngComponentsAnalysis]: Automaton has 729 accepting balls. 729 [2022-07-26 13:40:32,355 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:32,355 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:32,356 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:32,356 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:32,357 INFO L733 eck$LassoCheckResult]: Stem: 90#[ULTIMATE.startENTRY]don't care [325] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 93#[L-1]don't care [310] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 95#[L-1-1]don't care [330] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 97#[L-1-2]don't care [333] L-1-2-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 99#[L23]don't care [290] L23-->L23-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 101#[L23-1]don't care [295] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 103#[L23-2]don't care [299] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 105#[L23-3]don't care [336] L23-3-->L23-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 107#[L23-4]don't care [293] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 109#[L23-5]don't care [302] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 111#[L718]don't care [294] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 113#[L719]don't care [275] L719-->L-1-3: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 115#[L-1-3]don't care [334] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 117#[L-1-4]don't care [316] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 119#[L-1-5]don't care [291] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 121#[L-1-6]don't care [314] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 123#[L-1-7]don't care [286] L-1-7-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~i~1#1=|v_ULTIMATE.start_main_~i~1#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_1|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_1|, ULTIMATE.start_main_#t~post4#1=|v_ULTIMATE.start_main_#t~post4#1_1|, ULTIMATE.start_main_#t~mem5#1=|v_ULTIMATE.start_main_#t~mem5#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~i~1#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_#t~post4#1, ULTIMATE.start_main_#t~mem5#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 125#[L735]don't care [331] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 127#[L735-1]don't care [337] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 129#[L736]don't care [304] L736-->L736-1: Formula: (and (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 80) |v_#length_3|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 1) |v_#valid_4|) (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_4|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_2|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 131#[L736-1]don't care [335] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 20) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 133#[L739]don't care [274] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 135#[L742]don't care [308] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 137#[L745]don't care [280] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 139#[L746-5]don't care [307] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 143#[L747]don't care [285] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 147#[L747-1]don't care [317] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 153#[L747-2]don't care [318] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 159#[L747-3]don't care [373] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread1of3ForFork0_#in~arg.base_4| 0) (= |v_salethreadThread1of3ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_22|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_22|} OutVars{salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_4|, salethreadThread1of3ForFork0_~arg.base=v_salethreadThread1of3ForFork0_~arg.base_4, salethreadThread1of3ForFork0_thidvar0=v_salethreadThread1of3ForFork0_thidvar0_2, salethreadThread1of3ForFork0_#res.base=|v_salethreadThread1of3ForFork0_#res.base_4|, salethreadThread1of3ForFork0_#res.offset=|v_salethreadThread1of3ForFork0_#res.offset_4|, salethreadThread1of3ForFork0_~arg.offset=v_salethreadThread1of3ForFork0_~arg.offset_4, salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_22|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~_numberOfSeatsSold~0, salethreadThread1of3ForFork0_#in~arg.offset, salethreadThread1of3ForFork0_~arg.base, salethreadThread1of3ForFork0_thidvar0, salethreadThread1of3ForFork0_#res.base, salethreadThread1of3ForFork0_#res.offset, salethreadThread1of3ForFork0_~arg.offset, salethreadThread1of3ForFork0_#in~arg.base] 165#[L747-4, salethreadENTRY]don't care [323] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 171#[salethreadENTRY, L747-5]don't care [321] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 177#[L746-2, salethreadENTRY]don't care [292] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 187#[L746-3, salethreadENTRY]don't care [315] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 203#[L746-4, salethreadENTRY]don't care [281] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 227#[L746-5, salethreadENTRY]don't care [307] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 253#[L747, salethreadENTRY]don't care [285] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 281#[L747-1, salethreadENTRY]don't care [317] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 309#[salethreadENTRY, L747-2]don't care [318] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 343#[L747-3, salethreadENTRY]don't care [374] L747-3-->salethreadENTRY: Formula: (and (= v_salethreadThread2of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_24|) (= |v_salethreadThread2of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread2of3ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_24|} OutVars{salethreadThread2of3ForFork0_thidvar0=v_salethreadThread2of3ForFork0_thidvar0_2, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_4|, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_4|, salethreadThread2of3ForFork0_#res.base=|v_salethreadThread2of3ForFork0_#res.base_4|, salethreadThread2of3ForFork0_~arg.offset=v_salethreadThread2of3ForFork0_~arg.offset_4, salethreadThread2of3ForFork0_#res.offset=|v_salethreadThread2of3ForFork0_#res.offset_4|, salethreadThread2of3ForFork0_~arg.base=v_salethreadThread2of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_24|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_thidvar0, salethreadThread2of3ForFork0_#in~arg.offset, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0, salethreadThread2of3ForFork0_#in~arg.base, salethreadThread2of3ForFork0_#res.base, salethreadThread2of3ForFork0_~arg.offset, salethreadThread2of3ForFork0_#res.offset, salethreadThread2of3ForFork0_~arg.base] 387#[salethreadENTRY, L747-4, salethreadENTRY]don't care [323] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 435#[L747-5, salethreadENTRY, salethreadENTRY]don't care [321] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 491#[salethreadENTRY, L746-2, salethreadENTRY]don't care [292] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 557#[salethreadENTRY, L746-3, salethreadENTRY]don't care [315] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 643#[L746-4, salethreadENTRY, salethreadENTRY]don't care [281] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 761#[L746-5, salethreadENTRY, salethreadENTRY]don't care [307] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 907#[salethreadENTRY, L747, salethreadENTRY]don't care [285] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1081#[L747-1, salethreadENTRY, salethreadENTRY]don't care [317] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 1275#[salethreadENTRY, L747-2, salethreadENTRY]don't care [318] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 1485#[salethreadENTRY, L747-3, salethreadENTRY]don't care [375] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread3of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread3of3ForFork0_#in~arg.base_4| 0) (= v_salethreadThread3of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_26|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_26|} OutVars{salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_4|, salethreadThread3of3ForFork0_#res.offset=|v_salethreadThread3of3ForFork0_#res.offset_4|, salethreadThread3of3ForFork0_#res.base=|v_salethreadThread3of3ForFork0_#res.base_4|, salethreadThread3of3ForFork0_~arg.offset=v_salethreadThread3of3ForFork0_~arg.offset_4, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread3of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread3of3ForFork0_thidvar0=v_salethreadThread3of3ForFork0_thidvar0_2, salethreadThread3of3ForFork0_~arg.base=v_salethreadThread3of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_26|, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_4|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_#in~arg.offset, salethreadThread3of3ForFork0_#res.offset, salethreadThread3of3ForFork0_#res.base, salethreadThread3of3ForFork0_~arg.offset, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0, salethreadThread3of3ForFork0_thidvar0, salethreadThread3of3ForFork0_~arg.base, salethreadThread3of3ForFork0_#in~arg.base] 1729#[salethreadENTRY, L747-4, salethreadENTRY, salethreadENTRY]don't care [323] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 2011#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-5]don't care [321] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 2357#[L746-2, salethreadENTRY, salethreadENTRY, salethreadENTRY]don't care [292] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 2773#[salethreadENTRY, L746-3, salethreadENTRY, salethreadENTRY]don't care [315] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 3281#[salethreadENTRY, L746-4, salethreadENTRY, salethreadENTRY]don't care [281] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 3899#[salethreadENTRY, L746-5, salethreadENTRY, salethreadENTRY]don't care [307] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 4663#[L747, salethreadENTRY, salethreadENTRY, salethreadENTRY]don't care [285] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 5603#[salethreadENTRY, L747-1, salethreadENTRY, salethreadENTRY]don't care [317] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 6765#[salethreadENTRY, L747-2, salethreadENTRY, salethreadENTRY]don't care [318] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 8151#[salethreadENTRY, L747-3, salethreadENTRY, salethreadENTRY]don't care [371] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 9777#[salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY, salethreadENTRY]don't care [2022-07-26 13:40:32,357 INFO L735 eck$LassoCheckResult]: Loop: 9777#[salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY, salethreadENTRY]don't care [372] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 9777#[salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadENTRY, salethreadENTRY]don't care [2022-07-26 13:40:32,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:32,358 INFO L85 PathProgramCache]: Analyzing trace with hash 1964517744, now seen corresponding path program 1 times [2022-07-26 13:40:32,358 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:32,358 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532737658] [2022-07-26 13:40:32,358 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:32,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:32,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,378 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:32,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:32,394 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:32,394 INFO L85 PathProgramCache]: Analyzing trace with hash 403, now seen corresponding path program 1 times [2022-07-26 13:40:32,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:32,394 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553126571] [2022-07-26 13:40:32,395 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:32,395 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:32,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,397 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:32,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,399 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:32,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:32,399 INFO L85 PathProgramCache]: Analyzing trace with hash 770508292, now seen corresponding path program 1 times [2022-07-26 13:40:32,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:32,399 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774738912] [2022-07-26 13:40:32,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:32,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:32,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,424 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:32,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:32,439 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:33,238 WARN L146 chiAutomizerObserver]: 3 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:40:33,247 INFO L144 ThreadInstanceAdder]: Constructed 4 joinOtherThreadTransitions. [2022-07-26 13:40:33,249 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 98 places, 105 transitions, 254 flow [2022-07-26 13:40:33,294 INFO L129 PetriNetUnfolder]: 67/457 cut-off events. [2022-07-26 13:40:33,295 INFO L130 PetriNetUnfolder]: For 48/48 co-relation queries the response was YES. [2022-07-26 13:40:33,314 INFO L84 FinitePrefix]: Finished finitePrefix Result has 512 conditions, 457 events. 67/457 cut-off events. For 48/48 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 1550 event pairs, 6 based on Foata normal form. 0/391 useless extension candidates. Maximal degree in co-relation 281. Up to 32 conditions per place. [2022-07-26 13:40:33,315 INFO L82 GeneralOperation]: Start removeDead. Operand has 98 places, 105 transitions, 254 flow [2022-07-26 13:40:33,321 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 98 places, 105 transitions, 254 flow [2022-07-26 13:40:33,321 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:40:33,321 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:40:33,321 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:40:33,321 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:40:33,322 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:40:33,322 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:40:33,322 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:40:33,322 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:40:33,322 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:40:51,822 INFO L131 ngComponentsAnalysis]: Automaton has 6561 accepting balls. 6561 [2022-07-26 13:40:51,823 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:51,823 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:51,824 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:51,825 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:51,825 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:40:51,825 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 241526 states, but on-demand construction may add more states [2022-07-26 13:40:57,903 INFO L131 ngComponentsAnalysis]: Automaton has 6561 accepting balls. 6561 [2022-07-26 13:40:57,904 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:40:57,904 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:40:57,911 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:40:57,912 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:40:57,914 INFO L733 eck$LassoCheckResult]: Stem: 101#[ULTIMATE.startENTRY]don't care [430] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 104#[L-1]don't care [415] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 106#[L-1-1]don't care [435] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 108#[L-1-2]don't care [438] L-1-2-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 110#[L23]don't care [395] L23-->L23-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 112#[L23-1]don't care [400] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 114#[L23-2]don't care [404] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 116#[L23-3]don't care [441] L23-3-->L23-4: Formula: (and (= (select |v_#valid_3| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 118#[L23-4]don't care [398] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 120#[L23-5]don't care [407] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 122#[L718]don't care [399] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 124#[L719]don't care [380] L719-->L-1-3: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 126#[L-1-3]don't care [439] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 128#[L-1-4]don't care [421] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 130#[L-1-5]don't care [396] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 132#[L-1-6]don't care [419] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 134#[L-1-7]don't care [391] L-1-7-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~i~1#1=|v_ULTIMATE.start_main_~i~1#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_1|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_1|, ULTIMATE.start_main_#t~post4#1=|v_ULTIMATE.start_main_#t~post4#1_1|, ULTIMATE.start_main_#t~mem5#1=|v_ULTIMATE.start_main_#t~mem5#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~i~1#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_#t~post4#1, ULTIMATE.start_main_#t~mem5#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 136#[L735]don't care [436] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 138#[L735-1]don't care [442] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 140#[L736]don't care [409] L736-->L736-1: Formula: (and (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) 0) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2|) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_2| 0) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 80) |v_#length_3|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 1) |v_#valid_4|) (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_4|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_2|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 142#[L736-1]don't care [440] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 20) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 144#[L739]don't care [379] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 146#[L742]don't care [413] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 148#[L745]don't care [385] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 150#[L746-5]don't care [412] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 154#[L747]don't care [390] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 158#[L747-1]don't care [422] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 164#[L747-2]don't care [423] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 170#[L747-3]don't care [488] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread1of4ForFork0_#in~arg.base_4| 0) (= |v_salethreadThread1of4ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of4ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_36|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_36|} OutVars{salethreadThread1of4ForFork0_thidvar0=v_salethreadThread1of4ForFork0_thidvar0_2, salethreadThread1of4ForFork0_#in~arg.offset=|v_salethreadThread1of4ForFork0_#in~arg.offset_4|, salethreadThread1of4ForFork0_~arg.base=v_salethreadThread1of4ForFork0_~arg.base_4, salethreadThread1of4ForFork0_~arg.offset=v_salethreadThread1of4ForFork0_~arg.offset_4, salethreadThread1of4ForFork0_#res.base=|v_salethreadThread1of4ForFork0_#res.base_4|, salethreadThread1of4ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of4ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of4ForFork0_#in~arg.base=|v_salethreadThread1of4ForFork0_#in~arg.base_4|, salethreadThread1of4ForFork0_#res.offset=|v_salethreadThread1of4ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_36|} AuxVars[] AssignedVars[salethreadThread1of4ForFork0_thidvar0, salethreadThread1of4ForFork0_#in~arg.offset, salethreadThread1of4ForFork0_~arg.base, salethreadThread1of4ForFork0_~arg.offset, salethreadThread1of4ForFork0_#res.base, salethreadThread1of4ForFork0_~_numberOfSeatsSold~0, salethreadThread1of4ForFork0_#in~arg.base, salethreadThread1of4ForFork0_#res.offset] 176#[L747-4, salethreadENTRY]don't care [428] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 184#[L747-5, salethreadENTRY]don't care [426] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 194#[L746-2, salethreadENTRY]don't care [397] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 208#[L746-3, salethreadENTRY]don't care [420] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 228#[L746-4, salethreadENTRY]don't care [386] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 248#[L746-5, salethreadENTRY]don't care [412] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 270#[L747, salethreadENTRY]don't care [390] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 292#[L747-1, salethreadENTRY]don't care [422] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 320#[L747-2, salethreadENTRY]don't care [423] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 354#[L747-3, salethreadENTRY]don't care [489] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread2of4ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread2of4ForFork0_#in~arg.base_4| 0) (= v_salethreadThread2of4ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_38|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_38|} OutVars{salethreadThread2of4ForFork0_#res.offset=|v_salethreadThread2of4ForFork0_#res.offset_4|, salethreadThread2of4ForFork0_#res.base=|v_salethreadThread2of4ForFork0_#res.base_4|, salethreadThread2of4ForFork0_~arg.offset=v_salethreadThread2of4ForFork0_~arg.offset_4, salethreadThread2of4ForFork0_~arg.base=v_salethreadThread2of4ForFork0_~arg.base_4, salethreadThread2of4ForFork0_thidvar0=v_salethreadThread2of4ForFork0_thidvar0_2, salethreadThread2of4ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of4ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of4ForFork0_#in~arg.base=|v_salethreadThread2of4ForFork0_#in~arg.base_4|, salethreadThread2of4ForFork0_#in~arg.offset=|v_salethreadThread2of4ForFork0_#in~arg.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_38|} AuxVars[] AssignedVars[salethreadThread2of4ForFork0_#res.offset, salethreadThread2of4ForFork0_#res.base, salethreadThread2of4ForFork0_~arg.offset, salethreadThread2of4ForFork0_~arg.base, salethreadThread2of4ForFork0_thidvar0, salethreadThread2of4ForFork0_~_numberOfSeatsSold~0, salethreadThread2of4ForFork0_#in~arg.base, salethreadThread2of4ForFork0_#in~arg.offset] 398#[salethreadENTRY, L747-4, salethreadENTRY]don't care [428] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 448#[salethreadENTRY, L747-5, salethreadENTRY]don't care [426] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 508#[salethreadENTRY, L746-2, salethreadENTRY]don't care [397] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 578#[salethreadENTRY, L746-3, salethreadENTRY]don't care [420] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 668#[L746-4, salethreadENTRY, salethreadENTRY]don't care [386] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 782#[salethreadENTRY, L746-5, salethreadENTRY]don't care [412] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 924#[L747, salethreadENTRY, salethreadENTRY]don't care [390] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1092#[salethreadENTRY, L747-1, salethreadENTRY]don't care [422] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 1286#[salethreadENTRY, L747-2, salethreadENTRY]don't care [423] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 1496#[salethreadENTRY, L747-3, salethreadENTRY]don't care [490] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread3of4ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread3of4ForFork0_#in~arg.base_4| 0) (= v_salethreadThread3of4ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_40|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_40|} OutVars{salethreadThread3of4ForFork0_~arg.offset=v_salethreadThread3of4ForFork0_~arg.offset_4, salethreadThread3of4ForFork0_#res.offset=|v_salethreadThread3of4ForFork0_#res.offset_4|, salethreadThread3of4ForFork0_~_numberOfSeatsSold~0=v_salethreadThread3of4ForFork0_~_numberOfSeatsSold~0_10, salethreadThread3of4ForFork0_#in~arg.base=|v_salethreadThread3of4ForFork0_#in~arg.base_4|, salethreadThread3of4ForFork0_#res.base=|v_salethreadThread3of4ForFork0_#res.base_4|, salethreadThread3of4ForFork0_thidvar0=v_salethreadThread3of4ForFork0_thidvar0_2, salethreadThread3of4ForFork0_~arg.base=v_salethreadThread3of4ForFork0_~arg.base_4, salethreadThread3of4ForFork0_#in~arg.offset=|v_salethreadThread3of4ForFork0_#in~arg.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_40|} AuxVars[] AssignedVars[salethreadThread3of4ForFork0_~arg.offset, salethreadThread3of4ForFork0_#res.offset, salethreadThread3of4ForFork0_~_numberOfSeatsSold~0, salethreadThread3of4ForFork0_#in~arg.base, salethreadThread3of4ForFork0_#res.base, salethreadThread3of4ForFork0_thidvar0, salethreadThread3of4ForFork0_~arg.base, salethreadThread3of4ForFork0_#in~arg.offset] 1740#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-4]don't care [428] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 2022#[salethreadENTRY, salethreadENTRY, L747-5, salethreadENTRY]don't care [426] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 2368#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-2]don't care [397] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 2784#[salethreadENTRY, salethreadENTRY, L746-3, salethreadENTRY]don't care [420] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 3292#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-4]don't care [386] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 3910#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-5]don't care [412] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 4674#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L747]don't care [390] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 5614#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-1]don't care [422] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 6776#[salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-2]don't care [423] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 8162#[salethreadENTRY, salethreadENTRY, L747-3, salethreadENTRY]don't care [491] L747-3-->salethreadENTRY: Formula: (and (= |v_salethreadThread4of4ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread4of4ForFork0_#in~arg.base_4| 0) (= v_salethreadThread4of4ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_42|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_42|} OutVars{salethreadThread4of4ForFork0_~_numberOfSeatsSold~0=v_salethreadThread4of4ForFork0_~_numberOfSeatsSold~0_10, salethreadThread4of4ForFork0_#in~arg.base=|v_salethreadThread4of4ForFork0_#in~arg.base_4|, salethreadThread4of4ForFork0_#res.base=|v_salethreadThread4of4ForFork0_#res.base_4|, salethreadThread4of4ForFork0_~arg.offset=v_salethreadThread4of4ForFork0_~arg.offset_4, salethreadThread4of4ForFork0_~arg.base=v_salethreadThread4of4ForFork0_~arg.base_4, salethreadThread4of4ForFork0_thidvar0=v_salethreadThread4of4ForFork0_thidvar0_2, salethreadThread4of4ForFork0_#res.offset=|v_salethreadThread4of4ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_42|, salethreadThread4of4ForFork0_#in~arg.offset=|v_salethreadThread4of4ForFork0_#in~arg.offset_4|} AuxVars[] AssignedVars[salethreadThread4of4ForFork0_~_numberOfSeatsSold~0, salethreadThread4of4ForFork0_#in~arg.base, salethreadThread4of4ForFork0_#res.base, salethreadThread4of4ForFork0_~arg.offset, salethreadThread4of4ForFork0_~arg.base, salethreadThread4of4ForFork0_thidvar0, salethreadThread4of4ForFork0_#res.offset, salethreadThread4of4ForFork0_#in~arg.offset] 9788#[salethreadENTRY, salethreadENTRY, L747-4, salethreadENTRY, salethreadENTRY]don't care [428] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 11654#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-5]don't care [426] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 13808#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-2]don't care [397] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 16298#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-3]don't care [420] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 19266#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-4]don't care [386] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 22824#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L746-5]don't care [412] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 20) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 27164#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L747]don't care [390] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 32442#[salethreadENTRY, salethreadENTRY, L747-1, salethreadENTRY, salethreadENTRY]don't care [422] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 38926#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, L747-2]don't care [423] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1))) (and (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_3| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|)) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_3|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 46840#[salethreadENTRY, salethreadENTRY, L747-3, salethreadENTRY, salethreadENTRY]don't care [486] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 56484#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:40:57,914 INFO L735 eck$LassoCheckResult]: Loop: 56484#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [487] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 56484#[salethreadENTRY, salethreadENTRY, salethreadENTRY, salethreadENTRY, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:40:57,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:57,915 INFO L85 PathProgramCache]: Analyzing trace with hash -1323609036, now seen corresponding path program 1 times [2022-07-26 13:40:57,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:57,920 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [91705195] [2022-07-26 13:40:57,920 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:57,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:57,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:57,974 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:57,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:57,991 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:57,991 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:57,991 INFO L85 PathProgramCache]: Analyzing trace with hash 518, now seen corresponding path program 1 times [2022-07-26 13:40:57,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:57,992 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108887682] [2022-07-26 13:40:57,992 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:57,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:57,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:57,994 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:57,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:57,996 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:57,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:40:57,996 INFO L85 PathProgramCache]: Analyzing trace with hash 1917793331, now seen corresponding path program 1 times [2022-07-26 13:40:57,996 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:40:57,996 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [711819468] [2022-07-26 13:40:57,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:40:57,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:40:58,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:58,010 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:40:58,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:40:58,034 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:40:59,155 WARN L146 chiAutomizerObserver]: 4 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:40:59,167 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2022-07-26 13:40:59,171 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 109 places, 117 transitions, 294 flow [2022-07-26 13:40:59,291 INFO L129 PetriNetUnfolder]: 135/832 cut-off events. [2022-07-26 13:40:59,291 INFO L130 PetriNetUnfolder]: For 110/110 co-relation queries the response was YES. [2022-07-26 13:40:59,312 INFO L84 FinitePrefix]: Finished finitePrefix Result has 943 conditions, 832 events. 135/832 cut-off events. For 110/110 co-relation queries the response was YES. Maximal size of possible extension queue 22. Compared 3742 event pairs, 23 based on Foata normal form. 0/714 useless extension candidates. Maximal degree in co-relation 501. Up to 80 conditions per place. [2022-07-26 13:40:59,312 INFO L82 GeneralOperation]: Start removeDead. Operand has 109 places, 117 transitions, 294 flow [2022-07-26 13:40:59,330 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 109 places, 117 transitions, 294 flow [2022-07-26 13:40:59,331 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:40:59,331 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:40:59,331 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:40:59,331 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:40:59,331 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:40:59,331 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:40:59,331 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:40:59,332 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:40:59,332 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states