/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/dekker.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:22:10,719 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:22:10,721 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:22:10,753 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:22:10,783 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-26 13:22:10,792 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-26 13:22:10,794 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-26 13:22:10,794 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:22:10,828 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:22:10,828 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:22:10,829 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:22:10,829 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:22:10,830 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:22:10,830 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:22:10,830 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:22:10,830 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:22:10,830 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:22:10,831 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:22:10,831 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:22:10,831 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:22:10,832 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:22:10,832 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:22:10,833 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:22:10,833 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:22:10,834 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:22:10,834 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:22:10,834 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:22:10,834 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:22:10,835 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:22:10,835 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:22:11,086 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:22:11,108 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:22:11,111 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:22:11,112 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:22:11,112 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:22:11,113 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/dekker.i [2022-07-26 13:22:11,172 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f43f12662/c6b0610978374fa1b8fbc87ff3153d75/FLAG3e9edb7f4 [2022-07-26 13:22:11,640 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:22:11,662 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/dekker.i [2022-07-26 13:22:11,675 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f43f12662/c6b0610978374fa1b8fbc87ff3153d75/FLAG3e9edb7f4 [2022-07-26 13:22:11,967 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f43f12662/c6b0610978374fa1b8fbc87ff3153d75 [2022-07-26 13:22:11,970 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:22:11,971 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:22:11,974 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:11,975 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:22:11,981 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:22:11,981 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,983 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3478b693 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:11, skipping insertion in model container [2022-07-26 13:22:11,983 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,989 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:22:12,036 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:22:12,188 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:12,281 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/dekker.i[31403,31416] [2022-07-26 13:22:12,286 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/dekker.i[32483,32496] [2022-07-26 13:22:12,292 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,298 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:22:12,322 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:12,356 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/dekker.i[31403,31416] [2022-07-26 13:22:12,358 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/dekker.i[32483,32496] [2022-07-26 13:22:12,378 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,416 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:22:12,416 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12 WrapperNode [2022-07-26 13:22:12,416 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:12,418 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,418 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:22:12,418 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:22:12,425 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,440 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,459 INFO L137 Inliner]: procedures = 172, calls = 60, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 47 [2022-07-26 13:22:12,459 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,460 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,460 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:22:12,460 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:22:12,468 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,468 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,474 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,474 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,479 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,483 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,485 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,487 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,488 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:22:12,488 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:22:12,488 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:22:12,489 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,508 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:22:12,519 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:22:12,531 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:22:12,543 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:22:12,568 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:22:12,568 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-26 13:22:12,569 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-26 13:22:12,569 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:22:12,569 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:22:12,570 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:22:12,570 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-26 13:22:12,570 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:22:12,570 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:22:12,572 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:22:12,718 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:22:12,720 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:22:12,902 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:22:12,909 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:22:12,909 INFO L299 CfgBuilder]: Removed 4 assume(true) statements. [2022-07-26 13:22:12,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12 BoogieIcfgContainer [2022-07-26 13:22:12,912 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:22:12,913 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:22:12,913 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:22:12,933 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:22:12,934 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,934 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:22:11" (1/3) ... [2022-07-26 13:22:12,935 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@74e3b7a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,935 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,935 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (2/3) ... [2022-07-26 13:22:12,936 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@74e3b7a5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,936 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,936 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12" (3/3) ... [2022-07-26 13:22:12,937 INFO L322 chiAutomizerObserver]: Analyzing ICFG dekker.i [2022-07-26 13:22:13,044 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-26 13:22:13,084 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 98 places, 106 transitions, 228 flow [2022-07-26 13:22:13,152 INFO L129 PetriNetUnfolder]: 13/102 cut-off events. [2022-07-26 13:22:13,153 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-26 13:22:13,157 INFO L84 FinitePrefix]: Finished finitePrefix Result has 111 conditions, 102 events. 13/102 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 143 event pairs, 0 based on Foata normal form. 0/89 useless extension candidates. Maximal degree in co-relation 62. Up to 2 conditions per place. [2022-07-26 13:22:13,157 INFO L82 GeneralOperation]: Start removeDead. Operand has 98 places, 106 transitions, 228 flow [2022-07-26 13:22:13,168 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 96 places, 102 transitions, 216 flow [2022-07-26 13:22:13,180 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:13,181 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:13,181 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:13,181 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:13,181 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:13,181 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:13,181 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:13,182 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:13,184 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:13,420 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 1197 [2022-07-26 13:22:13,421 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,421 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,427 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,427 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-26 13:22:13,427 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:13,427 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 1818 states, but on-demand construction may add more states [2022-07-26 13:22:13,527 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 1197 [2022-07-26 13:22:13,528 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,528 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,529 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,529 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-26 13:22:13,545 INFO L733 eck$LassoCheckResult]: Stem: 101#[ULTIMATE.startENTRY]don't care [244] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 104#[L-1]don't care [218] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 106#[L-1-1]don't care [251] L-1-1-->L-1-2: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 108#[L-1-2]don't care [252] L-1-2-->L16: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 110#[L16]don't care [208] L16-->L16-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 112#[L16-1]don't care [166] L16-1-->L16-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 114#[L16-2]don't care [260] L16-2-->L16-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 116#[L16-3]don't care [239] L16-3-->L16-4: Formula: (and (= (select |v_#length_6| 2) 9) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 118#[L16-4]don't care [240] L16-4-->L704: Formula: (= v_~flag1~0_7 0) InVars {} OutVars{~flag1~0=v_~flag1~0_7} AuxVars[] AssignedVars[~flag1~0] 120#[L704]don't care [246] L704-->L705: Formula: (= v_~flag2~0_7 0) InVars {} OutVars{~flag2~0=v_~flag2~0_7} AuxVars[] AssignedVars[~flag2~0] 122#[L705]don't care [216] L705-->L706: Formula: (= v_~turn~0_9 0) InVars {} OutVars{~turn~0=v_~turn~0_9} AuxVars[] AssignedVars[~turn~0] 124#[L706]don't care [229] L706-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 126#[L-1-3]don't care [255] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 128#[L-1-4]don't care [238] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 130#[L-1-5]don't care [182] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 132#[L-1-6]don't care [236] L-1-6-->L790: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 134#[L790]don't care [169] L790-->L790-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 0) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_6| 0)) (= (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 1) |v_#valid_12|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 4) |v_#length_7|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 136#[L790-1]don't care [221] L790-1-->L790-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1) |v_#valid_14|) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 138#[L790-2]don't care [189] L790-2-->L791: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 140#[L791]don't care [200] L791-->L791-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (ite (and (<= v_~turn~0_10 1) (<= 0 v_~turn~0_10)) 1 0)) InVars {~turn~0=v_~turn~0_10} OutVars{~turn~0=v_~turn~0_10, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] 142#[L791-1]don't care [197] L791-1-->L2: Formula: true InVars {} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 144#[L2]don't care [167] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|) InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 146#[L3]don't care [250] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2| 0)) InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} AuxVars[] AssignedVars[] 150#[L2-1]don't care [199] L2-1-->L792: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 152#[L792]don't care [177] L792-->L792-1: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 154#[L792-1]don't care [253] L792-1-->L792-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 156#[L792-2]don't care [198] L792-2-->L792-3: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 158#[L792-3]don't care [319] L792-3-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_16, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~t~0, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~f2~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 160#[thr1ENTRY, L792-4]don't care [289] thr1ENTRY-->L708: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 162#[L708, L792-4]don't care [290] L708-->L710: Formula: (= v_~flag1~0_6 1) InVars {} OutVars{~flag1~0=v_~flag1~0_6} AuxVars[] AssignedVars[~flag1~0] 166#[L792-4, L710]don't care [291] L710-->L736: Formula: (= v_thr1Thread1of1ForFork1_~f2~0_1 v_~flag2~0_6) InVars {~flag2~0=v_~flag2~0_6} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_1, ~flag2~0=v_~flag2~0_6} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~f2~0] 172#[L792-4, L736]don't care [2022-07-26 13:22:13,546 INFO L735 eck$LassoCheckResult]: Loop: 172#[L792-4, L736]don't care [294] L736-->L715: Formula: (<= 1 v_thr1Thread1of1ForFork1_~f2~0_5) InVars {thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_5} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_5} AuxVars[] AssignedVars[] 184#[L715, L792-4]don't care [296] L715-->L717: Formula: (= v_thr1Thread1of1ForFork1_~t~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~t~0] 200#[L717, L792-4]don't care [300] L717-->L718: Formula: (= v_thr1Thread1of1ForFork1_~t~0_5 0) InVars {thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_5} OutVars{thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_5} AuxVars[] AssignedVars[] 224#[L792-4, L718]don't care [304] L718-->L736: Formula: (= v_thr1Thread1of1ForFork1_~f2~0_7 v_~flag2~0_5) InVars {~flag2~0=v_~flag2~0_5} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_7, ~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~f2~0] 172#[L792-4, L736]don't care [2022-07-26 13:22:13,554 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,554 INFO L85 PathProgramCache]: Analyzing trace with hash -1545274290, now seen corresponding path program 1 times [2022-07-26 13:22:13,562 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,562 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1923068435] [2022-07-26 13:22:13,563 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,718 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,793 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,797 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,797 INFO L85 PathProgramCache]: Analyzing trace with hash 9976135, now seen corresponding path program 1 times [2022-07-26 13:22:13,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,798 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [810616062] [2022-07-26 13:22:13,798 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,824 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,839 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,840 INFO L85 PathProgramCache]: Analyzing trace with hash -170113260, now seen corresponding path program 1 times [2022-07-26 13:22:13,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2075361725] [2022-07-26 13:22:13,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,841 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:13,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:13,985 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:13,986 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2075361725] [2022-07-26 13:22:13,986 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2075361725] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:13,986 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:13,986 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:13,987 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1197092803] [2022-07-26 13:22:13,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:14,040 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:14,084 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:14,085 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:14,088 INFO L87 Difference]: Start difference. First operand currently 1818 states, but on-demand construction may add more states Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:14,220 INFO L93 Difference]: Finished difference Result 2419 states and 6729 transitions. [2022-07-26 13:22:14,221 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2419 states and 6729 transitions. [2022-07-26 13:22:14,252 INFO L131 ngComponentsAnalysis]: Automaton has 126 accepting balls. 1338 [2022-07-26 13:22:14,284 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2419 states to 1746 states and 4959 transitions. [2022-07-26 13:22:14,285 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1746 [2022-07-26 13:22:14,291 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1746 [2022-07-26 13:22:14,291 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1746 states and 4959 transitions. [2022-07-26 13:22:14,304 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:14,304 INFO L220 hiAutomatonCegarLoop]: Abstraction has 1746 states and 4959 transitions. [2022-07-26 13:22:14,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1746 states and 4959 transitions. [2022-07-26 13:22:14,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1746 to 1396. [2022-07-26 13:22:14,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1396 states, 1396 states have (on average 2.8574498567335245) internal successors, (3989), 1395 states have internal predecessors, (3989), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1396 states to 1396 states and 3989 transitions. [2022-07-26 13:22:14,410 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1396 states and 3989 transitions. [2022-07-26 13:22:14,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:14,417 INFO L426 stractBuchiCegarLoop]: Abstraction has 1396 states and 3989 transitions. [2022-07-26 13:22:14,419 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-26 13:22:14,423 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1396 states and 3989 transitions. [2022-07-26 13:22:14,437 INFO L131 ngComponentsAnalysis]: Automaton has 91 accepting balls. 1023 [2022-07-26 13:22:14,438 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:14,438 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:14,439 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:14,439 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-26 13:22:14,440 INFO L733 eck$LassoCheckResult]: Stem: 8660#[ULTIMATE.startENTRY]don't care [244] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 8662#[L-1]don't care [218] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 8672#[L-1-1]don't care [251] L-1-1-->L-1-2: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 8674#[L-1-2]don't care [252] L-1-2-->L16: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 8800#[L16]don't care [208] L16-->L16-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 8802#[L16-1]don't care [166] L16-1-->L16-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 8888#[L16-2]don't care [260] L16-2-->L16-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 8882#[L16-3]don't care [239] L16-3-->L16-4: Formula: (and (= (select |v_#length_6| 2) 9) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 8166#[L16-4]don't care [240] L16-4-->L704: Formula: (= v_~flag1~0_7 0) InVars {} OutVars{~flag1~0=v_~flag1~0_7} AuxVars[] AssignedVars[~flag1~0] 8168#[L704]don't care [246] L704-->L705: Formula: (= v_~flag2~0_7 0) InVars {} OutVars{~flag2~0=v_~flag2~0_7} AuxVars[] AssignedVars[~flag2~0] 7824#[L705]don't care [216] L705-->L706: Formula: (= v_~turn~0_9 0) InVars {} OutVars{~turn~0=v_~turn~0_9} AuxVars[] AssignedVars[~turn~0] 7826#[L706]don't care [229] L706-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 8886#[L-1-3]don't care [255] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 6572#[L-1-4]don't care [238] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 6574#[L-1-5]don't care [182] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 7876#[L-1-6]don't care [236] L-1-6-->L790: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 6814#[L790]don't care [169] L790-->L790-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 0) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_6| 0)) (= (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 1) |v_#valid_12|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 4) |v_#length_7|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 6816#[L790-1]don't care [221] L790-1-->L790-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1) |v_#valid_14|) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 8414#[L790-2]don't care [189] L790-2-->L791: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 8092#[L791]don't care [200] L791-->L791-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (ite (and (<= v_~turn~0_10 1) (<= 0 v_~turn~0_10)) 1 0)) InVars {~turn~0=v_~turn~0_10} OutVars{~turn~0=v_~turn~0_10, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] 6434#[L791-1]don't care [197] L791-1-->L2: Formula: true InVars {} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 6436#[L2]don't care [167] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|) InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 7670#[L3]don't care [250] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2| 0)) InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} AuxVars[] AssignedVars[] 6468#[L2-1]don't care [199] L2-1-->L792: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 6470#[L792]don't care [177] L792-->L792-1: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 6748#[L792-1]don't care [253] L792-1-->L792-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 6750#[L792-2]don't care [198] L792-2-->L792-3: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 8082#[L792-3]don't care [319] L792-3-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_16, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~t~0, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~f2~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 8692#[thr1ENTRY, L792-4]don't care [230] L792-4-->L792-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 8694#[thr1ENTRY, L792-5]don't care [170] L792-5-->L793: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 8776#[thr1ENTRY, L793]don't care [220] L793-->L793-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 8780#[thr1ENTRY, L793-1]don't care [195] L793-1-->L793-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 8682#[L793-2, thr1ENTRY]don't care [168] L793-2-->L793-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 8684#[thr1ENTRY, L793-3]don't care [316] L793-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_10, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_~t~1=v_thr2Thread1of1ForFork0_~t~1_16, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~f1~0, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~t~1, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 8804#[thr1ENTRY, L793-4, thr2ENTRY]don't care [264] thr2ENTRY-->L749: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 8538#[thr1ENTRY, L793-4, L749]don't care [265] L749-->L751: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 7954#[thr1ENTRY, L793-4, L751]don't care [266] L751-->L777: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork0_~f1~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~f1~0] 7958#[thr1ENTRY, L793-4, L777]don't care [2022-07-26 13:22:14,440 INFO L735 eck$LassoCheckResult]: Loop: 7958#[thr1ENTRY, L793-4, L777]don't care [269] L777-->L756: Formula: (<= 1 v_thr2Thread1of1ForFork0_~f1~0_5) InVars {thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_5} OutVars{thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_5} AuxVars[] AssignedVars[] 8756#[thr1ENTRY, L793-4, L756]don't care [271] L756-->L758: Formula: (= v_~turn~0_1 v_thr2Thread1of1ForFork0_~t~1_1) InVars {~turn~0=v_~turn~0_1} OutVars{~turn~0=v_~turn~0_1, thr2Thread1of1ForFork0_~t~1=v_thr2Thread1of1ForFork0_~t~1_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~t~1] 6494#[thr1ENTRY, L793-4, L758]don't care [275] L758-->L759: Formula: (= v_thr2Thread1of1ForFork0_~t~1_5 1) InVars {thr2Thread1of1ForFork0_~t~1=v_thr2Thread1of1ForFork0_~t~1_5} OutVars{thr2Thread1of1ForFork0_~t~1=v_thr2Thread1of1ForFork0_~t~1_5} AuxVars[] AssignedVars[] 6500#[thr1ENTRY, L793-4, L759]don't care [279] L759-->L777: Formula: (= v_~flag1~0_2 v_thr2Thread1of1ForFork0_~f1~0_7) InVars {~flag1~0=v_~flag1~0_2} OutVars{~flag1~0=v_~flag1~0_2, thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~f1~0] 7958#[thr1ENTRY, L793-4, L777]don't care [2022-07-26 13:22:14,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,441 INFO L85 PathProgramCache]: Analyzing trace with hash -1228599242, now seen corresponding path program 1 times [2022-07-26 13:22:14,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,441 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328130290] [2022-07-26 13:22:14,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,484 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,524 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,525 INFO L85 PathProgramCache]: Analyzing trace with hash 9206535, now seen corresponding path program 1 times [2022-07-26 13:22:14,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,525 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007943835] [2022-07-26 13:22:14,526 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,533 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,536 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,537 INFO L85 PathProgramCache]: Analyzing trace with hash -1321965380, now seen corresponding path program 1 times [2022-07-26 13:22:14,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,537 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [23655508] [2022-07-26 13:22:14,537 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:14,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:14,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:14,613 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [23655508] [2022-07-26 13:22:14,613 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [23655508] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:14,613 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:14,613 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:14,613 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722180402] [2022-07-26 13:22:14,613 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:14,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:14,635 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:14,635 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:14,635 INFO L87 Difference]: Start difference. First operand 1396 states and 3989 transitions. cyclomatic complexity: 2684 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:14,721 INFO L93 Difference]: Finished difference Result 1691 states and 4747 transitions. [2022-07-26 13:22:14,722 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1691 states and 4747 transitions. [2022-07-26 13:22:14,737 INFO L131 ngComponentsAnalysis]: Automaton has 119 accepting balls. 1086 [2022-07-26 13:22:14,774 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1691 states to 1563 states and 4427 transitions. [2022-07-26 13:22:14,774 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1563 [2022-07-26 13:22:14,776 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1563 [2022-07-26 13:22:14,776 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1563 states and 4427 transitions. [2022-07-26 13:22:14,779 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:14,779 INFO L220 hiAutomatonCegarLoop]: Abstraction has 1563 states and 4427 transitions. [2022-07-26 13:22:14,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1563 states and 4427 transitions. [2022-07-26 13:22:14,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1563 to 1279. [2022-07-26 13:22:14,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1279 states, 1279 states have (on average 2.8506645817044567) internal successors, (3646), 1278 states have internal predecessors, (3646), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1279 states to 1279 states and 3646 transitions. [2022-07-26 13:22:14,816 INFO L242 hiAutomatonCegarLoop]: Abstraction has 1279 states and 3646 transitions. [2022-07-26 13:22:14,816 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:14,818 INFO L426 stractBuchiCegarLoop]: Abstraction has 1279 states and 3646 transitions. [2022-07-26 13:22:14,819 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-26 13:22:14,819 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1279 states and 3646 transitions. [2022-07-26 13:22:14,826 INFO L131 ngComponentsAnalysis]: Automaton has 87 accepting balls. 882 [2022-07-26 13:22:14,827 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:14,827 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:14,830 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:14,830 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1] [2022-07-26 13:22:14,831 INFO L733 eck$LassoCheckResult]: Stem: 12894#[ULTIMATE.startENTRY]don't care [244] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12896#[L-1]don't care [218] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 12904#[L-1-1]don't care [251] L-1-1-->L-1-2: Formula: (= (select |v_#valid_9| 0) 0) InVars {#valid=|v_#valid_9|} OutVars{#valid=|v_#valid_9|} AuxVars[] AssignedVars[] 12906#[L-1-2]don't care [252] L-1-2-->L16: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 13022#[L16]don't care [208] L16-->L16-1: Formula: (and (= (select |v_#valid_10| 1) 1) (= 2 (select |v_#length_5| 1))) InVars {#length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#length=|v_#length_5|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[] 13024#[L16-1]don't care [166] L16-1-->L16-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 13112#[L16-2]don't care [260] L16-2-->L16-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 13106#[L16-3]don't care [239] L16-3-->L16-4: Formula: (and (= (select |v_#length_6| 2) 9) (= (select |v_#valid_11| 2) 1)) InVars {#length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#length=|v_#length_6|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[] 12404#[L16-4]don't care [240] L16-4-->L704: Formula: (= v_~flag1~0_7 0) InVars {} OutVars{~flag1~0=v_~flag1~0_7} AuxVars[] AssignedVars[~flag1~0] 12406#[L704]don't care [246] L704-->L705: Formula: (= v_~flag2~0_7 0) InVars {} OutVars{~flag2~0=v_~flag2~0_7} AuxVars[] AssignedVars[~flag2~0] 12088#[L705]don't care [216] L705-->L706: Formula: (= v_~turn~0_9 0) InVars {} OutVars{~turn~0=v_~turn~0_9} AuxVars[] AssignedVars[~turn~0] 12090#[L706]don't care [229] L706-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 13110#[L-1-3]don't care [255] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 11032#[L-1-4]don't care [238] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 11034#[L-1-5]don't care [182] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 12132#[L-1-6]don't care [236] L-1-6-->L790: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 11222#[L790]don't care [169] L790-->L790-1: Formula: (and (= |v_ULTIMATE.start_main_~#t1~0#1.offset_6| 0) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_6| 0)) (= (store |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 1) |v_#valid_12|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) (= (store |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_6| 4) |v_#length_7|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_6|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_8|, #valid=|v_#valid_13|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_6|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_6|, #valid=|v_#valid_12|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 11224#[L790-1]don't care [221] L790-1-->L790-2: Formula: (and (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 4)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_6| 0)) (= (select |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 0) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) (= (store |v_#valid_15| |v_ULTIMATE.start_main_~#t2~0#1.base_6| 1) |v_#valid_14|) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 12646#[L790-2]don't care [189] L790-2-->L791: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12332#[L791]don't care [200] L791-->L791-1: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1| (ite (and (<= v_~turn~0_10 1) (<= 0 v_~turn~0_10)) 1 0)) InVars {~turn~0=v_~turn~0_10} OutVars{~turn~0=v_~turn~0_10, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_#in~cond#1] 10912#[L791-1]don't care [197] L791-1-->L2: Formula: true InVars {} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 10914#[L2]don't care [167] L2-->L3: Formula: (= |v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2| |v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|) InVars {ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_4|, ULTIMATE.start_assume_abort_if_not_#in~cond#1=|v_ULTIMATE.start_assume_abort_if_not_#in~cond#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_assume_abort_if_not_~cond#1] 11950#[L3]don't care [250] L3-->L2-1: Formula: (not (= |v_ULTIMATE.start_assume_abort_if_not_~cond#1_2| 0)) InVars {ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} OutVars{ULTIMATE.start_assume_abort_if_not_~cond#1=|v_ULTIMATE.start_assume_abort_if_not_~cond#1_2|} AuxVars[] AssignedVars[] 10948#[L2-1]don't care [199] L2-1-->L792: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10950#[L792]don't care [177] L792-->L792-1: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_1| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 11164#[L792-1]don't care [253] L792-1-->L792-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 11166#[L792-2]don't care [198] L792-2-->L792-3: Formula: (and (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) |v_ULTIMATE.start_main_~#t1~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre4#1_2|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_1| 4) (select |v_#length_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_1|) (= (select |v_#valid_1| |v_ULTIMATE.start_main_~#t1~0#1.base_1|) 1)) InVars {#valid=|v_#valid_1|, #memory_int=|v_#memory_int_2|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} OutVars{#valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|} AuxVars[] AssignedVars[#memory_int] 12326#[L792-3]don't care [319] L792-3-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_16, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~t~0, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~f2~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 12922#[thr1ENTRY, L792-4]don't care [289] thr1ENTRY-->L708: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 12436#[L708, L792-4]don't care [290] L708-->L710: Formula: (= v_~flag1~0_6 1) InVars {} OutVars{~flag1~0=v_~flag1~0_6} AuxVars[] AssignedVars[~flag1~0] 12438#[L792-4, L710]don't care [230] L792-4-->L792-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 12260#[L792-5, L710]don't care [170] L792-5-->L793: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 12264#[L793, L710]don't care [220] L793-->L793-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_1| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 12720#[L793-1, L710]don't care [195] L793-1-->L793-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 11990#[L793-2, L710]don't care [168] L793-2-->L793-3: Formula: (and (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) 1) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (select |v_#length_2| |v_ULTIMATE.start_main_~#t2~0#1.base_1|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_1|) (= |v_#memory_int_3| (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_1|) |v_ULTIMATE.start_main_~#t2~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre6#1_2|)))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_4|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, #valid=|v_#valid_2|, #memory_int=|v_#memory_int_3|, #length=|v_#length_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[#memory_int] 11330#[L793-3, L710]don't care [316] L793-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_~f1~0=v_thr2Thread1of1ForFork0_~f1~0_10, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_~t~1=v_thr2Thread1of1ForFork0_~t~1_16, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~f1~0, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~t~1, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 11872#[L710, L793-4, thr2ENTRY]don't care [264] thr2ENTRY-->L749: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 11926#[L710, L793-4, L749]don't care [265] L749-->L751: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 12828#[L710, L793-4, L751]don't care [291] L710-->L736: Formula: (= v_thr1Thread1of1ForFork1_~f2~0_1 v_~flag2~0_6) InVars {~flag2~0=v_~flag2~0_6} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_1, ~flag2~0=v_~flag2~0_6} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~f2~0] 13148#[L793-4, L736, L751]don't care [2022-07-26 13:22:14,831 INFO L735 eck$LassoCheckResult]: Loop: 13148#[L793-4, L736, L751]don't care [294] L736-->L715: Formula: (<= 1 v_thr1Thread1of1ForFork1_~f2~0_5) InVars {thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_5} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_5} AuxVars[] AssignedVars[] 12972#[L751, L793-4, L715]don't care [296] L715-->L717: Formula: (= v_thr1Thread1of1ForFork1_~t~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~t~0] 11846#[L717, L793-4, L751]don't care [300] L717-->L718: Formula: (= v_thr1Thread1of1ForFork1_~t~0_5 0) InVars {thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_5} OutVars{thr1Thread1of1ForFork1_~t~0=v_thr1Thread1of1ForFork1_~t~0_5} AuxVars[] AssignedVars[] 11854#[L751, L793-4, L718]don't care [304] L718-->L736: Formula: (= v_thr1Thread1of1ForFork1_~f2~0_7 v_~flag2~0_5) InVars {~flag2~0=v_~flag2~0_5} OutVars{thr1Thread1of1ForFork1_~f2~0=v_thr1Thread1of1ForFork1_~f2~0_7, ~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~f2~0] 13148#[L793-4, L736, L751]don't care [2022-07-26 13:22:14,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,832 INFO L85 PathProgramCache]: Analyzing trace with hash 2108368462, now seen corresponding path program 1 times [2022-07-26 13:22:14,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,832 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949716171] [2022-07-26 13:22:14,832 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,867 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,894 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,894 INFO L85 PathProgramCache]: Analyzing trace with hash 9976135, now seen corresponding path program 2 times [2022-07-26 13:22:14,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,895 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1361707847] [2022-07-26 13:22:14,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,899 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,901 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,901 INFO L85 PathProgramCache]: Analyzing trace with hash -864194284, now seen corresponding path program 1 times [2022-07-26 13:22:14,902 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,902 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1599705547] [2022-07-26 13:22:14,902 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,902 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,931 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,967 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:15,858 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.07 01:22:15 BoogieIcfgContainer [2022-07-26 13:22:15,858 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-26 13:22:15,859 INFO L158 Benchmark]: Toolchain (without parser) took 3887.82ms. Allocated memory was 173.0MB in the beginning and 245.4MB in the end (delta: 72.4MB). Free memory was 143.9MB in the beginning and 106.7MB in the end (delta: 37.2MB). Peak memory consumption was 108.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,859 INFO L158 Benchmark]: CDTParser took 0.15ms. Allocated memory is still 173.0MB. Free memory was 130.2MB in the beginning and 130.0MB in the end (delta: 122.4kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-26 13:22:15,860 INFO L158 Benchmark]: CACSL2BoogieTranslator took 442.49ms. Allocated memory was 173.0MB in the beginning and 245.4MB in the end (delta: 72.4MB). Free memory was 143.7MB in the beginning and 206.2MB in the end (delta: -62.5MB). Peak memory consumption was 15.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,860 INFO L158 Benchmark]: Boogie Procedure Inliner took 41.31ms. Allocated memory is still 245.4MB. Free memory was 206.2MB in the beginning and 204.2MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,861 INFO L158 Benchmark]: Boogie Preprocessor took 27.43ms. Allocated memory is still 245.4MB. Free memory was 204.2MB in the beginning and 202.6MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,861 INFO L158 Benchmark]: RCFGBuilder took 423.79ms. Allocated memory is still 245.4MB. Free memory was 202.6MB in the beginning and 189.5MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,862 INFO L158 Benchmark]: BuchiAutomizer took 2945.27ms. Allocated memory is still 245.4MB. Free memory was 189.5MB in the beginning and 106.7MB in the end (delta: 82.8MB). Peak memory consumption was 83.3MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,864 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15ms. Allocated memory is still 173.0MB. Free memory was 130.2MB in the beginning and 130.0MB in the end (delta: 122.4kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 442.49ms. Allocated memory was 173.0MB in the beginning and 245.4MB in the end (delta: 72.4MB). Free memory was 143.7MB in the beginning and 206.2MB in the end (delta: -62.5MB). Peak memory consumption was 15.0MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 41.31ms. Allocated memory is still 245.4MB. Free memory was 206.2MB in the beginning and 204.2MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 27.43ms. Allocated memory is still 245.4MB. Free memory was 204.2MB in the beginning and 202.6MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 423.79ms. Allocated memory is still 245.4MB. Free memory was 202.6MB in the beginning and 189.5MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * BuchiAutomizer took 2945.27ms. Allocated memory is still 245.4MB. Free memory was 189.5MB in the beginning and 106.7MB in the end (delta: 82.8MB). Peak memory consumption was 83.3MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 2 terminating modules (2 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.2 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 1279 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.7s and 3 iterations. TraceHistogramMax:1. Analysis of lassos took 1.7s. Construction of modules took 0.0s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 0. Minimization of det autom 2. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 2 MinimizatonAttempts, 634 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.1s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 219 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 219 mSDsluCounter, 578 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 332 mSDsCounter, 6 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 51 IncrementalHoareTripleChecker+Invalid, 57 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 6 mSolverCounterUnsat, 254 mSDtfsCounter, 51 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.1s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 714]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\old(cond)=1, \result={0:0}, \result={0:0}, \result=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, cond=1, f1=0, f2=1, flag1=1, flag2=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@750a1e72 in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@88e7ae4 in28709,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@71ed5c04=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@733a1160=0, t=0, t=0, t1={10892:0}, t2={3:0}, turn=0, x=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 714]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L704] 0 int flag1 = 0, flag2 = 0; [L705] 0 int turn; [L706] 0 int x; [L790] 0 pthread_t t1, t2; [L791] CALL 0 assume_abort_if_not(0<=turn && turn<=1) [L3] COND FALSE 0 !(!cond) [L791] RET 0 assume_abort_if_not(0<=turn && turn<=1) [L792] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L709] 1 flag1 = 1 [L793] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L750] 2 flag2 = 1 [L712] 1 int f2 = flag2; Loop: [L714] COND TRUE f2 >= 1 [L716] int t = turn; [L718] COND FALSE !(t != 0) [L735] f2 = flag2 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-26 13:22:15,908 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...