/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-lit/fkp2013-2.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:22:18,315 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:22:18,318 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:22:18,378 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:22:18,396 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-26 13:22:18,398 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-26 13:22:18,399 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-26 13:22:18,400 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-26 13:22:18,400 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-26 13:22:18,401 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-26 13:22:18,402 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-26 13:22:18,403 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-26 13:22:18,404 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-26 13:22:18,406 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-26 13:22:18,406 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-26 13:22:18,407 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-26 13:22:18,408 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-26 13:22:18,410 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-07-26 13:22:18,416 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-26 13:22:18,417 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-26 13:22:18,424 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-26 13:22:18,425 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:22:18,458 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:22:18,458 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:22:18,459 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:22:18,459 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:22:18,460 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:22:18,460 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:22:18,460 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:22:18,460 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:22:18,460 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:22:18,461 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:22:18,461 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:22:18,461 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:22:18,461 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:22:18,462 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:22:18,463 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:22:18,464 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:22:18,464 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:22:18,465 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:22:18,465 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:22:18,465 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:22:18,466 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:22:18,466 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:22:18,682 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:22:18,700 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:22:18,702 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:22:18,703 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:22:18,704 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:22:18,705 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-lit/fkp2013-2.i [2022-07-26 13:22:18,770 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/82829ab5e/ac61486e22e34ed2bffb91313ecb41be/FLAG1088e622b [2022-07-26 13:22:19,263 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:22:19,264 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-lit/fkp2013-2.i [2022-07-26 13:22:19,274 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/82829ab5e/ac61486e22e34ed2bffb91313ecb41be/FLAG1088e622b [2022-07-26 13:22:19,755 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/82829ab5e/ac61486e22e34ed2bffb91313ecb41be [2022-07-26 13:22:19,760 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:22:19,762 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:22:19,763 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:19,764 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:22:19,766 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:22:19,767 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:19" (1/1) ... [2022-07-26 13:22:19,768 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@dff748c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:19, skipping insertion in model container [2022-07-26 13:22:19,768 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:19" (1/1) ... [2022-07-26 13:22:19,774 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:22:19,816 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:22:20,110 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-lit/fkp2013-2.i[30003,30016] [2022-07-26 13:22:20,129 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:20,139 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:22:20,177 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-lit/fkp2013-2.i[30003,30016] [2022-07-26 13:22:20,180 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:20,218 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:22:20,218 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20 WrapperNode [2022-07-26 13:22:20,218 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:20,219 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:20,219 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:22:20,219 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:22:20,225 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,241 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,264 INFO L137 Inliner]: procedures = 172, calls = 17, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 56 [2022-07-26 13:22:20,264 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:20,265 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:22:20,265 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:22:20,265 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:22:20,272 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,272 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,285 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,286 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,293 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,297 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,298 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,300 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:22:20,301 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:22:20,301 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:22:20,301 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:22:20,307 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (1/1) ... [2022-07-26 13:22:20,312 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:22:20,321 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:22:20,356 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:22:20,358 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:22:20,386 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-26 13:22:20,386 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-26 13:22:20,386 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-26 13:22:20,387 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:22:20,387 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:22:20,387 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:22:20,389 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:22:20,476 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:22:20,477 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:22:20,634 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:22:20,642 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:22:20,642 INFO L299 CfgBuilder]: Removed 1 assume(true) statements. [2022-07-26 13:22:20,644 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:20 BoogieIcfgContainer [2022-07-26 13:22:20,644 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:22:20,645 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:22:20,645 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:22:20,653 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:22:20,654 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:20,654 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:22:19" (1/3) ... [2022-07-26 13:22:20,661 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53b76e2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:20, skipping insertion in model container [2022-07-26 13:22:20,661 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:20,661 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:20" (2/3) ... [2022-07-26 13:22:20,662 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53b76e2a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:20, skipping insertion in model container [2022-07-26 13:22:20,662 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:20,662 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:20" (3/3) ... [2022-07-26 13:22:20,663 INFO L322 chiAutomizerObserver]: Analyzing ICFG fkp2013-2.i [2022-07-26 13:22:20,770 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-07-26 13:22:20,802 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 71 places, 69 transitions, 148 flow [2022-07-26 13:22:20,862 INFO L129 PetriNetUnfolder]: 4/81 cut-off events. [2022-07-26 13:22:20,864 INFO L130 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2022-07-26 13:22:20,868 INFO L84 FinitePrefix]: Finished finitePrefix Result has 89 conditions, 81 events. 4/81 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 97 event pairs, 0 based on Foata normal form. 0/76 useless extension candidates. Maximal degree in co-relation 60. Up to 4 conditions per place. [2022-07-26 13:22:20,868 INFO L82 GeneralOperation]: Start removeDead. Operand has 71 places, 69 transitions, 148 flow [2022-07-26 13:22:20,878 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 70 places, 67 transitions, 142 flow [2022-07-26 13:22:20,890 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:20,891 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:20,891 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:20,891 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:20,891 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:20,891 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:20,892 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:20,892 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:20,893 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:21,124 INFO L131 ngComponentsAnalysis]: Automaton has 84 accepting balls. 84 [2022-07-26 13:22:21,125 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:21,125 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:21,130 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:21,130 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:21,130 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:21,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 1907 states, but on-demand construction may add more states [2022-07-26 13:22:21,159 INFO L131 ngComponentsAnalysis]: Automaton has 84 accepting balls. 84 [2022-07-26 13:22:21,160 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:21,160 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:21,162 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:21,163 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:21,171 INFO L733 eck$LassoCheckResult]: Stem: 74#[ULTIMATE.startENTRY]don't care [131] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 77#[L-1]don't care [119] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 79#[L-1-1]don't care [138] L-1-1-->L-1-2: Formula: (= (select |v_#valid_5| 0) 0) InVars {#valid=|v_#valid_5|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[] 81#[L-1-2]don't care [142] L-1-2-->L683: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 83#[L683]don't care [94] L683-->L683-1: Formula: (and (= (select |v_#valid_6| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[] 85#[L683-1]don't care [128] L683-1-->L683-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 87#[L683-2]don't care [118] L683-2-->L683-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 89#[L683-3]don't care [135] L683-3-->L683-4: Formula: (and (= (select |v_#valid_7| 2) 1) (= 9 (select |v_#length_2| 2))) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 91#[L683-4]don't care [86] L683-4-->L-1-3: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] 93#[L-1-3]don't care [143] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 95#[L-1-4]don't care [123] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 97#[L-1-5]don't care [100] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 99#[L-1-6]don't care [121] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 101#[L-1-7]don't care [96] L-1-7-->L708: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_3|, ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_4|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~post5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 103#[L708]don't care [93] L708-->L708-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 105#[L708-1]don't care [107] L708-1-->L709: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 107#[L709]don't care [125] L709-->L709-1: Formula: (and (= |v_#valid_8| (store |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= 0 (select |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4|)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 109#[L709-1]don't care [133] L709-1-->L709-2: Formula: (and (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_4| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_4|) (= |v_#valid_10| (store |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 1)) (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 4) |v_#length_5|) (= (select |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 111#[L709-2]don't care [88] L709-2-->L711: Formula: true InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 113#[L711]don't care [120] L711-->L712: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 115#[L712]don't care [145] L712-->L712-1: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 117#[L712-1]don't care [89] L712-1-->L712-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 119#[L712-2]don't care [136] L712-2-->L712-3: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_3|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_12|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_12|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 121#[L712-3]don't care [167] L712-3-->thr1ENTRY: Formula: (and (= |v_thr1Thread1of1ForFork0_#in~arg#1.base_4| 0) (= |v_thr1Thread1of1ForFork0_#in~arg#1.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork0_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork0___VERIFIER_assert_~cond#1=|v_thr1Thread1of1ForFork0___VERIFIER_assert_~cond#1_10|, thr1Thread1of1ForFork0_#in~arg#1.base=|v_thr1Thread1of1ForFork0_#in~arg#1.base_4|, thr1Thread1of1ForFork0___VERIFIER_assert_#in~cond#1=|v_thr1Thread1of1ForFork0___VERIFIER_assert_#in~cond#1_6|, thr1Thread1of1ForFork0_#res#1.offset=|v_thr1Thread1of1ForFork0_#res#1.offset_4|, thr1Thread1of1ForFork0_~arg#1.offset=|v_thr1Thread1of1ForFork0_~arg#1.offset_4|, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_~arg#1.base=|v_thr1Thread1of1ForFork0_~arg#1.base_4|, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~arg#1.offset=|v_thr1Thread1of1ForFork0_#in~arg#1.offset_4|, thr1Thread1of1ForFork0_#res#1.base=|v_thr1Thread1of1ForFork0_#res#1.base_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} AuxVars[] AssignedVars[thr1Thread1of1ForFork0___VERIFIER_assert_~cond#1, thr1Thread1of1ForFork0_#in~arg#1.base, thr1Thread1of1ForFork0___VERIFIER_assert_#in~cond#1, thr1Thread1of1ForFork0_#res#1.offset, thr1Thread1of1ForFork0_~arg#1.offset, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_~arg#1.base, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~arg#1.offset, thr1Thread1of1ForFork0_#res#1.base] 123#[thr1ENTRY, L712-4]don't care [116] L712-4-->L712-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 125#[thr1ENTRY, L712-5]don't care [129] L712-5-->L713: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 129#[thr1ENTRY, L713]don't care [113] L713-->L713-6: Formula: (= |v_ULTIMATE.start_main_~i~0#1_5| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 135#[L713-6, thr1ENTRY]don't care [141] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 147#[L714, thr1ENTRY]don't care [92] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 163#[thr1ENTRY, L714-1]don't care [105] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 183#[L714-2, thr1ENTRY]don't care [101] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 209#[L714-3, thr1ENTRY]don't care [170] L714-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~arg.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_thr2Thread1of1ForFork1_#in~arg.base_4| 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_~arg.offset=v_thr2Thread1of1ForFork1_~arg.offset_4, thr2Thread1of1ForFork1_~t~0=v_thr2Thread1of1ForFork1_~t~0_8, thr2Thread1of1ForFork1_#in~arg.offset=|v_thr2Thread1of1ForFork1_#in~arg.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_~arg.base=v_thr2Thread1of1ForFork1_~arg.base_4, thr2Thread1of1ForFork1_#in~arg.base=|v_thr2Thread1of1ForFork1_#in~arg.base_4|} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_~arg.offset, thr2Thread1of1ForFork1_~t~0, thr2Thread1of1ForFork1_#in~arg.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_~arg.base, thr2Thread1of1ForFork1_#in~arg.base] 241#[thr2ENTRY, thr1ENTRY, L714-4]don't care [114] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 279#[thr1ENTRY, thr2ENTRY, L714-5]don't care [110] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 329#[thr2ENTRY, thr1ENTRY, L713-3]don't care [112] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 387#[thr1ENTRY, thr2ENTRY, L713-4]don't care [106] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 455#[thr2ENTRY, thr1ENTRY, L713-5]don't care [137] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 531#[thr1ENTRY, thr2ENTRY, L713-6]don't care [141] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 619#[thr2ENTRY, thr1ENTRY, L714]don't care [92] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 725#[thr1ENTRY, thr2ENTRY, L714-1]don't care [105] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 849#[thr2ENTRY, thr1ENTRY, L714-2]don't care [101] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 995#[thr1ENTRY, thr2ENTRY, L714-3]don't care [168] L714-3-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1165#[thr2ENTRY, thr1ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:22:21,172 INFO L735 eck$LassoCheckResult]: Loop: 1165#[thr2ENTRY, thr1ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [169] ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1165#[thr2ENTRY, thr1ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2022-07-26 13:22:21,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,181 INFO L85 PathProgramCache]: Analyzing trace with hash -778574441, now seen corresponding path program 1 times [2022-07-26 13:22:21,189 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,190 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105390226] [2022-07-26 13:22:21,190 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,191 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,347 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,401 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:21,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,404 INFO L85 PathProgramCache]: Analyzing trace with hash 200, now seen corresponding path program 1 times [2022-07-26 13:22:21,404 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,405 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741135353] [2022-07-26 13:22:21,406 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,423 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,427 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:21,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,429 INFO L85 PathProgramCache]: Analyzing trace with hash 1633996274, now seen corresponding path program 1 times [2022-07-26 13:22:21,429 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,429 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1016525507] [2022-07-26 13:22:21,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,463 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,501 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:22,688 WARN L146 chiAutomizerObserver]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:22:22,704 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-07-26 13:22:22,709 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 94 places, 89 transitions, 202 flow [2022-07-26 13:22:22,724 INFO L129 PetriNetUnfolder]: 5/107 cut-off events. [2022-07-26 13:22:22,724 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-26 13:22:22,725 INFO L84 FinitePrefix]: Finished finitePrefix Result has 121 conditions, 107 events. 5/107 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 134 event pairs, 0 based on Foata normal form. 0/100 useless extension candidates. Maximal degree in co-relation 116. Up to 6 conditions per place. [2022-07-26 13:22:22,725 INFO L82 GeneralOperation]: Start removeDead. Operand has 94 places, 89 transitions, 202 flow [2022-07-26 13:22:22,728 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 79 places, 74 transitions, 163 flow [2022-07-26 13:22:22,728 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:22,728 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:22,728 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:22,728 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:22,728 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:22,729 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:22,729 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:22,729 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:22,729 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:23,664 INFO L131 ngComponentsAnalysis]: Automaton has 588 accepting balls. 588 [2022-07-26 13:22:23,665 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:23,665 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:23,670 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:23,670 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:23,671 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:23,671 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 13583 states, but on-demand construction may add more states [2022-07-26 13:22:23,995 INFO L131 ngComponentsAnalysis]: Automaton has 588 accepting balls. 588 [2022-07-26 13:22:23,995 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:23,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:23,996 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:23,998 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:24,002 INFO L733 eck$LassoCheckResult]: Stem: 97#[ULTIMATE.startENTRY]don't care [220] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 100#[L-1]don't care [208] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 102#[L-1-1]don't care [227] L-1-1-->L-1-2: Formula: (= (select |v_#valid_5| 0) 0) InVars {#valid=|v_#valid_5|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[] 104#[L-1-2]don't care [231] L-1-2-->L683: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 106#[L683]don't care [183] L683-->L683-1: Formula: (and (= (select |v_#valid_6| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[] 108#[L683-1]don't care [217] L683-1-->L683-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 110#[L683-2]don't care [207] L683-2-->L683-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 112#[L683-3]don't care [224] L683-3-->L683-4: Formula: (and (= (select |v_#valid_7| 2) 1) (= 9 (select |v_#length_2| 2))) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 114#[L683-4]don't care [175] L683-4-->L-1-3: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] 116#[L-1-3]don't care [232] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 118#[L-1-4]don't care [212] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 120#[L-1-5]don't care [189] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 122#[L-1-6]don't care [210] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 124#[L-1-7]don't care [185] L-1-7-->L708: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_3|, ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_4|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~post5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 126#[L708]don't care [182] L708-->L708-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 128#[L708-1]don't care [196] L708-1-->L709: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 130#[L709]don't care [214] L709-->L709-1: Formula: (and (= |v_#valid_8| (store |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= 0 (select |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4|)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 132#[L709-1]don't care [222] L709-1-->L709-2: Formula: (and (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_4| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_4|) (= |v_#valid_10| (store |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 1)) (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 4) |v_#length_5|) (= (select |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 134#[L709-2]don't care [177] L709-2-->L711: Formula: true InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 136#[L711]don't care [209] L711-->L712: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 138#[L712]don't care [234] L712-->L712-1: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 140#[L712-1]don't care [178] L712-1-->L712-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 142#[L712-2]don't care [225] L712-2-->L712-3: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_3|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_12|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_12|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 144#[L712-3]don't care [274] L712-3-->thr1ENTRY: Formula: (and (= |v_thr1Thread1of2ForFork0_#in~arg#1.base_4| 0) (= v_thr1Thread1of2ForFork0_thidvar1_2 0) (= v_thr1Thread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre3#1_11|) (= |v_thr1Thread1of2ForFork0_#in~arg#1.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_11|} OutVars{thr1Thread1of2ForFork0_#res#1.base=|v_thr1Thread1of2ForFork0_#res#1.base_4|, thr1Thread1of2ForFork0___VERIFIER_assert_~cond#1=|v_thr1Thread1of2ForFork0___VERIFIER_assert_~cond#1_10|, thr1Thread1of2ForFork0_~arg#1.base=|v_thr1Thread1of2ForFork0_~arg#1.base_4|, thr1Thread1of2ForFork0_thidvar1=v_thr1Thread1of2ForFork0_thidvar1_2, thr1Thread1of2ForFork0_~arg#1.offset=|v_thr1Thread1of2ForFork0_~arg#1.offset_4|, thr1Thread1of2ForFork0_thidvar0=v_thr1Thread1of2ForFork0_thidvar0_2, thr1Thread1of2ForFork0_#in~arg#1.base=|v_thr1Thread1of2ForFork0_#in~arg#1.base_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_11|, thr1Thread1of2ForFork0_#res#1.offset=|v_thr1Thread1of2ForFork0_#res#1.offset_4|, thr1Thread1of2ForFork0___VERIFIER_assert_#in~cond#1=|v_thr1Thread1of2ForFork0___VERIFIER_assert_#in~cond#1_6|, thr1Thread1of2ForFork0_#in~arg#1.offset=|v_thr1Thread1of2ForFork0_#in~arg#1.offset_4|} AuxVars[] AssignedVars[thr1Thread1of2ForFork0_#res#1.base, thr1Thread1of2ForFork0___VERIFIER_assert_~cond#1, thr1Thread1of2ForFork0_~arg#1.base, thr1Thread1of2ForFork0_thidvar1, thr1Thread1of2ForFork0_~arg#1.offset, thr1Thread1of2ForFork0_thidvar0, thr1Thread1of2ForFork0_#in~arg#1.base, thr1Thread1of2ForFork0_#res#1.offset, thr1Thread1of2ForFork0___VERIFIER_assert_#in~cond#1, thr1Thread1of2ForFork0_#in~arg#1.offset] 146#[thr1ENTRY, L712-4]don't care [205] L712-4-->L712-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 150#[thr1ENTRY, L712-5]don't care [218] L712-5-->L713: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 156#[L713, thr1ENTRY]don't care [202] L713-->L713-6: Formula: (= |v_ULTIMATE.start_main_~i~0#1_5| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 164#[L713-6, thr1ENTRY]don't care [230] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 176#[thr1ENTRY, L714]don't care [181] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 192#[thr1ENTRY, L714-1]don't care [194] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 214#[thr1ENTRY, L714-2]don't care [190] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 242#[L714-3, thr1ENTRY]don't care [278] L714-3-->thr2ENTRY: Formula: (and (= |v_thr2Thread1of2ForFork1_#in~arg.base_4| 0) (= v_thr2Thread1of2ForFork1_thidvar1_2 0) (= v_thr2Thread1of2ForFork1_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_12| v_thr2Thread1of2ForFork1_thidvar0_2) (= |v_thr2Thread1of2ForFork1_#in~arg.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_12|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_12|, thr2Thread1of2ForFork1_thidvar2=v_thr2Thread1of2ForFork1_thidvar2_2, thr2Thread1of2ForFork1_thidvar1=v_thr2Thread1of2ForFork1_thidvar1_2, thr2Thread1of2ForFork1_~arg.base=v_thr2Thread1of2ForFork1_~arg.base_4, thr2Thread1of2ForFork1_~arg.offset=v_thr2Thread1of2ForFork1_~arg.offset_4, thr2Thread1of2ForFork1_#res.offset=|v_thr2Thread1of2ForFork1_#res.offset_4|, thr2Thread1of2ForFork1_thidvar0=v_thr2Thread1of2ForFork1_thidvar0_2, thr2Thread1of2ForFork1_#in~arg.base=|v_thr2Thread1of2ForFork1_#in~arg.base_4|, thr2Thread1of2ForFork1_#res.base=|v_thr2Thread1of2ForFork1_#res.base_4|, thr2Thread1of2ForFork1_~t~0=v_thr2Thread1of2ForFork1_~t~0_8, thr2Thread1of2ForFork1_#in~arg.offset=|v_thr2Thread1of2ForFork1_#in~arg.offset_4|} AuxVars[] AssignedVars[thr2Thread1of2ForFork1_thidvar2, thr2Thread1of2ForFork1_thidvar1, thr2Thread1of2ForFork1_~arg.base, thr2Thread1of2ForFork1_~arg.offset, thr2Thread1of2ForFork1_#res.offset, thr2Thread1of2ForFork1_thidvar0, thr2Thread1of2ForFork1_#in~arg.base, thr2Thread1of2ForFork1_#res.base, thr2Thread1of2ForFork1_~t~0, thr2Thread1of2ForFork1_#in~arg.offset] 274#[thr2ENTRY, L714-4, thr1ENTRY]don't care [203] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 312#[thr2ENTRY, L714-5, thr1ENTRY]don't care [199] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 358#[thr2ENTRY, thr1ENTRY, L713-3]don't care [201] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 414#[thr2ENTRY, L713-4, thr1ENTRY]don't care [195] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 480#[thr2ENTRY, L713-5, thr1ENTRY]don't care [226] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 556#[thr2ENTRY, L713-6, thr1ENTRY]don't care [230] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 644#[thr2ENTRY, L714, thr1ENTRY]don't care [181] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 748#[thr2ENTRY, L714-1, thr1ENTRY]don't care [194] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 872#[thr2ENTRY, L714-2, thr1ENTRY]don't care [190] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 1018#[thr2ENTRY, thr1ENTRY, L714-3]don't care [279] L714-3-->thr2ENTRY: Formula: (and (= v_thr2Thread2of2ForFork1_thidvar2_2 0) (= |v_thr2Thread2of2ForFork1_#in~arg.offset_4| 0) (= |v_thr2Thread2of2ForFork1_#in~arg.base_4| 0) (= |v_ULTIMATE.start_main_#t~pre6#1_14| v_thr2Thread2of2ForFork1_thidvar0_2) (= v_thr2Thread2of2ForFork1_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_14|} OutVars{thr2Thread2of2ForFork1_~t~0=v_thr2Thread2of2ForFork1_~t~0_8, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_14|, thr2Thread2of2ForFork1_~arg.base=v_thr2Thread2of2ForFork1_~arg.base_4, thr2Thread2of2ForFork1_#in~arg.base=|v_thr2Thread2of2ForFork1_#in~arg.base_4|, thr2Thread2of2ForFork1_#res.base=|v_thr2Thread2of2ForFork1_#res.base_4|, thr2Thread2of2ForFork1_~arg.offset=v_thr2Thread2of2ForFork1_~arg.offset_4, thr2Thread2of2ForFork1_#res.offset=|v_thr2Thread2of2ForFork1_#res.offset_4|, thr2Thread2of2ForFork1_thidvar2=v_thr2Thread2of2ForFork1_thidvar2_2, thr2Thread2of2ForFork1_thidvar1=v_thr2Thread2of2ForFork1_thidvar1_2, thr2Thread2of2ForFork1_thidvar0=v_thr2Thread2of2ForFork1_thidvar0_2, thr2Thread2of2ForFork1_#in~arg.offset=|v_thr2Thread2of2ForFork1_#in~arg.offset_4|} AuxVars[] AssignedVars[thr2Thread2of2ForFork1_~t~0, thr2Thread2of2ForFork1_~arg.base, thr2Thread2of2ForFork1_#in~arg.base, thr2Thread2of2ForFork1_#res.base, thr2Thread2of2ForFork1_~arg.offset, thr2Thread2of2ForFork1_#res.offset, thr2Thread2of2ForFork1_thidvar2, thr2Thread2of2ForFork1_thidvar1, thr2Thread2of2ForFork1_thidvar0, thr2Thread2of2ForFork1_#in~arg.offset] 1188#[thr2ENTRY, L714-4, thr2ENTRY, thr1ENTRY]don't care [203] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 1380#[L714-5, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [199] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 1602#[thr2ENTRY, L713-3, thr2ENTRY, thr1ENTRY]don't care [201] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 1860#[thr2ENTRY, thr2ENTRY, thr1ENTRY, L713-4]don't care [195] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 2158#[thr2ENTRY, L713-5, thr2ENTRY, thr1ENTRY]don't care [226] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 2504#[L713-6, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [230] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 2906#[thr2ENTRY, thr2ENTRY, L714, thr1ENTRY]don't care [181] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 3380#[thr2ENTRY, thr2ENTRY, L714-1, thr1ENTRY]don't care [194] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 3940#[L714-2, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [190] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 4602#[thr2ENTRY, L714-3, thr2ENTRY, thr1ENTRY]don't care [276] L714-3-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 5378#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr1ENTRY]don't care [2022-07-26 13:22:24,003 INFO L735 eck$LassoCheckResult]: Loop: 5378#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr1ENTRY]don't care [277] ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 5378#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr1ENTRY]don't care [2022-07-26 13:22:24,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:24,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1011549841, now seen corresponding path program 1 times [2022-07-26 13:22:24,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:24,011 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [987373231] [2022-07-26 13:22:24,011 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:24,011 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:24,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,058 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:24,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,089 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:24,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:24,090 INFO L85 PathProgramCache]: Analyzing trace with hash 308, now seen corresponding path program 1 times [2022-07-26 13:22:24,090 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:24,091 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016062354] [2022-07-26 13:22:24,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:24,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:24,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,097 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:24,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,101 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:24,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:24,101 INFO L85 PathProgramCache]: Analyzing trace with hash -1293273722, now seen corresponding path program 1 times [2022-07-26 13:22:24,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:24,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [946318510] [2022-07-26 13:22:24,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:24,102 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:24,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,128 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:24,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:24,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:25,517 WARN L146 chiAutomizerObserver]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:22:25,545 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-07-26 13:22:25,552 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 117 places, 109 transitions, 260 flow [2022-07-26 13:22:25,578 INFO L129 PetriNetUnfolder]: 6/133 cut-off events. [2022-07-26 13:22:25,578 INFO L130 PetriNetUnfolder]: For 7/7 co-relation queries the response was YES. [2022-07-26 13:22:25,589 INFO L84 FinitePrefix]: Finished finitePrefix Result has 154 conditions, 133 events. 6/133 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 184 event pairs, 0 based on Foata normal form. 0/124 useless extension candidates. Maximal degree in co-relation 147. Up to 8 conditions per place. [2022-07-26 13:22:25,590 INFO L82 GeneralOperation]: Start removeDead. Operand has 117 places, 109 transitions, 260 flow [2022-07-26 13:22:25,595 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 88 places, 81 transitions, 186 flow [2022-07-26 13:22:25,596 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:25,596 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:25,596 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:25,596 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:25,596 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:25,596 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:25,596 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:25,596 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:25,597 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:32,327 INFO L131 ngComponentsAnalysis]: Automaton has 4116 accepting balls. 4116 [2022-07-26 13:22:32,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:32,327 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:32,329 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:32,329 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:32,329 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:32,329 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 95315 states, but on-demand construction may add more states [2022-07-26 13:22:34,269 INFO L131 ngComponentsAnalysis]: Automaton has 4116 accepting balls. 4116 [2022-07-26 13:22:34,269 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:34,269 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:34,272 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:34,272 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:34,273 INFO L733 eck$LassoCheckResult]: Stem: 120#[ULTIMATE.startENTRY]don't care [329] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 123#[L-1]don't care [317] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 125#[L-1-1]don't care [336] L-1-1-->L-1-2: Formula: (= (select |v_#valid_5| 0) 0) InVars {#valid=|v_#valid_5|} OutVars{#valid=|v_#valid_5|} AuxVars[] AssignedVars[] 127#[L-1-2]don't care [340] L-1-2-->L683: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 129#[L683]don't care [292] L683-->L683-1: Formula: (and (= (select |v_#valid_6| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[] 131#[L683-1]don't care [326] L683-1-->L683-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 133#[L683-2]don't care [316] L683-2-->L683-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 135#[L683-3]don't care [333] L683-3-->L683-4: Formula: (and (= (select |v_#valid_7| 2) 1) (= 9 (select |v_#length_2| 2))) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 137#[L683-4]don't care [284] L683-4-->L-1-3: Formula: (= v_~x~0_4 0) InVars {} OutVars{~x~0=v_~x~0_4} AuxVars[] AssignedVars[~x~0] 139#[L-1-3]don't care [341] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 141#[L-1-4]don't care [321] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 143#[L-1-5]don't care [298] L-1-5-->L-1-6: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 145#[L-1-6]don't care [319] L-1-6-->L-1-7: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 147#[L-1-7]don't care [294] L-1-7-->L708: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_3|, ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_4|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_2|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_#t~post5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 149#[L708]don't care [291] L708-->L708-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 151#[L708-1]don't care [305] L708-1-->L709: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 153#[L709]don't care [323] L709-->L709-1: Formula: (and (= |v_#valid_8| (store |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= 0 (select |v_#valid_9| |v_ULTIMATE.start_main_~#t1~0#1.base_4|)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_9|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 155#[L709-1]don't care [331] L709-1-->L709-2: Formula: (and (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_4| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_4|) (= |v_#valid_10| (store |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 1)) (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_4| 4) |v_#length_5|) (= (select |v_#valid_11| |v_ULTIMATE.start_main_~#t2~0#1.base_4|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_11|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|, #valid=|v_#valid_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 157#[L709-2]don't care [286] L709-2-->L711: Formula: true InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 159#[L711]don't care [318] L711-->L712: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 161#[L712]don't care [343] L712-->L712-1: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 163#[L712-1]don't care [287] L712-1-->L712-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 165#[L712-2]don't care [334] L712-2-->L712-3: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_3|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_12|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_12|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 167#[L712-3]don't care [401] L712-3-->thr1ENTRY: Formula: (and (= |v_thr1Thread1of3ForFork0_#in~arg#1.base_4| 0) (= |v_thr1Thread1of3ForFork0_#in~arg#1.offset_4| 0) (= v_thr1Thread1of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre3#1_18|) (= v_thr1Thread1of3ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_18|} OutVars{thr1Thread1of3ForFork0_#in~arg#1.offset=|v_thr1Thread1of3ForFork0_#in~arg#1.offset_4|, thr1Thread1of3ForFork0_~arg#1.base=|v_thr1Thread1of3ForFork0_~arg#1.base_4|, thr1Thread1of3ForFork0_#res#1.base=|v_thr1Thread1of3ForFork0_#res#1.base_4|, thr1Thread1of3ForFork0___VERIFIER_assert_#in~cond#1=|v_thr1Thread1of3ForFork0___VERIFIER_assert_#in~cond#1_6|, thr1Thread1of3ForFork0_#in~arg#1.base=|v_thr1Thread1of3ForFork0_#in~arg#1.base_4|, thr1Thread1of3ForFork0_#res#1.offset=|v_thr1Thread1of3ForFork0_#res#1.offset_4|, thr1Thread1of3ForFork0___VERIFIER_assert_~cond#1=|v_thr1Thread1of3ForFork0___VERIFIER_assert_~cond#1_10|, thr1Thread1of3ForFork0_~arg#1.offset=|v_thr1Thread1of3ForFork0_~arg#1.offset_4|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_18|, thr1Thread1of3ForFork0_thidvar1=v_thr1Thread1of3ForFork0_thidvar1_2, thr1Thread1of3ForFork0_thidvar0=v_thr1Thread1of3ForFork0_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of3ForFork0_#in~arg#1.offset, thr1Thread1of3ForFork0_~arg#1.base, thr1Thread1of3ForFork0_#res#1.base, thr1Thread1of3ForFork0___VERIFIER_assert_#in~cond#1, thr1Thread1of3ForFork0_#in~arg#1.base, thr1Thread1of3ForFork0_#res#1.offset, thr1Thread1of3ForFork0___VERIFIER_assert_~cond#1, thr1Thread1of3ForFork0_~arg#1.offset, thr1Thread1of3ForFork0_thidvar1, thr1Thread1of3ForFork0_thidvar0] 169#[thr1ENTRY, L712-4]don't care [314] L712-4-->L712-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 173#[L712-5, thr1ENTRY]don't care [327] L712-5-->L713: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 179#[L713, thr1ENTRY]don't care [311] L713-->L713-6: Formula: (= |v_ULTIMATE.start_main_~i~0#1_5| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 187#[L713-6, thr1ENTRY]don't care [339] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 199#[thr1ENTRY, L714]don't care [290] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 215#[L714-1, thr1ENTRY]don't care [303] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 237#[L714-2, thr1ENTRY]don't care [299] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 265#[L714-3, thr1ENTRY]don't care [406] L714-3-->thr2ENTRY: Formula: (and (= |v_ULTIMATE.start_main_#t~pre6#1_22| v_thr2Thread1of3ForFork1_thidvar0_2) (= |v_thr2Thread1of3ForFork1_#in~arg.base_4| 0) (= v_thr2Thread1of3ForFork1_thidvar2_2 0) (= v_thr2Thread1of3ForFork1_thidvar1_2 0) (= |v_thr2Thread1of3ForFork1_#in~arg.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_22|} OutVars{thr2Thread1of3ForFork1_#in~arg.offset=|v_thr2Thread1of3ForFork1_#in~arg.offset_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_22|, thr2Thread1of3ForFork1_thidvar1=v_thr2Thread1of3ForFork1_thidvar1_2, thr2Thread1of3ForFork1_thidvar0=v_thr2Thread1of3ForFork1_thidvar0_2, thr2Thread1of3ForFork1_#res.offset=|v_thr2Thread1of3ForFork1_#res.offset_4|, thr2Thread1of3ForFork1_#in~arg.base=|v_thr2Thread1of3ForFork1_#in~arg.base_4|, thr2Thread1of3ForFork1_thidvar2=v_thr2Thread1of3ForFork1_thidvar2_2, thr2Thread1of3ForFork1_~arg.base=v_thr2Thread1of3ForFork1_~arg.base_4, thr2Thread1of3ForFork1_#res.base=|v_thr2Thread1of3ForFork1_#res.base_4|, thr2Thread1of3ForFork1_~t~0=v_thr2Thread1of3ForFork1_~t~0_8, thr2Thread1of3ForFork1_~arg.offset=v_thr2Thread1of3ForFork1_~arg.offset_4} AuxVars[] AssignedVars[thr2Thread1of3ForFork1_#in~arg.offset, thr2Thread1of3ForFork1_thidvar1, thr2Thread1of3ForFork1_thidvar0, thr2Thread1of3ForFork1_#res.offset, thr2Thread1of3ForFork1_#in~arg.base, thr2Thread1of3ForFork1_thidvar2, thr2Thread1of3ForFork1_~arg.base, thr2Thread1of3ForFork1_#res.base, thr2Thread1of3ForFork1_~t~0, thr2Thread1of3ForFork1_~arg.offset] 297#[L714-4, thr1ENTRY, thr2ENTRY]don't care [312] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 333#[thr1ENTRY, thr2ENTRY, L714-5]don't care [308] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 377#[L713-3, thr1ENTRY, thr2ENTRY]don't care [310] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 431#[thr1ENTRY, thr2ENTRY, L713-4]don't care [304] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 495#[L713-5, thr1ENTRY, thr2ENTRY]don't care [335] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 571#[thr1ENTRY, thr2ENTRY, L713-6]don't care [339] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 659#[L714, thr1ENTRY, thr2ENTRY]don't care [290] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 765#[L714-1, thr1ENTRY, thr2ENTRY]don't care [303] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 891#[L714-2, thr1ENTRY, thr2ENTRY]don't care [299] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 1039#[L714-3, thr1ENTRY, thr2ENTRY]don't care [407] L714-3-->thr2ENTRY: Formula: (and (= |v_ULTIMATE.start_main_#t~pre6#1_24| v_thr2Thread2of3ForFork1_thidvar0_2) (= |v_thr2Thread2of3ForFork1_#in~arg.base_4| 0) (= v_thr2Thread2of3ForFork1_thidvar2_2 0) (= v_thr2Thread2of3ForFork1_thidvar1_2 0) (= |v_thr2Thread2of3ForFork1_#in~arg.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_24|} OutVars{thr2Thread2of3ForFork1_#res.offset=|v_thr2Thread2of3ForFork1_#res.offset_4|, thr2Thread2of3ForFork1_~t~0=v_thr2Thread2of3ForFork1_~t~0_8, thr2Thread2of3ForFork1_~arg.base=v_thr2Thread2of3ForFork1_~arg.base_4, thr2Thread2of3ForFork1_#in~arg.offset=|v_thr2Thread2of3ForFork1_#in~arg.offset_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_24|, thr2Thread2of3ForFork1_thidvar2=v_thr2Thread2of3ForFork1_thidvar2_2, thr2Thread2of3ForFork1_#in~arg.base=|v_thr2Thread2of3ForFork1_#in~arg.base_4|, thr2Thread2of3ForFork1_thidvar1=v_thr2Thread2of3ForFork1_thidvar1_2, thr2Thread2of3ForFork1_thidvar0=v_thr2Thread2of3ForFork1_thidvar0_2, thr2Thread2of3ForFork1_#res.base=|v_thr2Thread2of3ForFork1_#res.base_4|, thr2Thread2of3ForFork1_~arg.offset=v_thr2Thread2of3ForFork1_~arg.offset_4} AuxVars[] AssignedVars[thr2Thread2of3ForFork1_#res.offset, thr2Thread2of3ForFork1_~t~0, thr2Thread2of3ForFork1_~arg.base, thr2Thread2of3ForFork1_#in~arg.offset, thr2Thread2of3ForFork1_thidvar2, thr2Thread2of3ForFork1_#in~arg.base, thr2Thread2of3ForFork1_thidvar1, thr2Thread2of3ForFork1_thidvar0, thr2Thread2of3ForFork1_#res.base, thr2Thread2of3ForFork1_~arg.offset] 1211#[thr2ENTRY, L714-4, thr1ENTRY, thr2ENTRY]don't care [312] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 1403#[thr2ENTRY, thr1ENTRY, thr2ENTRY, L714-5]don't care [308] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 1625#[thr2ENTRY, thr1ENTRY, thr2ENTRY, L713-3]don't care [310] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 1883#[thr2ENTRY, thr1ENTRY, thr2ENTRY, L713-4]don't care [304] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 2181#[L713-5, thr2ENTRY, thr1ENTRY, thr2ENTRY]don't care [335] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 2527#[L713-6, thr2ENTRY, thr1ENTRY, thr2ENTRY]don't care [339] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 2929#[thr2ENTRY, L714, thr1ENTRY, thr2ENTRY]don't care [290] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 3403#[thr2ENTRY, thr1ENTRY, thr2ENTRY, L714-1]don't care [303] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 3965#[thr2ENTRY, L714-2, thr1ENTRY, thr2ENTRY]don't care [299] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 4627#[thr2ENTRY, L714-3, thr1ENTRY, thr2ENTRY]don't care [408] L714-3-->thr2ENTRY: Formula: (and (= v_thr2Thread3of3ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_26| v_thr2Thread3of3ForFork1_thidvar0_2) (= v_thr2Thread3of3ForFork1_thidvar2_2 0) (= |v_thr2Thread3of3ForFork1_#in~arg.offset_4| 0) (= |v_thr2Thread3of3ForFork1_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_26|} OutVars{thr2Thread3of3ForFork1_#res.base=|v_thr2Thread3of3ForFork1_#res.base_4|, thr2Thread3of3ForFork1_~arg.offset=v_thr2Thread3of3ForFork1_~arg.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_26|, thr2Thread3of3ForFork1_#in~arg.base=|v_thr2Thread3of3ForFork1_#in~arg.base_4|, thr2Thread3of3ForFork1_#in~arg.offset=|v_thr2Thread3of3ForFork1_#in~arg.offset_4|, thr2Thread3of3ForFork1_#res.offset=|v_thr2Thread3of3ForFork1_#res.offset_4|, thr2Thread3of3ForFork1_~t~0=v_thr2Thread3of3ForFork1_~t~0_8, thr2Thread3of3ForFork1_thidvar2=v_thr2Thread3of3ForFork1_thidvar2_2, thr2Thread3of3ForFork1_~arg.base=v_thr2Thread3of3ForFork1_~arg.base_4, thr2Thread3of3ForFork1_thidvar1=v_thr2Thread3of3ForFork1_thidvar1_2, thr2Thread3of3ForFork1_thidvar0=v_thr2Thread3of3ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr2Thread3of3ForFork1_#res.base, thr2Thread3of3ForFork1_~arg.offset, thr2Thread3of3ForFork1_#in~arg.base, thr2Thread3of3ForFork1_#in~arg.offset, thr2Thread3of3ForFork1_#res.offset, thr2Thread3of3ForFork1_~t~0, thr2Thread3of3ForFork1_thidvar2, thr2Thread3of3ForFork1_~arg.base, thr2Thread3of3ForFork1_thidvar1, thr2Thread3of3ForFork1_thidvar0] 5403#[thr2ENTRY, thr2ENTRY, thr2ENTRY, thr1ENTRY, L714-4]don't care [312] L714-4-->L714-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 6307#[thr2ENTRY, L714-5, thr1ENTRY, thr2ENTRY, thr2ENTRY]don't care [308] L714-5-->L713-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet7#1] 7359#[thr2ENTRY, L713-3, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [310] L713-3-->L713-4: Formula: (= |v_ULTIMATE.start_main_#t~post5#1_1| |v_ULTIMATE.start_main_~i~0#1_1|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 8583#[thr2ENTRY, thr1ENTRY, thr2ENTRY, thr2ENTRY, L713-4]don't care [304] L713-4-->L713-5: Formula: (= (+ |v_ULTIMATE.start_main_#t~post5#1_2| 1) |v_ULTIMATE.start_main_~i~0#1_2|) InVars {ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 10001#[thr2ENTRY, L713-5, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [335] L713-5-->L713-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post5#1=|v_ULTIMATE.start_main_#t~post5#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post5#1] 11643#[thr2ENTRY, L713-6, thr1ENTRY, thr2ENTRY, thr2ENTRY]don't care [339] L713-6-->L714: Formula: (< |v_ULTIMATE.start_main_~i~0#1_7| 50) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[] 13543#[thr2ENTRY, thr2ENTRY, thr2ENTRY, thr1ENTRY, L714]don't care [290] L714-->L714-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_3| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 15747#[thr2ENTRY, thr1ENTRY, thr2ENTRY, thr2ENTRY, L714-1]don't care [303] L714-1-->L714-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 18317#[thr2ENTRY, thr2ENTRY, thr2ENTRY, thr1ENTRY, L714-2]don't care [299] L714-2-->L714-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) |v_ULTIMATE.start_main_~#t2~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre6#1_4|)) |v_#memory_int_5|) (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~0#1.base_5|))) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_4|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|} AuxVars[] AssignedVars[#memory_int] 21323#[thr2ENTRY, thr1ENTRY, thr2ENTRY, thr2ENTRY, L714-3]don't care [404] L714-3-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 24843#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [2022-07-26 13:22:34,274 INFO L735 eck$LassoCheckResult]: Loop: 24843#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [405] ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 24843#[thr2ENTRY, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, thr2ENTRY, thr2ENTRY, thr1ENTRY]don't care [2022-07-26 13:22:34,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:34,275 INFO L85 PathProgramCache]: Analyzing trace with hash -275780306, now seen corresponding path program 1 times [2022-07-26 13:22:34,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:34,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [911949118] [2022-07-26 13:22:34,275 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:34,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:34,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,319 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:34,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,360 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:34,361 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:34,361 INFO L85 PathProgramCache]: Analyzing trace with hash 436, now seen corresponding path program 1 times [2022-07-26 13:22:34,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:34,361 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [200324014] [2022-07-26 13:22:34,362 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:34,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:34,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,367 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:34,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,379 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:34,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:34,380 INFO L85 PathProgramCache]: Analyzing trace with hash 40745511, now seen corresponding path program 1 times [2022-07-26 13:22:34,381 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:34,381 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1196320071] [2022-07-26 13:22:34,381 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:34,381 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:34,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,431 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:34,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:34,471 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:36,354 WARN L146 chiAutomizerObserver]: 3 thread instances were not sufficient, I will increase this number and restart the analysis [2022-07-26 13:22:36,390 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2022-07-26 13:22:36,398 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 140 places, 129 transitions, 322 flow [2022-07-26 13:22:36,431 INFO L129 PetriNetUnfolder]: 7/159 cut-off events. [2022-07-26 13:22:36,431 INFO L130 PetriNetUnfolder]: For 16/16 co-relation queries the response was YES. [2022-07-26 13:22:36,434 INFO L84 FinitePrefix]: Finished finitePrefix Result has 188 conditions, 159 events. 7/159 cut-off events. For 16/16 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 226 event pairs, 0 based on Foata normal form. 0/148 useless extension candidates. Maximal degree in co-relation 179. Up to 10 conditions per place. [2022-07-26 13:22:36,434 INFO L82 GeneralOperation]: Start removeDead. Operand has 140 places, 129 transitions, 322 flow [2022-07-26 13:22:36,440 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 97 places, 88 transitions, 211 flow [2022-07-26 13:22:36,441 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:36,441 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:36,441 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:36,441 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:36,442 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:36,442 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:36,442 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:36,442 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:36,442 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:23:45,350 INFO L131 ngComponentsAnalysis]: Automaton has 28812 accepting balls. 28812 [2022-07-26 13:23:45,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:23:45,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:23:45,365 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:23:45,365 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:23:45,365 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:23:45,365 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 667439 states, but on-demand construction may add more states