/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/peterson-b.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:22:10,758 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:22:10,797 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:22:10,836 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:22:10,878 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:22:10,903 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:22:10,904 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:22:10,904 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:22:10,904 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:22:10,905 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:22:10,905 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:22:10,905 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:22:10,905 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:22:10,905 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:22:10,906 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:22:10,906 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:22:10,906 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:22:10,907 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:22:10,907 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:22:10,908 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:22:10,909 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:22:10,909 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:22:10,910 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:22:10,910 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:22:10,910 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:22:10,910 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:22:10,911 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:22:10,911 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:22:11,117 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:22:11,131 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:22:11,133 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:22:11,134 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:22:11,139 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:22:11,140 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/peterson-b.i [2022-07-26 13:22:11,204 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bccb5ed61/bea256c9056f4743907c51bec26fbcd7/FLAGda1126549 [2022-07-26 13:22:11,594 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:22:11,595 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson-b.i [2022-07-26 13:22:11,604 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bccb5ed61/bea256c9056f4743907c51bec26fbcd7/FLAGda1126549 [2022-07-26 13:22:11,942 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/bccb5ed61/bea256c9056f4743907c51bec26fbcd7 [2022-07-26 13:22:11,945 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:22:11,946 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:22:11,951 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:11,952 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:22:11,954 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:22:11,955 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,956 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a2e50dd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:11, skipping insertion in model container [2022-07-26 13:22:11,956 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,962 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:22:12,004 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:22:12,317 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson-b.i[30010,30023] [2022-07-26 13:22:12,319 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson-b.i[30174,30187] [2022-07-26 13:22:12,326 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,333 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:22:12,366 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson-b.i[30010,30023] [2022-07-26 13:22:12,368 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson-b.i[30174,30187] [2022-07-26 13:22:12,370 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,400 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:22:12,400 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12 WrapperNode [2022-07-26 13:22:12,400 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:12,401 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,401 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:22:12,401 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:22:12,408 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,421 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,436 INFO L137 Inliner]: procedures = 167, calls = 18, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 43 [2022-07-26 13:22:12,437 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,437 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,437 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:22:12,437 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:22:12,446 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,447 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,465 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,465 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,470 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,473 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,474 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,476 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,477 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:22:12,477 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:22:12,477 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:22:12,491 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,497 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:22:12,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:22:12,520 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:22:12,541 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:22:12,563 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:22:12,563 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-26 13:22:12,563 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-26 13:22:12,564 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:22:12,564 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:22:12,564 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:22:12,566 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:22:12,646 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:22:12,647 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:22:12,760 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:22:12,766 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:22:12,766 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-26 13:22:12,768 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12 BoogieIcfgContainer [2022-07-26 13:22:12,768 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:22:12,769 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:22:12,769 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:22:12,772 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:22:12,773 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,773 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:22:11" (1/3) ... [2022-07-26 13:22:12,774 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3c34078d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,774 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,774 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (2/3) ... [2022-07-26 13:22:12,774 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3c34078d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,774 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,774 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12" (3/3) ... [2022-07-26 13:22:12,775 INFO L322 chiAutomizerObserver]: Analyzing ICFG peterson-b.i [2022-07-26 13:22:12,845 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-26 13:22:12,906 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 75 places, 76 transitions, 168 flow [2022-07-26 13:22:12,949 INFO L129 PetriNetUnfolder]: 6/72 cut-off events. [2022-07-26 13:22:12,950 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-26 13:22:12,953 INFO L84 FinitePrefix]: Finished finitePrefix Result has 81 conditions, 72 events. 6/72 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 55 event pairs, 0 based on Foata normal form. 0/66 useless extension candidates. Maximal degree in co-relation 43. Up to 2 conditions per place. [2022-07-26 13:22:12,953 INFO L82 GeneralOperation]: Start removeDead. Operand has 75 places, 76 transitions, 168 flow [2022-07-26 13:22:12,957 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 73 places, 72 transitions, 156 flow [2022-07-26 13:22:12,966 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:12,966 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:12,967 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:12,967 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:12,967 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:12,967 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:12,967 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:12,967 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:12,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:13,140 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 101 [2022-07-26 13:22:13,141 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,141 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,146 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,146 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:13,146 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:13,146 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 715 states, but on-demand construction may add more states [2022-07-26 13:22:13,168 INFO L131 ngComponentsAnalysis]: Automaton has 101 accepting balls. 101 [2022-07-26 13:22:13,168 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,168 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,169 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,169 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:13,175 INFO L733 eck$LassoCheckResult]: Stem: 78#[ULTIMATE.startENTRY]don't care [160] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 81#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 83#[L-1-1]don't care [167] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 85#[L-1-2]don't care [168] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 87#[L12]don't care [124] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 89#[L12-1]don't care [143] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 91#[L12-2]don't care [141] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 93#[L12-3]don't care [161] L12-3-->L12-4: Formula: (and (= (select |v_#valid_15| 2) 1) (= (select |v_#length_10| 2) 11)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 95#[L12-4]don't care [156] L12-4-->L684: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 97#[L684]don't care [106] L684-->L685: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 99#[L685]don't care [123] L685-->L686: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 101#[L686]don't care [172] L686-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 103#[L-1-3]don't care [169] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 105#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 107#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 109#[L-1-6]don't care [154] L-1-6-->L706: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 111#[L706]don't care [153] L706-->L706-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 113#[L706-1]don't care [147] L706-1-->L706-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 115#[L706-2]don't care [138] L706-2-->L707: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 117#[L707]don't care [113] L707-->L707-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 119#[L707-1]don't care [102] L707-1-->L707-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_1|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 121#[L707-2]don't care [207] L707-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 123#[L707-3, thr1ENTRY]don't care [188] thr1ENTRY-->L688: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 127#[L688, L707-3]don't care [189] L688-->L689: Formula: (= v_~flag1~0_4 1) InVars {} OutVars{~flag1~0=v_~flag1~0_4} AuxVars[] AssignedVars[~flag1~0] 133#[L689, L707-3]don't care [190] L689-->L690-2: Formula: (= v_~turn~0_6 1) InVars {} OutVars{~turn~0=v_~turn~0_6} AuxVars[] AssignedVars[~turn~0] 141#[L690-2, L707-3]don't care [2022-07-26 13:22:13,175 INFO L735 eck$LassoCheckResult]: Loop: 141#[L690-2, L707-3]don't care [193] L690-2-->L690-2: Formula: (and (= v_~flag2~0_4 1) (= v_~turn~0_5 1)) InVars {~turn~0=v_~turn~0_5, ~flag2~0=v_~flag2~0_4} OutVars{~turn~0=v_~turn~0_5, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[] 141#[L690-2, L707-3]don't care [2022-07-26 13:22:13,179 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,180 INFO L85 PathProgramCache]: Analyzing trace with hash 1926595205, now seen corresponding path program 1 times [2022-07-26 13:22:13,188 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,188 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455287566] [2022-07-26 13:22:13,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,321 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,366 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,369 INFO L85 PathProgramCache]: Analyzing trace with hash 224, now seen corresponding path program 1 times [2022-07-26 13:22:13,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,370 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224687501] [2022-07-26 13:22:13,370 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,385 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,389 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,391 INFO L85 PathProgramCache]: Analyzing trace with hash -405090596, now seen corresponding path program 1 times [2022-07-26 13:22:13,391 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,392 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077823207] [2022-07-26 13:22:13,392 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:13,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:13,526 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:13,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1077823207] [2022-07-26 13:22:13,527 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1077823207] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:13,527 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:13,527 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-26 13:22:13,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [695392720] [2022-07-26 13:22:13,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:13,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:13,596 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-26 13:22:13,597 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-26 13:22:13,600 INFO L87 Difference]: Start difference. First operand currently 715 states, but on-demand construction may add more states Second operand has 3 states, 2 states have (on average 13.0) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:13,651 INFO L93 Difference]: Finished difference Result 615 states and 1535 transitions. [2022-07-26 13:22:13,653 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 615 states and 1535 transitions. [2022-07-26 13:22:13,661 INFO L131 ngComponentsAnalysis]: Automaton has 67 accepting balls. 67 [2022-07-26 13:22:13,678 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 615 states to 340 states and 824 transitions. [2022-07-26 13:22:13,680 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 340 [2022-07-26 13:22:13,683 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 340 [2022-07-26 13:22:13,684 INFO L73 IsDeterministic]: Start isDeterministic. Operand 340 states and 824 transitions. [2022-07-26 13:22:13,693 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:13,694 INFO L220 hiAutomatonCegarLoop]: Abstraction has 340 states and 824 transitions. [2022-07-26 13:22:13,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states and 824 transitions. [2022-07-26 13:22:13,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 340. [2022-07-26 13:22:13,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 340 states, 340 states have (on average 2.4235294117647057) internal successors, (824), 339 states have internal predecessors, (824), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 824 transitions. [2022-07-26 13:22:13,754 INFO L242 hiAutomatonCegarLoop]: Abstraction has 340 states and 824 transitions. [2022-07-26 13:22:13,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-26 13:22:13,760 INFO L426 stractBuchiCegarLoop]: Abstraction has 340 states and 824 transitions. [2022-07-26 13:22:13,760 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-26 13:22:13,760 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 340 states and 824 transitions. [2022-07-26 13:22:13,763 INFO L131 ngComponentsAnalysis]: Automaton has 67 accepting balls. 67 [2022-07-26 13:22:13,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,764 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,764 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:13,765 INFO L733 eck$LassoCheckResult]: Stem: 2810#[ULTIMATE.startENTRY]don't care [160] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2762#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 2764#[L-1-1]don't care [167] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 2812#[L-1-2]don't care [168] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 2584#[L12]don't care [124] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 2586#[L12-1]don't care [143] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 2650#[L12-2]don't care [141] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 2652#[L12-3]don't care [161] L12-3-->L12-4: Formula: (and (= (select |v_#valid_15| 2) 1) (= (select |v_#length_10| 2) 11)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 2662#[L12-4]don't care [156] L12-4-->L684: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 2664#[L684]don't care [106] L684-->L685: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 2570#[L685]don't care [123] L685-->L686: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 2572#[L686]don't care [172] L686-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 2790#[L-1-3]don't care [169] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2382#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2384#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 2732#[L-1-6]don't care [154] L-1-6-->L706: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 2808#[L706]don't care [153] L706-->L706-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 2758#[L706-1]don't care [147] L706-1-->L706-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 2760#[L706-2]don't care [138] L706-2-->L707: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 2794#[L707]don't care [113] L707-->L707-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 2502#[L707-1]don't care [102] L707-1-->L707-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_1|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 2504#[L707-2]don't care [207] L707-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 2660#[L707-3, thr1ENTRY]don't care [162] L707-3-->L707-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 2708#[L707-4, thr1ENTRY]don't care [144] L707-4-->L708: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 2724#[L708, thr1ENTRY]don't care [114] L708-->L708-1: Formula: (= |v_ULTIMATE.start_main_#t~pre5#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, #pthreadsForks=|v_#pthreadsForks_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1] 2646#[L708-1, thr1ENTRY]don't care [134] L708-1-->L708-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 2648#[L708-2, thr1ENTRY]don't care [163] L708-2-->L708-3: Formula: (and (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre5#1_3|)) |v_#memory_int_3|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 2730#[L708-3, thr1ENTRY]don't care [204] L708-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre5#1_6| v_thr2Thread1of1ForFork0_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 2740#[thr1ENTRY, L708-4, thr2ENTRY]don't care [174] thr2ENTRY-->L697: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 2550#[thr1ENTRY, L697, L708-4]don't care [175] L697-->L698: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 2476#[thr1ENTRY, L708-4, L698]don't care [176] L698-->L699-2: Formula: (= v_~turn~0_1 0) InVars {} OutVars{~turn~0=v_~turn~0_1} AuxVars[] AssignedVars[~turn~0] 2478#[thr1ENTRY, L708-4, L699-2]don't care [2022-07-26 13:22:13,766 INFO L735 eck$LassoCheckResult]: Loop: 2478#[thr1ENTRY, L708-4, L699-2]don't care [179] L699-2-->L699-2: Formula: (and (= v_~turn~0_3 0) (= v_~flag1~0_2 1)) InVars {~turn~0=v_~turn~0_3, ~flag1~0=v_~flag1~0_2} OutVars{~turn~0=v_~turn~0_3, ~flag1~0=v_~flag1~0_2} AuxVars[] AssignedVars[] 2478#[thr1ENTRY, L708-4, L699-2]don't care [2022-07-26 13:22:13,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,766 INFO L85 PathProgramCache]: Analyzing trace with hash -1930902708, now seen corresponding path program 1 times [2022-07-26 13:22:13,767 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,767 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713548422] [2022-07-26 13:22:13,767 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,767 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,804 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,827 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,828 INFO L85 PathProgramCache]: Analyzing trace with hash 210, now seen corresponding path program 1 times [2022-07-26 13:22:13,828 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,828 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235343359] [2022-07-26 13:22:13,828 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,837 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,840 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,841 INFO L85 PathProgramCache]: Analyzing trace with hash 271558375, now seen corresponding path program 1 times [2022-07-26 13:22:13,841 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,841 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102951215] [2022-07-26 13:22:13,841 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:13,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:13,904 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:13,904 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2102951215] [2022-07-26 13:22:13,904 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2102951215] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:13,904 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:13,904 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-07-26 13:22:13,904 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571719119] [2022-07-26 13:22:13,905 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:13,916 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:13,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-07-26 13:22:13,917 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-07-26 13:22:13,917 INFO L87 Difference]: Start difference. First operand 340 states and 824 transitions. cyclomatic complexity: 551 Second operand has 3 states, 2 states have (on average 16.0) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:13,940 INFO L93 Difference]: Finished difference Result 340 states and 801 transitions. [2022-07-26 13:22:13,940 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 340 states and 801 transitions. [2022-07-26 13:22:13,943 INFO L131 ngComponentsAnalysis]: Automaton has 44 accepting balls. 44 [2022-07-26 13:22:13,946 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 340 states to 262 states and 624 transitions. [2022-07-26 13:22:13,947 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 262 [2022-07-26 13:22:13,947 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 262 [2022-07-26 13:22:13,947 INFO L73 IsDeterministic]: Start isDeterministic. Operand 262 states and 624 transitions. [2022-07-26 13:22:13,951 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:13,951 INFO L220 hiAutomatonCegarLoop]: Abstraction has 262 states and 624 transitions. [2022-07-26 13:22:13,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states and 624 transitions. [2022-07-26 13:22:13,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 262. [2022-07-26 13:22:13,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 262 states, 262 states have (on average 2.381679389312977) internal successors, (624), 261 states have internal predecessors, (624), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 624 transitions. [2022-07-26 13:22:13,976 INFO L242 hiAutomatonCegarLoop]: Abstraction has 262 states and 624 transitions. [2022-07-26 13:22:13,979 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-07-26 13:22:13,979 INFO L426 stractBuchiCegarLoop]: Abstraction has 262 states and 624 transitions. [2022-07-26 13:22:13,979 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-26 13:22:13,980 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 262 states and 624 transitions. [2022-07-26 13:22:13,982 INFO L131 ngComponentsAnalysis]: Automaton has 44 accepting balls. 44 [2022-07-26 13:22:13,983 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,983 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,983 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,984 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2022-07-26 13:22:13,987 INFO L733 eck$LassoCheckResult]: Stem: 3682#[ULTIMATE.startENTRY]don't care [160] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3636#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 3638#[L-1-1]don't care [167] L-1-1-->L-1-2: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 3684#[L-1-2]don't care [168] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 3500#[L12]don't care [124] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 3502#[L12-1]don't care [143] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 3552#[L12-2]don't care [141] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 3554#[L12-3]don't care [161] L12-3-->L12-4: Formula: (and (= (select |v_#valid_15| 2) 1) (= (select |v_#length_10| 2) 11)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 3562#[L12-4]don't care [156] L12-4-->L684: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 3564#[L684]don't care [106] L684-->L685: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 3492#[L685]don't care [123] L685-->L686: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 3494#[L686]don't care [172] L686-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 3662#[L-1-3]don't care [169] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3352#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3354#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 3612#[L-1-6]don't care [154] L-1-6-->L706: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_1|, ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_1|, ULTIMATE.start_main_#t~mem7#1=|v_ULTIMATE.start_main_#t~mem7#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet6#1=|v_ULTIMATE.start_main_#t~nondet6#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1, ULTIMATE.start_main_#t~nondet4#1, ULTIMATE.start_main_#t~mem7#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet6#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_#t~pre3#1, ULTIMATE.start_main_~#t2~0#1.base] 3680#[L706]don't care [153] L706-->L706-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 3632#[L706-1]don't care [147] L706-1-->L706-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 3634#[L706-2]don't care [138] L706-2-->L707: Formula: (= |v_ULTIMATE.start_main_#t~pre3#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 3666#[L707]don't care [113] L707-->L707-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 3442#[L707-1]don't care [102] L707-1-->L707-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre3#1_3|)) |v_#memory_int_1|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_3|} AuxVars[] AssignedVars[#memory_int] 3444#[L707-2]don't care [207] L707-2-->thr1ENTRY: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre3#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_6|, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0] 3560#[L707-3, thr1ENTRY]don't care [162] L707-3-->L707-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre3#1=|v_ULTIMATE.start_main_#t~pre3#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre3#1] 3598#[L707-4, thr1ENTRY]don't care [144] L707-4-->L708: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet4#1=|v_ULTIMATE.start_main_#t~nondet4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet4#1] 3604#[L708, thr1ENTRY]don't care [114] L708-->L708-1: Formula: (= |v_ULTIMATE.start_main_#t~pre5#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_2|, #pthreadsForks=|v_#pthreadsForks_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre5#1] 3548#[L708-1, thr1ENTRY]don't care [134] L708-1-->L708-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 3550#[L708-2, thr1ENTRY]don't care [163] L708-2-->L708-3: Formula: (and (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre5#1_3|)) |v_#memory_int_3|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 3610#[L708-3, thr1ENTRY]don't care [204] L708-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre5#1_6| v_thr2Thread1of1ForFork0_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|} OutVars{ULTIMATE.start_main_#t~pre5#1=|v_ULTIMATE.start_main_#t~pre5#1_6|, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 3620#[thr1ENTRY, L708-4, thr2ENTRY]don't care [188] thr1ENTRY-->L688: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 3320#[L708-4, thr2ENTRY, L688]don't care [189] L688-->L689: Formula: (= v_~flag1~0_4 1) InVars {} OutVars{~flag1~0=v_~flag1~0_4} AuxVars[] AssignedVars[~flag1~0] 3172#[L708-4, L689, thr2ENTRY]don't care [190] L689-->L690-2: Formula: (= v_~turn~0_6 1) InVars {} OutVars{~turn~0=v_~turn~0_6} AuxVars[] AssignedVars[~turn~0] 3460#[L708-4, L690-2, thr2ENTRY]don't care [174] thr2ENTRY-->L697: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 3198#[L697, L708-4, L690-2]don't care [175] L697-->L698: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 3204#[L698, L708-4, L690-2]don't care [2022-07-26 13:22:13,987 INFO L735 eck$LassoCheckResult]: Loop: 3204#[L698, L708-4, L690-2]don't care [193] L690-2-->L690-2: Formula: (and (= v_~flag2~0_4 1) (= v_~turn~0_5 1)) InVars {~turn~0=v_~turn~0_5, ~flag2~0=v_~flag2~0_4} OutVars{~turn~0=v_~turn~0_5, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[] 3204#[L698, L708-4, L690-2]don't care [2022-07-26 13:22:13,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,988 INFO L85 PathProgramCache]: Analyzing trace with hash -158265125, now seen corresponding path program 1 times [2022-07-26 13:22:13,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1345743454] [2022-07-26 13:22:13,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,022 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,038 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,039 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,039 INFO L85 PathProgramCache]: Analyzing trace with hash 224, now seen corresponding path program 2 times [2022-07-26 13:22:14,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,039 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1148887285] [2022-07-26 13:22:14,039 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,043 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,046 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,046 INFO L85 PathProgramCache]: Analyzing trace with hash -611251386, now seen corresponding path program 1 times [2022-07-26 13:22:14,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,046 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563733963] [2022-07-26 13:22:14,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,091 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,105 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,938 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.07 01:22:14 BoogieIcfgContainer [2022-07-26 13:22:14,938 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-26 13:22:14,939 INFO L158 Benchmark]: Toolchain (without parser) took 2992.76ms. Allocated memory was 186.6MB in the beginning and 276.8MB in the end (delta: 90.2MB). Free memory was 128.4MB in the beginning and 183.5MB in the end (delta: -55.1MB). Peak memory consumption was 35.8MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,939 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 186.6MB. Free memory was 145.7MB in the beginning and 145.6MB in the end (delta: 129.4kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-26 13:22:14,940 INFO L158 Benchmark]: CACSL2BoogieTranslator took 449.03ms. Allocated memory was 186.6MB in the beginning and 276.8MB in the end (delta: 90.2MB). Free memory was 128.1MB in the beginning and 236.0MB in the end (delta: -107.9MB). Peak memory consumption was 10.1MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,940 INFO L158 Benchmark]: Boogie Procedure Inliner took 35.72ms. Allocated memory is still 276.8MB. Free memory was 236.0MB in the beginning and 234.4MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,941 INFO L158 Benchmark]: Boogie Preprocessor took 38.90ms. Allocated memory is still 276.8MB. Free memory was 234.4MB in the beginning and 232.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,941 INFO L158 Benchmark]: RCFGBuilder took 291.51ms. Allocated memory is still 276.8MB. Free memory was 232.9MB in the beginning and 220.3MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,942 INFO L158 Benchmark]: BuchiAutomizer took 2169.15ms. Allocated memory is still 276.8MB. Free memory was 220.3MB in the beginning and 183.5MB in the end (delta: 36.8MB). Peak memory consumption was 38.3MB. Max. memory is 8.0GB. [2022-07-26 13:22:14,944 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 186.6MB. Free memory was 145.7MB in the beginning and 145.6MB in the end (delta: 129.4kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 449.03ms. Allocated memory was 186.6MB in the beginning and 276.8MB in the end (delta: 90.2MB). Free memory was 128.1MB in the beginning and 236.0MB in the end (delta: -107.9MB). Peak memory consumption was 10.1MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 35.72ms. Allocated memory is still 276.8MB. Free memory was 236.0MB in the beginning and 234.4MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 38.90ms. Allocated memory is still 276.8MB. Free memory was 234.4MB in the beginning and 232.9MB in the end (delta: 1.5MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 291.51ms. Allocated memory is still 276.8MB. Free memory was 232.9MB in the beginning and 220.3MB in the end (delta: 12.6MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * BuchiAutomizer took 2169.15ms. Allocated memory is still 276.8MB. Free memory was 220.3MB in the beginning and 183.5MB in the end (delta: 36.8MB). Peak memory consumption was 38.3MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 2 terminating modules (2 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.2 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 262 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.0s and 3 iterations. TraceHistogramMax:1. Analysis of lassos took 1.4s. Construction of modules took 0.0s. Büchi inclusion checks took 0.2s. Highest rank in rank-based complementation 0. Minimization of det autom 2. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 2 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 45 SdHoareTripleChecker+Valid, 0.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 45 mSDsluCounter, 167 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 59 mSDsCounter, 2 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 17 IncrementalHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 2 mSolverCounterUnsat, 110 mSDtfsCounter, 17 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 690]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result={0:0}, \result=0, \result={0:0}, _={0:0}, _={0:0}, _={0:0}, _={0:0}, flag1=1, flag2=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@4636dc58 in0,45682, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6e40ff45 in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@1249e89f=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@2b78b238=0, t1={3:0}, t2={2292:0}, turn=1, x=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 690]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L684] 0 int flag1 = 0, flag2 = 0; [L685] 0 int turn; [L686] 0 int x; [L706] 0 pthread_t t1, t2; [L707] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L708] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L688] 1 flag1 = 1 [L689] 1 turn = 1 [L697] 2 flag2 = 1 Loop: [L690] COND TRUE flag2==1 && turn==1 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-26 13:22:14,991 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...