/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/peterson.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:22:10,646 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:22:10,648 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:22:10,688 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:22:10,725 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-26 13:22:10,725 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-26 13:22:10,731 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-26 13:22:10,731 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:22:10,764 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:22:10,765 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:22:10,765 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:22:10,765 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:22:10,766 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:22:10,766 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:22:10,766 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:22:10,766 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:22:10,766 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:22:10,767 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:22:10,767 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:22:10,767 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:22:10,768 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:22:10,768 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:22:10,769 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:22:10,770 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:22:10,770 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:22:10,771 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:22:10,771 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:22:10,771 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:22:10,771 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:22:10,772 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:22:10,772 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:22:10,994 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:22:11,012 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:22:11,014 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:22:11,015 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:22:11,015 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:22:11,016 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/peterson.i [2022-07-26 13:22:11,072 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/311c64add/4c9595fc7c4d477399f0cfd55586691a/FLAGa894d439f [2022-07-26 13:22:11,535 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:22:11,537 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i [2022-07-26 13:22:11,552 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/311c64add/4c9595fc7c4d477399f0cfd55586691a/FLAGa894d439f [2022-07-26 13:22:11,819 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/311c64add/4c9595fc7c4d477399f0cfd55586691a [2022-07-26 13:22:11,821 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:22:11,823 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:22:11,825 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:11,825 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:22:11,828 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:22:11,828 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,829 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7360008a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:11, skipping insertion in model container [2022-07-26 13:22:11,829 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:11" (1/1) ... [2022-07-26 13:22:11,835 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:22:11,873 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:22:12,022 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:12,147 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[30997,31010] [2022-07-26 13:22:12,155 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[31682,31695] [2022-07-26 13:22:12,164 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,172 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:22:12,199 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:12,215 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[30997,31010] [2022-07-26 13:22:12,218 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[31682,31695] [2022-07-26 13:22:12,221 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:12,251 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:22:12,252 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12 WrapperNode [2022-07-26 13:22:12,252 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:12,253 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,253 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:22:12,253 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:22:12,259 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,272 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,292 INFO L137 Inliner]: procedures = 171, calls = 47, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 43 [2022-07-26 13:22:12,292 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:12,293 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,293 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:22:12,293 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:22:12,301 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,301 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,304 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,304 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,309 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,313 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,314 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,317 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:22:12,318 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:22:12,318 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:22:12,318 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:22:12,319 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (1/1) ... [2022-07-26 13:22:12,332 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:22:12,341 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:22:12,351 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:22:12,360 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:22:12,392 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:22:12,393 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-26 13:22:12,394 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-26 13:22:12,394 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:22:12,394 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-26 13:22:12,395 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:22:12,395 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:22:12,396 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:22:12,532 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:22:12,534 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:22:12,705 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:22:12,711 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:22:12,711 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-07-26 13:22:12,713 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12 BoogieIcfgContainer [2022-07-26 13:22:12,713 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:22:12,714 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:22:12,714 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:22:12,719 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:22:12,720 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,720 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:22:11" (1/3) ... [2022-07-26 13:22:12,721 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@63f97a66 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,721 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,721 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:12" (2/3) ... [2022-07-26 13:22:12,722 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@63f97a66 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:12, skipping insertion in model container [2022-07-26 13:22:12,722 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:12,722 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:12" (3/3) ... [2022-07-26 13:22:12,724 INFO L322 chiAutomizerObserver]: Analyzing ICFG peterson.i [2022-07-26 13:22:12,830 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-26 13:22:12,865 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 81 places, 82 transitions, 180 flow [2022-07-26 13:22:12,911 INFO L129 PetriNetUnfolder]: 6/78 cut-off events. [2022-07-26 13:22:12,911 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-26 13:22:12,916 INFO L84 FinitePrefix]: Finished finitePrefix Result has 87 conditions, 78 events. 6/78 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 68 event pairs, 0 based on Foata normal form. 0/72 useless extension candidates. Maximal degree in co-relation 46. Up to 2 conditions per place. [2022-07-26 13:22:12,916 INFO L82 GeneralOperation]: Start removeDead. Operand has 81 places, 82 transitions, 180 flow [2022-07-26 13:22:12,926 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 79 places, 78 transitions, 168 flow [2022-07-26 13:22:12,938 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:12,938 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:12,938 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:12,938 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:12,938 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:12,939 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:12,939 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:12,939 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:12,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:13,124 INFO L131 ngComponentsAnalysis]: Automaton has 109 accepting balls. 351 [2022-07-26 13:22:13,124 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,125 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,130 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,130 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-26 13:22:13,131 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:13,131 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 1066 states, but on-demand construction may add more states [2022-07-26 13:22:13,148 INFO L131 ngComponentsAnalysis]: Automaton has 109 accepting balls. 351 [2022-07-26 13:22:13,148 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,148 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,151 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,151 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-26 13:22:13,158 INFO L733 eck$LassoCheckResult]: Stem: 84#[ULTIMATE.startENTRY]don't care [161] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 87#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 89#[L-1-1]don't care [174] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 91#[L-1-2]don't care [175] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 93#[L12]don't care [123] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 95#[L12-1]don't care [142] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 97#[L12-2]don't care [137] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 99#[L12-3]don't care [163] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 11) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 101#[L12-4]don't care [157] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 103#[L700]don't care [176] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 105#[L701]don't care [166] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 107#[L702]don't care [128] L702-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 109#[L-1-3]don't care [178] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 111#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 113#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 115#[L-1-6]don't care [152] L-1-6-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 117#[L760]don't care [165] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_4|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 119#[L760-1]don't care [146] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 121#[L760-2]don't care [160] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 123#[L761]don't care [130] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 125#[L761-1]don't care [158] L761-1-->L761-2: Formula: (and (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 127#[L761-2]don't care [222] L761-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 129#[thr1ENTRY, L761-3]don't care [203] thr1ENTRY-->L704: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 133#[L704, L761-3]don't care [204] L704-->L706: Formula: (= v_~flag1~0_3 1) InVars {} OutVars{~flag1~0=v_~flag1~0_3} AuxVars[] AssignedVars[~flag1~0] 139#[L706, L761-3]don't care [205] L706-->L709: Formula: (= v_~turn~0_4 1) InVars {} OutVars{~turn~0=v_~turn~0_4} AuxVars[] AssignedVars[~turn~0] 147#[L709, L761-3]don't care [206] L709-->L712: Formula: (= v_~flag2~0_3 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_3} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 157#[L712, L761-3]don't care [207] L712-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 169#[L761-3, L722]don't care [2022-07-26 13:22:13,159 INFO L735 eck$LassoCheckResult]: Loop: 169#[L761-3, L722]don't care [210] L722-->L717: Formula: (and (= v_thr1Thread1of1ForFork0_~t1~0_5 1) (= v_thr1Thread1of1ForFork0_~f21~0_5 1)) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_5} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_5} AuxVars[] AssignedVars[] 185#[L717, L761-3]don't care [212] L717-->L719: Formula: (= v_~flag2~0_4 v_thr1Thread1of1ForFork0_~f21~0_7) InVars {~flag2~0=v_~flag2~0_4} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 207#[L719, L761-3]don't care [215] L719-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_7 v_~turn~0_6) InVars {~turn~0=v_~turn~0_6} OutVars{~turn~0=v_~turn~0_6, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 169#[L761-3, L722]don't care [2022-07-26 13:22:13,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,164 INFO L85 PathProgramCache]: Analyzing trace with hash 1606548520, now seen corresponding path program 1 times [2022-07-26 13:22:13,172 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,173 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913007312] [2022-07-26 13:22:13,173 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,174 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,310 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,382 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,385 INFO L85 PathProgramCache]: Analyzing trace with hash 238388, now seen corresponding path program 1 times [2022-07-26 13:22:13,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,386 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435868091] [2022-07-26 13:22:13,387 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,404 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:13,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:13,419 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:13,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1866588589, now seen corresponding path program 1 times [2022-07-26 13:22:13,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,421 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [977910384] [2022-07-26 13:22:13,421 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:13,452 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:13,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:13,561 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:13,561 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [977910384] [2022-07-26 13:22:13,562 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [977910384] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:13,562 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:13,562 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:13,562 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [838958075] [2022-07-26 13:22:13,563 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:13,631 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:13,665 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:13,666 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:13,669 INFO L87 Difference]: Start difference. First operand currently 1066 states, but on-demand construction may add more states Second operand has 4 states, 4 states have (on average 7.5) internal successors, (30), 4 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:13,790 INFO L93 Difference]: Finished difference Result 1568 states and 4047 transitions. [2022-07-26 13:22:13,791 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1568 states and 4047 transitions. [2022-07-26 13:22:13,825 INFO L131 ngComponentsAnalysis]: Automaton has 122 accepting balls. 390 [2022-07-26 13:22:13,855 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1568 states to 950 states and 2446 transitions. [2022-07-26 13:22:13,862 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 950 [2022-07-26 13:22:13,868 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 950 [2022-07-26 13:22:13,869 INFO L73 IsDeterministic]: Start isDeterministic. Operand 950 states and 2446 transitions. [2022-07-26 13:22:13,877 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:13,878 INFO L220 hiAutomatonCegarLoop]: Abstraction has 950 states and 2446 transitions. [2022-07-26 13:22:13,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states and 2446 transitions. [2022-07-26 13:22:13,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 764. [2022-07-26 13:22:13,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 764 states, 764 states have (on average 2.581151832460733) internal successors, (1972), 763 states have internal predecessors, (1972), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:13,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 764 states to 764 states and 1972 transitions. [2022-07-26 13:22:13,959 INFO L242 hiAutomatonCegarLoop]: Abstraction has 764 states and 1972 transitions. [2022-07-26 13:22:13,960 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:13,964 INFO L426 stractBuchiCegarLoop]: Abstraction has 764 states and 1972 transitions. [2022-07-26 13:22:13,965 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-26 13:22:13,965 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 764 states and 1972 transitions. [2022-07-26 13:22:13,971 INFO L131 ngComponentsAnalysis]: Automaton has 91 accepting balls. 297 [2022-07-26 13:22:13,971 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:13,971 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:13,973 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:13,973 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-26 13:22:13,977 INFO L733 eck$LassoCheckResult]: Stem: 5322#[ULTIMATE.startENTRY]don't care [161] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 5296#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 5298#[L-1-1]don't care [174] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 5324#[L-1-2]don't care [175] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 5254#[L12]don't care [123] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 5256#[L12-1]don't care [142] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 4576#[L12-2]don't care [137] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 4578#[L12-3]don't care [163] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 11) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 4666#[L12-4]don't care [157] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 5216#[L700]don't care [176] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 5218#[L701]don't care [166] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 4834#[L702]don't care [128] L702-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 4836#[L-1-3]don't care [178] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 4200#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 4202#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 5084#[L-1-6]don't care [152] L-1-6-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 5086#[L760]don't care [165] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_4|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 5188#[L760-1]don't care [146] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 5098#[L760-2]don't care [160] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 5100#[L761]don't care [130] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 4634#[L761-1]don't care [158] L761-1-->L761-2: Formula: (and (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 4636#[L761-2]don't care [222] L761-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 5272#[thr1ENTRY, L761-3]don't care [182] L761-3-->L761-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 4448#[thr1ENTRY, L761-4]don't care [149] L761-4-->L762: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 4450#[thr1ENTRY, L762]don't care [127] L762-->L762-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 4688#[thr1ENTRY, L762-1]don't care [136] L762-1-->L762-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 5220#[thr1ENTRY, L762-2]don't care [120] L762-2-->L762-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) |v_ULTIMATE.start_main_~#t2~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_5|) (<= (+ |v_ULTIMATE.start_main_~#t2~1#1.offset_3| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t2~1#1.offset_3|) (= (select |v_#valid_9| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) 1)) InVars {ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[#memory_int] 5000#[thr1ENTRY, L762-3]don't care [225] L762-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_10, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_10, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0, thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 5002#[thr2ENTRY, L762-4, thr1ENTRY]don't care [186] thr2ENTRY-->L732: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 5122#[L732, L762-4, thr1ENTRY]don't care [187] L732-->L734: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 3852#[L734, L762-4, thr1ENTRY]don't care [188] L734-->L737: Formula: (= v_~turn~0_1 0) InVars {} OutVars{~turn~0=v_~turn~0_1} AuxVars[] AssignedVars[~turn~0] 3856#[L737, L762-4, thr1ENTRY]don't care [189] L737-->L740: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork1_~f12~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 4438#[L740, L762-4, thr1ENTRY]don't care [190] L740-->L750: Formula: (= v_thr2Thread1of1ForFork1_~t2~0_1 v_~turn~0_2) InVars {~turn~0=v_~turn~0_2} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_1, ~turn~0=v_~turn~0_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0] 4612#[L750, L762-4, thr1ENTRY]don't care [2022-07-26 13:22:13,977 INFO L735 eck$LassoCheckResult]: Loop: 4612#[L750, L762-4, thr1ENTRY]don't care [193] L750-->L745: Formula: (and (= v_thr2Thread1of1ForFork1_~f12~0_5 1) (= v_thr2Thread1of1ForFork1_~t2~0_5 0)) InVars {thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_5, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_5, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} AuxVars[] AssignedVars[] 4502#[L745, L762-4, thr1ENTRY]don't care [195] L745-->L747: Formula: (= v_~flag1~0_2 v_thr2Thread1of1ForFork1_~f12~0_7) InVars {~flag1~0=v_~flag1~0_2} OutVars{~flag1~0=v_~flag1~0_2, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 4504#[L762-4, thr1ENTRY, L747]don't care [198] L747-->L750: Formula: (= v_thr2Thread1of1ForFork1_~t2~0_7 v_~turn~0_3) InVars {~turn~0=v_~turn~0_3} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_7, ~turn~0=v_~turn~0_3} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0] 4612#[L750, L762-4, thr1ENTRY]don't care [2022-07-26 13:22:13,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:13,978 INFO L85 PathProgramCache]: Analyzing trace with hash -90087802, now seen corresponding path program 1 times [2022-07-26 13:22:13,978 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:13,979 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [395817825] [2022-07-26 13:22:13,979 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:13,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,026 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,045 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,046 INFO L85 PathProgramCache]: Analyzing trace with hash 221507, now seen corresponding path program 1 times [2022-07-26 13:22:14,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,046 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39736942] [2022-07-26 13:22:14,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,053 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,056 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,056 INFO L85 PathProgramCache]: Analyzing trace with hash 549042334, now seen corresponding path program 1 times [2022-07-26 13:22:14,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,057 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675706548] [2022-07-26 13:22:14,057 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,057 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:14,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:14,107 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:14,107 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675706548] [2022-07-26 13:22:14,108 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [675706548] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:14,108 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:14,108 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:14,108 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357487637] [2022-07-26 13:22:14,108 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:14,130 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:14,131 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:14,131 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:14,131 INFO L87 Difference]: Start difference. First operand 764 states and 1972 transitions. cyclomatic complexity: 1299 Second operand has 4 states, 4 states have (on average 9.0) internal successors, (36), 4 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:14,195 INFO L93 Difference]: Finished difference Result 969 states and 2462 transitions. [2022-07-26 13:22:14,195 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 969 states and 2462 transitions. [2022-07-26 13:22:14,204 INFO L131 ngComponentsAnalysis]: Automaton has 92 accepting balls. 300 [2022-07-26 13:22:14,214 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 969 states to 754 states and 1944 transitions. [2022-07-26 13:22:14,214 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 754 [2022-07-26 13:22:14,216 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 754 [2022-07-26 13:22:14,216 INFO L73 IsDeterministic]: Start isDeterministic. Operand 754 states and 1944 transitions. [2022-07-26 13:22:14,220 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:14,221 INFO L220 hiAutomatonCegarLoop]: Abstraction has 754 states and 1944 transitions. [2022-07-26 13:22:14,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states and 1944 transitions. [2022-07-26 13:22:14,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 658. [2022-07-26 13:22:14,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 658 states, 658 states have (on average 2.5896656534954405) internal successors, (1704), 657 states have internal predecessors, (1704), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:14,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 1704 transitions. [2022-07-26 13:22:14,248 INFO L242 hiAutomatonCegarLoop]: Abstraction has 658 states and 1704 transitions. [2022-07-26 13:22:14,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:14,250 INFO L426 stractBuchiCegarLoop]: Abstraction has 658 states and 1704 transitions. [2022-07-26 13:22:14,250 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-26 13:22:14,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 658 states and 1704 transitions. [2022-07-26 13:22:14,255 INFO L131 ngComponentsAnalysis]: Automaton has 76 accepting balls. 252 [2022-07-26 13:22:14,255 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:14,255 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:14,256 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:14,256 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2022-07-26 13:22:14,257 INFO L733 eck$LassoCheckResult]: Stem: 7586#[ULTIMATE.startENTRY]don't care [161] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 7554#[L-1]don't care [148] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 7556#[L-1-1]don't care [174] L-1-1-->L-1-2: Formula: (= (select |v_#valid_1| 0) 0) InVars {#valid=|v_#valid_1|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[] 7588#[L-1-2]don't care [175] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 7510#[L12]don't care [123] L12-->L12-1: Formula: (and (= (select |v_#valid_2| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 7512#[L12-1]don't care [142] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 6890#[L12-2]don't care [137] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 6892#[L12-3]don't care [163] L12-3-->L12-4: Formula: (and (= (select |v_#length_2| 2) 11) (= (select |v_#valid_3| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_3|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[] 6960#[L12-4]don't care [157] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 7478#[L700]don't care [176] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 7480#[L701]don't care [166] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 7128#[L702]don't care [128] L702-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 7130#[L-1-3]don't care [178] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 6596#[L-1-4]don't care [155] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 6598#[L-1-5]don't care [122] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 7348#[L-1-6]don't care [152] L-1-6-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 7350#[L760]don't care [165] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) (= (store |v_#valid_5| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_4|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_5|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 7442#[L760-1]don't care [146] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 7360#[L760-2]don't care [160] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 7362#[L761]don't care [130] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 6942#[L761-1]don't care [158] L761-1-->L761-2: Formula: (and (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 6944#[L761-2]don't care [222] L761-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 7528#[thr1ENTRY, L761-3]don't care [182] L761-3-->L761-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 6788#[thr1ENTRY, L761-4]don't care [149] L761-4-->L762: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 6790#[thr1ENTRY, L762]don't care [203] thr1ENTRY-->L704: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 6990#[L704, L762]don't care [204] L704-->L706: Formula: (= v_~flag1~0_3 1) InVars {} OutVars{~flag1~0=v_~flag1~0_3} AuxVars[] AssignedVars[~flag1~0] 6656#[L706, L762]don't care [205] L706-->L709: Formula: (= v_~turn~0_4 1) InVars {} OutVars{~turn~0=v_~turn~0_4} AuxVars[] AssignedVars[~turn~0] 6306#[L709, L762]don't care [127] L762-->L762-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 6310#[L709, L762-1]don't care [136] L762-1-->L762-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 7490#[L709, L762-2]don't care [120] L762-2-->L762-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) |v_ULTIMATE.start_main_~#t2~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_5|) (<= (+ |v_ULTIMATE.start_main_~#t2~1#1.offset_3| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t2~1#1.offset_3|) (= (select |v_#valid_9| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) 1)) InVars {ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[#memory_int] 7462#[L709, L762-3]don't care [225] L762-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_10, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_10, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0, thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 7206#[L762-4, thr2ENTRY, L709]don't care [186] thr2ENTRY-->L732: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 7416#[L732, L762-4, L709]don't care [187] L732-->L734: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 7418#[L734, L762-4, L709]don't care [206] L709-->L712: Formula: (= v_~flag2~0_3 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_3} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 7548#[L712, L734, L762-4]don't care [207] L712-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 7552#[L734, L722, L762-4]don't care [2022-07-26 13:22:14,258 INFO L735 eck$LassoCheckResult]: Loop: 7552#[L734, L722, L762-4]don't care [210] L722-->L717: Formula: (and (= v_thr1Thread1of1ForFork0_~t1~0_5 1) (= v_thr1Thread1of1ForFork0_~f21~0_5 1)) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_5} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_5} AuxVars[] AssignedVars[] 6816#[L734, L762-4, L717]don't care [212] L717-->L719: Formula: (= v_~flag2~0_4 v_thr1Thread1of1ForFork0_~f21~0_7) InVars {~flag2~0=v_~flag2~0_4} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 6818#[L734, L762-4, L719]don't care [215] L719-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_7 v_~turn~0_6) InVars {~turn~0=v_~turn~0_6} OutVars{~turn~0=v_~turn~0_6, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 7552#[L734, L722, L762-4]don't care [2022-07-26 13:22:14,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,258 INFO L85 PathProgramCache]: Analyzing trace with hash -1603505348, now seen corresponding path program 1 times [2022-07-26 13:22:14,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,259 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [328080016] [2022-07-26 13:22:14,259 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,259 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,275 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,291 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,292 INFO L85 PathProgramCache]: Analyzing trace with hash 238388, now seen corresponding path program 2 times [2022-07-26 13:22:14,292 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,292 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486759511] [2022-07-26 13:22:14,292 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,292 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,296 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,299 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:14,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:14,299 INFO L85 PathProgramCache]: Analyzing trace with hash -1401347559, now seen corresponding path program 1 times [2022-07-26 13:22:14,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:14,300 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066056900] [2022-07-26 13:22:14,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:14,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:14,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,314 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:14,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:14,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:15,404 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.07 01:22:15 BoogieIcfgContainer [2022-07-26 13:22:15,404 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-26 13:22:15,406 INFO L158 Benchmark]: Toolchain (without parser) took 3582.69ms. Allocated memory was 190.8MB in the beginning and 230.7MB in the end (delta: 39.8MB). Free memory was 138.3MB in the beginning and 110.6MB in the end (delta: 27.7MB). Peak memory consumption was 68.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,406 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 190.8MB. Free memory was 156.2MB in the beginning and 156.1MB in the end (delta: 69.6kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-26 13:22:15,407 INFO L158 Benchmark]: CACSL2BoogieTranslator took 427.39ms. Allocated memory was 190.8MB in the beginning and 230.7MB in the end (delta: 39.8MB). Free memory was 138.1MB in the beginning and 196.9MB in the end (delta: -58.8MB). Peak memory consumption was 11.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,407 INFO L158 Benchmark]: Boogie Procedure Inliner took 39.89ms. Allocated memory is still 230.7MB. Free memory was 196.9MB in the beginning and 194.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,408 INFO L158 Benchmark]: Boogie Preprocessor took 24.04ms. Allocated memory is still 230.7MB. Free memory was 194.8MB in the beginning and 193.3MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,408 INFO L158 Benchmark]: RCFGBuilder took 395.29ms. Allocated memory is still 230.7MB. Free memory was 193.3MB in the beginning and 180.2MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,409 INFO L158 Benchmark]: BuchiAutomizer took 2690.74ms. Allocated memory is still 230.7MB. Free memory was 180.2MB in the beginning and 110.6MB in the end (delta: 69.5MB). Peak memory consumption was 70.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:15,412 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 190.8MB. Free memory was 156.2MB in the beginning and 156.1MB in the end (delta: 69.6kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 427.39ms. Allocated memory was 190.8MB in the beginning and 230.7MB in the end (delta: 39.8MB). Free memory was 138.1MB in the beginning and 196.9MB in the end (delta: -58.8MB). Peak memory consumption was 11.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 39.89ms. Allocated memory is still 230.7MB. Free memory was 196.9MB in the beginning and 194.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 24.04ms. Allocated memory is still 230.7MB. Free memory was 194.8MB in the beginning and 193.3MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 395.29ms. Allocated memory is still 230.7MB. Free memory was 193.3MB in the beginning and 180.2MB in the end (delta: 13.1MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * BuchiAutomizer took 2690.74ms. Allocated memory is still 230.7MB. Free memory was 180.2MB in the beginning and 110.6MB in the end (delta: 69.5MB). Peak memory consumption was 70.0MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 2 terminating modules (2 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.2 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 658 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.5s and 3 iterations. TraceHistogramMax:1. Analysis of lassos took 1.7s. Construction of modules took 0.0s. Büchi inclusion checks took 0.4s. Highest rank in rank-based complementation 0. Minimization of det autom 2. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 2 MinimizatonAttempts, 282 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 170 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 170 mSDsluCounter, 405 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 242 mSDsCounter, 4 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 46 IncrementalHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4 mSolverCounterUnsat, 171 mSDtfsCounter, 46 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 716]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, \result={0:0}, \result={0:0}, _={0:0}, _={0:0}, _={0:0}, _={0:0}, f12=0, f21=1, flag1=1, flag2=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1749a25f in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@1b44dee in24630,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@2c9f2076=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@7c1fd6fa=0, t1={15808:0}, t1=1, t2=0, t2={15809:0}, turn=1, x=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 716]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int flag1 = 0, flag2 = 0; [L701] 0 int turn; [L702] 0 int x; [L760] 0 pthread_t t1, t2; [L761] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L705] 1 flag1 = 1 [L708] 1 turn = 1 [L762] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L733] 2 flag2 = 1 [L711] 1 int f21 = flag2; [L714] 1 int t1 = turn; Loop: [L716] COND TRUE f21==1 && t1==1 [L718] f21 = flag2 [L721] t1 = turn End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-26 13:22:15,452 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...