/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:24:52,057 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:24:52,058 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:24:52,110 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-07-26 13:24:52,111 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-07-26 13:24:52,112 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-07-26 13:24:52,114 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-07-26 13:24:52,118 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-07-26 13:24:52,119 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-07-26 13:24:52,122 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-07-26 13:24:52,123 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-07-26 13:24:52,124 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-07-26 13:24:52,124 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-07-26 13:24:52,125 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-07-26 13:24:52,126 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-07-26 13:24:52,128 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-07-26 13:24:52,129 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-07-26 13:24:52,130 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-07-26 13:24:52,131 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-07-26 13:24:52,136 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-07-26 13:24:52,137 INFO L181 SettingsManager]: Resetting HornVerifier preferences to default values [2022-07-26 13:24:52,138 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-07-26 13:24:52,138 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-07-26 13:24:52,139 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-07-26 13:24:52,140 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-07-26 13:24:52,145 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-07-26 13:24:52,150 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-07-26 13:24:52,150 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-07-26 13:24:52,156 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-07-26 13:24:52,156 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:24:52,180 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:24:52,180 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:24:52,181 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:24:52,181 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:24:52,181 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:24:52,182 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:24:52,182 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:24:52,182 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:24:52,183 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:24:52,183 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:24:52,184 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:24:52,184 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:24:52,184 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:24:52,184 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:24:52,184 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:24:52,361 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:24:52,381 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:24:52,383 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:24:52,383 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:24:52,384 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:24:52,384 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i [2022-07-26 13:24:52,431 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7f99bcdb7/6b9c05016f3e49b595d9b12df40c0bdf/FLAG4901134d0 [2022-07-26 13:24:52,832 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:24:52,833 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i [2022-07-26 13:24:52,851 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7f99bcdb7/6b9c05016f3e49b595d9b12df40c0bdf/FLAG4901134d0 [2022-07-26 13:24:53,218 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/7f99bcdb7/6b9c05016f3e49b595d9b12df40c0bdf [2022-07-26 13:24:53,220 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:24:53,221 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:24:53,223 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:24:53,223 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:24:53,225 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:24:53,225 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,227 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33cb070 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53, skipping insertion in model container [2022-07-26 13:24:53,227 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,231 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:24:53,261 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:24:53,363 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:24:53,536 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39095,39108] [2022-07-26 13:24:53,540 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39180,39193] [2022-07-26 13:24:53,541 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39232,39245] [2022-07-26 13:24:53,548 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:24:53,553 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:24:53,563 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:24:53,592 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39095,39108] [2022-07-26 13:24:53,593 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39180,39193] [2022-07-26 13:24:53,594 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-divine/ring_1w1r-2.i[39232,39245] [2022-07-26 13:24:53,602 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:24:53,636 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:24:53,637 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53 WrapperNode [2022-07-26 13:24:53,637 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:24:53,638 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:24:53,638 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:24:53,638 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:24:53,642 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,667 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,695 INFO L137 Inliner]: procedures = 224, calls = 41, calls flagged for inlining = 8, calls inlined = 8, statements flattened = 124 [2022-07-26 13:24:53,695 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:24:53,696 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:24:53,696 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:24:53,696 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:24:53,702 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,702 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,710 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,711 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,722 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,725 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,726 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,727 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:24:53,728 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:24:53,728 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:24:53,728 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:24:53,734 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (1/1) ... [2022-07-26 13:24:53,739 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:24:53,745 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:24:53,756 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:24:53,761 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:24:53,785 INFO L130 BoogieDeclarations]: Found specification of procedure reader_fn [2022-07-26 13:24:53,785 INFO L138 BoogieDeclarations]: Found implementation of procedure reader_fn [2022-07-26 13:24:53,785 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:24:53,785 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:24:53,785 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:24:53,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:24:53,786 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:24:53,786 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:24:53,786 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:24:53,786 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:24:53,787 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:24:53,910 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:24:53,911 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:24:54,075 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:24:54,086 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:24:54,086 INFO L299 CfgBuilder]: Removed 3 assume(true) statements. [2022-07-26 13:24:54,088 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:24:54 BoogieIcfgContainer [2022-07-26 13:24:54,088 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:24:54,088 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:24:54,088 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:24:54,091 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:24:54,092 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:24:54,092 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:24:53" (1/3) ... [2022-07-26 13:24:54,092 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2de79766 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:24:54, skipping insertion in model container [2022-07-26 13:24:54,092 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:24:54,092 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:24:53" (2/3) ... [2022-07-26 13:24:54,093 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2de79766 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:24:54, skipping insertion in model container [2022-07-26 13:24:54,093 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:24:54,093 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:24:54" (3/3) ... [2022-07-26 13:24:54,094 INFO L322 chiAutomizerObserver]: Analyzing ICFG ring_1w1r-2.i [2022-07-26 13:24:54,215 INFO L144 ThreadInstanceAdder]: Constructed 1 joinOtherThreadTransitions. [2022-07-26 13:24:54,250 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 148 places, 155 transitions, 318 flow [2022-07-26 13:24:54,290 INFO L129 PetriNetUnfolder]: 10/153 cut-off events. [2022-07-26 13:24:54,291 INFO L130 PetriNetUnfolder]: For 1/1 co-relation queries the response was YES. [2022-07-26 13:24:54,297 INFO L84 FinitePrefix]: Finished finitePrefix Result has 158 conditions, 153 events. 10/153 cut-off events. For 1/1 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 252 event pairs, 0 based on Foata normal form. 0/143 useless extension candidates. Maximal degree in co-relation 112. Up to 2 conditions per place. [2022-07-26 13:24:54,297 INFO L82 GeneralOperation]: Start removeDead. Operand has 148 places, 155 transitions, 318 flow [2022-07-26 13:24:54,303 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 147 places, 153 transitions, 312 flow [2022-07-26 13:24:54,311 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:24:54,311 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:24:54,311 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:24:54,311 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:24:54,311 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:24:54,311 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:24:54,311 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:24:54,312 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:24:54,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:24:54,473 INFO L131 ngComponentsAnalysis]: Automaton has 41 accepting balls. 2133 [2022-07-26 13:24:54,473 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:24:54,473 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:24:54,478 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:54,478 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:54,478 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:24:54,479 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 2548 states, but on-demand construction may add more states [2022-07-26 13:24:54,499 INFO L131 ngComponentsAnalysis]: Automaton has 41 accepting balls. 2133 [2022-07-26 13:24:54,499 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:24:54,500 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:24:54,503 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:54,503 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:54,510 INFO L733 eck$LassoCheckResult]: Stem: 151#[ULTIMATE.startENTRY]don't care [332] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 154#[L-1]don't care [244] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 156#[L-1-1]don't care [340] L-1-1-->L-1-2: Formula: (= (select |v_#valid_21| 0) 0) InVars {#valid=|v_#valid_21|} OutVars{#valid=|v_#valid_21|} AuxVars[] AssignedVars[] 158#[L-1-2]don't care [341] L-1-2-->L803: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 160#[L803]don't care [224] L803-->L803-1: Formula: (and (= (select |v_#valid_22| 1) 1) (= 2 (select |v_#length_17| 1))) InVars {#length=|v_#length_17|, #valid=|v_#valid_22|} OutVars{#length=|v_#length_17|, #valid=|v_#valid_22|} AuxVars[] AssignedVars[] 162#[L803-1]don't care [260] L803-1-->L803-2: Formula: (= (select (select |v_#memory_int_21| 1) 0) 48) InVars {#memory_int=|v_#memory_int_21|} OutVars{#memory_int=|v_#memory_int_21|} AuxVars[] AssignedVars[] 164#[L803-2]don't care [351] L803-2-->L803-3: Formula: (= (select (select |v_#memory_int_22| 1) 1) 0) InVars {#memory_int=|v_#memory_int_22|} OutVars{#memory_int=|v_#memory_int_22|} AuxVars[] AssignedVars[] 166#[L803-3]don't care [204] L803-3-->L803-4: Formula: (and (= (select |v_#length_18| 2) 7) (= (select |v_#valid_23| 2) 1)) InVars {#length=|v_#length_18|, #valid=|v_#valid_23|} OutVars{#length=|v_#length_18|, #valid=|v_#valid_23|} AuxVars[] AssignedVars[] 168#[L803-4]don't care [267] L803-4-->L803-5: Formula: (= (select (select |v_#memory_int_23| 2) 0) 114) InVars {#memory_int=|v_#memory_int_23|} OutVars{#memory_int=|v_#memory_int_23|} AuxVars[] AssignedVars[] 170#[L803-5]don't care [330] L803-5-->L803-6: Formula: (= (select (select |v_#memory_int_24| 2) 1) 105) InVars {#memory_int=|v_#memory_int_24|} OutVars{#memory_int=|v_#memory_int_24|} AuxVars[] AssignedVars[] 172#[L803-6]don't care [212] L803-6-->L803-7: Formula: (= (select (select |v_#memory_int_25| 2) 2) 110) InVars {#memory_int=|v_#memory_int_25|} OutVars{#memory_int=|v_#memory_int_25|} AuxVars[] AssignedVars[] 174#[L803-7]don't care [352] L803-7-->L803-8: Formula: (= 103 (select (select |v_#memory_int_26| 2) 3)) InVars {#memory_int=|v_#memory_int_26|} OutVars{#memory_int=|v_#memory_int_26|} AuxVars[] AssignedVars[] 176#[L803-8]don't care [233] L803-8-->L803-9: Formula: (= (select (select |v_#memory_int_27| 2) 4) 46) InVars {#memory_int=|v_#memory_int_27|} OutVars{#memory_int=|v_#memory_int_27|} AuxVars[] AssignedVars[] 178#[L803-9]don't care [213] L803-9-->L803-10: Formula: (= 104 (select (select |v_#memory_int_28| 2) 5)) InVars {#memory_int=|v_#memory_int_28|} OutVars{#memory_int=|v_#memory_int_28|} AuxVars[] AssignedVars[] 180#[L803-10]don't care [261] L803-10-->L803-11: Formula: (= (select (select |v_#memory_int_29| 2) 6) 0) InVars {#memory_int=|v_#memory_int_29|} OutVars{#memory_int=|v_#memory_int_29|} AuxVars[] AssignedVars[] 182#[L803-11]don't care [269] L803-11-->L-1-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 184#[L-1-3]don't care [347] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 186#[L-1-4]don't care [252] L-1-4-->L-1-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 188#[L-1-5]don't care [220] L-1-5-->L851: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_3|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_4|, ULTIMATE.start_main_#t~ret20#1.base=|v_ULTIMATE.start_main_#t~ret20#1.base_3|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_5|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_5|, ULTIMATE.start_main_#t~ret20#1.offset=|v_ULTIMATE.start_main_#t~ret20#1.offset_3|, ULTIMATE.start_main_#t~nondet19#1=|v_ULTIMATE.start_main_#t~nondet19#1_2|, ULTIMATE.start_main_#t~mem21#1=|v_ULTIMATE.start_main_#t~mem21#1_3|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre18#1, ULTIMATE.start_main_~#r~2#1.base, ULTIMATE.start_main_#t~ret20#1.base, ULTIMATE.start_main_~#reader~0#1.offset, ULTIMATE.start_main_~#reader~0#1.base, ULTIMATE.start_main_#t~ret20#1.offset, ULTIMATE.start_main_#t~nondet19#1, ULTIMATE.start_main_#t~mem21#1, ULTIMATE.start_main_~#r~2#1.offset] 190#[L851]don't care [294] L851-->L851-1: Formula: (and (= (select |v_#valid_25| |v_ULTIMATE.start_main_~#reader~0#1.base_6|) 0) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#reader~0#1.base_6| 4) |v_#length_19|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#reader~0#1.base_6|) (= |v_ULTIMATE.start_main_~#reader~0#1.offset_6| 0) (not (= 0 |v_ULTIMATE.start_main_~#reader~0#1.base_6|)) (= (store |v_#valid_25| |v_ULTIMATE.start_main_~#reader~0#1.base_6| 1) |v_#valid_24|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_20|, #valid=|v_#valid_25|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_19|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_6|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_6|, #valid=|v_#valid_24|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#reader~0#1.offset, ULTIMATE.start_main_~#reader~0#1.base, #valid, #length] 192#[L851-1]don't care [264] L851-1-->L852: Formula: (and (= (store |v_#length_22| |v_ULTIMATE.start_main_~#r~2#1.base_5| 24) |v_#length_21|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#r~2#1.base_5|) (= |v_ULTIMATE.start_main_~#r~2#1.offset_5| 0) (not (= |v_ULTIMATE.start_main_~#r~2#1.base_5| 0)) (= (store |v_#valid_27| |v_ULTIMATE.start_main_~#r~2#1.base_5| 1) |v_#valid_26|) (= (select |v_#valid_27| |v_ULTIMATE.start_main_~#r~2#1.base_5|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_22|, #valid=|v_#valid_27|} OutVars{ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_5|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_21|, #valid=|v_#valid_26|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#r~2#1.base, #valid, #length, ULTIMATE.start_main_~#r~2#1.offset] 194#[L852]don't care [216] L852-->L853: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 196#[L853]don't care [246] L853-->L853-1: Formula: (and (= |v_ULTIMATE.start_main_~#r~2#1.offset_6| |v_ULTIMATE.start_ring_init_#in~r#1.offset_1|) (= |v_ULTIMATE.start_ring_init_#in~r#1.base_1| |v_ULTIMATE.start_main_~#r~2#1.base_6|)) InVars {ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_6|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_6|} OutVars{ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_1|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_1|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_6|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_#in~r#1.offset, ULTIMATE.start_ring_init_#in~r#1.base] 198#[L853-1]don't care [339] L853-1-->L822: Formula: true InVars {} OutVars{ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_1|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_~r#1.offset, ULTIMATE.start_ring_init_~r#1.base] 200#[L822]don't care [289] L822-->L823: Formula: (and (= |v_ULTIMATE.start_ring_init_~r#1.offset_2| |v_ULTIMATE.start_ring_init_#in~r#1.offset_2|) (= |v_ULTIMATE.start_ring_init_#in~r#1.base_2| |v_ULTIMATE.start_ring_init_~r#1.base_2|)) InVars {ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_2|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_2|} OutVars{ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_2|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_2|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_2|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_2|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_~r#1.offset, ULTIMATE.start_ring_init_~r#1.base] 202#[L823]don't care [203] L823-->L823-1: Formula: (let ((.cse0 (+ |v_ULTIMATE.start_ring_init_~r#1.offset_3| 20))) (and (= |v_#memory_int_30| (store |v_#memory_int_31| |v_ULTIMATE.start_ring_init_~r#1.base_3| (store (select |v_#memory_int_31| |v_ULTIMATE.start_ring_init_~r#1.base_3|) .cse0 0))) (= (select |v_#valid_28| |v_ULTIMATE.start_ring_init_~r#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_ring_init_~r#1.offset_3| 24) (select |v_#length_23| |v_ULTIMATE.start_ring_init_~r#1.base_3|)))) InVars {#memory_int=|v_#memory_int_31|, #length=|v_#length_23|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_3|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_3|, #valid=|v_#valid_28|} OutVars{#memory_int=|v_#memory_int_30|, #length=|v_#length_23|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_3|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_3|, #valid=|v_#valid_28|} AuxVars[] AssignedVars[#memory_int] 204#[L823-1]don't care [304] L823-1-->L823-2: Formula: (and (<= (+ |v_ULTIMATE.start_ring_init_~r#1.offset_4| 4) (select |v_#length_24| |v_ULTIMATE.start_ring_init_~r#1.base_4|)) (<= 0 |v_ULTIMATE.start_ring_init_~r#1.offset_4|) (= |v_#memory_int_32| (store |v_#memory_int_33| |v_ULTIMATE.start_ring_init_~r#1.base_4| (store (select |v_#memory_int_33| |v_ULTIMATE.start_ring_init_~r#1.base_4|) |v_ULTIMATE.start_ring_init_~r#1.offset_4| 0))) (= 1 (select |v_#valid_29| |v_ULTIMATE.start_ring_init_~r#1.base_4|))) InVars {#memory_int=|v_#memory_int_33|, #length=|v_#length_24|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_4|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_4|, #valid=|v_#valid_29|} OutVars{#memory_int=|v_#memory_int_32|, #length=|v_#length_24|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_4|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_4|, #valid=|v_#valid_29|} AuxVars[] AssignedVars[#memory_int] 206#[L823-2]don't care [275] L823-2-->L854: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 208#[L854]don't care [338] L854-->L854-1: Formula: (= |v_ULTIMATE.start_main_#t~pre18#1_4| |v_#pthreadsForks_3|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_4|, #pthreadsForks=|v_#pthreadsForks_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre18#1] 210#[L854-1]don't care [268] L854-1-->L854-2: Formula: (= (+ 1 |v_#pthreadsForks_2|) |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_2|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|} AuxVars[] AssignedVars[#pthreadsForks] 212#[L854-2]don't care [288] L854-2-->L854-3: Formula: (and (= (store |v_#memory_int_11| |v_ULTIMATE.start_main_~#reader~0#1.base_1| (store (select |v_#memory_int_11| |v_ULTIMATE.start_main_~#reader~0#1.base_1|) |v_ULTIMATE.start_main_~#reader~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre18#1_1|)) |v_#memory_int_10|) (= (select |v_#valid_9| |v_ULTIMATE.start_main_~#reader~0#1.base_1|) 1) (<= 0 |v_ULTIMATE.start_main_~#reader~0#1.offset_1|) (<= (+ |v_ULTIMATE.start_main_~#reader~0#1.offset_1| 4) (select |v_#length_9| |v_ULTIMATE.start_main_~#reader~0#1.base_1|))) InVars {ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_1|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_1|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_1|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_11|, #length=|v_#length_9|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_1|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_1|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_1|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[#memory_int] 214#[L854-3]don't care [428] L854-3-->reader_fnENTRY: Formula: (and (= v_reader_fnThread1of1ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre18#1_6|) (= v_reader_fnThread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_~#r~2#1.base_8| |v_reader_fnThread1of1ForFork0_#in~arg#1.base_4|) (= |v_ULTIMATE.start_main_~#r~2#1.offset_8| |v_reader_fnThread1of1ForFork0_#in~arg#1.offset_4|)) InVars {ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_6|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_8|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_8|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_6|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_8|, reader_fnThread1of1ForFork0_#t~pre15#1=|v_reader_fnThread1of1ForFork0_#t~pre15#1_6|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_18|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_10|, reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_4|, reader_fnThread1of1ForFork0_thidvar1=v_reader_fnThread1of1ForFork0_thidvar1_2, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_10|, reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_12|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_4|, reader_fnThread1of1ForFork0_#res#1.base=|v_reader_fnThread1of1ForFork0_#res#1.base_4|, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_8|, reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_12|, reader_fnThread1of1ForFork0_#res#1.offset=|v_reader_fnThread1of1ForFork0_#res#1.offset_4|, reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_14|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_18|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_6|, reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_8|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_8|, reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_14|, reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_10|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_10|, reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_8|, reader_fnThread1of1ForFork0_thidvar0=v_reader_fnThread1of1ForFork0_thidvar0_2, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_6|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_18|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_10|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_10|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_18|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_6|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_14|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_14|, reader_fnThread1of1ForFork0_#t~ret16#1=|v_reader_fnThread1of1ForFork0_#t~ret16#1_10|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_10|, reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_14|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_6|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~pre15#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1, reader_fnThread1of1ForFork0_#in~arg#1.base, reader_fnThread1of1ForFork0_thidvar1, reader_fnThread1of1ForFork0_~r~0#1.base, reader_fnThread1of1ForFork0_#t~ret13#1, reader_fnThread1of1ForFork0_#in~arg#1.offset, reader_fnThread1of1ForFork0_#res#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1, reader_fnThread1of1ForFork0_~val~0#1, reader_fnThread1of1ForFork0_#res#1.offset, reader_fnThread1of1ForFork0_~last~0#1, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset, reader_fnThread1of1ForFork0_~arg#1.offset, reader_fnThread1of1ForFork0_#t~ret14#1, reader_fnThread1of1ForFork0_ring_empty_#res#1, reader_fnThread1of1ForFork0_~r~0#1.offset, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_#res#1, reader_fnThread1of1ForFork0_thidvar0, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset, reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset, reader_fnThread1of1ForFork0_#t~ret16#1, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset, reader_fnThread1of1ForFork0_~i~0#1, reader_fnThread1of1ForFork0_~arg#1.base] 216#[L854-4, reader_fnENTRY]don't care [355] reader_fnENTRY-->L826: Formula: (and (= |v_reader_fnThread1of1ForFork0_~arg#1.offset_1| |v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|) (= |v_reader_fnThread1of1ForFork0_#in~arg#1.base_1| |v_reader_fnThread1of1ForFork0_~arg#1.base_1|)) InVars {reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_1|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|} OutVars{reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_1|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~arg#1.offset, reader_fnThread1of1ForFork0_~arg#1.base] 220#[L854-4, L826]don't care [356] L826-->L827: Formula: (and (= |v_reader_fnThread1of1ForFork0_~arg#1.offset_3| |v_reader_fnThread1of1ForFork0_~r~0#1.offset_1|) (= |v_reader_fnThread1of1ForFork0_~arg#1.base_3| |v_reader_fnThread1of1ForFork0_~r~0#1.base_1|)) InVars {reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_3|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_3|} OutVars{reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_3|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_3|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~r~0#1.offset, reader_fnThread1of1ForFork0_~r~0#1.base] 226#[L854-4, L827]don't care [357] L827-->L827-1: Formula: (= |v_reader_fnThread1of1ForFork0_~val~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~val~0#1] 234#[L854-4, L827-1]don't care [358] L827-1-->L827-2: Formula: (= |v_reader_fnThread1of1ForFork0_~last~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~last~0#1] 244#[L854-4, L827-2]don't care [359] L827-2-->L828-2: Formula: (= |v_reader_fnThread1of1ForFork0_~i~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~i~0#1] 256#[L854-4, L828-2]don't care [2022-07-26 13:24:54,516 INFO L735 eck$LassoCheckResult]: Loop: 256#[L854-4, L828-2]don't care [360] L828-2-->L830: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 270#[L854-4, L830]don't care [363] L830-->L829: Formula: (< |v_reader_fnThread1of1ForFork0_~i~0#1_5| 8) InVars {reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_5|} OutVars{reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_5|} AuxVars[] AssignedVars[] 290#[L854-4, L829]don't care [366] L829-->L829-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 318#[L854-4, L829-1]don't care [369] L829-1-->L829-2: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_1| |v_reader_fnThread1of1ForFork0_~r~0#1.base_3|) (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_1| |v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|)) InVars {reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_3|} OutVars{reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_1|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_1|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset] 348#[L854-4, L829-2]don't care [371] L829-2-->L829-3: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#res#1] 384#[L854-4, L829-3]don't care [373] L829-3-->L819: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_1|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_1|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset] 426#[L854-4, L819]don't care [375] L819-->L820: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_5| |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|) (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_5|)) InVars {reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_5|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset] 474#[L854-4, L820]don't care [377] L820-->L820-1: Formula: (and (= (select |v_#valid_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|) 1) (<= (+ 4 |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|) (select |v_#length_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|)) (= (select (select |v_#memory_int_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|) |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|) |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_5|) (<= 0 |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|)) InVars {#memory_int=|v_#memory_int_1|, #length=|v_#length_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|, #valid=|v_#valid_1|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_5|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1] 528#[L854-4, L820-1]don't care [379] L820-1-->L820-2: Formula: (let ((.cse0 (+ |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13| 20))) (and (<= 0 .cse0) (= (select |v_#valid_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|) 1) (<= (+ |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13| 24) (select |v_#length_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|)) (= (select (select |v_#memory_int_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|) .cse0) |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_5|))) InVars {#memory_int=|v_#memory_int_2|, #length=|v_#length_2|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13|, #valid=|v_#valid_2|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|, #valid=|v_#valid_2|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_2|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1] 588#[L854-4, L820-2]don't care [381] L820-2-->L820-3: Formula: (= (ite (= (ite (= |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9| |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|) 1 0) 0) 0 1) |v_reader_fnThread1of1ForFork0_ring_empty_#res#1_5|) InVars {reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_5|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#res#1] 654#[L854-4, L820-3]don't care [383] L820-3-->L820-4: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1] 728#[L854-4, L820-4]don't care [385] L820-4-->L820-5: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1] 812#[L854-4, L820-5]don't care [387] L820-5-->L829-4: Formula: (= |v_reader_fnThread1of1ForFork0_#t~ret13#1_1| |v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|) InVars {reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|, reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret13#1] 906#[L854-4, L829-4]don't care [389] L829-4-->L829-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1010#[L854-4, L829-5]don't care [392] L829-5-->L829-7: Formula: (= (mod |v_reader_fnThread1of1ForFork0_#t~ret13#1_5| 256) 0) InVars {reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_5|} OutVars{reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_5|} AuxVars[] AssignedVars[] 1122#[L854-4, L829-7]don't care [396] L829-7-->L831: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_9|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret13#1] 1244#[L854-4, L831]don't care [399] L831-->L831-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1370#[L854-4, L831-1]don't care [401] L831-1-->L831-2: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_1| |v_reader_fnThread1of1ForFork0_~r~0#1.base_7|) (= |v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_1| |v_reader_fnThread1of1ForFork0_~r~0#1.offset_7|)) InVars {reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_7|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_7|} OutVars{reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_7|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_1|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_1|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base] 1502#[L854-4, L831-2]don't care [403] L831-2-->L831-3: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#res#1] 1642#[L854-4, L831-3]don't care [404] L831-3-->L814: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_1|, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_1|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_1|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_1|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_1|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset] 1788#[L854-4, L814]don't care [405] L814-->L815: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_3|) (= |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_3|)) InVars {reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_3|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_3|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_3|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_3|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_3|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset] 1934#[L854-4, L815]don't care [406] L815-->L815-1: Formula: (and (= (select |v_#valid_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_5|) 1) (<= (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_5| 4) (select |v_#length_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_5|)) (= (select (select |v_#memory_int_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_5|) |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_5|) |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_3|) (<= 0 |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_5|)) InVars {#memory_int=|v_#memory_int_3|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_5|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_5|, #length=|v_#length_3|, #valid=|v_#valid_3|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_3|, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_3|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_5|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_5|, #length=|v_#length_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1] 2076#[L854-4, L815-1]don't care [407] L815-1-->L815-2: Formula: (let ((.cse1 (* 4 |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_5|))) (let ((.cse0 (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_7| .cse1 4))) (and (= (select (select |v_#memory_int_4| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_7|) .cse0) |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_3|) (<= (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_7| .cse1 8) (select |v_#length_4| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_7|)) (= (select |v_#valid_4| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_7|) 1) (<= 0 .cse0)))) InVars {reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_5|, #valid=|v_#valid_4|, #memory_int=|v_#memory_int_4|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_7|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_7|, #length=|v_#length_4|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_5|, #valid=|v_#valid_4|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_3|, #memory_int=|v_#memory_int_4|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_7|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_7|, #length=|v_#length_4|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1] 2218#[L854-4, L815-2]don't care [408] L815-2-->L815-3: Formula: (= |v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_5|) InVars {reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_5|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_3|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_5|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1] 2360#[L854-4, L815-3]don't care [409] L815-3-->L815-4: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1] 2506#[L854-4, L815-4]don't care [410] L815-4-->L816: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1] 2652#[L854-4, L816]don't care [411] L816-->L816-1: Formula: (and (<= (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_9| 4) (select |v_#length_5| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_9|)) (= (select |v_#valid_5| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_9|) 1) (<= 0 |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_9|) (= |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_3| (select (select |v_#memory_int_5| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_9|) |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_9|))) InVars {#memory_int=|v_#memory_int_5|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_9|, #length=|v_#length_5|, #valid=|v_#valid_5|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_3|, #valid=|v_#valid_5|, #memory_int=|v_#memory_int_5|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_9|, #length=|v_#length_5|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1] 2796#[L854-4, L816-1]don't care [412] L816-1-->L816-2: Formula: (and (<= (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_11| 4) (select |v_#length_6| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11|)) (= (store |v_#memory_int_7| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11| (store (select |v_#memory_int_7| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11|) |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_11| (let ((.cse0 (+ |v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_5| 1))) (let ((.cse1 (mod .cse0 4))) (ite (and (< .cse0 0) (not (= .cse1 0))) (+ (- 4) .cse1) .cse1))))) |v_#memory_int_6|) (<= 0 |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_11|) (= (select |v_#valid_6| |v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11|) 1)) InVars {reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_7|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_11|, #length=|v_#length_6|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_5|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_6|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_11|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_11|, #length=|v_#length_6|} AuxVars[] AssignedVars[#memory_int] 2936#[L854-4, L816-2]don't care [413] L816-2-->L817: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1] 3072#[L854-4, L817]don't care [414] L817-->L817-1: Formula: (= |v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_3| |v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_5|) InVars {reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_5|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_5|, reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_dequeue_#res#1] 3204#[L854-4, L817-1]don't care [415] L817-1-->L831-4: Formula: (= |v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_5| |v_reader_fnThread1of1ForFork0_#t~ret14#1_1|) InVars {reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_5|} OutVars{reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_5|, reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret14#1] 3332#[L854-4, L831-4]don't care [416] L831-4-->L831-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 3456#[L854-4, L831-5]don't care [417] L831-5-->L831-6: Formula: (= |v_reader_fnThread1of1ForFork0_~val~0#1_3| |v_reader_fnThread1of1ForFork0_#t~ret14#1_3|) InVars {reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_3|} OutVars{reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_3|, reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~val~0#1] 3580#[L854-4, L831-6]don't care [418] L831-6-->L832: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_5|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret14#1] 3702#[L854-4, L832]don't care [420] L832-->L832-3: Formula: (= |v_reader_fnThread1of1ForFork0_~val~0#1_7| (+ |v_reader_fnThread1of1ForFork0_~last~0#1_9| 1)) InVars {reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_7|, reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_9|} OutVars{reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_7|, reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_9|} AuxVars[] AssignedVars[] 3814#[L854-4, L832-3]don't care [422] L832-3-->L834: Formula: (= |v_reader_fnThread1of1ForFork0_~val~0#1_9| |v_reader_fnThread1of1ForFork0_~last~0#1_11|) InVars {reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_9|} OutVars{reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_9|, reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_11|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~last~0#1] 3922#[L854-4, L834]don't care [423] L834-->L834-1: Formula: (= |v_reader_fnThread1of1ForFork0_#t~pre15#1_1| (+ |v_reader_fnThread1of1ForFork0_~i~0#1_7| 1)) InVars {reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_7|} OutVars{reader_fnThread1of1ForFork0_#t~pre15#1=|v_reader_fnThread1of1ForFork0_#t~pre15#1_1|, reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~pre15#1] 4024#[L854-4, L834-1]don't care [424] L834-1-->L834-2: Formula: (= |v_reader_fnThread1of1ForFork0_~i~0#1_10| (+ |v_reader_fnThread1of1ForFork0_~i~0#1_9| 1)) InVars {reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_9|} OutVars{reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_10|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~i~0#1] 4120#[L854-4, L834-2]don't care [425] L834-2-->L828-2: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_#t~pre15#1=|v_reader_fnThread1of1ForFork0_#t~pre15#1_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~pre15#1] 256#[L854-4, L828-2]don't care [2022-07-26 13:24:54,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:54,523 INFO L85 PathProgramCache]: Analyzing trace with hash -447825760, now seen corresponding path program 1 times [2022-07-26 13:24:54,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:54,530 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858039499] [2022-07-26 13:24:54,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:54,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:54,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:54,616 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:24:54,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:54,668 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:24:54,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:54,670 INFO L85 PathProgramCache]: Analyzing trace with hash -167634585, now seen corresponding path program 1 times [2022-07-26 13:24:54,670 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:54,670 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1889616459] [2022-07-26 13:24:54,670 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:54,670 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:54,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:54,720 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:24:54,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:54,751 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:24:54,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:54,754 INFO L85 PathProgramCache]: Analyzing trace with hash 1974270952, now seen corresponding path program 1 times [2022-07-26 13:24:54,754 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:54,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895583184] [2022-07-26 13:24:54,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:54,754 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:54,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:24:55,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:24:55,253 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:24:55,253 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [895583184] [2022-07-26 13:24:55,254 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [895583184] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:24:55,254 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:24:55,254 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2022-07-26 13:24:55,254 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883780878] [2022-07-26 13:24:55,255 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:24:55,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:24:55,798 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2022-07-26 13:24:55,799 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2022-07-26 13:24:55,801 INFO L87 Difference]: Start difference. First operand currently 2548 states, but on-demand construction may add more states Second operand has 18 states, 18 states have (on average 4.222222222222222) internal successors, (76), 18 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:24:57,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:24:57,503 INFO L93 Difference]: Finished difference Result 4316 states and 8777 transitions. [2022-07-26 13:24:57,504 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4316 states and 8777 transitions. [2022-07-26 13:24:57,562 INFO L131 ngComponentsAnalysis]: Automaton has 123 accepting balls. 3014 [2022-07-26 13:24:57,588 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4316 states to 3911 states and 7988 transitions. [2022-07-26 13:24:57,589 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3911 [2022-07-26 13:24:57,593 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3911 [2022-07-26 13:24:57,593 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3911 states and 7988 transitions. [2022-07-26 13:24:57,601 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:24:57,601 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3911 states and 7988 transitions. [2022-07-26 13:24:57,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3911 states and 7988 transitions. [2022-07-26 13:24:57,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3911 to 2804. [2022-07-26 13:24:57,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2804 states, 2804 states have (on average 2.037446504992867) internal successors, (5713), 2803 states have internal predecessors, (5713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:24:57,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2804 states to 2804 states and 5713 transitions. [2022-07-26 13:24:57,679 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2804 states and 5713 transitions. [2022-07-26 13:24:57,680 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2022-07-26 13:24:57,682 INFO L426 stractBuchiCegarLoop]: Abstraction has 2804 states and 5713 transitions. [2022-07-26 13:24:57,682 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-26 13:24:57,683 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2804 states and 5713 transitions. [2022-07-26 13:24:57,693 INFO L131 ngComponentsAnalysis]: Automaton has 71 accepting balls. 2376 [2022-07-26 13:24:57,693 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:24:57,693 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:24:57,694 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:57,694 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:24:57,695 INFO L733 eck$LassoCheckResult]: Stem: 12069#[ULTIMATE.startENTRY]don't care [332] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12071#[L-1]don't care [244] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 12097#[L-1-1]don't care [340] L-1-1-->L-1-2: Formula: (= (select |v_#valid_21| 0) 0) InVars {#valid=|v_#valid_21|} OutVars{#valid=|v_#valid_21|} AuxVars[] AssignedVars[] 12099#[L-1-2]don't care [341] L-1-2-->L803: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 13469#[L803]don't care [224] L803-->L803-1: Formula: (and (= (select |v_#valid_22| 1) 1) (= 2 (select |v_#length_17| 1))) InVars {#length=|v_#length_17|, #valid=|v_#valid_22|} OutVars{#length=|v_#length_17|, #valid=|v_#valid_22|} AuxVars[] AssignedVars[] 13571#[L803-1]don't care [260] L803-1-->L803-2: Formula: (= (select (select |v_#memory_int_21| 1) 0) 48) InVars {#memory_int=|v_#memory_int_21|} OutVars{#memory_int=|v_#memory_int_21|} AuxVars[] AssignedVars[] 13479#[L803-2]don't care [351] L803-2-->L803-3: Formula: (= (select (select |v_#memory_int_22| 1) 1) 0) InVars {#memory_int=|v_#memory_int_22|} OutVars{#memory_int=|v_#memory_int_22|} AuxVars[] AssignedVars[] 13481#[L803-3]don't care [204] L803-3-->L803-4: Formula: (and (= (select |v_#length_18| 2) 7) (= (select |v_#valid_23| 2) 1)) InVars {#length=|v_#length_18|, #valid=|v_#valid_23|} OutVars{#length=|v_#length_18|, #valid=|v_#valid_23|} AuxVars[] AssignedVars[] 12711#[L803-4]don't care [267] L803-4-->L803-5: Formula: (= (select (select |v_#memory_int_23| 2) 0) 114) InVars {#memory_int=|v_#memory_int_23|} OutVars{#memory_int=|v_#memory_int_23|} AuxVars[] AssignedVars[] 12713#[L803-5]don't care [330] L803-5-->L803-6: Formula: (= (select (select |v_#memory_int_24| 2) 1) 105) InVars {#memory_int=|v_#memory_int_24|} OutVars{#memory_int=|v_#memory_int_24|} AuxVars[] AssignedVars[] 10411#[L803-6]don't care [212] L803-6-->L803-7: Formula: (= (select (select |v_#memory_int_25| 2) 2) 110) InVars {#memory_int=|v_#memory_int_25|} OutVars{#memory_int=|v_#memory_int_25|} AuxVars[] AssignedVars[] 10413#[L803-7]don't care [352] L803-7-->L803-8: Formula: (= 103 (select (select |v_#memory_int_26| 2) 3)) InVars {#memory_int=|v_#memory_int_26|} OutVars{#memory_int=|v_#memory_int_26|} AuxVars[] AssignedVars[] 11097#[L803-8]don't care [233] L803-8-->L803-9: Formula: (= (select (select |v_#memory_int_27| 2) 4) 46) InVars {#memory_int=|v_#memory_int_27|} OutVars{#memory_int=|v_#memory_int_27|} AuxVars[] AssignedVars[] 13713#[L803-9]don't care [213] L803-9-->L803-10: Formula: (= 104 (select (select |v_#memory_int_28| 2) 5)) InVars {#memory_int=|v_#memory_int_28|} OutVars{#memory_int=|v_#memory_int_28|} AuxVars[] AssignedVars[] 14187#[L803-10]don't care [261] L803-10-->L803-11: Formula: (= (select (select |v_#memory_int_29| 2) 6) 0) InVars {#memory_int=|v_#memory_int_29|} OutVars{#memory_int=|v_#memory_int_29|} AuxVars[] AssignedVars[] 13577#[L803-11]don't care [269] L803-11-->L-1-3: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12899#[L-1-3]don't care [347] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 9897#[L-1-4]don't care [252] L-1-4-->L-1-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 9899#[L-1-5]don't care [220] L-1-5-->L851: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_3|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_4|, ULTIMATE.start_main_#t~ret20#1.base=|v_ULTIMATE.start_main_#t~ret20#1.base_3|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_5|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_5|, ULTIMATE.start_main_#t~ret20#1.offset=|v_ULTIMATE.start_main_#t~ret20#1.offset_3|, ULTIMATE.start_main_#t~nondet19#1=|v_ULTIMATE.start_main_#t~nondet19#1_2|, ULTIMATE.start_main_#t~mem21#1=|v_ULTIMATE.start_main_#t~mem21#1_3|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre18#1, ULTIMATE.start_main_~#r~2#1.base, ULTIMATE.start_main_#t~ret20#1.base, ULTIMATE.start_main_~#reader~0#1.offset, ULTIMATE.start_main_~#reader~0#1.base, ULTIMATE.start_main_#t~ret20#1.offset, ULTIMATE.start_main_#t~nondet19#1, ULTIMATE.start_main_#t~mem21#1, ULTIMATE.start_main_~#r~2#1.offset] 14189#[L851]don't care [294] L851-->L851-1: Formula: (and (= (select |v_#valid_25| |v_ULTIMATE.start_main_~#reader~0#1.base_6|) 0) (= (store |v_#length_20| |v_ULTIMATE.start_main_~#reader~0#1.base_6| 4) |v_#length_19|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#reader~0#1.base_6|) (= |v_ULTIMATE.start_main_~#reader~0#1.offset_6| 0) (not (= 0 |v_ULTIMATE.start_main_~#reader~0#1.base_6|)) (= (store |v_#valid_25| |v_ULTIMATE.start_main_~#reader~0#1.base_6| 1) |v_#valid_24|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_20|, #valid=|v_#valid_25|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_19|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_6|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_6|, #valid=|v_#valid_24|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#reader~0#1.offset, ULTIMATE.start_main_~#reader~0#1.base, #valid, #length] 14193#[L851-1]don't care [264] L851-1-->L852: Formula: (and (= (store |v_#length_22| |v_ULTIMATE.start_main_~#r~2#1.base_5| 24) |v_#length_21|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#r~2#1.base_5|) (= |v_ULTIMATE.start_main_~#r~2#1.offset_5| 0) (not (= |v_ULTIMATE.start_main_~#r~2#1.base_5| 0)) (= (store |v_#valid_27| |v_ULTIMATE.start_main_~#r~2#1.base_5| 1) |v_#valid_26|) (= (select |v_#valid_27| |v_ULTIMATE.start_main_~#r~2#1.base_5|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_22|, #valid=|v_#valid_27|} OutVars{ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_5|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_21|, #valid=|v_#valid_26|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#r~2#1.base, #valid, #length, ULTIMATE.start_main_~#r~2#1.offset] 12565#[L852]don't care [216] L852-->L853: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12567#[L853]don't care [246] L853-->L853-1: Formula: (and (= |v_ULTIMATE.start_main_~#r~2#1.offset_6| |v_ULTIMATE.start_ring_init_#in~r#1.offset_1|) (= |v_ULTIMATE.start_ring_init_#in~r#1.base_1| |v_ULTIMATE.start_main_~#r~2#1.base_6|)) InVars {ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_6|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_6|} OutVars{ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_1|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_1|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_6|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_6|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_#in~r#1.offset, ULTIMATE.start_ring_init_#in~r#1.base] 12085#[L853-1]don't care [339] L853-1-->L822: Formula: true InVars {} OutVars{ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_1|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_~r#1.offset, ULTIMATE.start_ring_init_~r#1.base] 12087#[L822]don't care [289] L822-->L823: Formula: (and (= |v_ULTIMATE.start_ring_init_~r#1.offset_2| |v_ULTIMATE.start_ring_init_#in~r#1.offset_2|) (= |v_ULTIMATE.start_ring_init_#in~r#1.base_2| |v_ULTIMATE.start_ring_init_~r#1.base_2|)) InVars {ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_2|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_2|} OutVars{ULTIMATE.start_ring_init_#in~r#1.offset=|v_ULTIMATE.start_ring_init_#in~r#1.offset_2|, ULTIMATE.start_ring_init_#in~r#1.base=|v_ULTIMATE.start_ring_init_#in~r#1.base_2|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_2|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_2|} AuxVars[] AssignedVars[ULTIMATE.start_ring_init_~r#1.offset, ULTIMATE.start_ring_init_~r#1.base] 13691#[L823]don't care [203] L823-->L823-1: Formula: (let ((.cse0 (+ |v_ULTIMATE.start_ring_init_~r#1.offset_3| 20))) (and (= |v_#memory_int_30| (store |v_#memory_int_31| |v_ULTIMATE.start_ring_init_~r#1.base_3| (store (select |v_#memory_int_31| |v_ULTIMATE.start_ring_init_~r#1.base_3|) .cse0 0))) (= (select |v_#valid_28| |v_ULTIMATE.start_ring_init_~r#1.base_3|) 1) (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_ring_init_~r#1.offset_3| 24) (select |v_#length_23| |v_ULTIMATE.start_ring_init_~r#1.base_3|)))) InVars {#memory_int=|v_#memory_int_31|, #length=|v_#length_23|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_3|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_3|, #valid=|v_#valid_28|} OutVars{#memory_int=|v_#memory_int_30|, #length=|v_#length_23|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_3|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_3|, #valid=|v_#valid_28|} AuxVars[] AssignedVars[#memory_int] 11995#[L823-1]don't care [304] L823-1-->L823-2: Formula: (and (<= (+ |v_ULTIMATE.start_ring_init_~r#1.offset_4| 4) (select |v_#length_24| |v_ULTIMATE.start_ring_init_~r#1.base_4|)) (<= 0 |v_ULTIMATE.start_ring_init_~r#1.offset_4|) (= |v_#memory_int_32| (store |v_#memory_int_33| |v_ULTIMATE.start_ring_init_~r#1.base_4| (store (select |v_#memory_int_33| |v_ULTIMATE.start_ring_init_~r#1.base_4|) |v_ULTIMATE.start_ring_init_~r#1.offset_4| 0))) (= 1 (select |v_#valid_29| |v_ULTIMATE.start_ring_init_~r#1.base_4|))) InVars {#memory_int=|v_#memory_int_33|, #length=|v_#length_24|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_4|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_4|, #valid=|v_#valid_29|} OutVars{#memory_int=|v_#memory_int_32|, #length=|v_#length_24|, ULTIMATE.start_ring_init_~r#1.offset=|v_ULTIMATE.start_ring_init_~r#1.offset_4|, ULTIMATE.start_ring_init_~r#1.base=|v_ULTIMATE.start_ring_init_~r#1.base_4|, #valid=|v_#valid_29|} AuxVars[] AssignedVars[#memory_int] 10675#[L823-2]don't care [275] L823-2-->L854: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10677#[L854]don't care [338] L854-->L854-1: Formula: (= |v_ULTIMATE.start_main_#t~pre18#1_4| |v_#pthreadsForks_3|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_4|, #pthreadsForks=|v_#pthreadsForks_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre18#1] 10647#[L854-1]don't care [268] L854-1-->L854-2: Formula: (= (+ 1 |v_#pthreadsForks_2|) |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_2|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|} AuxVars[] AssignedVars[#pthreadsForks] 10649#[L854-2]don't care [288] L854-2-->L854-3: Formula: (and (= (store |v_#memory_int_11| |v_ULTIMATE.start_main_~#reader~0#1.base_1| (store (select |v_#memory_int_11| |v_ULTIMATE.start_main_~#reader~0#1.base_1|) |v_ULTIMATE.start_main_~#reader~0#1.offset_1| |v_ULTIMATE.start_main_#t~pre18#1_1|)) |v_#memory_int_10|) (= (select |v_#valid_9| |v_ULTIMATE.start_main_~#reader~0#1.base_1|) 1) (<= 0 |v_ULTIMATE.start_main_~#reader~0#1.offset_1|) (<= (+ |v_ULTIMATE.start_main_~#reader~0#1.offset_1| 4) (select |v_#length_9| |v_ULTIMATE.start_main_~#reader~0#1.base_1|))) InVars {ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_1|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_1|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_1|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_11|, #length=|v_#length_9|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_1|, ULTIMATE.start_main_~#reader~0#1.offset=|v_ULTIMATE.start_main_~#reader~0#1.offset_1|, ULTIMATE.start_main_~#reader~0#1.base=|v_ULTIMATE.start_main_~#reader~0#1.base_1|, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[#memory_int] 11409#[L854-3]don't care [428] L854-3-->reader_fnENTRY: Formula: (and (= v_reader_fnThread1of1ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre18#1_6|) (= v_reader_fnThread1of1ForFork0_thidvar1_2 0) (= |v_ULTIMATE.start_main_~#r~2#1.base_8| |v_reader_fnThread1of1ForFork0_#in~arg#1.base_4|) (= |v_ULTIMATE.start_main_~#r~2#1.offset_8| |v_reader_fnThread1of1ForFork0_#in~arg#1.offset_4|)) InVars {ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_6|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_8|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_8|} OutVars{ULTIMATE.start_main_#t~pre18#1=|v_ULTIMATE.start_main_#t~pre18#1_6|, ULTIMATE.start_main_~#r~2#1.base=|v_ULTIMATE.start_main_~#r~2#1.base_8|, reader_fnThread1of1ForFork0_#t~pre15#1=|v_reader_fnThread1of1ForFork0_#t~pre15#1_6|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_18|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1_10|, reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_4|, reader_fnThread1of1ForFork0_thidvar1=v_reader_fnThread1of1ForFork0_thidvar1_2, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_10|, reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_12|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_4|, reader_fnThread1of1ForFork0_#res#1.base=|v_reader_fnThread1of1ForFork0_#res#1.base_4|, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1_8|, reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_12|, reader_fnThread1of1ForFork0_#res#1.offset=|v_reader_fnThread1of1ForFork0_#res#1.offset_4|, reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_14|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_18|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_6|, reader_fnThread1of1ForFork0_#t~ret14#1=|v_reader_fnThread1of1ForFork0_#t~ret14#1_8|, ULTIMATE.start_main_~#r~2#1.offset=|v_ULTIMATE.start_main_~#r~2#1.offset_8|, reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_14|, reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_10|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_10|, reader_fnThread1of1ForFork0_ring_dequeue_#res#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#res#1_8|, reader_fnThread1of1ForFork0_thidvar0=v_reader_fnThread1of1ForFork0_thidvar0_2, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset_6|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_18|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1_10|, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1=|v_reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1_10|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_18|, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base_6|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base_14|, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset_14|, reader_fnThread1of1ForFork0_#t~ret16#1=|v_reader_fnThread1of1ForFork0_#t~ret16#1_10|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_10|, reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_14|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_6|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~pre15#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem9#1, reader_fnThread1of1ForFork0_#in~arg#1.base, reader_fnThread1of1ForFork0_thidvar1, reader_fnThread1of1ForFork0_~r~0#1.base, reader_fnThread1of1ForFork0_#t~ret13#1, reader_fnThread1of1ForFork0_#in~arg#1.offset, reader_fnThread1of1ForFork0_#res#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~x~0#1, reader_fnThread1of1ForFork0_~val~0#1, reader_fnThread1of1ForFork0_#res#1.offset, reader_fnThread1of1ForFork0_~last~0#1, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset, reader_fnThread1of1ForFork0_~arg#1.offset, reader_fnThread1of1ForFork0_#t~ret14#1, reader_fnThread1of1ForFork0_ring_empty_#res#1, reader_fnThread1of1ForFork0_~r~0#1.offset, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_#res#1, reader_fnThread1of1ForFork0_thidvar0, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.offset, reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem8#1, reader_fnThread1of1ForFork0_ring_dequeue_#t~mem10#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1, reader_fnThread1of1ForFork0_ring_dequeue_#in~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.base, reader_fnThread1of1ForFork0_ring_dequeue_~r#1.offset, reader_fnThread1of1ForFork0_#t~ret16#1, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset, reader_fnThread1of1ForFork0_~i~0#1, reader_fnThread1of1ForFork0_~arg#1.base] 13183#[L854-4, reader_fnENTRY]don't care [355] reader_fnENTRY-->L826: Formula: (and (= |v_reader_fnThread1of1ForFork0_~arg#1.offset_1| |v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|) (= |v_reader_fnThread1of1ForFork0_#in~arg#1.base_1| |v_reader_fnThread1of1ForFork0_~arg#1.base_1|)) InVars {reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_1|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|} OutVars{reader_fnThread1of1ForFork0_#in~arg#1.base=|v_reader_fnThread1of1ForFork0_#in~arg#1.base_1|, reader_fnThread1of1ForFork0_#in~arg#1.offset=|v_reader_fnThread1of1ForFork0_#in~arg#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~arg#1.offset, reader_fnThread1of1ForFork0_~arg#1.base] 11823#[L854-4, L826]don't care [356] L826-->L827: Formula: (and (= |v_reader_fnThread1of1ForFork0_~arg#1.offset_3| |v_reader_fnThread1of1ForFork0_~r~0#1.offset_1|) (= |v_reader_fnThread1of1ForFork0_~arg#1.base_3| |v_reader_fnThread1of1ForFork0_~r~0#1.base_1|)) InVars {reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_3|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_3|} OutVars{reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_1|, reader_fnThread1of1ForFork0_~arg#1.offset=|v_reader_fnThread1of1ForFork0_~arg#1.offset_3|, reader_fnThread1of1ForFork0_~arg#1.base=|v_reader_fnThread1of1ForFork0_~arg#1.base_3|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~r~0#1.offset, reader_fnThread1of1ForFork0_~r~0#1.base] 11825#[L854-4, L827]don't care [357] L827-->L827-1: Formula: (= |v_reader_fnThread1of1ForFork0_~val~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~val~0#1=|v_reader_fnThread1of1ForFork0_~val~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~val~0#1] 12049#[L854-4, L827-1]don't care [358] L827-1-->L827-2: Formula: (= |v_reader_fnThread1of1ForFork0_~last~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~last~0#1=|v_reader_fnThread1of1ForFork0_~last~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~last~0#1] 12053#[L854-4, L827-2]don't care [359] L827-2-->L828-2: Formula: (= |v_reader_fnThread1of1ForFork0_~i~0#1_1| 0) InVars {} OutVars{reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_~i~0#1] 12639#[L854-4, L828-2]don't care [360] L828-2-->L830: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10705#[L854-4, L830]don't care [2022-07-26 13:24:57,695 INFO L735 eck$LassoCheckResult]: Loop: 10705#[L854-4, L830]don't care [363] L830-->L829: Formula: (< |v_reader_fnThread1of1ForFork0_~i~0#1_5| 8) InVars {reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_5|} OutVars{reader_fnThread1of1ForFork0_~i~0#1=|v_reader_fnThread1of1ForFork0_~i~0#1_5|} AuxVars[] AssignedVars[] 11665#[L854-4, L829]don't care [366] L829-->L829-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10551#[L854-4, L829-1]don't care [369] L829-1-->L829-2: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_1| |v_reader_fnThread1of1ForFork0_~r~0#1.base_3|) (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_1| |v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|)) InVars {reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_3|} OutVars{reader_fnThread1of1ForFork0_~r~0#1.offset=|v_reader_fnThread1of1ForFork0_~r~0#1.offset_3|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_1|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_1|, reader_fnThread1of1ForFork0_~r~0#1.base=|v_reader_fnThread1of1ForFork0_~r~0#1.base_3|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset] 10553#[L854-4, L829-2]don't care [371] L829-2-->L829-3: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#res#1] 11289#[L854-4, L829-3]don't care [373] L829-3-->L819: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_1|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_1|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset] 13561#[L854-4, L819]don't care [375] L819-->L820: Formula: (and (= |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_5| |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|) (= |v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_5|)) InVars {reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.base_5|, reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_#in~r#1.offset_5|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_5|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_~r#1.base, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset] 11331#[L854-4, L820]don't care [377] L820-->L820-1: Formula: (and (= (select |v_#valid_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|) 1) (<= (+ 4 |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|) (select |v_#length_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|)) (= (select (select |v_#memory_int_1| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|) |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|) |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_5|) (<= 0 |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|)) InVars {#memory_int=|v_#memory_int_1|, #length=|v_#length_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|, #valid=|v_#valid_1|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_5|, #valid=|v_#valid_1|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_9|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1] 11257#[L854-4, L820-1]don't care [379] L820-1-->L820-2: Formula: (let ((.cse0 (+ |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13| 20))) (and (<= 0 .cse0) (= (select |v_#valid_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|) 1) (<= (+ |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13| 24) (select |v_#length_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|)) (= (select (select |v_#memory_int_2| |v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|) .cse0) |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_5|))) InVars {#memory_int=|v_#memory_int_2|, #length=|v_#length_2|, reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13|, #valid=|v_#valid_2|} OutVars{reader_fnThread1of1ForFork0_ring_empty_~r#1.base=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.base_13|, #valid=|v_#valid_2|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_2|, reader_fnThread1of1ForFork0_ring_empty_~r#1.offset=|v_reader_fnThread1of1ForFork0_ring_empty_~r#1.offset_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1] 9835#[L854-4, L820-2]don't care [381] L820-2-->L820-3: Formula: (= (ite (= (ite (= |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9| |v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|) 1 0) 0) 0 1) |v_reader_fnThread1of1ForFork0_ring_empty_#res#1_5|) InVars {reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_5|, reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_9|, reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_9|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#res#1] 9839#[L854-4, L820-3]don't care [383] L820-3-->L820-4: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem11#1] 12555#[L854-4, L820-4]don't care [385] L820-4-->L820-5: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1=|v_reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1_13|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_ring_empty_#t~mem12#1] 14167#[L854-4, L820-5]don't care [387] L820-5-->L829-4: Formula: (= |v_reader_fnThread1of1ForFork0_#t~ret13#1_1| |v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|) InVars {reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|} OutVars{reader_fnThread1of1ForFork0_ring_empty_#res#1=|v_reader_fnThread1of1ForFork0_ring_empty_#res#1_9|, reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_1|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret13#1] 14159#[L854-4, L829-4]don't care [389] L829-4-->L829-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 12631#[L854-4, L829-5]don't care [391] L829-5-->L829-6: Formula: (not (= (mod |v_reader_fnThread1of1ForFork0_#t~ret13#1_3| 256) 0)) InVars {reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_3|} OutVars{reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_3|} AuxVars[] AssignedVars[] 10701#[L854-4, L829-6]don't care [395] L829-6-->L830: Formula: true InVars {} OutVars{reader_fnThread1of1ForFork0_#t~ret13#1=|v_reader_fnThread1of1ForFork0_#t~ret13#1_7|} AuxVars[] AssignedVars[reader_fnThread1of1ForFork0_#t~ret13#1] 10705#[L854-4, L830]don't care [2022-07-26 13:24:57,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:57,696 INFO L85 PathProgramCache]: Analyzing trace with hash -997696312, now seen corresponding path program 1 times [2022-07-26 13:24:57,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:57,696 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575637264] [2022-07-26 13:24:57,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:57,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:57,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,707 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:24:57,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,717 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:24:57,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:57,717 INFO L85 PathProgramCache]: Analyzing trace with hash 1915113371, now seen corresponding path program 1 times [2022-07-26 13:24:57,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:57,718 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398385830] [2022-07-26 13:24:57,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:57,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:57,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,723 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:24:57,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,731 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:24:57,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:24:57,731 INFO L85 PathProgramCache]: Analyzing trace with hash -792859660, now seen corresponding path program 1 times [2022-07-26 13:24:57,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:24:57,732 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2063366245] [2022-07-26 13:24:57,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:24:57,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:24:57,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,756 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:24:57,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:24:57,771 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:24:58,570 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.07 01:24:58 BoogieIcfgContainer [2022-07-26 13:24:58,570 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-26 13:24:58,571 INFO L158 Benchmark]: Toolchain (without parser) took 5349.33ms. Allocated memory was 204.5MB in the beginning and 253.8MB in the end (delta: 49.3MB). Free memory was 151.6MB in the beginning and 217.0MB in the end (delta: -65.5MB). Peak memory consumption was 124.1MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,571 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 204.5MB. Free memory was 169.7MB in the beginning and 169.6MB in the end (delta: 151.8kB). There was no memory consumed. Max. memory is 8.0GB. [2022-07-26 13:24:58,572 INFO L158 Benchmark]: CACSL2BoogieTranslator took 413.94ms. Allocated memory is still 204.5MB. Free memory was 151.4MB in the beginning and 165.5MB in the end (delta: -14.1MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,572 INFO L158 Benchmark]: Boogie Procedure Inliner took 57.38ms. Allocated memory is still 204.5MB. Free memory was 164.9MB in the beginning and 162.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,572 INFO L158 Benchmark]: Boogie Preprocessor took 31.61ms. Allocated memory is still 204.5MB. Free memory was 162.8MB in the beginning and 161.3MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,573 INFO L158 Benchmark]: RCFGBuilder took 359.99ms. Allocated memory is still 204.5MB. Free memory was 160.7MB in the beginning and 143.4MB in the end (delta: 17.3MB). Peak memory consumption was 17.8MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,573 INFO L158 Benchmark]: BuchiAutomizer took 4481.84ms. Allocated memory was 204.5MB in the beginning and 253.8MB in the end (delta: 49.3MB). Free memory was 143.4MB in the beginning and 217.0MB in the end (delta: -73.6MB). Peak memory consumption was 116.7MB. Max. memory is 8.0GB. [2022-07-26 13:24:58,583 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 204.5MB. Free memory was 169.7MB in the beginning and 169.6MB in the end (delta: 151.8kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 413.94ms. Allocated memory is still 204.5MB. Free memory was 151.4MB in the beginning and 165.5MB in the end (delta: -14.1MB). Peak memory consumption was 10.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 57.38ms. Allocated memory is still 204.5MB. Free memory was 164.9MB in the beginning and 162.8MB in the end (delta: 2.1MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 31.61ms. Allocated memory is still 204.5MB. Free memory was 162.8MB in the beginning and 161.3MB in the end (delta: 1.6MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * RCFGBuilder took 359.99ms. Allocated memory is still 204.5MB. Free memory was 160.7MB in the beginning and 143.4MB in the end (delta: 17.3MB). Peak memory consumption was 17.8MB. Max. memory is 8.0GB. * BuchiAutomizer took 4481.84ms. Allocated memory was 204.5MB in the beginning and 253.8MB in the end (delta: 49.3MB). Free memory was 143.4MB in the beginning and 217.0MB in the end (delta: -73.6MB). Peak memory consumption was 116.7MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 1 terminating modules (1 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.1 modules have a trivial ranking function, the largest among these consists of 18 locations. The remainder module has 2804 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.3s and 2 iterations. TraceHistogramMax:1. Analysis of lassos took 2.1s. Construction of modules took 0.4s. Büchi inclusion checks took 1.4s. Highest rank in rank-based complementation 0. Minimization of det autom 1. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 1 MinimizatonAttempts, 1107 StatesRemovedByMinimization, 1 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1494 SdHoareTripleChecker+Valid, 0.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1494 mSDsluCounter, 3123 SdHoareTripleChecker+Invalid, 0.4s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 2797 mSDsCounter, 43 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1050 IncrementalHoareTripleChecker+Invalid, 1093 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 43 mSolverCounterUnsat, 338 mSDtfsCounter, 1050 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc1 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 828]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=1, \result={0:0}, \result=0, \result=0, arg={22888:0}, arg={22888:0}, i=0, last=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTArraySubscriptExpression@644856cc=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFieldReference@51d0b649=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFieldReference@547d5fd9=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFieldReference@63e73e20=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFieldReference@719c9357=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@2c123e8b=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@65a9fe3a=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@698103f7 in-1,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@b9f9034={0:0}, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@c46544f=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@70d9ed93=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTUnaryExpression@114b02cf=0, r={0:0}, r={22888:0}, r={22888:0}, r={22888:0}, r={22888:0}, r={22888:0}, r={0:0}, r={22888:0}, reader={23057:0}, val=0, x=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 828]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L851] 0 pthread_t reader; [L852] 0 Ring r; [L853] CALL 0 ring_init( &r ) [L823] EXPR 0 r->writer = 0 [L823] 0 r->reader = r->writer = 0 [L853] RET 0 ring_init( &r ) [L854] FCALL, FORK 0 pthread_create( &reader, ((void *)0), &reader_fn, &r ) [L826] 1 Ring *r = arg; [L827] 1 long val = 0, last = 0, i = 0; Loop: [L828] COND TRUE i < 8 [L829] CALL ring_empty( r ) [L820] EXPR r->reader [L820] EXPR r->writer [L820] return r->reader == r->writer; [L829] RET ring_empty( r ) [L829] COND TRUE ring_empty( r ) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-26 13:24:58,633 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...