/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf -i ../../../trunk/examples/svcomp/pthread-atomic/szymanski.i -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-0d686a6 [2022-07-26 13:22:17,193 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-07-26 13:22:17,195 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-07-26 13:22:17,229 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-07-26 13:22:17,268 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/buchiAutomizer/concurrent-automaton-noLbe.epf [2022-07-26 13:22:17,282 INFO L113 SettingsManager]: Loading preferences was successful [2022-07-26 13:22:17,282 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-07-26 13:22:17,282 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-07-26 13:22:17,283 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-07-26 13:22:17,283 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-07-26 13:22:17,283 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Use SBE=true [2022-07-26 13:22:17,284 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Use old map elimination=false [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2022-07-26 13:22:17,284 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * sizeof long=4 [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2022-07-26 13:22:17,284 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-07-26 13:22:17,285 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * sizeof long double=12 [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2022-07-26 13:22:17,286 INFO L138 SettingsManager]: * Use constant arrays=true [2022-07-26 13:22:17,287 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2022-07-26 13:22:17,287 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-07-26 13:22:17,287 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-07-26 13:22:17,287 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-07-26 13:22:17,287 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-07-26 13:22:17,287 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-07-26 13:22:17,288 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-07-26 13:22:17,288 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-07-26 13:22:17,432 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-07-26 13:22:17,444 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-07-26 13:22:17,446 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-07-26 13:22:17,447 INFO L271 PluginConnector]: Initializing CDTParser... [2022-07-26 13:22:17,447 INFO L275 PluginConnector]: CDTParser initialized [2022-07-26 13:22:17,448 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/szymanski.i [2022-07-26 13:22:17,494 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/650501d23/b3a3c7fe97d54c18a6750397a1546021/FLAGdd757d1e0 [2022-07-26 13:22:17,895 INFO L306 CDTParser]: Found 1 translation units. [2022-07-26 13:22:17,896 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i [2022-07-26 13:22:17,904 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/650501d23/b3a3c7fe97d54c18a6750397a1546021/FLAGdd757d1e0 [2022-07-26 13:22:17,920 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/650501d23/b3a3c7fe97d54c18a6750397a1546021 [2022-07-26 13:22:17,922 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-07-26 13:22:17,922 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2022-07-26 13:22:17,928 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:17,928 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-07-26 13:22:17,930 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-07-26 13:22:17,931 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:17" (1/1) ... [2022-07-26 13:22:17,932 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7420daed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:17, skipping insertion in model container [2022-07-26 13:22:17,932 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.07 01:22:17" (1/1) ... [2022-07-26 13:22:17,936 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-07-26 13:22:17,972 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-07-26 13:22:18,099 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:18,195 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i[31505,31518] [2022-07-26 13:22:18,198 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i[32915,32928] [2022-07-26 13:22:18,202 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:18,206 INFO L203 MainTranslator]: Completed pre-run [2022-07-26 13:22:18,222 WARN L611 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2022-07-26 13:22:18,251 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i[31505,31518] [2022-07-26 13:22:18,253 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/szymanski.i[32915,32928] [2022-07-26 13:22:18,256 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-07-26 13:22:18,275 INFO L208 MainTranslator]: Completed translation [2022-07-26 13:22:18,275 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18 WrapperNode [2022-07-26 13:22:18,275 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-07-26 13:22:18,276 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:18,276 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-07-26 13:22:18,276 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-07-26 13:22:18,281 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,290 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,301 INFO L137 Inliner]: procedures = 171, calls = 75, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 42 [2022-07-26 13:22:18,302 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-07-26 13:22:18,302 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-07-26 13:22:18,302 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-07-26 13:22:18,302 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-07-26 13:22:18,307 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,308 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,310 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,310 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,314 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,317 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,318 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,320 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-07-26 13:22:18,321 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-07-26 13:22:18,321 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-07-26 13:22:18,321 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-07-26 13:22:18,321 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (1/1) ... [2022-07-26 13:22:18,326 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2022-07-26 13:22:18,335 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-07-26 13:22:18,361 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2022-07-26 13:22:18,368 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2022-07-26 13:22:18,387 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2022-07-26 13:22:18,388 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2022-07-26 13:22:18,388 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2022-07-26 13:22:18,388 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2022-07-26 13:22:18,388 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2022-07-26 13:22:18,388 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2022-07-26 13:22:18,388 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2022-07-26 13:22:18,389 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-07-26 13:22:18,389 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-07-26 13:22:18,390 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-07-26 13:22:18,496 INFO L234 CfgBuilder]: Building ICFG [2022-07-26 13:22:18,497 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-07-26 13:22:18,641 INFO L275 CfgBuilder]: Performing block encoding [2022-07-26 13:22:18,646 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-07-26 13:22:18,646 INFO L299 CfgBuilder]: Removed 8 assume(true) statements. [2022-07-26 13:22:18,648 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:18 BoogieIcfgContainer [2022-07-26 13:22:18,648 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-07-26 13:22:18,649 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2022-07-26 13:22:18,649 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2022-07-26 13:22:18,651 INFO L275 PluginConnector]: BuchiAutomizer initialized [2022-07-26 13:22:18,651 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:18,652 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 26.07 01:22:17" (1/3) ... [2022-07-26 13:22:18,652 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4fa12d93 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:18, skipping insertion in model container [2022-07-26 13:22:18,652 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:18,652 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.07 01:22:18" (2/3) ... [2022-07-26 13:22:18,652 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4fa12d93 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 26.07 01:22:18, skipping insertion in model container [2022-07-26 13:22:18,653 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2022-07-26 13:22:18,653 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.07 01:22:18" (3/3) ... [2022-07-26 13:22:18,653 INFO L322 chiAutomizerObserver]: Analyzing ICFG szymanski.i [2022-07-26 13:22:18,701 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2022-07-26 13:22:18,719 INFO L74 FinitePrefix]: Start finitePrefix. Operand has 102 places, 117 transitions, 250 flow [2022-07-26 13:22:18,756 INFO L129 PetriNetUnfolder]: 20/113 cut-off events. [2022-07-26 13:22:18,756 INFO L130 PetriNetUnfolder]: For 2/2 co-relation queries the response was YES. [2022-07-26 13:22:18,764 INFO L84 FinitePrefix]: Finished finitePrefix Result has 122 conditions, 113 events. 20/113 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 148 event pairs, 0 based on Foata normal form. 0/93 useless extension candidates. Maximal degree in co-relation 81. Up to 3 conditions per place. [2022-07-26 13:22:18,764 INFO L82 GeneralOperation]: Start removeDead. Operand has 102 places, 117 transitions, 250 flow [2022-07-26 13:22:18,773 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 100 places, 113 transitions, 238 flow [2022-07-26 13:22:18,783 INFO L301 stractBuchiCegarLoop]: Interprodecural is true [2022-07-26 13:22:18,783 INFO L302 stractBuchiCegarLoop]: Hoare is false [2022-07-26 13:22:18,784 INFO L303 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2022-07-26 13:22:18,784 INFO L304 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2022-07-26 13:22:18,784 INFO L305 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2022-07-26 13:22:18,784 INFO L306 stractBuchiCegarLoop]: Difference is false [2022-07-26 13:22:18,784 INFO L307 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2022-07-26 13:22:18,784 INFO L311 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2022-07-26 13:22:18,785 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2022-07-26 13:22:19,018 INFO L131 ngComponentsAnalysis]: Automaton has 676 accepting balls. 1480 [2022-07-26 13:22:19,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:19,019 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:19,023 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:19,024 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:19,024 INFO L333 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2022-07-26 13:22:19,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 2968 states, but on-demand construction may add more states [2022-07-26 13:22:19,086 INFO L131 ngComponentsAnalysis]: Automaton has 676 accepting balls. 1480 [2022-07-26 13:22:19,086 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:19,086 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:19,087 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:19,087 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:19,092 INFO L733 eck$LassoCheckResult]: Stem: 105#[ULTIMATE.startENTRY]don't care [286] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 108#[L-1]don't care [260] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 110#[L-1-1]don't care [301] L-1-1-->L-1-2: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[] 112#[L-1-2]don't care [304] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 114#[L12]don't care [226] L12-->L12-1: Formula: (and (= (select |v_#valid_7| 1) 1) (= (select |v_#length_2| 1) 2)) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 116#[L12-1]don't care [253] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_2| 1) 0) 48) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 118#[L12-2]don't care [251] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_3| 1) 1) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 120#[L12-3]don't care [287] L12-3-->L12-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 12 (select |v_#length_3| 2))) InVars {#length=|v_#length_3|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] 122#[L12-4]don't care [277] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 124#[L700]don't care [305] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 126#[L701]don't care [291] L701-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 128#[L-1-3]don't care [306] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 130#[L-1-4]don't care [276] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 132#[L-1-5]don't care [223] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 134#[L-1-6]don't care [274] L-1-6-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 136#[L817]don't care [302] L817-->L817-1: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_4|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 138#[L817-1]don't care [209] L817-1-->L817-2: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 0) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 4)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_5| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_5|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 140#[L817-2]don't care [211] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 142#[L818]don't care [227] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 144#[L818-1]don't care [233] L818-1-->L818-2: Formula: (and (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_4|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} OutVars{#valid=|v_#valid_13|, #memory_int=|v_#memory_int_4|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 146#[L818-2]don't care [390] L818-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_40, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~_.offset] 148#[L818-3, thr1ENTRY]don't care [353] thr1ENTRY-->L703: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 150#[L818-3, L703]don't care [354] L703-->L705: Formula: (= v_~flag1~0_10 1) InVars {} OutVars{~flag1~0=v_~flag1~0_10} AuxVars[] AssignedVars[~flag1~0] 154#[L705, L818-3]don't care [355] L705-->L712: Formula: (= v_~flag2~0_8 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 160#[L712, L818-3]don't care [2022-07-26 13:22:19,092 INFO L735 eck$LassoCheckResult]: Loop: 160#[L712, L818-3]don't care [358] L712-->L710: Formula: (<= 3 v_thr1Thread1of1ForFork0_~f21~0_5) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5} AuxVars[] AssignedVars[] 170#[L710, L818-3]don't care [360] L710-->L712: Formula: (= v_thr1Thread1of1ForFork0_~f21~0_7 v_~flag2~0_10) InVars {~flag2~0=v_~flag2~0_10} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_10} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 160#[L712, L818-3]don't care [2022-07-26 13:22:19,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:19,096 INFO L85 PathProgramCache]: Analyzing trace with hash -1049414625, now seen corresponding path program 1 times [2022-07-26 13:22:19,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:19,102 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602606785] [2022-07-26 13:22:19,102 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:19,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:19,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:19,214 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:19,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:19,267 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:19,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:19,269 INFO L85 PathProgramCache]: Analyzing trace with hash 12419, now seen corresponding path program 1 times [2022-07-26 13:22:19,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:19,270 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528971752] [2022-07-26 13:22:19,270 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:19,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:19,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:19,284 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:19,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:19,296 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:19,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:19,297 INFO L85 PathProgramCache]: Analyzing trace with hash 829871393, now seen corresponding path program 1 times [2022-07-26 13:22:19,297 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:19,297 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1221217253] [2022-07-26 13:22:19,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:19,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:19,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:19,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:19,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:19,414 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1221217253] [2022-07-26 13:22:19,414 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1221217253] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:19,414 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:19,415 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:19,415 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [687005937] [2022-07-26 13:22:19,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:19,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:19,488 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:19,489 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:19,491 INFO L87 Difference]: Start difference. First operand currently 2968 states, but on-demand construction may add more states Second operand has 4 states, 4 states have (on average 6.5) internal successors, (26), 4 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:19,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:19,681 INFO L93 Difference]: Finished difference Result 4513 states and 13103 transitions. [2022-07-26 13:22:19,683 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4513 states and 13103 transitions. [2022-07-26 13:22:19,725 INFO L131 ngComponentsAnalysis]: Automaton has 852 accepting balls. 1832 [2022-07-26 13:22:19,771 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4513 states to 3931 states and 11532 transitions. [2022-07-26 13:22:19,772 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3931 [2022-07-26 13:22:19,780 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3931 [2022-07-26 13:22:19,781 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3931 states and 11532 transitions. [2022-07-26 13:22:19,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:19,805 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3931 states and 11532 transitions. [2022-07-26 13:22:19,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3931 states and 11532 transitions. [2022-07-26 13:22:19,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3931 to 2882. [2022-07-26 13:22:19,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2882 states, 2882 states have (on average 2.9736294240111034) internal successors, (8570), 2881 states have internal predecessors, (8570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:19,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2882 states to 2882 states and 8570 transitions. [2022-07-26 13:22:19,927 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2882 states and 8570 transitions. [2022-07-26 13:22:19,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:19,933 INFO L426 stractBuchiCegarLoop]: Abstraction has 2882 states and 8570 transitions. [2022-07-26 13:22:19,935 INFO L333 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2022-07-26 13:22:19,938 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2882 states and 8570 transitions. [2022-07-26 13:22:19,953 INFO L131 ngComponentsAnalysis]: Automaton has 648 accepting balls. 1424 [2022-07-26 13:22:19,953 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:19,953 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:19,954 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:19,954 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:19,956 INFO L733 eck$LassoCheckResult]: Stem: 14008#[ULTIMATE.startENTRY]don't care [286] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 14010#[L-1]don't care [260] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 14052#[L-1-1]don't care [301] L-1-1-->L-1-2: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[] 14054#[L-1-2]don't care [304] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 15580#[L12]don't care [226] L12-->L12-1: Formula: (and (= (select |v_#valid_7| 1) 1) (= (select |v_#length_2| 1) 2)) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 16044#[L12-1]don't care [253] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_2| 1) 0) 48) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 14512#[L12-2]don't care [251] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_3| 1) 1) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 14514#[L12-3]don't care [287] L12-3-->L12-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 12 (select |v_#length_3| 2))) InVars {#length=|v_#length_3|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] 13316#[L12-4]don't care [277] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 13318#[L700]don't care [305] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 15158#[L701]don't care [291] L701-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 14932#[L-1-3]don't care [306] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10978#[L-1-4]don't care [276] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 10980#[L-1-5]don't care [223] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 12558#[L-1-6]don't care [274] L-1-6-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 11116#[L817]don't care [302] L817-->L817-1: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_4|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 11118#[L817-1]don't care [209] L817-1-->L817-2: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 0) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 4)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_5| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_5|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 16126#[L817-2]don't care [211] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 15212#[L818]don't care [227] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 15214#[L818-1]don't care [233] L818-1-->L818-2: Formula: (and (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_4|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} OutVars{#valid=|v_#valid_13|, #memory_int=|v_#memory_int_4|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 10804#[L818-2]don't care [390] L818-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_40, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~_.offset] 10806#[L818-3, thr1ENTRY]don't care [281] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 16114#[thr1ENTRY, L818-4]don't care [259] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 10692#[thr1ENTRY, L819]don't care [280] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 10696#[thr1ENTRY, L819-1]don't care [219] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 16040#[L819-2, thr1ENTRY]don't care [255] L819-2-->L819-3: Formula: (and (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 1) (= (store |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6| (store (select |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) |v_ULTIMATE.start_main_~#t2~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_6|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|) (select |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[#memory_int] 16042#[L819-3, thr1ENTRY]don't care [393] L819-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_40, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 14544#[thr1ENTRY, L819-4, thr2ENTRY]don't care [318] thr2ENTRY-->L760: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 12244#[thr1ENTRY, L819-4, L760]don't care [319] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 11072#[L762, thr1ENTRY, L819-4]don't care [320] L762-->L769: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork1_~f12~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 11074#[thr1ENTRY, L819-4, L769]don't care [2022-07-26 13:22:19,956 INFO L735 eck$LassoCheckResult]: Loop: 11074#[thr1ENTRY, L819-4, L769]don't care [323] L769-->L767: Formula: (<= 3 v_thr2Thread1of1ForFork1_~f12~0_5) InVars {thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} OutVars{thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} AuxVars[] AssignedVars[] 15190#[thr1ENTRY, L819-4, L767]don't care [325] L767-->L769: Formula: (= v_~flag1~0_3 v_thr2Thread1of1ForFork1_~f12~0_7) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 11074#[thr1ENTRY, L819-4, L769]don't care [2022-07-26 13:22:19,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:19,957 INFO L85 PathProgramCache]: Analyzing trace with hash -1873717563, now seen corresponding path program 1 times [2022-07-26 13:22:19,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:19,958 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472901546] [2022-07-26 13:22:19,958 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:19,958 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:19,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:19,995 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,009 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,009 INFO L85 PathProgramCache]: Analyzing trace with hash 11299, now seen corresponding path program 1 times [2022-07-26 13:22:20,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,009 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950962457] [2022-07-26 13:22:20,009 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,016 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,019 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,019 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,019 INFO L85 PathProgramCache]: Analyzing trace with hash -1051270681, now seen corresponding path program 1 times [2022-07-26 13:22:20,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,020 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842401893] [2022-07-26 13:22:20,020 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:20,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:20,073 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:20,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842401893] [2022-07-26 13:22:20,073 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842401893] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:20,073 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:20,073 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:20,073 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739682370] [2022-07-26 13:22:20,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:20,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:20,088 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:20,088 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:20,088 INFO L87 Difference]: Start difference. First operand 2882 states and 8570 transitions. cyclomatic complexity: 6336 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:20,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:20,222 INFO L93 Difference]: Finished difference Result 4157 states and 12108 transitions. [2022-07-26 13:22:20,222 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4157 states and 12108 transitions. [2022-07-26 13:22:20,246 INFO L131 ngComponentsAnalysis]: Automaton has 791 accepting balls. 1710 [2022-07-26 13:22:20,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4157 states to 3726 states and 10960 transitions. [2022-07-26 13:22:20,272 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3726 [2022-07-26 13:22:20,278 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3726 [2022-07-26 13:22:20,278 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3726 states and 10960 transitions. [2022-07-26 13:22:20,283 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:20,283 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3726 states and 10960 transitions. [2022-07-26 13:22:20,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3726 states and 10960 transitions. [2022-07-26 13:22:20,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3726 to 2896. [2022-07-26 13:22:20,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2896 states, 2896 states have (on average 2.9772099447513813) internal successors, (8622), 2895 states have internal predecessors, (8622), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:20,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2896 states to 2896 states and 8622 transitions. [2022-07-26 13:22:20,347 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2896 states and 8622 transitions. [2022-07-26 13:22:20,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:20,348 INFO L426 stractBuchiCegarLoop]: Abstraction has 2896 states and 8622 transitions. [2022-07-26 13:22:20,349 INFO L333 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2022-07-26 13:22:20,349 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2896 states and 8622 transitions. [2022-07-26 13:22:20,362 INFO L131 ngComponentsAnalysis]: Automaton has 635 accepting balls. 1398 [2022-07-26 13:22:20,362 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:20,362 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:20,363 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:20,363 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:20,365 INFO L733 eck$LassoCheckResult]: Stem: 23522#[ULTIMATE.startENTRY]don't care [286] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 23524#[L-1]don't care [260] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 23572#[L-1-1]don't care [301] L-1-1-->L-1-2: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[] 23574#[L-1-2]don't care [304] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 25082#[L12]don't care [226] L12-->L12-1: Formula: (and (= (select |v_#valid_7| 1) 1) (= (select |v_#length_2| 1) 2)) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 25660#[L12-1]don't care [253] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_2| 1) 0) 48) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 24012#[L12-2]don't care [251] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_3| 1) 1) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 24014#[L12-3]don't care [287] L12-3-->L12-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 12 (select |v_#length_3| 2))) InVars {#length=|v_#length_3|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] 22882#[L12-4]don't care [277] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 22884#[L700]don't care [305] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 24660#[L701]don't care [291] L701-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 24440#[L-1-3]don't care [306] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 20860#[L-1-4]don't care [276] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 20862#[L-1-5]don't care [223] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 22172#[L-1-6]don't care [274] L-1-6-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 20990#[L817]don't care [302] L817-->L817-1: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_4|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 20992#[L817-1]don't care [209] L817-1-->L817-2: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 0) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 4)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_5| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_5|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 25772#[L817-2]don't care [211] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 24712#[L818]don't care [227] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 24714#[L818-1]don't care [233] L818-1-->L818-2: Formula: (and (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_4|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} OutVars{#valid=|v_#valid_13|, #memory_int=|v_#memory_int_4|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 20716#[L818-2]don't care [390] L818-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_40, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~_.offset] 20718#[L818-3, thr1ENTRY]don't care [353] thr1ENTRY-->L703: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 24992#[L818-3, L703]don't care [354] L703-->L705: Formula: (= v_~flag1~0_10 1) InVars {} OutVars{~flag1~0=v_~flag1~0_10} AuxVars[] AssignedVars[~flag1~0] 24994#[L705, L818-3]don't care [281] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 23972#[L705, L818-4]don't care [259] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 25008#[L705, L819]don't care [280] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 23222#[L705, L819-1]don't care [219] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 24634#[L705, L819-2]don't care [255] L819-2-->L819-3: Formula: (and (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 1) (= (store |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6| (store (select |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) |v_ULTIMATE.start_main_~#t2~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_6|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|) (select |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[#memory_int] 22852#[L705, L819-3]don't care [393] L819-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_40, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 23416#[L819-4, L705, thr2ENTRY]don't care [318] thr2ENTRY-->L760: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 21668#[L819-4, L705, L760]don't care [319] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 20802#[L762, L819-4, L705]don't care [320] L762-->L769: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork1_~f12~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 20804#[L769, L819-4, L705]don't care [2022-07-26 13:22:20,365 INFO L735 eck$LassoCheckResult]: Loop: 20804#[L769, L819-4, L705]don't care [323] L769-->L767: Formula: (<= 3 v_thr2Thread1of1ForFork1_~f12~0_5) InVars {thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} OutVars{thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} AuxVars[] AssignedVars[] 24522#[L819-4, L705, L767]don't care [325] L767-->L769: Formula: (= v_~flag1~0_3 v_thr2Thread1of1ForFork1_~f12~0_7) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 20804#[L769, L819-4, L705]don't care [2022-07-26 13:22:20,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,366 INFO L85 PathProgramCache]: Analyzing trace with hash 379057284, now seen corresponding path program 1 times [2022-07-26 13:22:20,366 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,366 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268240728] [2022-07-26 13:22:20,366 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,366 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,393 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,402 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,402 INFO L85 PathProgramCache]: Analyzing trace with hash 11299, now seen corresponding path program 2 times [2022-07-26 13:22:20,402 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,402 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [932027161] [2022-07-26 13:22:20,402 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,403 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,405 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,406 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,407 INFO L85 PathProgramCache]: Analyzing trace with hash -798159898, now seen corresponding path program 1 times [2022-07-26 13:22:20,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,407 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [642980088] [2022-07-26 13:22:20,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:20,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:20,429 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:20,429 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [642980088] [2022-07-26 13:22:20,429 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [642980088] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:20,429 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:20,429 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:20,429 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642033521] [2022-07-26 13:22:20,430 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:20,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:20,438 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:20,438 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:20,438 INFO L87 Difference]: Start difference. First operand 2896 states and 8622 transitions. cyclomatic complexity: 6361 Second operand has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:20,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:20,552 INFO L93 Difference]: Finished difference Result 3885 states and 11327 transitions. [2022-07-26 13:22:20,553 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3885 states and 11327 transitions. [2022-07-26 13:22:20,576 INFO L131 ngComponentsAnalysis]: Automaton has 795 accepting balls. 1694 [2022-07-26 13:22:20,602 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3885 states to 3877 states and 11313 transitions. [2022-07-26 13:22:20,602 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3877 [2022-07-26 13:22:20,606 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3877 [2022-07-26 13:22:20,606 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3877 states and 11313 transitions. [2022-07-26 13:22:20,611 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:20,611 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3877 states and 11313 transitions. [2022-07-26 13:22:20,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3877 states and 11313 transitions. [2022-07-26 13:22:20,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3877 to 2888. [2022-07-26 13:22:20,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2888 states, 2888 states have (on average 2.9473684210526314) internal successors, (8512), 2887 states have internal predecessors, (8512), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:20,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2888 states to 2888 states and 8512 transitions. [2022-07-26 13:22:20,709 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2888 states and 8512 transitions. [2022-07-26 13:22:20,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:20,712 INFO L426 stractBuchiCegarLoop]: Abstraction has 2888 states and 8512 transitions. [2022-07-26 13:22:20,712 INFO L333 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2022-07-26 13:22:20,712 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2888 states and 8512 transitions. [2022-07-26 13:22:20,723 INFO L131 ngComponentsAnalysis]: Automaton has 611 accepting balls. 1326 [2022-07-26 13:22:20,724 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:20,724 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:20,724 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:20,724 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:20,725 INFO L733 eck$LassoCheckResult]: Stem: 33156#[ULTIMATE.startENTRY]don't care [286] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 33158#[L-1]don't care [260] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 33194#[L-1-1]don't care [301] L-1-1-->L-1-2: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[] 33196#[L-1-2]don't care [304] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 34688#[L12]don't care [226] L12-->L12-1: Formula: (and (= (select |v_#valid_7| 1) 1) (= (select |v_#length_2| 1) 2)) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 35300#[L12-1]don't care [253] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_2| 1) 0) 48) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 33626#[L12-2]don't care [251] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_3| 1) 1) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 33628#[L12-3]don't care [287] L12-3-->L12-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 12 (select |v_#length_3| 2))) InVars {#length=|v_#length_3|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] 32550#[L12-4]don't care [277] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 32552#[L700]don't care [305] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 34228#[L701]don't care [291] L701-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 34016#[L-1-3]don't care [306] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 30538#[L-1-4]don't care [276] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 30540#[L-1-5]don't care [223] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 31838#[L-1-6]don't care [274] L-1-6-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 30660#[L817]don't care [302] L817-->L817-1: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_4|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 30662#[L817-1]don't care [209] L817-1-->L817-2: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 0) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 4)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_5| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_5|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 35416#[L817-2]don't care [211] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 34286#[L818]don't care [227] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 34288#[L818-1]don't care [233] L818-1-->L818-2: Formula: (and (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_4|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} OutVars{#valid=|v_#valid_13|, #memory_int=|v_#memory_int_4|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 30404#[L818-2]don't care [390] L818-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_40, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~_.offset] 30406#[L818-3, thr1ENTRY]don't care [353] thr1ENTRY-->L703: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 34598#[L818-3, L703]don't care [354] L703-->L705: Formula: (= v_~flag1~0_10 1) InVars {} OutVars{~flag1~0=v_~flag1~0_10} AuxVars[] AssignedVars[~flag1~0] 34600#[L705, L818-3]don't care [281] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 33582#[L705, L818-4]don't care [259] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 34612#[L705, L819]don't care [280] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 32884#[L705, L819-1]don't care [219] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 34204#[L705, L819-2]don't care [255] L819-2-->L819-3: Formula: (and (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 1) (= (store |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6| (store (select |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) |v_ULTIMATE.start_main_~#t2~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_6|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|) (select |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[#memory_int] 32516#[L705, L819-3]don't care [393] L819-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_40, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 33052#[L819-4, L705, thr2ENTRY]don't care [318] thr2ENTRY-->L760: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 31322#[L819-4, L705, L760]don't care [319] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 30482#[L762, L819-4, L705]don't care [355] L705-->L712: Formula: (= v_~flag2~0_8 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 30488#[L762, L712, L819-4]don't care [2022-07-26 13:22:20,725 INFO L735 eck$LassoCheckResult]: Loop: 30488#[L762, L712, L819-4]don't care [358] L712-->L710: Formula: (<= 3 v_thr1Thread1of1ForFork0_~f21~0_5) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_5} AuxVars[] AssignedVars[] 35170#[L710, L762, L819-4]don't care [360] L710-->L712: Formula: (= v_thr1Thread1of1ForFork0_~f21~0_7 v_~flag2~0_10) InVars {~flag2~0=v_~flag2~0_10} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_10} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 30488#[L762, L712, L819-4]don't care [2022-07-26 13:22:20,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,725 INFO L85 PathProgramCache]: Analyzing trace with hash 379057319, now seen corresponding path program 1 times [2022-07-26 13:22:20,725 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,726 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783064722] [2022-07-26 13:22:20,726 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,726 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,744 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,763 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,764 INFO L85 PathProgramCache]: Analyzing trace with hash 12419, now seen corresponding path program 2 times [2022-07-26 13:22:20,764 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,764 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1562025023] [2022-07-26 13:22:20,764 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,769 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:20,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:20,771 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:20,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:20,771 INFO L85 PathProgramCache]: Analyzing trace with hash -798125143, now seen corresponding path program 1 times [2022-07-26 13:22:20,772 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:20,772 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996655061] [2022-07-26 13:22:20,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:20,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:20,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-07-26 13:22:20,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-07-26 13:22:20,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-07-26 13:22:20,810 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996655061] [2022-07-26 13:22:20,812 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1996655061] provided 1 perfect and 0 imperfect interpolant sequences [2022-07-26 13:22:20,813 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-07-26 13:22:20,813 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-07-26 13:22:20,813 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [220267750] [2022-07-26 13:22:20,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-07-26 13:22:20,822 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-07-26 13:22:20,823 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-07-26 13:22:20,823 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-07-26 13:22:20,823 INFO L87 Difference]: Start difference. First operand 2888 states and 8512 transitions. cyclomatic complexity: 6235 Second operand has 4 states, 4 states have (on average 8.5) internal successors, (34), 4 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:20,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-07-26 13:22:20,905 INFO L93 Difference]: Finished difference Result 3811 states and 11015 transitions. [2022-07-26 13:22:20,905 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3811 states and 11015 transitions. [2022-07-26 13:22:20,926 INFO L131 ngComponentsAnalysis]: Automaton has 754 accepting balls. 1596 [2022-07-26 13:22:20,967 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3811 states to 3803 states and 11001 transitions. [2022-07-26 13:22:20,967 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3803 [2022-07-26 13:22:20,971 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3803 [2022-07-26 13:22:20,971 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3803 states and 11001 transitions. [2022-07-26 13:22:20,976 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2022-07-26 13:22:20,976 INFO L220 hiAutomatonCegarLoop]: Abstraction has 3803 states and 11001 transitions. [2022-07-26 13:22:20,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3803 states and 11001 transitions. [2022-07-26 13:22:21,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3803 to 2892. [2022-07-26 13:22:21,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2892 states, 2892 states have (on average 2.922199170124481) internal successors, (8451), 2891 states have internal predecessors, (8451), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-07-26 13:22:21,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2892 states to 2892 states and 8451 transitions. [2022-07-26 13:22:21,037 INFO L242 hiAutomatonCegarLoop]: Abstraction has 2892 states and 8451 transitions. [2022-07-26 13:22:21,038 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2022-07-26 13:22:21,040 INFO L426 stractBuchiCegarLoop]: Abstraction has 2892 states and 8451 transitions. [2022-07-26 13:22:21,041 INFO L333 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2022-07-26 13:22:21,041 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2892 states and 8451 transitions. [2022-07-26 13:22:21,050 INFO L131 ngComponentsAnalysis]: Automaton has 591 accepting balls. 1270 [2022-07-26 13:22:21,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2022-07-26 13:22:21,051 INFO L119 BuchiIsEmpty]: Starting construction of run [2022-07-26 13:22:21,052 INFO L150 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-07-26 13:22:21,052 INFO L151 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2022-07-26 13:22:21,054 INFO L733 eck$LassoCheckResult]: Stem: 42648#[ULTIMATE.startENTRY]don't care [286] ULTIMATE.startENTRY-->L-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 42650#[L-1]don't care [260] L-1-->L-1-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 42684#[L-1-1]don't care [301] L-1-1-->L-1-2: Formula: (= (select |v_#valid_6| 0) 0) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_6|} AuxVars[] AssignedVars[] 42686#[L-1-2]don't care [304] L-1-2-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 44164#[L12]don't care [226] L12-->L12-1: Formula: (and (= (select |v_#valid_7| 1) 1) (= (select |v_#length_2| 1) 2)) InVars {#length=|v_#length_2|, #valid=|v_#valid_7|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[] 44768#[L12-1]don't care [253] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_2| 1) 0) 48) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 43104#[L12-2]don't care [251] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_3| 1) 1) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 43106#[L12-3]don't care [287] L12-3-->L12-4: Formula: (and (= (select |v_#valid_8| 2) 1) (= 12 (select |v_#length_3| 2))) InVars {#length=|v_#length_3|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] 42062#[L12-4]don't care [277] L12-4-->L700: Formula: (= v_~flag1~0_15 0) InVars {} OutVars{~flag1~0=v_~flag1~0_15} AuxVars[] AssignedVars[~flag1~0] 42064#[L700]don't care [305] L700-->L701: Formula: (= v_~flag2~0_15 0) InVars {} OutVars{~flag2~0=v_~flag2~0_15} AuxVars[] AssignedVars[~flag2~0] 43710#[L701]don't care [291] L701-->L-1-3: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 43510#[L-1-3]don't care [306] L-1-3-->L-1-4: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 40118#[L-1-4]don't care [276] L-1-4-->L-1-5: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 40120#[L-1-5]don't care [223] L-1-5-->L-1-6: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 41360#[L-1-6]don't care [274] L-1-6-->L817: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_2|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_4|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_3|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 40232#[L817]don't care [302] L817-->L817-1: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) (= |v_#valid_9| (store |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 1)) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_4| 0)) (= (store |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_4| 4) |v_#length_4|) (= (select |v_#valid_10| |v_ULTIMATE.start_main_~#t1~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_4| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_5|, #valid=|v_#valid_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_4|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_4|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 40234#[L817-1]don't care [209] L817-1-->L817-2: Formula: (and (= (select |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5|) 0) (= |v_#length_6| (store |v_#length_7| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 4)) (= |v_#valid_11| (store |v_#valid_12| |v_ULTIMATE.start_main_~#t2~0#1.base_5| 1)) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_5| 0)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_5|) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~0#1.base_5|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_7|, #valid=|v_#valid_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_5|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 44892#[L817-2]don't care [211] L817-2-->L818: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 43762#[L818]don't care [227] L818-->L818-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 43764#[L818-1]don't care [233] L818-1-->L818-2: Formula: (and (= (select |v_#valid_13| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#t1~0#1.base_5|) |v_ULTIMATE.start_main_~#t1~0#1.offset_5| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_4|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_5| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t1~0#1.base_5|)) (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_5|)) InVars {#valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} OutVars{#valid=|v_#valid_13|, #memory_int=|v_#memory_int_4|, #length=|v_#length_8|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_5|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 39996#[L818-2]don't care [390] L818-2-->thr1ENTRY: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_40, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~_.offset] 39998#[L818-3, thr1ENTRY]don't care [353] thr1ENTRY-->L703: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 44068#[L818-3, L703]don't care [354] L703-->L705: Formula: (= v_~flag1~0_10 1) InVars {} OutVars{~flag1~0=v_~flag1~0_10} AuxVars[] AssignedVars[~flag1~0] 44070#[L705, L818-3]don't care [355] L705-->L712: Formula: (= v_~flag2~0_8 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_8} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 44822#[L712, L818-3]don't care [357] L712-->L709-1: Formula: (not (<= 3 v_thr1Thread1of1ForFork0_~f21~0_3)) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3} AuxVars[] AssignedVars[] 41842#[L818-3, L709-1]don't care [359] L709-1-->L716: Formula: (= v_~flag1~0_12 3) InVars {} OutVars{~flag1~0=v_~flag1~0_12} AuxVars[] AssignedVars[~flag1~0] 41844#[L818-3, L716]don't care [281] L818-3-->L818-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 42488#[L818-4, L716]don't care [259] L818-4-->L819: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 42490#[L819, L716]don't care [280] L819-->L819-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 43246#[L819-1, L716]don't care [219] L819-1-->L819-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 39836#[L819-2, L716]don't care [255] L819-2-->L819-3: Formula: (and (= (select |v_#valid_14| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) 1) (= (store |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6| (store (select |v_#memory_int_7| |v_ULTIMATE.start_main_~#t2~0#1.base_6|) |v_ULTIMATE.start_main_~#t2~0#1.offset_6| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_6|) (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|) (select |v_#length_9| |v_ULTIMATE.start_main_~#t2~0#1.base_6|)) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_6|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_7|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_6|, #valid=|v_#valid_14|, #memory_int=|v_#memory_int_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_6|} AuxVars[] AssignedVars[#memory_int] 39846#[L819-3, L716]don't care [393] L819-3-->thr2ENTRY: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_40, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 43800#[L819-4, L716, thr2ENTRY]don't care [318] thr2ENTRY-->L760: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 43804#[L819-4, L716, L760]don't care [319] L760-->L762: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 41328#[L762, L819-4, L716]don't care [320] L762-->L769: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork1_~f12~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 41330#[L769, L819-4, L716]don't care [2022-07-26 13:22:21,054 INFO L735 eck$LassoCheckResult]: Loop: 41330#[L769, L819-4, L716]don't care [323] L769-->L767: Formula: (<= 3 v_thr2Thread1of1ForFork1_~f12~0_5) InVars {thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} OutVars{thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_5} AuxVars[] AssignedVars[] 43862#[L819-4, L716, L767]don't care [325] L767-->L769: Formula: (= v_~flag1~0_3 v_thr2Thread1of1ForFork1_~f12~0_7) InVars {~flag1~0=v_~flag1~0_3} OutVars{~flag1~0=v_~flag1~0_3, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 41330#[L769, L819-4, L716]don't care [2022-07-26 13:22:21,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,058 INFO L85 PathProgramCache]: Analyzing trace with hash 1525119463, now seen corresponding path program 1 times [2022-07-26 13:22:21,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,058 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746488066] [2022-07-26 13:22:21,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,078 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,096 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:21,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,097 INFO L85 PathProgramCache]: Analyzing trace with hash 11299, now seen corresponding path program 3 times [2022-07-26 13:22:21,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,097 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651899609] [2022-07-26 13:22:21,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,100 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,102 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:21,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-07-26 13:22:21,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1055966345, now seen corresponding path program 1 times [2022-07-26 13:22:21,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-07-26 13:22:21,103 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1717370264] [2022-07-26 13:22:21,141 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-07-26 13:22:21,141 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-07-26 13:22:21,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,150 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-07-26 13:22:21,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-07-26 13:22:21,161 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-07-26 13:22:21,767 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 26.07 01:22:21 BoogieIcfgContainer [2022-07-26 13:22:21,768 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2022-07-26 13:22:21,769 INFO L158 Benchmark]: Toolchain (without parser) took 3845.47ms. Allocated memory was 199.2MB in the beginning and 280.0MB in the end (delta: 80.7MB). Free memory was 147.5MB in the beginning and 150.8MB in the end (delta: -3.3MB). Peak memory consumption was 78.5MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,771 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 199.2MB. Free memory is still 165.4MB. There was no memory consumed. Max. memory is 8.0GB. [2022-07-26 13:22:21,771 INFO L158 Benchmark]: CACSL2BoogieTranslator took 347.40ms. Allocated memory is still 199.2MB. Free memory was 147.4MB in the beginning and 166.1MB in the end (delta: -18.8MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,772 INFO L158 Benchmark]: Boogie Procedure Inliner took 25.55ms. Allocated memory is still 199.2MB. Free memory was 166.1MB in the beginning and 164.1MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,772 INFO L158 Benchmark]: Boogie Preprocessor took 18.24ms. Allocated memory is still 199.2MB. Free memory was 164.1MB in the beginning and 162.5MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,772 INFO L158 Benchmark]: RCFGBuilder took 327.15ms. Allocated memory is still 199.2MB. Free memory was 162.5MB in the beginning and 148.9MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,774 INFO L158 Benchmark]: BuchiAutomizer took 3119.04ms. Allocated memory was 199.2MB in the beginning and 280.0MB in the end (delta: 80.7MB). Free memory was 148.4MB in the beginning and 150.8MB in the end (delta: -2.4MB). Peak memory consumption was 78.9MB. Max. memory is 8.0GB. [2022-07-26 13:22:21,775 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 199.2MB. Free memory is still 165.4MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 347.40ms. Allocated memory is still 199.2MB. Free memory was 147.4MB in the beginning and 166.1MB in the end (delta: -18.8MB). Peak memory consumption was 11.5MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 25.55ms. Allocated memory is still 199.2MB. Free memory was 166.1MB in the beginning and 164.1MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 18.24ms. Allocated memory is still 199.2MB. Free memory was 164.1MB in the beginning and 162.5MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 327.15ms. Allocated memory is still 199.2MB. Free memory was 162.5MB in the beginning and 148.9MB in the end (delta: 13.6MB). Peak memory consumption was 13.6MB. Max. memory is 8.0GB. * BuchiAutomizer took 3119.04ms. Allocated memory was 199.2MB in the beginning and 280.0MB in the end (delta: 80.7MB). Free memory was 148.4MB in the beginning and 150.8MB in the end (delta: -2.4MB). Peak memory consumption was 78.9MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 4 terminating modules (4 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.4 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 2892 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 3.0s and 5 iterations. TraceHistogramMax:1. Analysis of lassos took 1.3s. Construction of modules took 0.2s. Büchi inclusion checks took 0.9s. Highest rank in rank-based complementation 0. Minimization of det autom 4. Minimization of nondet autom 0. Automata minimization 0.3s AutomataMinimizationTime, 4 MinimizatonAttempts, 3779 StatesRemovedByMinimization, 4 NontrivialMinimizations. Non-live state removal took 0.2s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 442 SdHoareTripleChecker+Valid, 0.3s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 442 mSDsluCounter, 1251 SdHoareTripleChecker+Invalid, 0.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 736 mSDsCounter, 84 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 304 IncrementalHoareTripleChecker+Invalid, 388 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 84 mSolverCounterUnsat, 535 mSDtfsCounter, 304 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc4 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 766]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, \result={0:0}, \result={0:0}, _={0:0}, _={0:0}, _={0:0}, _={0:0}, f12=3, f21=0, flag1=3, flag2=1, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@428cee10 in0,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTFunctionCallExpression@6c40a640 in28242,0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@52346057=0, org.eclipse.cdt.internal.core.dom.parser.c.CASTIdExpression@7d351245=0, t1={3:0}, t2={358:0}, x=0} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 766]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int flag1 = 0, flag2 = 0; [L701] 0 int x; [L817] 0 pthread_t t1, t2; [L818] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) [L704] 1 flag1 = 1 [L707] 1 int f21 = flag2; [L709] COND FALSE 1 !(f21 >= 3) [L715] 1 flag1 = 3 [L819] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) [L761] 2 flag2 = 1 [L764] 2 int f12 = flag1; Loop: [L766] COND TRUE f12 >= 3 [L768] f12 = flag1 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2022-07-26 13:22:21,811 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...