/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../../../trunk/examples/settings/gemcutter/NewStatesSleep-VarAbsGlobalSyntactic.epf -tc ../../../trunk/examples/toolchains/AutomizerBpl.xml -i ../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/race-4_2-thread_local_vars.line1028.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.2-wip.dk.por-optimizations-5c708e3-m [2022-10-04 01:03:18,358 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-04 01:03:18,360 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-04 01:03:18,384 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-10-04 01:03:18,384 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-10-04 01:03:18,385 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-10-04 01:03:18,386 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-10-04 01:03:18,387 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-10-04 01:03:18,388 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-10-04 01:03:18,389 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-10-04 01:03:18,390 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-10-04 01:03:18,391 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-10-04 01:03:18,391 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-04 01:03:18,392 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-04 01:03:18,393 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-04 01:03:18,394 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-04 01:03:18,394 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-04 01:03:18,395 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-04 01:03:18,396 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-04 01:03:18,398 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-04 01:03:18,399 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-04 01:03:18,404 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-04 01:03:18,405 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-04 01:03:18,406 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-04 01:03:18,409 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-10-04 01:03:18,409 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-10-04 01:03:18,409 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-10-04 01:03:18,410 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-10-04 01:03:18,411 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-10-04 01:03:18,411 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... 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[2022-10-04 01:03:18,421 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-10-04 01:03:18,424 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-10-04 01:03:18,425 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-10-04 01:03:18,426 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/gemcutter/NewStatesSleep-VarAbsGlobalSyntactic.epf [2022-10-04 01:03:18,454 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-04 01:03:18,455 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-04 01:03:18,455 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-04 01:03:18,455 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-04 01:03:18,456 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-10-04 01:03:18,456 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-10-04 01:03:18,456 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-04 01:03:18,456 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * Use SBE=true [2022-10-04 01:03:18,457 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-10-04 01:03:18,457 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-10-04 01:03:18,458 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-10-04 01:03:18,458 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-10-04 01:03:18,459 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-04 01:03:18,459 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-04 01:03:18,462 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-10-04 01:03:18,463 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-10-04 01:03:18,463 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-04 01:03:18,463 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-10-04 01:03:18,463 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-10-04 01:03:18,463 INFO L138 SettingsManager]: * Abstraction used for commutativity in POR=VARIABLES_GLOBAL [2022-10-04 01:03:18,464 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2022-10-04 01:03:18,464 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-10-04 01:03:18,464 INFO L138 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_ERROR_LOCATION [2022-10-04 01:03:18,465 INFO L138 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2022-10-04 01:03:18,465 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-10-04 01:03:18,465 INFO L138 SettingsManager]: * Independence relation used for POR in concurrent analysis=SYNTACTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release [2022-10-04 01:03:18,705 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-04 01:03:18,734 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-04 01:03:18,736 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-04 01:03:18,737 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2022-10-04 01:03:18,738 INFO L275 PluginConnector]: Boogie PL CUP Parser initialized [2022-10-04 01:03:18,740 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/race-4_2-thread_local_vars.line1028.bpl [2022-10-04 01:03:18,740 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/race-4_2-thread_local_vars.line1028.bpl' [2022-10-04 01:03:18,805 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-04 01:03:18,807 INFO L131 ToolchainWalker]: Walking toolchain with 3 elements. [2022-10-04 01:03:18,809 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-04 01:03:18,809 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-04 01:03:18,809 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-04 01:03:18,823 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,824 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,853 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,854 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,873 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,878 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,883 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,892 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-04 01:03:18,893 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-04 01:03:18,893 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-04 01:03:18,893 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-04 01:03:18,907 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/1) ... [2022-10-04 01:03:18,920 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-04 01:03:18,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-04 01:03:18,950 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-10-04 01:03:18,960 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-10-04 01:03:18,991 INFO L130 BoogieDeclarations]: Found specification of procedure thread_usb [2022-10-04 01:03:18,991 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_usb [2022-10-04 01:03:18,991 INFO L130 BoogieDeclarations]: Found specification of procedure thread_ath9k [2022-10-04 01:03:18,991 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_ath9k [2022-10-04 01:03:18,991 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-04 01:03:18,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-04 01:03:18,993 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-10-04 01:03:19,335 INFO L234 CfgBuilder]: Building ICFG [2022-10-04 01:03:19,337 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-04 01:03:19,650 INFO L275 CfgBuilder]: Performing block encoding [2022-10-04 01:03:19,665 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-04 01:03:19,666 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-10-04 01:03:19,669 INFO L202 PluginConnector]: Adding new model race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.10 01:03:19 BoogieIcfgContainer [2022-10-04 01:03:19,669 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-04 01:03:19,671 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-10-04 01:03:19,671 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-10-04 01:03:19,675 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-10-04 01:03:19,675 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.10 01:03:18" (1/2) ... [2022-10-04 01:03:19,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@11f954be and model type race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.10 01:03:19, skipping insertion in model container [2022-10-04 01:03:19,680 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.10 01:03:19" (2/2) ... [2022-10-04 01:03:19,681 INFO L112 eAbstractionObserver]: Analyzing ICFG race-4_2-thread_local_vars.line1028.bpl [2022-10-04 01:03:19,688 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-10-04 01:03:19,698 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-10-04 01:03:19,699 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-10-04 01:03:19,699 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-10-04 01:03:19,817 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2022-10-04 01:03:19,885 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-04 01:03:19,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-04 01:03:19,887 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-04 01:03:19,891 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-04 01:03:19,903 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2022-10-04 01:03:19,950 INFO L158 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-04 01:03:19,961 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES ======== [2022-10-04 01:03:19,970 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@b693e11, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-04 01:03:19,970 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-04 01:03:20,056 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2022-10-04 01:03:20,063 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-04 01:03:20,066 INFO L307 ceAbstractionStarter]: Result for error location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES was SAFE (1/5) [2022-10-04 01:03:20,080 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-04 01:03:20,081 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-04 01:03:20,081 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-04 01:03:20,082 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-04 01:03:20,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Waiting until timeout for monitored process [2022-10-04 01:03:20,090 INFO L158 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-04 01:03:20,090 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr0ASSERT_VIOLATIONASSERT ======== [2022-10-04 01:03:20,091 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@b693e11, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-04 01:03:20,091 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-04 01:03:26,000 INFO L805 garLoopResultBuilder]: Registering result SAFE for location thread_usbErr0ASSERT_VIOLATIONASSERT (0 of 1 remaining) [2022-10-04 01:03:26,001 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-04 01:03:26,002 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr0ASSERT_VIOLATIONASSERT was SAFE (2/5) [2022-10-04 01:03:26,010 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-04 01:03:26,010 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-04 01:03:26,010 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-04 01:03:26,061 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-04 01:03:26,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Waiting until timeout for monitored process [2022-10-04 01:03:26,065 INFO L158 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-04 01:03:26,065 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES ======== [2022-10-04 01:03:26,066 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@b693e11, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-04 01:03:26,066 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-04 01:03:30,638 INFO L805 garLoopResultBuilder]: Registering result SAFE for location thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2022-10-04 01:03:30,639 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-04 01:03:30,640 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES was SAFE (3/5) [2022-10-04 01:03:30,644 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-04 01:03:30,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-04 01:03:30,645 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-04 01:03:30,651 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-04 01:03:30,652 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (5)] Waiting until timeout for monitored process [2022-10-04 01:03:30,654 INFO L158 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-04 01:03:30,654 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr0ASSERT_VIOLATIONASSERT ======== [2022-10-04 01:03:30,655 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@b693e11, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-04 01:03:30,655 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-04 01:03:32,278 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:32,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:32,283 INFO L85 PathProgramCache]: Analyzing trace with hash -1076559143, now seen corresponding path program 1 times [2022-10-04 01:03:32,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:32,291 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593940407] [2022-10-04 01:03:32,291 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:32,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:32,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:32,846 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-04 01:03:32,846 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:32,847 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593940407] [2022-10-04 01:03:32,847 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593940407] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:32,848 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:32,848 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-04 01:03:32,849 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [988407630] [2022-10-04 01:03:32,850 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:32,855 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-10-04 01:03:32,855 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:32,877 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-10-04 01:03:32,878 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-10-04 01:03:32,879 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:32,881 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:32,882 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 90.5) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:32,882 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:34,047 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:34,048 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-10-04 01:03:34,048 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:34,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:34,049 INFO L85 PathProgramCache]: Analyzing trace with hash -1909953403, now seen corresponding path program 1 times [2022-10-04 01:03:34,049 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:34,049 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310786932] [2022-10-04 01:03:34,049 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:34,050 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:34,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:34,268 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-04 01:03:34,268 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:34,268 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [310786932] [2022-10-04 01:03:34,269 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [310786932] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:34,269 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:34,269 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-04 01:03:34,269 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949398278] [2022-10-04 01:03:34,269 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:34,270 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-04 01:03:34,270 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:34,271 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-04 01:03:34,271 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-04 01:03:34,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:34,273 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:34,274 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:34,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:34,274 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:35,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:35,796 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:35,796 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-10-04 01:03:35,796 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:35,796 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:35,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1624450351, now seen corresponding path program 1 times [2022-10-04 01:03:35,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:35,797 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95902030] [2022-10-04 01:03:35,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:35,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:35,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:35,909 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-04 01:03:35,910 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:35,910 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95902030] [2022-10-04 01:03:35,910 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [95902030] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:35,910 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:35,910 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-04 01:03:35,910 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946548239] [2022-10-04 01:03:35,910 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:35,911 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-04 01:03:35,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:35,912 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-04 01:03:35,912 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-04 01:03:35,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:35,912 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:35,913 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 73.0) internal successors, (219), 3 states have internal predecessors, (219), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:35,913 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:35,913 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:35,913 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:36,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:36,287 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:36,288 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:36,288 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-10-04 01:03:36,289 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:36,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:36,290 INFO L85 PathProgramCache]: Analyzing trace with hash 911623333, now seen corresponding path program 1 times [2022-10-04 01:03:36,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:36,290 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863059705] [2022-10-04 01:03:36,290 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:36,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:36,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:36,766 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-04 01:03:36,766 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:36,766 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863059705] [2022-10-04 01:03:36,766 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [863059705] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:36,766 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:36,767 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-10-04 01:03:36,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161950748] [2022-10-04 01:03:36,767 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:36,768 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-10-04 01:03:36,768 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:36,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-10-04 01:03:36,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2022-10-04 01:03:36,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:36,770 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:36,770 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 19.666666666666668) internal successors, (177), 10 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:36,770 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:36,770 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:36,771 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:36,771 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:37,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:37,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:37,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:37,589 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:37,589 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-10-04 01:03:37,590 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:37,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:37,590 INFO L85 PathProgramCache]: Analyzing trace with hash 1291125213, now seen corresponding path program 1 times [2022-10-04 01:03:37,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:37,591 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [197414929] [2022-10-04 01:03:37,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:37,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:37,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:37,703 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 88 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-10-04 01:03:37,704 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:37,704 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [197414929] [2022-10-04 01:03:37,704 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [197414929] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:37,704 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:37,704 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2022-10-04 01:03:37,704 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546465683] [2022-10-04 01:03:37,704 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:37,706 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2022-10-04 01:03:37,706 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:37,706 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2022-10-04 01:03:37,707 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2022-10-04 01:03:37,707 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:37,707 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:37,708 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 76.75) internal successors, (307), 4 states have internal predecessors, (307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:37,708 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:37,708 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:37,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:37,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:37,709 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:38,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:38,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:38,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:38,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:38,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:38,127 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-10-04 01:03:38,127 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:38,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:38,128 INFO L85 PathProgramCache]: Analyzing trace with hash -376154481, now seen corresponding path program 1 times [2022-10-04 01:03:38,128 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:38,128 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239272721] [2022-10-04 01:03:38,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:38,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:38,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:38,494 INFO L134 CoverageAnalysis]: Checked inductivity of 98 backedges. 68 proven. 0 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-10-04 01:03:38,494 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:38,494 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239272721] [2022-10-04 01:03:38,494 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239272721] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:38,494 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:38,494 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2022-10-04 01:03:38,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595581247] [2022-10-04 01:03:38,495 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:38,495 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 9 states [2022-10-04 01:03:38,495 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:38,497 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2022-10-04 01:03:38,497 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2022-10-04 01:03:38,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:38,497 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:38,498 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 9 states, 8 states have (on average 38.75) internal successors, (310), 9 states have internal predecessors, (310), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:38,498 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:39,153 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:39,154 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-10-04 01:03:39,154 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:39,154 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:39,154 INFO L85 PathProgramCache]: Analyzing trace with hash 1633540189, now seen corresponding path program 1 times [2022-10-04 01:03:39,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:39,155 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830859519] [2022-10-04 01:03:39,155 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:39,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:39,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:39,326 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 100 proven. 0 refuted. 0 times theorem prover too weak. 195 trivial. 0 not checked. [2022-10-04 01:03:39,326 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:39,326 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830859519] [2022-10-04 01:03:39,326 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [830859519] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:39,327 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:39,327 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-04 01:03:39,327 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [993983745] [2022-10-04 01:03:39,328 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:39,329 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-04 01:03:39,329 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:39,332 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-04 01:03:39,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-04 01:03:39,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,337 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:39,337 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:39,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:39,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:39,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:39,337 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:39,338 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:39,338 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:39,761 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:39,761 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-10-04 01:03:39,761 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:39,762 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:39,762 INFO L85 PathProgramCache]: Analyzing trace with hash 160149629, now seen corresponding path program 1 times [2022-10-04 01:03:39,762 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:39,762 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [576797938] [2022-10-04 01:03:39,762 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:39,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:39,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:39,907 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 114 proven. 0 refuted. 0 times theorem prover too weak. 183 trivial. 0 not checked. [2022-10-04 01:03:39,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:39,908 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [576797938] [2022-10-04 01:03:39,908 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [576797938] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:39,909 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:39,909 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-04 01:03:39,909 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281128100] [2022-10-04 01:03:39,909 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:39,910 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-04 01:03:39,910 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:39,910 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-04 01:03:39,910 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-04 01:03:39,910 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,911 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:39,911 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:39,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:39,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:39,911 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:39,912 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:39,912 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:39,912 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:39,912 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:39,912 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:40,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:40,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:40,468 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:40,468 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-10-04 01:03:40,469 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:40,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:40,470 INFO L85 PathProgramCache]: Analyzing trace with hash 1524563097, now seen corresponding path program 2 times [2022-10-04 01:03:40,470 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:40,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1993721851] [2022-10-04 01:03:40,472 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:40,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:40,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-04 01:03:40,594 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 73 proven. 0 refuted. 0 times theorem prover too weak. 134 trivial. 0 not checked. [2022-10-04 01:03:40,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-10-04 01:03:40,594 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1993721851] [2022-10-04 01:03:40,594 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1993721851] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-04 01:03:40,594 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-04 01:03:40,595 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-04 01:03:40,595 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875635102] [2022-10-04 01:03:40,595 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-04 01:03:40,595 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-04 01:03:40,595 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-10-04 01:03:40,596 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-04 01:03:40,596 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-04 01:03:40,597 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:40,597 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-04 01:03:40,597 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 95.66666666666667) internal successors, (287), 3 states have internal predecessors, (287), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-04 01:03:40,597 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:40,597 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:40,597 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:40,598 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:43,544 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-04 01:03:43,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-04 01:03:43,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:43,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-04 01:03:43,545 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2022-10-04 01:03:43,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2022-10-04 01:03:43,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:43,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-04 01:03:43,546 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-04 01:03:43,546 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-10-04 01:03:43,546 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-04 01:03:43,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-04 01:03:43,547 INFO L85 PathProgramCache]: Analyzing trace with hash -537362231, now seen corresponding path program 1 times [2022-10-04 01:03:43,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-10-04 01:03:43,547 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39277493] [2022-10-04 01:03:43,547 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-04 01:03:43,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-04 01:03:43,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-04 01:03:43,680 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-04 01:03:43,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-04 01:03:43,972 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-10-04 01:03:43,972 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-10-04 01:03:43,973 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location thread_usbErr0ASSERT_VIOLATIONASSERT (0 of 1 remaining) [2022-10-04 01:03:43,974 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-10-04 01:03:43,976 INFO L444 BasicCegarLoop]: Path program histogram: [2, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-04 01:03:43,976 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr0ASSERT_VIOLATIONASSERT was UNSAFE (4/5) [2022-10-04 01:03:43,980 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-10-04 01:03:43,980 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-10-04 01:03:44,504 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,505 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,505 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,505 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,505 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,506 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,507 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,508 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,509 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,510 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,511 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,512 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,513 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,514 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,515 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,516 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,517 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,518 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,519 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,520 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,521 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,522 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,523 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,524 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,525 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,526 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,527 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,528 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,529 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,530 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,531 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,532 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,533 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,534 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,535 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,536 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,537 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,538 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,539 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,540 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,541 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,542 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,543 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,544 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,545 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,546 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,547 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,548 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,549 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,550 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,551 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,552 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,553 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,554 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,555 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,556 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,557 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,558 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,559 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,560 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,561 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,562 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,563 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,564 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,565 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,566 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,571 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,572 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,573 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,574 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,575 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,576 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,577 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,578 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,579 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,579 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,579 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,579 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,751 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,752 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,753 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,754 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,755 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,756 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,757 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,758 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,759 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,760 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,761 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,762 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,763 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,764 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,765 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,766 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,767 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,768 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,769 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,770 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,771 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,772 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,773 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,774 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,775 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,776 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,777 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,777 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,777 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,777 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,778 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,778 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,778 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,778 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,778 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,779 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,780 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,781 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,782 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,783 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,784 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,785 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,786 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,787 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,788 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,789 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,790 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,791 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,792 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,793 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,794 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,795 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,796 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,797 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,798 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,799 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,800 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,800 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,800 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-04 01:03:44,800 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-04 01:03:44,918 INFO L202 PluginConnector]: Adding new model race-4_2-thread_local_vars.line1028.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.10 01:03:44 BasicIcfg [2022-10-04 01:03:44,918 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-10-04 01:03:44,919 INFO L158 Benchmark]: Toolchain (without parser) took 26111.46ms. Allocated memory was 184.5MB in the beginning and 6.3GB in the end (delta: 6.1GB). Free memory was 132.6MB in the beginning and 5.8GB in the end (delta: -5.6GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2022-10-04 01:03:44,919 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.43ms. Allocated memory is still 184.5MB. Free memory is still 136.7MB. There was no memory consumed. Max. memory is 8.0GB. [2022-10-04 01:03:44,919 INFO L158 Benchmark]: Boogie Preprocessor took 83.36ms. Allocated memory is still 184.5MB. Free memory was 132.6MB in the beginning and 128.5MB in the end (delta: 4.1MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2022-10-04 01:03:44,919 INFO L158 Benchmark]: RCFGBuilder took 775.93ms. Allocated memory was 184.5MB in the beginning and 255.9MB in the end (delta: 71.3MB). Free memory was 128.5MB in the beginning and 210.6MB in the end (delta: -82.0MB). Peak memory consumption was 24.2MB. Max. memory is 8.0GB. [2022-10-04 01:03:44,920 INFO L158 Benchmark]: TraceAbstraction took 25247.21ms. Allocated memory was 255.9MB in the beginning and 6.3GB in the end (delta: 6.0GB). Free memory was 210.0MB in the beginning and 5.8GB in the end (delta: -5.6GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2022-10-04 01:03:44,920 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.43ms. Allocated memory is still 184.5MB. Free memory is still 136.7MB. There was no memory consumed. Max. memory is 8.0GB. * Boogie Preprocessor took 83.36ms. Allocated memory is still 184.5MB. Free memory was 132.6MB in the beginning and 128.5MB in the end (delta: 4.1MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * RCFGBuilder took 775.93ms. Allocated memory was 184.5MB in the beginning and 255.9MB in the end (delta: 71.3MB). Free memory was 128.5MB in the beginning and 210.6MB in the end (delta: -82.0MB). Peak memory consumption was 24.2MB. Max. memory is 8.0GB. * TraceAbstraction took 25247.21ms. Allocated memory was 255.9MB in the beginning and 6.3GB in the end (delta: 6.0GB). Free memory was 210.0MB in the beginning and 5.8GB in the end (delta: -5.6GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 1, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 1, negative conditional: 1, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 1, negative conditional: 1, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Statistics on independence cache: Total cache size (in pairs): 0, Positive cache size: 0, Positive conditional cache size: 0, Positive unconditional cache size: 0, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0, Independence queries for same thread: 1, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 367006, positive: 345136, positive conditional: 345136, positive unconditional: 0, negative: 21870, negative conditional: 21870, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 367006, positive: 345136, positive conditional: 345136, positive unconditional: 0, negative: 21870, negative conditional: 21870, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 345660, positive: 345136, positive conditional: 0, positive unconditional: 345136, negative: 524, negative conditional: 0, negative unconditional: 524, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 12673, positive: 12654, positive conditional: 0, positive unconditional: 12654, negative: 19, negative conditional: 0, negative unconditional: 19, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 345660, positive: 332482, positive conditional: 0, positive unconditional: 332482, negative: 505, negative conditional: 0, negative unconditional: 505, unknown: 12673, unknown conditional: 0, unknown unconditional: 12673] , Statistics on independence cache: Total cache size (in pairs): 12673, Positive cache size: 12654, Positive conditional cache size: 0, Positive unconditional cache size: 12654, Negative cache size: 19, Negative conditional cache size: 0, Negative unconditional cache size: 19, Independence queries for same thread: 21346, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 367006, positive: 345136, positive conditional: 345136, positive unconditional: 0, negative: 21870, negative conditional: 21870, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 367006, positive: 345136, positive conditional: 345136, positive unconditional: 0, negative: 21870, negative conditional: 21870, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 345660, positive: 345136, positive conditional: 0, positive unconditional: 345136, negative: 524, negative conditional: 0, negative unconditional: 524, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 12673, positive: 12654, positive conditional: 0, positive unconditional: 12654, negative: 19, negative conditional: 0, negative unconditional: 19, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 345660, positive: 332482, positive conditional: 0, positive unconditional: 332482, negative: 505, negative conditional: 0, negative unconditional: 505, unknown: 12673, unknown conditional: 0, unknown unconditional: 12673] , Statistics on independence cache: Total cache size (in pairs): 12673, Positive cache size: 12654, Positive conditional cache size: 0, Positive unconditional cache size: 12654, Negative cache size: 19, Negative conditional cache size: 0, Negative unconditional cache size: 19, Independence queries for same thread: 21346, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 124164, positive: 115478, positive conditional: 115478, positive unconditional: 0, negative: 8686, negative conditional: 8686, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 5696, Positive cache size: 5693, Positive conditional cache size: 0, Positive unconditional cache size: 5693, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 8683, Statistics for Abstraction: - StatisticsResult: Independence relation #2 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 121265, positive: 112585, positive conditional: 112585, positive unconditional: 0, negative: 8680, negative conditional: 8680, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 5770, Positive cache size: 5767, Positive conditional cache size: 0, Positive unconditional cache size: 5767, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 17360, Statistics for Abstraction: - StatisticsResult: Independence relation #3 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 143660, positive: 133181, positive conditional: 133181, positive unconditional: 0, negative: 10479, negative conditional: 10479, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 6016, Positive cache size: 6013, Positive conditional cache size: 0, Positive unconditional cache size: 6013, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 27836, Statistics for Abstraction: - StatisticsResult: Independence relation #4 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 44659, positive: 41479, positive conditional: 41479, positive unconditional: 0, negative: 3180, negative conditional: 3180, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 6175, Positive cache size: 6172, Positive conditional cache size: 0, Positive unconditional cache size: 6172, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 31016, Statistics for Abstraction: - StatisticsResult: Independence relation #5 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 45399, positive: 42117, positive conditional: 42117, positive unconditional: 0, negative: 3282, negative conditional: 3282, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 6581, Positive cache size: 6578, Positive conditional cache size: 0, Positive unconditional cache size: 6578, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 34298, Statistics for Abstraction: - StatisticsResult: Independence relation #6 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 40504, positive: 37503, positive conditional: 37503, positive unconditional: 0, negative: 3001, negative conditional: 3001, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 6899, Positive cache size: 6896, Positive conditional cache size: 0, Positive unconditional cache size: 6896, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 37299, Statistics for Abstraction: - StatisticsResult: Independence relation #7 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 44790, positive: 41253, positive conditional: 41253, positive unconditional: 0, negative: 3537, negative conditional: 3537, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 8808, Positive cache size: 8805, Positive conditional cache size: 0, Positive unconditional cache size: 8805, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 40836, Statistics for Abstraction: - StatisticsResult: Independence relation #8 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 44790, positive: 41253, positive conditional: 41253, positive unconditional: 0, negative: 3537, negative conditional: 3537, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 9090, Positive cache size: 9087, Positive conditional cache size: 0, Positive unconditional cache size: 9087, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 44373, Statistics for Abstraction: - StatisticsResult: Independence relation #9 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 44787, positive: 41253, positive conditional: 41253, positive unconditional: 0, negative: 3534, negative conditional: 3534, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 9090, Positive cache size: 9087, Positive conditional cache size: 0, Positive unconditional cache size: 9087, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 47907, Statistics for Abstraction: - StatisticsResult: Independence relation #10 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 293153, positive: 272729, positive conditional: 272729, positive unconditional: 0, negative: 20424, negative conditional: 20424, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 947171, positive: 878831, positive conditional: 878831, positive unconditional: 0, negative: 68340, negative conditional: 68340, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 878878, positive: 878831, positive conditional: 0, positive unconditional: 878831, negative: 47, negative conditional: 0, negative unconditional: 47, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11856, positive: 11834, positive conditional: 0, positive unconditional: 11834, negative: 22, negative conditional: 0, negative unconditional: 22, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 878878, positive: 866997, positive conditional: 0, positive unconditional: 866997, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 11856, unknown conditional: 0, unknown unconditional: 11856] , Statistics on independence cache: Total cache size (in pairs): 11856, Positive cache size: 11834, Positive conditional cache size: 0, Positive unconditional cache size: 11834, Negative cache size: 22, Negative conditional cache size: 0, Negative unconditional cache size: 22, Independence queries for same thread: 68293, Statistics for Abstraction: - CounterExampleResult [Line: 1028]: assertion can be violated assertion can be violated We found a FailurePath: [L1212] 0 assume { :begin_inline_ULTIMATE.init } true; [L1213] 0 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [L1214] 0 assume 0 == #valid[0]; VAL [#NULL!base=0, #NULL!offset=0] [L1215] 0 assume 0 < #StackHeapBarrier; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5] [L1216] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5] [L1217] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 2, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1218] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1219] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1220] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1221] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1222] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 48, { base: 1, offset: 0 }, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1223] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1224] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1225] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1226] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: 1, offset: 1 }, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1227] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1228] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1229] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1230] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 29, 2; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1231] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1232] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1233] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1234] 0 ~#t1~0 := { base: 3, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1235] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1236] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 4, 3; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1237] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1238] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1239] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1240] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1241] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, ~#t1~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1242] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1243] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1244] 0 ~#t2~0 := { base: 4, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1245] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1246] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 4, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1247] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1248] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1249] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1250] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1251] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, ~#t2~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1252] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1253] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1254] 0 ~#mutex~0 := { base: 5, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1255] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1256] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 24, 5; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1257] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1258] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1259] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1260] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1261] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1262] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1263] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1264] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1265] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1266] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1267] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1268] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1269] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1270] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1271] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1272] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1273] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1274] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1275] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1276] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1277] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1278] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1279] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1280] 0 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~pdev~0=0] [L1281] 0 ~ldv_usb_state~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1283] 0 assume { :end_inline_ULTIMATE.init } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1284] 0 assume { :begin_inline_main } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1285] 0 havoc main_#res#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1286] 0 havoc main_#t~ret48#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1287] 0 assume { :begin_inline_module_init } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1288] 0 havoc module_init_#res#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1289] 0 havoc module_init_#t~nondet43#1, module_init_#t~pre44#1, module_init_#t~nondet45#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1290] 0 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1291] 0 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1292] 0 assume { :begin_inline_ldv_assert } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1293] 0 ldv_assert_#in~expression#1 := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1294] 0 havoc ldv_assert_~expression#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1295] 0 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1296] COND FALSE 0 !(0 == ldv_assert_~expression#1) VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1303] 0 assume { :end_inline_ldv_assert } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1304] 0 assume -2147483648 <= module_init_#t~nondet43#1 && module_init_#t~nondet43#1 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~nondet43#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1305] COND TRUE 0 0 != module_init_#t~nondet43#1 VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~nondet43#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1306] 0 havoc module_init_#t~nondet43#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1307] 0 module_init_#t~pre44#1 := #pthreadsForks; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-3, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1308] 0 #pthreadsForks := 1 + #pthreadsForks; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1309] 0 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1310] 0 assume { :begin_inline_write~int } true; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1311] 0 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := module_init_#t~pre44#1, ~#t1~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1314] 0 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1315] 0 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1316] 0 havoc #memory_$Pointer$, #memory_int; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1317] 0 assume #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]] && #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1]; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1318] 0 assume { :end_inline_write~int } true; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1319] FORK 0 fork module_init_#t~pre44#1, 0, 0 thread_usb({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L922] 1 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L923] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L924] 1 havoc ~probe_ret~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L954] 1 havoc #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L955] 1 assume #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]] && #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1]; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L991] 1 ~pdev~0 := 7; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L992] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L993] 1 ldv_assert_#in~expression#1 := (if 7 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L994] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L995] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L996] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1003] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1093] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1094] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1007] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1008] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1009] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1010] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1011] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1012] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1013] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1014] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1015] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1016] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1017] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1018] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1019] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1020] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1021] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1022] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1023] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1024] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1025] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1026] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1027] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1028] 1 assert 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1030] 1 assume 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1031] 1 assume read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1032] 1 havoc read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1033] 1 assume read~int_#value#1 == #memory_int[read~int_#ptr#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1034] 1 ieee80211_deregister_hw_#t~mem37#1 := read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1035] 1 assume { :end_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1320] 0 havoc module_init_#t~pre44#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1321] 0 havoc module_init_#t~nondet45#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1322] 0 module_init_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1343] 0 main_#t~ret48#1 := module_init_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1344] 0 assume { :end_inline_module_init } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1345] 0 assume -2147483648 <= main_#t~ret48#1 && main_#t~ret48#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1346] COND FALSE 0 !(0 != main_#t~ret48#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1350] 0 havoc main_#t~ret48#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1352] 0 assume { :begin_inline_module_exit } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1353] 0 havoc module_exit_#t~mem46#1, module_exit_#t~nondet47#1, module_exit_~#status~1#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1354] 0 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1355] 0 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1356] 0 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1357] 0 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1127] 2 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1131] COND FALSE 2 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1134] 2 assume -2147483648 <= #t~nondet32#1 && #t~nondet32#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1135] 2 #t~switch33#1 := 1 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1136] COND FALSE 2 !(#t~switch33#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1168] 2 #t~switch33#1 := #t~switch33#1 || 2 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1169] COND TRUE 2 #t~switch33#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1177] 2 #res#1 := { base: 0, offset: 0 }; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1036] JOIN 2 join (if ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 <= 2147483647 then ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 else ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 - 4294967296), 0 assign ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1037] 1 write~$Pointer$_old_#memory_$Pointer$#1, write~$Pointer$_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1038] 1 assume { :begin_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1039] 1 write~$Pointer$_#value#1, write~$Pointer$_#ptr#1, write~$Pointer$_#sizeOfWrittenType#1 := ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1042] 1 assume 1 == #valid[write~$Pointer$_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1043] 1 assume write~$Pointer$_#sizeOfWrittenType#1 + write~$Pointer$_#ptr#1!offset <= #length[write~$Pointer$_#ptr#1!base] && 0 <= write~$Pointer$_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1044] 1 havoc #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1045] 1 assume #memory_$Pointer$ == write~$Pointer$_old_#memory_$Pointer$#1[write~$Pointer$_#ptr#1 := write~$Pointer$_#value#1] && #memory_int == write~$Pointer$_old_#memory_int#1[write~$Pointer$_#ptr#1 := #memory_int[write~$Pointer$_#ptr#1]]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1046] 1 assume { :end_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1047] 1 havoc ieee80211_deregister_hw_#t~mem37#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1048] 1 havoc ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1049] 1 ULTIMATE.dealloc_old_#valid#1 := #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1050] 1 assume { :begin_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1051] 1 ULTIMATE.dealloc_~addr#1 := ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1052] 1 havoc #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1053] 1 assume #valid == ULTIMATE.dealloc_old_#valid#1[ULTIMATE.dealloc_~addr#1!base := 0]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1054] 1 assume { :end_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1055] 1 havoc ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1065] 1 assume { :end_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1067] 1 assume { :end_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1068] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=7, ~probe_ret~0#1=0] [L1069] 1 ~pdev~0 := 8; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1070] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1071] 1 ldv_assert_#in~expression#1 := (if 8 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1072] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1073] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1074] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1093] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1094] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-2, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L954] 1 havoc #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L955] 1 assume #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]] && #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L991] 1 ~pdev~0 := 7; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L992] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L993] 1 ldv_assert_#in~expression#1 := (if 7 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L994] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L995] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L996] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1003] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1093] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1094] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1007] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1008] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1009] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1010] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1011] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1012] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1013] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1014] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1015] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1016] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1017] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1018] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1019] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1020] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1021] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1022] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1023] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1024] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1025] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1026] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1027] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1028] 1 assert 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1030] 1 assume 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1031] 1 assume read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1032] 1 havoc read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1033] 1 assume read~int_#value#1 == #memory_int[read~int_#ptr#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1034] 1 ieee80211_deregister_hw_#t~mem37#1 := read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1035] 1 assume { :end_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1127] 2 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1131] COND FALSE 2 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1134] 2 assume -2147483648 <= #t~nondet32#1 && #t~nondet32#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1135] 2 #t~switch33#1 := 1 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1136] COND FALSE 2 !(#t~switch33#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1168] 2 #t~switch33#1 := #t~switch33#1 || 2 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1169] COND TRUE 2 #t~switch33#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1177] 2 #res#1 := { base: 0, offset: 0 }; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1036] JOIN 2 join (if ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 <= 2147483647 then ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 else ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 - 4294967296), 0 assign ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1037] 1 write~$Pointer$_old_#memory_$Pointer$#1, write~$Pointer$_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1038] 1 assume { :begin_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1039] 1 write~$Pointer$_#value#1, write~$Pointer$_#ptr#1, write~$Pointer$_#sizeOfWrittenType#1 := ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1042] 1 assume 1 == #valid[write~$Pointer$_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1043] 1 assume write~$Pointer$_#sizeOfWrittenType#1 + write~$Pointer$_#ptr#1!offset <= #length[write~$Pointer$_#ptr#1!base] && 0 <= write~$Pointer$_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1044] 1 havoc #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1045] 1 assume #memory_$Pointer$ == write~$Pointer$_old_#memory_$Pointer$#1[write~$Pointer$_#ptr#1 := write~$Pointer$_#value#1] && #memory_int == write~$Pointer$_old_#memory_int#1[write~$Pointer$_#ptr#1 := #memory_int[write~$Pointer$_#ptr#1]]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1046] 1 assume { :end_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1047] 1 havoc ieee80211_deregister_hw_#t~mem37#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1048] 1 havoc ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1049] 1 ULTIMATE.dealloc_old_#valid#1 := #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1050] 1 assume { :begin_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1051] 1 ULTIMATE.dealloc_~addr#1 := ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1052] 1 havoc #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1053] 1 assume #valid == ULTIMATE.dealloc_old_#valid#1[ULTIMATE.dealloc_~addr#1!base := 0]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1054] 1 assume { :end_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1055] 1 havoc ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1065] 1 assume { :end_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1067] 1 assume { :end_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1068] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=7, ~probe_ret~0#1=0] [L1069] 1 ~pdev~0 := 8; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1070] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1071] 1 ldv_assert_#in~expression#1 := (if 8 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1072] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1073] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1074] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1093] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1094] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=-1, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L954] 1 havoc #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L955] 1 assume #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]] && #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L991] 1 ~pdev~0 := 7; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L992] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L993] 1 ldv_assert_#in~expression#1 := (if 7 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L994] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L995] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L996] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1003] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1093] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1094] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1007] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1008] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1009] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1010] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1011] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1012] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1358] 0 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1013] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1014] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1015] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1016] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1017] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1018] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1019] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1020] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1021] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1022] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1023] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1024] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1025] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1026] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1027] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] [L1028] 1 assert 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, write~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=7, ~probe_ret~0#1=0] - StatisticsResult: Ultimate Automizer benchmark data for thread instance sufficiency: ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES with 1 thread instances CFG has 5 procedures, 520 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 0.2s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.1s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for error location: thread_usbErr0ASSERT_VIOLATIONASSERT with 1 thread instances CFG has 5 procedures, 520 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 5.9s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 5.9s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for error location: thread_usbErr0ASSERT_VIOLATIONASSERT with 2 thread instances CFG has 5 procedures, 520 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 13.3s, OverallIterations: 10, TraceHistogramMax: 0, PathProgramHistogramMax: 2, EmptinessCheckTime: 10.5s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 52, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.4s InterpolantComputationTime, 3146 NumberOfCodeBlocks, 3146 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 2696 ConstructedInterpolants, 0 QuantifiedInterpolants, 3684 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 1051/1051 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for thread instance sufficiency: thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES with 1 thread instances CFG has 5 procedures, 520 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 4.6s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 4.6s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-10-04 01:03:44,990 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (5)] Forceful destruction successful, exit code 0 [2022-10-04 01:03:45,199 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Ended with exit code 0 [2022-10-04 01:03:45,401 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Ended with exit code 0 [2022-10-04 01:03:45,600 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Ended with exit code 0 [2022-10-04 01:03:45,801 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...