/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --traceabstraction.cegar.restart.behaviour ONE_CEGAR_PER_ERROR_LOCATION --traceabstraction.trace.refinement.strategy BADGER -s ../../../trunk/examples/settings/gemcutter/NewStatesSleep-VarAbsGlobalSyntactic.epf -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/chunk13/race-4_1-thread_local_vars.line1016.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.2-wip.dk.por-optimizations-e57bdd3-m [2022-10-21 12:21:18,011 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-10-21 12:21:18,018 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-10-21 12:21:18,048 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-10-21 12:21:18,066 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-10-21 12:21:18,067 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-10-21 12:21:18,069 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-10-21 12:21:18,069 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-10-21 12:21:18,070 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-10-21 12:21:18,070 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-10-21 12:21:18,072 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-10-21 12:21:18,076 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-10-21 12:21:18,089 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-10-21 12:21:18,090 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-10-21 12:21:18,091 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-10-21 12:21:18,092 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-10-21 12:21:18,098 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-10-21 12:21:18,106 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/gemcutter/NewStatesSleep-VarAbsGlobalSyntactic.epf [2022-10-21 12:21:18,135 INFO L113 SettingsManager]: Loading preferences was successful [2022-10-21 12:21:18,136 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-10-21 12:21:18,136 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-10-21 12:21:18,136 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-10-21 12:21:18,137 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2022-10-21 12:21:18,137 INFO L138 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2022-10-21 12:21:18,138 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-10-21 12:21:18,139 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-10-21 12:21:18,139 INFO L138 SettingsManager]: * Use SBE=true [2022-10-21 12:21:18,139 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * sizeof long=4 [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * sizeof POINTER=4 [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-10-21 12:21:18,140 INFO L138 SettingsManager]: * sizeof long double=12 [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * Use constant arrays=true [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-10-21 12:21:18,141 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * To the following directory=./dump/ [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-10-21 12:21:18,141 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-21 12:21:18,141 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Abstraction used for commutativity in POR=VARIABLES_GLOBAL [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-10-21 12:21:18,142 INFO L138 SettingsManager]: * CEGAR restart behaviour=ONE_CEGAR_PER_ERROR_LOCATION [2022-10-21 12:21:18,143 INFO L138 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2022-10-21 12:21:18,143 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-10-21 12:21:18,143 INFO L138 SettingsManager]: * Independence relation used for POR in concurrent analysis=SYNTACTIC WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: CEGAR restart behaviour -> ONE_CEGAR_PER_ERROR_LOCATION Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Trace refinement strategy -> BADGER [2022-10-21 12:21:18,398 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-10-21 12:21:18,411 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-10-21 12:21:18,413 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-10-21 12:21:18,414 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2022-10-21 12:21:18,415 INFO L275 PluginConnector]: Boogie PL CUP Parser initialized [2022-10-21 12:21:18,416 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/chunk13/race-4_1-thread_local_vars.line1016.bpl [2022-10-21 12:21:18,416 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/boogie-benchmarks-from-svcomp-memsafety-concurrent/chunk13/race-4_1-thread_local_vars.line1016.bpl' [2022-10-21 12:21:18,470 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-10-21 12:21:18,471 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2022-10-21 12:21:18,472 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-10-21 12:21:18,472 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-10-21 12:21:18,472 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-10-21 12:21:18,480 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,513 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,520 INFO L138 Inliner]: procedures = 3, calls = 2, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2022-10-21 12:21:18,522 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-10-21 12:21:18,524 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-10-21 12:21:18,524 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-10-21 12:21:18,524 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-10-21 12:21:18,529 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,530 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,551 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,551 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,577 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,580 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,586 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,591 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-10-21 12:21:18,592 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-10-21 12:21:18,592 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-10-21 12:21:18,592 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-10-21 12:21:18,593 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/1) ... [2022-10-21 12:21:18,597 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-10-21 12:21:18,603 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-21 12:21:18,613 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-10-21 12:21:18,627 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-10-21 12:21:18,640 INFO L130 BoogieDeclarations]: Found specification of procedure thread_ath9k [2022-10-21 12:21:18,640 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_ath9k [2022-10-21 12:21:18,640 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-10-21 12:21:18,640 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-10-21 12:21:18,640 INFO L130 BoogieDeclarations]: Found specification of procedure thread_usb [2022-10-21 12:21:18,641 INFO L138 BoogieDeclarations]: Found implementation of procedure thread_usb [2022-10-21 12:21:18,642 WARN L208 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2022-10-21 12:21:18,856 INFO L234 CfgBuilder]: Building ICFG [2022-10-21 12:21:18,857 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-10-21 12:21:19,124 INFO L275 CfgBuilder]: Performing block encoding [2022-10-21 12:21:19,134 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-10-21 12:21:19,134 INFO L299 CfgBuilder]: Removed 2 assume(true) statements. [2022-10-21 12:21:19,136 INFO L202 PluginConnector]: Adding new model race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 12:21:19 BoogieIcfgContainer [2022-10-21 12:21:19,136 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-10-21 12:21:19,138 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-10-21 12:21:19,138 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-10-21 12:21:19,140 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-10-21 12:21:19,140 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 21.10 12:21:18" (1/2) ... [2022-10-21 12:21:19,140 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1787b3cf and model type race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.10 12:21:19, skipping insertion in model container [2022-10-21 12:21:19,140 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.10 12:21:19" (2/2) ... [2022-10-21 12:21:19,141 INFO L112 eAbstractionObserver]: Analyzing ICFG race-4_1-thread_local_vars.line1016.bpl [2022-10-21 12:21:19,146 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2022-10-21 12:21:19,152 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-10-21 12:21:19,152 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2022-10-21 12:21:19,152 INFO L515 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2022-10-21 12:21:19,222 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2022-10-21 12:21:19,275 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-21 12:21:19,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-21 12:21:19,276 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-21 12:21:19,310 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-21 12:21:19,343 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2022-10-21 12:21:19,371 INFO L159 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-21 12:21:19,378 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES ======== [2022-10-21 12:21:19,391 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@64704bfb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-21 12:21:19,391 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-21 12:21:19,462 INFO L805 garLoopResultBuilder]: Registering result SAFE for location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2022-10-21 12:21:19,465 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-21 12:21:19,467 INFO L307 ceAbstractionStarter]: Result for error location ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES was SAFE (1/5) [2022-10-21 12:21:19,483 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-21 12:21:19,483 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-21 12:21:19,483 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-21 12:21:19,484 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-21 12:21:19,485 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Waiting until timeout for monitored process [2022-10-21 12:21:19,490 INFO L159 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-21 12:21:19,491 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr0ASSERT_VIOLATIONASSERT ======== [2022-10-21 12:21:19,491 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@64704bfb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-21 12:21:19,491 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-21 12:21:24,435 INFO L805 garLoopResultBuilder]: Registering result SAFE for location thread_usbErr0ASSERT_VIOLATIONASSERT (0 of 1 remaining) [2022-10-21 12:21:24,436 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-21 12:21:24,436 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr0ASSERT_VIOLATIONASSERT was SAFE (2/5) [2022-10-21 12:21:24,441 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-21 12:21:24,441 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-21 12:21:24,441 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-21 12:21:24,443 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-21 12:21:24,464 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Waiting until timeout for monitored process [2022-10-21 12:21:24,467 INFO L159 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-21 12:21:24,467 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES ======== [2022-10-21 12:21:24,468 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@64704bfb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-21 12:21:24,468 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-21 12:21:29,185 INFO L805 garLoopResultBuilder]: Registering result SAFE for location thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (0 of 1 remaining) [2022-10-21 12:21:29,186 INFO L444 BasicCegarLoop]: Path program histogram: [] [2022-10-21 12:21:29,186 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES was SAFE (3/5) [2022-10-21 12:21:29,189 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SYNTACTIC, AbstractionType=VARIABLES_GLOBAL, UseConditional=, UseSemiCommutativity=, Solver=, SolverTimeout=] [2022-10-21 12:21:29,189 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2022-10-21 12:21:29,190 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-10-21 12:21:29,197 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2022-10-21 12:21:29,198 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (5)] Waiting until timeout for monitored process [2022-10-21 12:21:29,203 INFO L159 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2022-10-21 12:21:29,204 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == thread_usbErr0ASSERT_VIOLATIONASSERT ======== [2022-10-21 12:21:29,205 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@64704bfb, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2022-10-21 12:21:29,205 INFO L358 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2022-10-21 12:21:30,728 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:30,731 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:30,731 INFO L85 PathProgramCache]: Analyzing trace with hash 1724086611, now seen corresponding path program 1 times [2022-10-21 12:21:30,737 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:30,738 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307352573] [2022-10-21 12:21:30,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:30,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:31,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:31,343 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-21 12:21:31,344 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:31,344 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307352573] [2022-10-21 12:21:31,345 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307352573] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:31,345 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:31,345 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-10-21 12:21:31,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385223585] [2022-10-21 12:21:31,347 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:31,352 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2022-10-21 12:21:31,353 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:31,372 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2022-10-21 12:21:31,374 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2022-10-21 12:21:31,374 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:31,376 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:31,377 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 86.0) internal successors, (172), 2 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:31,377 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:32,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:32,613 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-10-21 12:21:32,613 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:32,613 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:32,614 INFO L85 PathProgramCache]: Analyzing trace with hash -203409125, now seen corresponding path program 1 times [2022-10-21 12:21:32,614 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:32,618 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084594901] [2022-10-21 12:21:32,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:32,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:32,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:33,000 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-21 12:21:33,000 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:33,001 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084594901] [2022-10-21 12:21:33,001 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1084594901] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:33,001 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:33,001 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-21 12:21:33,001 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41888599] [2022-10-21 12:21:33,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:33,002 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-21 12:21:33,002 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:33,002 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-21 12:21:33,002 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-21 12:21:33,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:33,006 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:33,006 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:33,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:33,006 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:35,077 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-10-21 12:21:35,078 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:35,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:35,078 INFO L85 PathProgramCache]: Analyzing trace with hash -1775493646, now seen corresponding path program 1 times [2022-10-21 12:21:35,078 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:35,078 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564589629] [2022-10-21 12:21:35,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:35,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:35,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:35,211 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-10-21 12:21:35,212 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:35,212 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564589629] [2022-10-21 12:21:35,212 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [564589629] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:35,213 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:35,214 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-21 12:21:35,215 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552700218] [2022-10-21 12:21:35,215 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:35,217 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-21 12:21:35,217 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:35,217 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-21 12:21:35,218 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-21 12:21:35,218 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,218 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:35,218 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 68.33333333333333) internal successors, (205), 3 states have internal predecessors, (205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:35,218 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,218 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:35,218 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:35,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:35,657 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:35,657 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-10-21 12:21:35,658 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:35,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:35,659 INFO L85 PathProgramCache]: Analyzing trace with hash 2076656891, now seen corresponding path program 1 times [2022-10-21 12:21:35,659 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:35,659 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056146110] [2022-10-21 12:21:35,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:35,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:35,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:36,157 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-10-21 12:21:36,157 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:36,157 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056146110] [2022-10-21 12:21:36,157 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1056146110] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:36,157 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:36,157 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2022-10-21 12:21:36,157 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2075889838] [2022-10-21 12:21:36,157 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:36,158 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2022-10-21 12:21:36,158 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:36,158 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2022-10-21 12:21:36,158 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2022-10-21 12:21:36,158 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:36,159 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:36,159 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 9 states have (on average 18.88888888888889) internal successors, (170), 10 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:36,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:36,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:36,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:36,159 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:37,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:37,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:37,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:37,247 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:37,248 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-10-21 12:21:37,250 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:37,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:37,251 INFO L85 PathProgramCache]: Analyzing trace with hash -979216145, now seen corresponding path program 1 times [2022-10-21 12:21:37,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:37,251 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10028011] [2022-10-21 12:21:37,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:37,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:37,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:37,944 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 80 proven. 1 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2022-10-21 12:21:37,944 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:37,944 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10028011] [2022-10-21 12:21:37,944 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [10028011] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-21 12:21:37,945 INFO L184 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2022-10-21 12:21:37,945 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2022-10-21 12:21:37,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [416086644] [2022-10-21 12:21:37,945 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2022-10-21 12:21:37,945 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2022-10-21 12:21:37,945 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:37,946 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2022-10-21 12:21:37,946 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=166, Unknown=0, NotChecked=0, Total=210 [2022-10-21 12:21:37,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:37,946 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:37,947 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 14 states have (on average 22.285714285714285) internal successors, (312), 15 states have internal predecessors, (312), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:37,947 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:37,947 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:37,947 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:37,947 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:37,947 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:41,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:41,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:41,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:41,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:41,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2022-10-21 12:21:41,129 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-10-21 12:21:41,129 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:41,129 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:41,129 INFO L85 PathProgramCache]: Analyzing trace with hash 448799656, now seen corresponding path program 1 times [2022-10-21 12:21:41,129 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:41,130 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447664257] [2022-10-21 12:21:41,130 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:41,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:41,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:41,710 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 60 proven. 1 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2022-10-21 12:21:41,710 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:41,710 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447664257] [2022-10-21 12:21:41,710 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1447664257] provided 0 perfect and 1 imperfect interpolant sequences [2022-10-21 12:21:41,710 INFO L184 FreeRefinementEngine]: Found 0 perfect and 1 imperfect interpolant sequences. [2022-10-21 12:21:41,710 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2022-10-21 12:21:41,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175387573] [2022-10-21 12:21:41,711 INFO L85 oduleStraightlineAll]: Using 1 imperfect interpolants to construct interpolant automaton [2022-10-21 12:21:41,712 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 16 states [2022-10-21 12:21:41,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:41,713 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2022-10-21 12:21:41,714 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2022-10-21 12:21:41,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:41,714 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:41,715 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 16 states, 15 states have (on average 19.0) internal successors, (285), 16 states have internal predecessors, (285), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 23 states. [2022-10-21 12:21:41,715 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:45,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:45,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:45,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:45,655 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:45,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:45,656 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:45,656 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-10-21 12:21:45,656 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:45,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:45,657 INFO L85 PathProgramCache]: Analyzing trace with hash 2098467603, now seen corresponding path program 1 times [2022-10-21 12:21:45,657 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:45,657 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2009861129] [2022-10-21 12:21:45,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:45,657 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:45,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:45,730 INFO L134 CoverageAnalysis]: Checked inductivity of 79 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2022-10-21 12:21:45,730 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:45,730 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2009861129] [2022-10-21 12:21:45,730 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2009861129] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:45,730 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:45,731 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-21 12:21:45,731 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450512894] [2022-10-21 12:21:45,731 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:45,731 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-21 12:21:45,731 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:45,732 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-21 12:21:45,732 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-21 12:21:45,732 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:45,732 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:45,732 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 59.6) internal successors, (298), 5 states have internal predecessors, (298), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:45,732 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:45,732 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:45,733 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:45,733 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:45,733 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:45,733 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:45,733 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:48,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:48,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:48,494 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:48,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:48,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:48,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:48,499 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:48,499 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-10-21 12:21:48,500 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:48,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:48,500 INFO L85 PathProgramCache]: Analyzing trace with hash 83566323, now seen corresponding path program 1 times [2022-10-21 12:21:48,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:48,500 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609581887] [2022-10-21 12:21:48,500 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:48,500 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:48,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:48,569 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 52 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2022-10-21 12:21:48,569 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:48,571 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [609581887] [2022-10-21 12:21:48,571 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [609581887] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:48,571 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:48,571 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-10-21 12:21:48,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111974863] [2022-10-21 12:21:48,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:48,571 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-10-21 12:21:48,571 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:48,572 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-10-21 12:21:48,572 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-10-21 12:21:48,572 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:48,572 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:48,573 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 60.6) internal successors, (303), 5 states have internal predecessors, (303), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:48,573 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:51,215 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:51,216 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:51,217 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-10-21 12:21:51,217 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:51,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:51,217 INFO L85 PathProgramCache]: Analyzing trace with hash 855899676, now seen corresponding path program 1 times [2022-10-21 12:21:51,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:51,217 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116201220] [2022-10-21 12:21:51,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:51,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:51,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-10-21 12:21:51,285 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-10-21 12:21:51,286 INFO L136 FreeRefinementEngine]: Strategy BADGER found an infeasible trace [2022-10-21 12:21:51,286 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116201220] [2022-10-21 12:21:51,286 INFO L157 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1116201220] provided 1 perfect and 0 imperfect interpolant sequences [2022-10-21 12:21:51,286 INFO L184 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-10-21 12:21:51,286 INFO L197 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-10-21 12:21:51,286 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [560368575] [2022-10-21 12:21:51,286 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-10-21 12:21:51,286 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-10-21 12:21:51,287 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy BADGER [2022-10-21 12:21:51,287 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-10-21 12:21:51,287 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-10-21 12:21:51,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:51,290 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2022-10-21 12:21:51,291 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 95.33333333333333) internal successors, (286), 3 states have internal predecessors, (286), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 25 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 39 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:51,291 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:58,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2022-10-21 12:21:58,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2022-10-21 12:21:58,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:58,523 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2022-10-21 12:21:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2022-10-21 12:21:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2022-10-21 12:21:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-10-21 12:21:58,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-10-21 12:21:58,524 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-10-21 12:21:58,524 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting thread_usbErr0ASSERT_VIOLATIONASSERT === [thread_usbErr0ASSERT_VIOLATIONASSERT] === [2022-10-21 12:21:58,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-10-21 12:21:58,525 INFO L85 PathProgramCache]: Analyzing trace with hash -2012350116, now seen corresponding path program 1 times [2022-10-21 12:21:58,525 INFO L118 FreeRefinementEngine]: Executing refinement strategy BADGER [2022-10-21 12:21:58,525 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136772866] [2022-10-21 12:21:58,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-10-21 12:21:58,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-10-21 12:21:58,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-21 12:21:58,687 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-10-21 12:21:58,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-10-21 12:21:58,989 INFO L130 FreeRefinementEngine]: Strategy BADGER found a feasible trace [2022-10-21 12:21:58,989 INFO L359 BasicCegarLoop]: Counterexample is feasible [2022-10-21 12:21:58,989 INFO L805 garLoopResultBuilder]: Registering result UNSAFE for location thread_usbErr0ASSERT_VIOLATIONASSERT (0 of 1 remaining) [2022-10-21 12:21:58,989 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-10-21 12:21:58,991 INFO L444 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-10-21 12:21:58,991 INFO L307 ceAbstractionStarter]: Result for error location thread_usbErr0ASSERT_VIOLATIONASSERT was UNSAFE (4/5) [2022-10-21 12:21:58,994 INFO L228 ceAbstractionStarter]: Analysis of concurrent program completed with 1 thread instances [2022-10-21 12:21:58,994 INFO L178 ceAbstractionStarter]: Computing trace abstraction results [2022-10-21 12:21:59,166 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,168 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,169 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,170 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,171 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,172 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,173 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,174 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,175 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,176 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,177 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,178 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,179 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,180 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,181 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,182 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,183 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,184 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,185 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,186 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,187 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,188 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,189 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,319 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,320 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,321 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,322 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,323 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,324 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,325 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,326 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,327 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,327 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,327 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,329 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,343 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,344 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,344 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,344 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,344 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,345 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,345 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,345 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,346 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,347 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,348 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,349 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,350 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,351 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,352 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,353 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,354 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,355 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,356 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,356 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,356 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,357 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,358 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,358 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,358 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,358 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,358 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,360 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,360 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,360 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,360 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,360 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,361 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,362 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,363 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,364 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,365 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,366 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,367 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,368 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,369 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,370 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,371 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,372 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,373 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,374 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,374 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,374 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,374 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,374 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,375 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,376 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,377 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,378 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,379 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,380 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,381 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,382 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,383 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,384 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,385 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,386 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,387 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,388 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,389 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,390 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,391 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,392 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,393 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,394 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,395 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,396 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,397 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,398 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,399 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,400 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,401 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,402 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,403 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,404 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,405 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,406 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,407 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,408 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,409 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,410 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,411 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,412 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,413 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,414 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,415 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,416 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,417 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,418 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled [2022-10-21 12:21:59,419 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,419 WARN L418 cessorBacktranslator]: Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled [2022-10-21 12:21:59,552 INFO L202 PluginConnector]: Adding new model race-4_1-thread_local_vars.line1016.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.10 12:21:59 BasicIcfg [2022-10-21 12:21:59,552 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-10-21 12:21:59,553 INFO L158 Benchmark]: Toolchain (without parser) took 41081.23ms. Allocated memory was 255.9MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 231.3MB in the beginning and 6.8GB in the end (delta: -6.6GB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. [2022-10-21 12:21:59,553 INFO L158 Benchmark]: Boogie PL CUP Parser took 0.12ms. Allocated memory is still 255.9MB. Free memory was 235.6MB in the beginning and 235.5MB in the end (delta: 78.3kB). There was no memory consumed. Max. memory is 8.0GB. [2022-10-21 12:21:59,553 INFO L158 Benchmark]: Boogie Procedure Inliner took 50.42ms. Allocated memory is still 255.9MB. Free memory was 231.3MB in the beginning and 229.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2022-10-21 12:21:59,553 INFO L158 Benchmark]: Boogie Preprocessor took 67.63ms. Allocated memory is still 255.9MB. Free memory was 229.4MB in the beginning and 226.7MB in the end (delta: 2.7MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. [2022-10-21 12:21:59,553 INFO L158 Benchmark]: RCFGBuilder took 544.47ms. Allocated memory is still 255.9MB. Free memory was 226.6MB in the beginning and 226.7MB in the end (delta: -175.7kB). Peak memory consumption was 22.4MB. Max. memory is 8.0GB. [2022-10-21 12:21:59,553 INFO L158 Benchmark]: TraceAbstraction took 40414.49ms. Allocated memory was 255.9MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 226.2MB in the beginning and 6.8GB in the end (delta: -6.6GB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. [2022-10-21 12:21:59,554 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.12ms. Allocated memory is still 255.9MB. Free memory was 235.6MB in the beginning and 235.5MB in the end (delta: 78.3kB). There was no memory consumed. Max. memory is 8.0GB. * Boogie Procedure Inliner took 50.42ms. Allocated memory is still 255.9MB. Free memory was 231.3MB in the beginning and 229.4MB in the end (delta: 1.9MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 67.63ms. Allocated memory is still 255.9MB. Free memory was 229.4MB in the beginning and 226.7MB in the end (delta: 2.7MB). Peak memory consumption was 3.1MB. Max. memory is 8.0GB. * RCFGBuilder took 544.47ms. Allocated memory is still 255.9MB. Free memory was 226.6MB in the beginning and 226.7MB in the end (delta: -175.7kB). Peak memory consumption was 22.4MB. Max. memory is 8.0GB. * TraceAbstraction took 40414.49ms. Allocated memory was 255.9MB in the beginning and 7.6GB in the end (delta: 7.4GB). Free memory was 226.2MB in the beginning and 6.8GB in the end (delta: -6.6GB). Peak memory consumption was 1.3GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList #Ultimate.allocOnStack_#res#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Nested struct field access of VarList ULTIMATE.dealloc_~addr#1 : $Pointer$ not handled * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 1, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 1, negative conditional: 1, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 1, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 1, negative conditional: 1, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 0, positive: 0, positive conditional: 0, positive unconditional: 0, negative: 0, negative conditional: 0, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Statistics on independence cache: Total cache size (in pairs): 0, Positive cache size: 0, Positive conditional cache size: 0, Positive unconditional cache size: 0, Negative cache size: 0, Negative conditional cache size: 0, Negative unconditional cache size: 0, Independence queries for same thread: 1, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 336710, positive: 316246, positive conditional: 316246, positive unconditional: 0, negative: 20464, negative conditional: 20464, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 336710, positive: 316246, positive conditional: 316246, positive unconditional: 0, negative: 20464, negative conditional: 20464, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 316770, positive: 316246, positive conditional: 0, positive unconditional: 316246, negative: 524, negative conditional: 0, negative unconditional: 524, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11903, positive: 11884, positive conditional: 0, positive unconditional: 11884, negative: 19, negative conditional: 0, negative unconditional: 19, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 316770, positive: 304362, positive conditional: 0, positive unconditional: 304362, negative: 505, negative conditional: 0, negative unconditional: 505, unknown: 11903, unknown conditional: 0, unknown unconditional: 11903] , Statistics on independence cache: Total cache size (in pairs): 11903, Positive cache size: 11884, Positive conditional cache size: 0, Positive unconditional cache size: 11884, Negative cache size: 19, Negative conditional cache size: 0, Negative unconditional cache size: 19, Independence queries for same thread: 19940, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 336710, positive: 316246, positive conditional: 316246, positive unconditional: 0, negative: 20464, negative conditional: 20464, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 336710, positive: 316246, positive conditional: 316246, positive unconditional: 0, negative: 20464, negative conditional: 20464, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 316770, positive: 316246, positive conditional: 0, positive unconditional: 316246, negative: 524, negative conditional: 0, negative unconditional: 524, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 11903, positive: 11884, positive conditional: 0, positive unconditional: 11884, negative: 19, negative conditional: 0, negative unconditional: 19, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 316770, positive: 304362, positive conditional: 0, positive unconditional: 304362, negative: 505, negative conditional: 0, negative unconditional: 505, unknown: 11903, unknown conditional: 0, unknown unconditional: 11903] , Statistics on independence cache: Total cache size (in pairs): 11903, Positive cache size: 11884, Positive conditional cache size: 0, Positive unconditional cache size: 11884, Negative cache size: 19, Negative conditional cache size: 0, Negative unconditional cache size: 19, Independence queries for same thread: 19940, Statistics for Abstraction: - StatisticsResult: Independence relation #1 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 124134, positive: 115449, positive conditional: 115449, positive unconditional: 0, negative: 8685, negative conditional: 8685, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 5676, Positive cache size: 5673, Positive conditional cache size: 0, Positive unconditional cache size: 5673, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 8682, Statistics for Abstraction: - StatisticsResult: Independence relation #2 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 118050, positive: 109600, positive conditional: 109600, positive unconditional: 0, negative: 8450, negative conditional: 8450, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 5676, Positive cache size: 5673, Positive conditional cache size: 0, Positive unconditional cache size: 5673, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 17129, Statistics for Abstraction: - StatisticsResult: Independence relation #3 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 137230, positive: 127211, positive conditional: 127211, positive unconditional: 0, negative: 10019, negative conditional: 10019, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 5922, Positive cache size: 5919, Positive conditional cache size: 0, Positive unconditional cache size: 5919, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 27145, Statistics for Abstraction: - StatisticsResult: Independence relation #4 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 41444, positive: 38494, positive conditional: 38494, positive unconditional: 0, negative: 2950, negative conditional: 2950, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 6081, Positive cache size: 6078, Positive conditional cache size: 0, Positive unconditional cache size: 6078, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 30095, Statistics for Abstraction: - StatisticsResult: Independence relation #5 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 78784, positive: 72875, positive conditional: 72875, positive unconditional: 0, negative: 5909, negative conditional: 5909, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 9305, Positive cache size: 9302, Positive conditional cache size: 0, Positive unconditional cache size: 9302, Negative cache size: 3, Negative conditional cache size: 0, Negative unconditional cache size: 3, Independence queries for same thread: 36004, Statistics for Abstraction: - StatisticsResult: Independence relation #6 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 228525, positive: 211768, positive conditional: 211768, positive unconditional: 0, negative: 16757, negative conditional: 16757, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 11360, Positive cache size: 11352, Positive conditional cache size: 0, Positive unconditional cache size: 11352, Negative cache size: 8, Negative conditional cache size: 0, Negative unconditional cache size: 8, Independence queries for same thread: 52728, Statistics for Abstraction: - StatisticsResult: Independence relation #7 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 327075, positive: 303308, positive conditional: 303308, positive unconditional: 0, negative: 23767, negative conditional: 23767, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 12290, Positive cache size: 12279, Positive conditional cache size: 0, Positive unconditional cache size: 12279, Negative cache size: 11, Negative conditional cache size: 0, Negative unconditional cache size: 11, Independence queries for same thread: 76319, Statistics for Abstraction: - StatisticsResult: Independence relation #8 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 324744, positive: 301309, positive conditional: 301309, positive unconditional: 0, negative: 23435, negative conditional: 23435, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 12716, Positive cache size: 12705, Positive conditional cache size: 0, Positive unconditional cache size: 12705, Negative cache size: 11, Negative conditional cache size: 0, Negative unconditional cache size: 11, Independence queries for same thread: 99585, Statistics for Abstraction: - StatisticsResult: Independence relation #9 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 321960, positive: 298887, positive conditional: 298887, positive unconditional: 0, negative: 23073, negative conditional: 23073, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 12716, Positive cache size: 12705, Positive conditional cache size: 0, Positive unconditional cache size: 12705, Negative cache size: 11, Negative conditional cache size: 0, Negative unconditional cache size: 11, Independence queries for same thread: 122496, Statistics for Abstraction: - StatisticsResult: Independence relation #10 benchmarks IndependenceRelationWithAbstraction.Independence Queries: [ total: 693065, positive: 644729, positive conditional: 644729, positive unconditional: 0, negative: 48336, negative conditional: 48336, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , IndependenceRelationWithAbstraction.Statistics on underlying relation: ThreadSeparatingIndependenceRelation.Independence Queries: [ total: 2395011, positive: 2223630, positive conditional: 2223630, positive unconditional: 0, negative: 171381, negative conditional: 171381, negative unconditional: 0, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , ThreadSeparatingIndependenceRelation.Statistics on underlying relation: CachedIndependenceRelation.Independence Queries: [ total: 2224478, positive: 2223630, positive conditional: 0, positive unconditional: 2223630, negative: 848, negative conditional: 0, negative unconditional: 848, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , CachedIndependenceRelation.Statistics on underlying relation: SyntacticIndependenceRelation.Independence Queries: [ total: 13411, positive: 13386, positive conditional: 0, positive unconditional: 13386, negative: 25, negative conditional: 0, negative unconditional: 25, unknown: 0, unknown conditional: 0, unknown unconditional: 0] , Cache Queries: [ total: 2224478, positive: 2210244, positive conditional: 0, positive unconditional: 2210244, negative: 823, negative conditional: 0, negative unconditional: 823, unknown: 13411, unknown conditional: 0, unknown unconditional: 13411] , Statistics on independence cache: Total cache size (in pairs): 13411, Positive cache size: 13386, Positive conditional cache size: 0, Positive unconditional cache size: 13386, Negative cache size: 25, Negative conditional cache size: 0, Negative unconditional cache size: 25, Independence queries for same thread: 170533, Statistics for Abstraction: - CounterExampleResult [Line: 1016]: assertion can be violated assertion can be violated We found a FailurePath: [L1199] 0 assume { :begin_inline_ULTIMATE.init } true; [L1200] 0 #NULL := { base: 0, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0] [L1201] 0 assume 0 == #valid[0]; VAL [#NULL!base=0, #NULL!offset=0] [L1202] 0 assume 0 < #StackHeapBarrier; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5] [L1203] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5] [L1204] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 2, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1205] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1206] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1207] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1208] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2] [L1209] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 48, { base: 1, offset: 0 }, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1210] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1211] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1212] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=48] [L1213] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: 1, offset: 1 }, 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1214] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1215] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1216] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=1, #Ultimate.allocInit_~size#1=2, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1217] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 29, 2; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1218] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1219] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1220] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0] [L1221] 0 ~#t1~0 := { base: 3, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1222] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=2, #Ultimate.allocInit_~size#1=29, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1223] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 4, 3; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1224] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1225] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1226] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1227] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=1, write~init~int_#ptr#1!offset=1, write~init~int_#sizeOfWrittenType#1=1, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1228] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, ~#t1~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1229] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1230] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0] [L1231] 0 ~#t2~0 := { base: 4, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1232] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=3, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1233] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 4, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1234] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1235] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1236] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1237] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=3, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1238] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, ~#t2~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1239] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1240] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1241] 0 ~#mutex~0 := { base: 5, offset: 0 }; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1242] 0 assume { :begin_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=4, #Ultimate.allocInit_~size#1=4, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1243] 0 #Ultimate.allocInit_~size#1, #Ultimate.allocInit_ptrBase#1 := 24, 5; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1244] 0 assume 1 == #valid[#Ultimate.allocInit_ptrBase#1]; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1245] 0 assume #length[#Ultimate.allocInit_ptrBase#1] == #Ultimate.allocInit_~size#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1246] 0 assume { :end_inline_#Ultimate.allocInit } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1247] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=4, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1248] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1249] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1250] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1251] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=0, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1252] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 4 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1253] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1254] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1255] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=4, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1256] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 8 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1257] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1258] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1259] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=8, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1260] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 12 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1261] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1262] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1263] 0 assume { :begin_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=12, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1264] 0 write~init~int_#value#1, write~init~int_#ptr#1, write~init~int_#sizeOfWrittenType#1 := 0, { base: ~#mutex~0!base, offset: 16 + ~#mutex~0!offset }, 4; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1265] 0 assume #memory_int[write~init~int_#ptr#1] == write~init~int_#value#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1266] 0 assume { :end_inline_write~init~int } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0] [L1267] 0 ~pdev~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~pdev~0=0] [L1268] 0 ~ldv_usb_state~0 := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1270] 0 assume { :end_inline_ULTIMATE.init } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1271] 0 assume { :begin_inline_main } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1272] 0 havoc main_#res#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1273] 0 havoc main_#t~ret48#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1274] 0 assume { :begin_inline_module_init } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1275] 0 havoc module_init_#res#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1276] 0 havoc module_init_#t~nondet43#1, module_init_#t~pre44#1, module_init_#t~nondet45#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1277] 0 #pthreadsMutex[~#mutex~0] := 0; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=0] [L1278] 0 ~pdev~0 := 1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1279] 0 assume { :begin_inline_ldv_assert } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1280] 0 ldv_assert_#in~expression#1 := (if 1 == ~pdev~0 then 1 else 0); VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1281] 0 havoc ldv_assert_~expression#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1282] 0 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1283] COND FALSE 0 !(0 == ldv_assert_~expression#1) VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1290] 0 assume { :end_inline_ldv_assert } true; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1291] 0 assume -2147483648 <= module_init_#t~nondet43#1 && module_init_#t~nondet43#1 <= 2147483647; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~nondet43#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1292] COND TRUE 0 0 != module_init_#t~nondet43#1 VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~nondet43#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1293] 0 havoc module_init_#t~nondet43#1; VAL [#NULL!base=0, #NULL!offset=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1294] 0 module_init_#t~pre44#1 := #pthreadsForks; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-3, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1295] 0 #pthreadsForks := 1 + #pthreadsForks; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1296] 0 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1297] 0 assume { :begin_inline_write~int } true; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1298] 0 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := module_init_#t~pre44#1, ~#t1~0, 4; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1301] 0 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1302] 0 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1303] 0 havoc #memory_int, #memory_$Pointer$; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1304] 0 assume #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1] && #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]]; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1305] 0 assume { :end_inline_write~int } true; VAL [#NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L1306] FORK 0 fork module_init_#t~pre44#1, 0, 0 thread_usb({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L922] 1 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L923] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L924] 1 havoc ~probe_ret~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-2, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L954] 1 havoc #memory_int, #memory_$Pointer$; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L955] 1 assume #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1] && #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]]; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#t~pre35#1=-2, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=1, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1080] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1081] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L994] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L995] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L996] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L997] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L998] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L999] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1000] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1001] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1002] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1003] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1004] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1005] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1006] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1007] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1008] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1009] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1010] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1011] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1012] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1013] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1014] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1016] 1 assert read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1017] 1 assume 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1018] 1 assume read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1019] 1 havoc read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1020] 1 assume read~int_#value#1 == #memory_int[read~int_#ptr#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1021] 1 ieee80211_deregister_hw_#t~mem37#1 := read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1022] 1 assume { :end_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#t~pre44#1=-3, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1307] 0 havoc module_init_#t~pre44#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1308] 0 havoc module_init_#t~nondet45#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1309] 0 module_init_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1330] 0 main_#t~ret48#1 := module_init_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1331] 0 assume { :end_inline_module_init } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1332] 0 assume -2147483648 <= main_#t~ret48#1 && main_#t~ret48#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1333] COND FALSE 0 !(0 != main_#t~ret48#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, main_#t~ret48#1=0, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1337] 0 havoc main_#t~ret48#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1339] 0 assume { :begin_inline_module_exit } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1340] 0 havoc module_exit_#t~mem46#1, module_exit_#t~nondet47#1, module_exit_~#status~1#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1341] 0 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1342] 0 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1343] 0 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1344] 0 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1114] 2 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1118] COND FALSE 2 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1121] 2 assume -2147483648 <= #t~nondet32#1 && #t~nondet32#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1122] 2 #t~switch33#1 := 1 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1123] COND TRUE 2 #t~switch33#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1124] 2 assume { :begin_inline_ath9k_flush } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1125] 2 havoc ath9k_flush_#t~nondet31#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1126] 2 #PthreadsMutexLock_old_#pthreadsMutex#1 := #pthreadsMutex; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1127] 2 assume { :begin_inline_#PthreadsMutexLock } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1128] 2 #PthreadsMutexLock_#inputPtr#1 := ~#mutex~0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1129] 2 havoc #PthreadsMutexLock_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1130] 2 havoc #pthreadsMutex; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1131] 2 assume 0 == #PthreadsMutexLock_old_#pthreadsMutex#1[#PthreadsMutexLock_#inputPtr#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1132] 2 assume #pthreadsMutex == #PthreadsMutexLock_old_#pthreadsMutex#1[#PthreadsMutexLock_#inputPtr#1 := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1133] 2 assume 0 == #PthreadsMutexLock_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1134] 2 ath9k_flush_#t~nondet31#1 := #PthreadsMutexLock_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath9k_flush_#t~nondet31#1=0, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1135] 2 assume { :end_inline_#PthreadsMutexLock } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath9k_flush_#t~nondet31#1=0, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1136] 2 havoc ath9k_flush_#t~nondet31#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=1, ~probe_ret~0#1=0] [L1137] 2 ~pdev~0 := 6; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1138] 2 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1139] 2 ldv_assert_#in~expression#1 := (if 6 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1140] 2 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1141] 2 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1142] COND FALSE 2 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1149] 2 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1150] 2 #pthreadsMutex[~#mutex~0] := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1152] 2 assume { :end_inline_ath9k_flush } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=1, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1160] 2 havoc #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1161] 2 havoc #t~switch33#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1118] COND FALSE 2 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1121] 2 assume -2147483648 <= #t~nondet32#1 && #t~nondet32#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1122] 2 #t~switch33#1 := 1 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1123] COND FALSE 2 !(#t~switch33#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1155] 2 #t~switch33#1 := #t~switch33#1 || 2 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1156] COND TRUE 2 #t~switch33#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1164] 2 #res#1 := { base: 0, offset: 0 }; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1023] JOIN 2 join (if ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 <= 2147483647 then ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 else ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 - 4294967296), 0 assign ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1024] 1 write~$Pointer$_old_#memory_$Pointer$#1, write~$Pointer$_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1025] 1 assume { :begin_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1026] 1 write~$Pointer$_#value#1, write~$Pointer$_#ptr#1, write~$Pointer$_#sizeOfWrittenType#1 := ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1029] 1 assume 1 == #valid[write~$Pointer$_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1030] 1 assume write~$Pointer$_#sizeOfWrittenType#1 + write~$Pointer$_#ptr#1!offset <= #length[write~$Pointer$_#ptr#1!base] && 0 <= write~$Pointer$_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1031] 1 havoc #memory_int, #memory_$Pointer$; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1032] 1 assume #memory_int == write~$Pointer$_old_#memory_int#1[write~$Pointer$_#ptr#1 := #memory_int[write~$Pointer$_#ptr#1]] && #memory_$Pointer$ == write~$Pointer$_old_#memory_$Pointer$#1[write~$Pointer$_#ptr#1 := write~$Pointer$_#value#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1033] 1 assume { :end_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-2, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1034] 1 havoc ieee80211_deregister_hw_#t~mem37#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1035] 1 havoc ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1036] 1 ULTIMATE.dealloc_old_#valid#1 := #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1037] 1 assume { :begin_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1038] 1 ULTIMATE.dealloc_~addr#1 := ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1039] 1 havoc #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1040] 1 assume #valid == ULTIMATE.dealloc_old_#valid#1[ULTIMATE.dealloc_~addr#1!base := 0]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1041] 1 assume { :end_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=10, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1042] 1 havoc ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1052] 1 assume { :end_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1054] 1 assume { :end_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=6, ~probe_ret~0#1=0] [L1055] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=6, ~probe_ret~0#1=0] [L1056] 1 ~pdev~0 := 8; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1057] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1058] 1 ldv_assert_#in~expression#1 := (if 8 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1059] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1060] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1061] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1068] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1080] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=-1, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-2, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L954] 1 havoc #memory_int, #memory_$Pointer$; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L955] 1 assume #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1] && #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #PthreadsMutexLock_#inputPtr#1!base=5, #PthreadsMutexLock_#inputPtr#1!offset=0, #PthreadsMutexLock_#res#1=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=-1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1080] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L994] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L995] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L996] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L997] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L998] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L999] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1000] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1001] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1002] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=10, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1003] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1004] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1005] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1006] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1007] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1008] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1009] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1010] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1011] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1012] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1013] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1014] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1016] 1 assert read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1017] 1 assume 1 == #valid[read~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1018] 1 assume read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-2, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1019] 1 havoc read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1020] 1 assume read~int_#value#1 == #memory_int[read~int_#ptr#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1021] 1 ieee80211_deregister_hw_#t~mem37#1 := read~int_#value#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1022] 1 assume { :end_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1114] 2 ~arg#1 := #in~arg#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1118] COND FALSE 2 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1121] 2 assume -2147483648 <= #t~nondet32#1 && #t~nondet32#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1122] 2 #t~switch33#1 := 1 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1123] COND FALSE 2 !(#t~switch33#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=false, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1155] 2 #t~switch33#1 := #t~switch33#1 || 2 == #t~nondet32#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1156] COND TRUE 2 #t~switch33#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1164] 2 #res#1 := { base: 0, offset: 0 }; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1023] JOIN 2 join (if ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 <= 2147483647 then ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 else ieee80211_deregister_hw_#t~mem37#1 % 4294967296 % 4294967296 - 4294967296), 0 assign ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1024] 1 write~$Pointer$_old_#memory_$Pointer$#1, write~$Pointer$_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1025] 1 assume { :begin_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=10, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1026] 1 write~$Pointer$_#value#1, write~$Pointer$_#ptr#1, write~$Pointer$_#sizeOfWrittenType#1 := ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1029] 1 assume 1 == #valid[write~$Pointer$_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1030] 1 assume write~$Pointer$_#sizeOfWrittenType#1 + write~$Pointer$_#ptr#1!offset <= #length[write~$Pointer$_#ptr#1!base] && 0 <= write~$Pointer$_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1031] 1 havoc #memory_int, #memory_$Pointer$; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1032] 1 assume #memory_int == write~$Pointer$_old_#memory_int#1[write~$Pointer$_#ptr#1 := #memory_int[write~$Pointer$_#ptr#1]] && #memory_$Pointer$ == write~$Pointer$_old_#memory_$Pointer$#1[write~$Pointer$_#ptr#1 := write~$Pointer$_#value#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1033] 1 assume { :end_inline_write~$Pointer$ } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~mem37#1=-1, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1034] 1 havoc ieee80211_deregister_hw_#t~mem37#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_#t~nondet38#1!base=0, ieee80211_deregister_hw_#t~nondet38#1!offset=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1035] 1 havoc ieee80211_deregister_hw_#t~nondet38#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1036] 1 ULTIMATE.dealloc_old_#valid#1 := #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1037] 1 assume { :begin_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=10, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1038] 1 ULTIMATE.dealloc_~addr#1 := ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1039] 1 havoc #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1040] 1 assume #valid == ULTIMATE.dealloc_old_#valid#1[ULTIMATE.dealloc_~addr#1!base := 0]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1041] 1 assume { :end_inline_ULTIMATE.dealloc } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=14, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1042] 1 havoc ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1052] 1 assume { :end_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1054] 1 assume { :end_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1055] 1 ~ldv_usb_state~0 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1056] 1 ~pdev~0 := 8; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1057] 1 assume { :begin_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1058] 1 ldv_assert_#in~expression#1 := (if 8 == ~pdev~0 then 1 else 0); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1059] 1 havoc ldv_assert_~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1060] 1 ldv_assert_~expression#1 := ldv_assert_#in~expression#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1061] COND FALSE 1 !(0 == ldv_assert_~expression#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1068] 1 assume { :end_inline_ldv_assert } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=1, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1080] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L934] COND TRUE 1 0 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L935] 1 assume { :begin_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L936] 1 havoc ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L937] 1 havoc ath_ahb_probe_#t~ret39#1, ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L938] 1 havoc ath_ahb_probe_~error~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L939] 1 assume { :begin_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L940] 1 havoc ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L941] 1 havoc ieee80211_register_hw_#t~nondet34#1, ieee80211_register_hw_#t~pre35#1, ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L942] 1 assume -2147483648 <= ieee80211_register_hw_#t~nondet34#1 && ieee80211_register_hw_#t~nondet34#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L943] COND TRUE 1 0 != ieee80211_register_hw_#t~nondet34#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~nondet34#1=1, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L944] 1 havoc ieee80211_register_hw_#t~nondet34#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L945] 1 ieee80211_register_hw_#t~pre35#1 := #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=0, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L946] 1 #pthreadsForks := 1 + #pthreadsForks; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L947] 1 write~int_old_#memory_$Pointer$#1, write~int_old_#memory_int#1 := #memory_$Pointer$, #memory_int; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L948] 1 assume { :begin_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=-1, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L949] 1 write~int_#value#1, write~int_#ptr#1, write~int_#sizeOfWrittenType#1 := ieee80211_register_hw_#t~pre35#1, ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L952] 1 assume 1 == #valid[write~int_#ptr#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L953] 1 assume write~int_#sizeOfWrittenType#1 + write~int_#ptr#1!offset <= #length[write~int_#ptr#1!base] && 0 <= write~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L954] 1 havoc #memory_int, #memory_$Pointer$; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L955] 1 assume #memory_int == write~int_old_#memory_int#1[write~int_#ptr#1 := write~int_#value#1] && #memory_$Pointer$ == write~int_old_#memory_$Pointer$#1[write~int_#ptr#1 := #memory_$Pointer$[write~int_#ptr#1]]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L956] 1 assume { :end_inline_write~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #res#1!base=0, #res#1!offset=0, #StackHeapBarrier=5, #t~nondet32#1=2, #t~nondet40#1=0, #t~switch33#1=true, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!base=0, ~arg#1!offset=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L957] FORK 1 fork ieee80211_register_hw_#t~pre35#1, 0 thread_ath9k({ base: 0, offset: 0 }); VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#t~pre35#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L958] 1 havoc ieee80211_register_hw_#t~pre35#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L959] 1 havoc ieee80211_register_hw_#t~nondet36#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L960] 1 ieee80211_register_hw_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L968] 1 ath_ahb_probe_#t~ret39#1 := ieee80211_register_hw_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L969] 1 assume { :end_inline_ieee80211_register_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L970] 1 assume -2147483648 <= ath_ahb_probe_#t~ret39#1 && ath_ahb_probe_#t~ret39#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L971] 1 ath_ahb_probe_~error~0#1 := ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#t~ret39#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L972] 1 havoc ath_ahb_probe_#t~ret39#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L973] COND FALSE 1 !(0 != ath_ahb_probe_~error~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L976] 1 ath_ahb_probe_#res#1 := 0; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L982] 1 #t~ret42#1 := ath_ahb_probe_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L983] 1 assume { :end_inline_ath_ahb_probe } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L984] 1 assume -2147483648 <= #t~ret42#1 && #t~ret42#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L985] 1 ~probe_ret~0#1 := #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~ret42#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L986] 1 havoc #t~ret42#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L987] COND FALSE 1 !(0 != ~probe_ret~0#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=0, ~pdev~0=8, ~probe_ret~0#1=0] [L990] 1 ~ldv_usb_state~0 := 1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=0, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1080] 1 havoc #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1081] 1 havoc #t~switch41#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L928] COND FALSE 1 !(false) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L931] 1 assume -2147483648 <= #t~nondet40#1 && #t~nondet40#1 <= 2147483647; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L932] 1 #t~switch41#1 := 0 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L933] COND FALSE 1 !(#t~switch41#1) VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=false, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L994] 1 #t~switch41#1 := #t~switch41#1 || 1 == #t~nondet40#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L995] COND TRUE 1 #t~switch41#1 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L996] COND TRUE 1 1 == ~ldv_usb_state~0 VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L997] 1 assume { :begin_inline_ath_ahb_disconnect } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L998] 1 assume { :begin_inline_ieee80211_deregister_hw } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L999] 1 havoc ieee80211_deregister_hw_#t~mem37#1, ieee80211_deregister_hw_#t~nondet38#1, ieee80211_deregister_hw_~#status~0#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1345] 0 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1000] 1 #Ultimate.allocOnStack_old_#length#1, #Ultimate.allocOnStack_old_#valid#1 := #length, #valid; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1001] 1 assume { :begin_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1002] 1 #Ultimate.allocOnStack_~size#1 := 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=14, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1003] 1 havoc #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1004] 1 havoc #valid, #length; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1005] 1 assume 0 == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1006] 1 assume #valid == #Ultimate.allocOnStack_old_#valid#1[#Ultimate.allocOnStack_#res#1!base := 1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1007] 1 assume 0 == #Ultimate.allocOnStack_#res#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1008] 1 assume 0 != #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1009] 1 assume #StackHeapBarrier < #Ultimate.allocOnStack_#res#1!base; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1010] 1 assume #length == #Ultimate.allocOnStack_old_#length#1[#Ultimate.allocOnStack_#res#1!base := #Ultimate.allocOnStack_~size#1]; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1011] 1 ieee80211_deregister_hw_~#status~0#1 := #Ultimate.allocOnStack_#res#1; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1012] 1 assume { :end_inline_#Ultimate.allocOnStack } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1013] 1 assume { :begin_inline_read~int } true; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=3, write~int_#ptr#1!base=4, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1014] 1 read~int_#ptr#1, read~int_#sizeOfReadType#1 := ~#t2~0, 4; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] [L1016] 1 assert read~int_#sizeOfReadType#1 + read~int_#ptr#1!offset <= #length[read~int_#ptr#1!base] && 0 <= read~int_#ptr#1!offset; VAL [#in~arg#1!base=0, #in~arg#1!base=0, #in~arg#1!offset=0, #in~arg#1!offset=0, #NULL!base=0, #NULL!offset=0, #pthreadsForks=1, #StackHeapBarrier=5, #t~nondet40#1=1, #t~switch41#1=true, #Ultimate.allocInit_ptrBase#1=5, #Ultimate.allocInit_~size#1=24, #Ultimate.allocOnStack_#res#1.base=6, #Ultimate.allocOnStack_#res#1.offset=0, #Ultimate.allocOnStack_~size#1=4, #Ultimate.allocOnStack_~size#1=4, ath_ahb_probe_#res#1=0, ath_ahb_probe_~error~0#1=0, ieee80211_deregister_hw_~#status~0#1!base=6, ieee80211_deregister_hw_~#status~0#1!offset=0, ieee80211_register_hw_#res#1=0, ldv_assert_#in~expression#1=1, ldv_assert_#in~expression#1=1, ldv_assert_~expression#1=1, ldv_assert_~expression#1=1, module_init_#res#1=0, read~int_#ptr#1!base=4, read~int_#ptr#1!offset=0, read~int_#sizeOfReadType#1=4, read~int_#value#1=-1, ULTIMATE.dealloc_~addr#1.base=14, ULTIMATE.dealloc_~addr#1.offset=0, write~$Pointer$_#ptr#1.base=14, write~$Pointer$_#ptr#1.offset=0, write~$Pointer$_#sizeOfWrittenType#1=4, write~$Pointer$_#value#1!base=0, write~$Pointer$_#value#1!offset=0, write~init~int_#ptr#1!base=5, write~init~int_#ptr#1!offset=16, write~init~int_#sizeOfWrittenType#1=4, write~init~int_#value#1=0, write~int_#ptr#1!base=4, write~int_#ptr#1!base=3, write~int_#ptr#1!offset=0, write~int_#ptr#1!offset=0, write~int_#sizeOfWrittenType#1=4, write~int_#sizeOfWrittenType#1=4, write~int_#value#1=0, write~int_#value#1=-3, ~#mutex~0!base=5, ~#mutex~0!offset=0, ~#t1~0!base=3, ~#t1~0!offset=0, ~#t2~0!base=4, ~#t2~0!offset=0, ~arg#1!base=0, ~arg#1!offset=0, ~ldv_usb_state~0=1, ~pdev~0=8, ~probe_ret~0#1=0] - StatisticsResult: Ultimate Automizer benchmark data for thread instance sufficiency: ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES with 1 thread instances CFG has 5 procedures, 502 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 0.1s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 0.1s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for error location: thread_usbErr0ASSERT_VIOLATIONASSERT with 1 thread instances CFG has 5 procedures, 502 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 5.0s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 4.9s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for error location: thread_usbErr0ASSERT_VIOLATIONASSERT with 2 thread instances CFG has 5 procedures, 502 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 29.8s, OverallIterations: 10, TraceHistogramMax: 0, PathProgramHistogramMax: 1, EmptinessCheckTime: 26.1s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 114, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 2743 NumberOfCodeBlocks, 2743 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 2286 ConstructedInterpolants, 0 QuantifiedInterpolants, 6483 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 7 PerfectInterpolantSequences, 428/430 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available - StatisticsResult: Ultimate Automizer benchmark data for thread instance sufficiency: thread_usbErr2INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES with 1 thread instances CFG has 5 procedures, 502 locations, 5 error locations. Started 1 CEGAR loops. OverallTime: 4.7s, OverallIterations: 0, TraceHistogramMax: 0, PathProgramHistogramMax: 0, EmptinessCheckTime: 4.7s, AutomataDifference: 0.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: , PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=0occurred in iteration=0, InterpolantAutomatonStates: 0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-10-21 12:21:59,613 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (5)] Forceful destruction successful, exit code 0 [2022-10-21 12:21:59,826 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (4)] Forceful destruction successful, exit code 0 [2022-10-21 12:22:00,026 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (3)] Forceful destruction successful, exit code 0 [2022-10-21 12:22:00,227 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Forceful destruction successful, exit code 0 [2022-10-21 12:22:00,429 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...