/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf --buchiautomizer.fairness.type.for.concurrent.programs NONE -i ../../../trunk/examples/svcomp/pthread-atomic/lamport.i -------------------------------------------------------------------------------- This is Ultimate 0.2.3-wip.me.fairness-a3464b2-m [2023-08-18 16:43:17,419 INFO L172 SettingsManager]: Resetting all preferences to default values... [2023-08-18 16:43:17,480 INFO L100 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf [2023-08-18 16:43:17,501 INFO L114 SettingsManager]: Preferences different from defaults after loading the file: [2023-08-18 16:43:17,502 INFO L135 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-08-18 16:43:17,502 INFO L137 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-08-18 16:43:17,504 INFO L135 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-08-18 16:43:17,504 INFO L137 SettingsManager]: * Create parallel compositions if possible=false [2023-08-18 16:43:17,505 INFO L137 SettingsManager]: * Use SBE=true [2023-08-18 16:43:17,508 INFO L135 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-08-18 16:43:17,508 INFO L137 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-08-18 16:43:17,508 INFO L137 SettingsManager]: * Use old map elimination=false [2023-08-18 16:43:17,508 INFO L137 SettingsManager]: * Use external solver (rank synthesis)=false [2023-08-18 16:43:17,509 INFO L137 SettingsManager]: * Use only trivial implications for array writes=true [2023-08-18 16:43:17,510 INFO L137 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-08-18 16:43:17,510 INFO L135 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-08-18 16:43:17,510 INFO L137 SettingsManager]: * sizeof long=4 [2023-08-18 16:43:17,510 INFO L137 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2023-08-18 16:43:17,510 INFO L137 SettingsManager]: * Overapproximate operations on floating types=true [2023-08-18 16:43:17,510 INFO L137 SettingsManager]: * sizeof POINTER=4 [2023-08-18 16:43:17,511 INFO L137 SettingsManager]: * Check division by zero=IGNORE [2023-08-18 16:43:17,511 INFO L137 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-08-18 16:43:17,511 INFO L137 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-08-18 16:43:17,511 INFO L137 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-08-18 16:43:17,511 INFO L137 SettingsManager]: * sizeof long double=12 [2023-08-18 16:43:17,512 INFO L137 SettingsManager]: * Check if freed pointer was valid=false [2023-08-18 16:43:17,512 INFO L137 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-08-18 16:43:17,512 INFO L137 SettingsManager]: * Use constant arrays=true [2023-08-18 16:43:17,512 INFO L137 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-08-18 16:43:17,512 INFO L135 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-08-18 16:43:17,513 INFO L137 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-08-18 16:43:17,513 INFO L135 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-08-18 16:43:17,513 INFO L137 SettingsManager]: * Trace refinement strategy=CAMEL [2023-08-18 16:43:17,513 INFO L137 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2023-08-18 16:43:17,515 INFO L135 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-08-18 16:43:17,515 INFO L137 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: Fairness type for concurrent programs -> NONE [2023-08-18 16:43:17,717 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-08-18 16:43:17,742 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-08-18 16:43:17,743 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-08-18 16:43:17,745 INFO L270 PluginConnector]: Initializing CDTParser... [2023-08-18 16:43:17,745 INFO L274 PluginConnector]: CDTParser initialized [2023-08-18 16:43:17,746 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/lamport.i [2023-08-18 16:43:18,901 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-08-18 16:43:19,076 INFO L384 CDTParser]: Found 1 translation units. [2023-08-18 16:43:19,076 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i [2023-08-18 16:43:19,085 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b69d746d9/90fa7bd356f24eb1b5384c8ce7fa7ef4/FLAG2e774aa28 [2023-08-18 16:43:19,094 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b69d746d9/90fa7bd356f24eb1b5384c8ce7fa7ef4 [2023-08-18 16:43:19,095 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-08-18 16:43:19,096 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2023-08-18 16:43:19,097 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-08-18 16:43:19,097 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-08-18 16:43:19,099 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-08-18 16:43:19,100 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,100 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3894861 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19, skipping insertion in model container [2023-08-18 16:43:19,100 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,104 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2023-08-18 16:43:19,146 INFO L178 MainTranslator]: Built tables and reachable declarations [2023-08-18 16:43:19,247 WARN L633 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2023-08-18 16:43:19,371 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32156,32169] [2023-08-18 16:43:19,376 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[34083,34096] [2023-08-18 16:43:19,385 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-08-18 16:43:19,395 INFO L203 MainTranslator]: Completed pre-run [2023-08-18 16:43:19,411 WARN L633 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2023-08-18 16:43:19,430 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[32156,32169] [2023-08-18 16:43:19,435 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/lamport.i[34083,34096] [2023-08-18 16:43:19,437 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-08-18 16:43:19,460 WARN L667 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2023-08-18 16:43:19,460 WARN L667 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2023-08-18 16:43:19,460 WARN L667 CHandler]: The function __builtin_bswap16 is called, but not defined or handled by StandardFunctionHandler. [2023-08-18 16:43:19,465 INFO L208 MainTranslator]: Completed translation [2023-08-18 16:43:19,465 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19 WrapperNode [2023-08-18 16:43:19,465 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-08-18 16:43:19,466 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-08-18 16:43:19,467 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-08-18 16:43:19,467 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-08-18 16:43:19,472 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,494 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,509 INFO L138 Inliner]: procedures = 171, calls = 83, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 44 [2023-08-18 16:43:19,510 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-08-18 16:43:19,511 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-08-18 16:43:19,511 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-08-18 16:43:19,511 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-08-18 16:43:19,517 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,517 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,530 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,531 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,535 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,538 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,539 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,540 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,552 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-08-18 16:43:19,552 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-08-18 16:43:19,553 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-08-18 16:43:19,553 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-08-18 16:43:19,553 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (1/1) ... [2023-08-18 16:43:19,560 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-08-18 16:43:19,567 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2023-08-18 16:43:19,579 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-08-18 16:43:19,585 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-08-18 16:43:19,606 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-08-18 16:43:19,606 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2023-08-18 16:43:19,606 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2023-08-18 16:43:19,606 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2023-08-18 16:43:19,607 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2023-08-18 16:43:19,607 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-08-18 16:43:19,607 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2023-08-18 16:43:19,607 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-08-18 16:43:19,608 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-08-18 16:43:19,608 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-08-18 16:43:19,608 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-08-18 16:43:19,609 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2023-08-18 16:43:19,609 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-08-18 16:43:19,609 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-08-18 16:43:19,610 WARN L210 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2023-08-18 16:43:19,724 INFO L236 CfgBuilder]: Building ICFG [2023-08-18 16:43:19,725 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-08-18 16:43:19,874 INFO L277 CfgBuilder]: Performing block encoding [2023-08-18 16:43:19,882 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-08-18 16:43:19,883 INFO L302 CfgBuilder]: Removed 8 assume(true) statements. [2023-08-18 16:43:19,888 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.08 04:43:19 BoogieIcfgContainer [2023-08-18 16:43:19,889 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-08-18 16:43:19,889 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-08-18 16:43:19,889 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-08-18 16:43:19,892 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-08-18 16:43:19,893 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-08-18 16:43:19,893 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 18.08 04:43:19" (1/3) ... [2023-08-18 16:43:19,894 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a7a02c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.08 04:43:19, skipping insertion in model container [2023-08-18 16:43:19,894 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-08-18 16:43:19,894 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.08 04:43:19" (2/3) ... [2023-08-18 16:43:19,894 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4a7a02c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 18.08 04:43:19, skipping insertion in model container [2023-08-18 16:43:19,894 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-08-18 16:43:19,894 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.08 04:43:19" (3/3) ... [2023-08-18 16:43:19,895 INFO L332 chiAutomizerObserver]: Analyzing ICFG lamport.i [2023-08-18 16:43:20,012 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2023-08-18 16:43:20,032 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 110 places, 129 transitions, 274 flow [2023-08-18 16:43:20,100 INFO L124 PetriNetUnfolderBase]: 24/125 cut-off events. [2023-08-18 16:43:20,100 INFO L125 PetriNetUnfolderBase]: For 2/2 co-relation queries the response was YES. [2023-08-18 16:43:20,107 INFO L83 FinitePrefix]: Finished finitePrefix Result has 134 conditions, 125 events. 24/125 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 240 event pairs, 0 based on Foata normal form. 0/101 useless extension candidates. Maximal degree in co-relation 95. Up to 5 conditions per place. [2023-08-18 16:43:20,107 INFO L82 GeneralOperation]: Start removeDead. Operand has 110 places, 129 transitions, 274 flow [2023-08-18 16:43:20,119 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 108 places, 125 transitions, 262 flow [2023-08-18 16:43:20,129 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-08-18 16:43:20,129 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-08-18 16:43:20,132 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-08-18 16:43:20,132 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-08-18 16:43:20,132 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-08-18 16:43:20,132 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-08-18 16:43:20,132 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-08-18 16:43:20,132 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-08-18 16:43:20,134 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2023-08-18 16:43:20,425 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2023-08-18 16:43:20,425 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:20,425 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:20,430 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:20,431 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:20,431 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-08-18 16:43:20,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 4151 states, but on-demand construction may add more states [2023-08-18 16:43:20,485 INFO L131 ngComponentsAnalysis]: Automaton has 93 accepting balls. 3633 [2023-08-18 16:43:20,486 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:20,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:20,487 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:20,487 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:20,494 INFO L748 eck$LassoCheckResult]: Stem: 113#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 116#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 118#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 120#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 122#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 124#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 126#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 128#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 130#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 132#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 134#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 136#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 138#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 140#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 142#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 144#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 146#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 148#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 150#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 152#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 154#[$Ultimate##0, L845-3]don't care [394] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 156#[L845-3, $Ultimate##3]don't care [396] $Ultimate##3-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 162#[L753-1, L845-3]don't care [2023-08-18 16:43:20,497 INFO L750 eck$LassoCheckResult]: Loop: 162#[L753-1, L845-3]don't care [398] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 172#[L705, L845-3]don't care [402] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 188#[L845-3, L707]don't care [405] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 208#[L845-3, L710]don't care [407] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 232#[L845-3, L713]don't care [409] L713-->L715: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_3 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} AuxVars[] AssignedVars[] 260#[L715, L845-3]don't care [412] L715-->L717: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0] 296#[L717, L845-3]don't care [414] L717-->L724: Formula: (= v_~y~0_13 v_thr1Thread1of1ForFork1_~y1~0_7) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 344#[L724, L845-3]don't care [417] L724-->L753-1: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_11 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_11} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_11} AuxVars[] AssignedVars[] 162#[L753-1, L845-3]don't care [2023-08-18 16:43:20,501 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:20,501 INFO L85 PathProgramCache]: Analyzing trace with hash -711524848, now seen corresponding path program 1 times [2023-08-18 16:43:20,507 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:20,507 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492336183] [2023-08-18 16:43:20,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:20,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:20,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:20,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:20,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:20,627 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:20,629 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:20,629 INFO L85 PathProgramCache]: Analyzing trace with hash -266110579, now seen corresponding path program 1 times [2023-08-18 16:43:20,629 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:20,629 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753824499] [2023-08-18 16:43:20,629 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:20,630 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:20,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:20,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:20,724 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:20,724 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753824499] [2023-08-18 16:43:20,724 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [753824499] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:20,724 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:20,724 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:20,725 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519910907] [2023-08-18 16:43:20,725 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:20,745 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-08-18 16:43:20,745 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:20,766 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-08-18 16:43:20,766 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-08-18 16:43:20,769 INFO L87 Difference]: Start difference. First operand currently 4151 states, but on-demand construction may add more states Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:21,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:21,069 INFO L93 Difference]: Finished difference Result 8508 states and 24517 transitions. [2023-08-18 16:43:21,070 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8508 states and 24517 transitions. [2023-08-18 16:43:21,145 INFO L131 ngComponentsAnalysis]: Automaton has 562 accepting balls. 5380 [2023-08-18 16:43:21,218 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8508 states to 7586 states and 21889 transitions. [2023-08-18 16:43:21,219 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7586 [2023-08-18 16:43:21,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7586 [2023-08-18 16:43:21,244 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7586 states and 21889 transitions. [2023-08-18 16:43:21,277 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:21,277 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7586 states and 21889 transitions. [2023-08-18 16:43:21,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7586 states and 21889 transitions. [2023-08-18 16:43:21,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7586 to 4507. [2023-08-18 16:43:21,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4507 states, 4507 states have (on average 2.9256711781672955) internal successors, (13186), 4506 states have internal predecessors, (13186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:21,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4507 states to 4507 states and 13186 transitions. [2023-08-18 16:43:21,471 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4507 states and 13186 transitions. [2023-08-18 16:43:21,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-08-18 16:43:21,476 INFO L428 stractBuchiCegarLoop]: Abstraction has 4507 states and 13186 transitions. [2023-08-18 16:43:21,476 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-08-18 16:43:21,476 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4507 states and 13186 transitions. [2023-08-18 16:43:21,518 INFO L131 ngComponentsAnalysis]: Automaton has 297 accepting balls. 3275 [2023-08-18 16:43:21,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:21,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:21,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:21,519 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:21,521 INFO L748 eck$LassoCheckResult]: Stem: 17994#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 17996#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 20048#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 20050#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 23090#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 23092#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 22456#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 22458#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 21466#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 21468#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 24986#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 20794#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 20796#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 21204#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 21206#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 20326#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 20328#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 21016#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 23208#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 23210#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 23386#[$Ultimate##0, L845-3]don't care [319] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 24440#[L845-4, $Ultimate##0]don't care [251] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 24442#[$Ultimate##0, L846]don't care [237] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 21936#[$Ultimate##0, L846-1]don't care [230] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 21938#[L846-2, $Ultimate##0]don't care [250] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 24952#[L846-3, $Ultimate##0]don't care [438] L846-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 22742#[$Ultimate##0, L846-4, $Ultimate##0]don't care [352] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 22744#[$Ultimate##0, L846-4, $Ultimate##3]don't care [354] $Ultimate##3-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 25012#[$Ultimate##0, L823-1, L846-4]don't care [2023-08-18 16:43:21,522 INFO L750 eck$LassoCheckResult]: Loop: 25012#[$Ultimate##0, L823-1, L846-4]don't care [356] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 25644#[$Ultimate##0, L846-4, L775]don't care [360] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 24932#[$Ultimate##0, L777, L846-4]don't care [363] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 24938#[$Ultimate##0, L780, L846-4]don't care [365] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 24948#[$Ultimate##0, L846-4, L783]don't care [367] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 25746#[$Ultimate##0, L785, L846-4]don't care [370] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 25722#[$Ultimate##0, L846-4, L787]don't care [372] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 25710#[$Ultimate##0, L794, L846-4]don't care [375] L794-->L823-1: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_11 0) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_11} AuxVars[] AssignedVars[] 25012#[$Ultimate##0, L823-1, L846-4]don't care [2023-08-18 16:43:21,523 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:21,523 INFO L85 PathProgramCache]: Analyzing trace with hash -965582079, now seen corresponding path program 1 times [2023-08-18 16:43:21,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:21,524 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844963819] [2023-08-18 16:43:21,524 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:21,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:21,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:21,577 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:21,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:21,607 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:21,607 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:21,607 INFO L85 PathProgramCache]: Analyzing trace with hash -312654707, now seen corresponding path program 1 times [2023-08-18 16:43:21,607 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:21,607 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459165730] [2023-08-18 16:43:21,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:21,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:21,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:21,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:21,643 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:21,643 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [459165730] [2023-08-18 16:43:21,643 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [459165730] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:21,643 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:21,643 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:21,643 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792271418] [2023-08-18 16:43:21,644 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:21,644 INFO L765 eck$LassoCheckResult]: loop already infeasible [2023-08-18 16:43:21,644 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:21,644 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2023-08-18 16:43:21,644 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2023-08-18 16:43:21,644 INFO L87 Difference]: Start difference. First operand 4507 states and 13186 transitions. cyclomatic complexity: 8976 Second operand has 5 states, 4 states have (on average 2.0) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:21,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:21,832 INFO L93 Difference]: Finished difference Result 6557 states and 18535 transitions. [2023-08-18 16:43:21,833 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6557 states and 18535 transitions. [2023-08-18 16:43:21,897 INFO L131 ngComponentsAnalysis]: Automaton has 954 accepting balls. 1980 [2023-08-18 16:43:21,952 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6557 states to 6557 states and 18535 transitions. [2023-08-18 16:43:21,954 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6557 [2023-08-18 16:43:21,964 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6557 [2023-08-18 16:43:21,965 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6557 states and 18535 transitions. [2023-08-18 16:43:21,978 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:21,979 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6557 states and 18535 transitions. [2023-08-18 16:43:21,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6557 states and 18535 transitions. [2023-08-18 16:43:22,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6557 to 4648. [2023-08-18 16:43:22,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4648 states, 4648 states have (on average 2.846170395869191) internal successors, (13229), 4647 states have internal predecessors, (13229), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:22,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4648 states to 4648 states and 13229 transitions. [2023-08-18 16:43:22,163 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4648 states and 13229 transitions. [2023-08-18 16:43:22,163 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2023-08-18 16:43:22,163 INFO L428 stractBuchiCegarLoop]: Abstraction has 4648 states and 13229 transitions. [2023-08-18 16:43:22,164 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-08-18 16:43:22,164 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4648 states and 13229 transitions. [2023-08-18 16:43:22,195 INFO L131 ngComponentsAnalysis]: Automaton has 714 accepting balls. 1500 [2023-08-18 16:43:22,195 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:22,195 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:22,196 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:22,196 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-08-18 16:43:22,198 INFO L748 eck$LassoCheckResult]: Stem: 33555#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 33557#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 35579#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 35581#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 38707#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 38709#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 38021#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 38023#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 37001#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 37003#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 40735#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 36325#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 36327#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 36745#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 36747#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 35861#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 35863#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 36559#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 38833#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 38835#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 39019#[$Ultimate##0, L845-3]don't care [394] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 33979#[L845-3, $Ultimate##3]don't care [396] $Ultimate##3-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 33981#[L753-1, L845-3]don't care [398] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 38315#[L705, L845-3]don't care [402] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 37221#[L845-3, L707]don't care [405] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 36193#[L845-3, L710]don't care [407] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 36195#[L845-3, L713]don't care [409] L713-->L715: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_3 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_3} AuxVars[] AssignedVars[] 37335#[L715, L845-3]don't care [412] L715-->L717: Formula: (= v_~b1~0_5 0) InVars {} OutVars{~b1~0=v_~b1~0_5} AuxVars[] AssignedVars[~b1~0] 40125#[L717, L845-3]don't care [414] L717-->L724: Formula: (= v_~y~0_13 v_thr1Thread1of1ForFork1_~y1~0_7) InVars {~y~0=v_~y~0_13} OutVars{~y~0=v_~y~0_13, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 40063#[L724, L845-3]don't care [2023-08-18 16:43:22,198 INFO L750 eck$LassoCheckResult]: Loop: 40063#[L724, L845-3]don't care [416] L724-->L722: Formula: (not (= v_thr1Thread1of1ForFork1_~y1~0_9 0)) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_9} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_9} AuxVars[] AssignedVars[] 40061#[L722, L845-3]don't care [421] L722-->L724: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_13 v_~y~0_15) InVars {~y~0=v_~y~0_15} OutVars{~y~0=v_~y~0_15, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_13} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 40063#[L724, L845-3]don't care [2023-08-18 16:43:22,199 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:22,239 INFO L85 PathProgramCache]: Analyzing trace with hash -1053246043, now seen corresponding path program 1 times [2023-08-18 16:43:22,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:22,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913193480] [2023-08-18 16:43:22,239 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:22,239 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:22,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:22,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:22,322 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:22,322 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913193480] [2023-08-18 16:43:22,322 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1913193480] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:22,322 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:22,322 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:22,322 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692835622] [2023-08-18 16:43:22,322 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:22,323 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-08-18 16:43:22,323 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:22,323 INFO L85 PathProgramCache]: Analyzing trace with hash 14278, now seen corresponding path program 1 times [2023-08-18 16:43:22,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:22,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236824378] [2023-08-18 16:43:22,323 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:22,323 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:22,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:22,327 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:22,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:22,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:22,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:22,352 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-08-18 16:43:22,352 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-08-18 16:43:22,353 INFO L87 Difference]: Start difference. First operand 4648 states and 13229 transitions. cyclomatic complexity: 9295 Second operand has 4 states, 4 states have (on average 7.25) internal successors, (29), 4 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:22,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:22,445 INFO L93 Difference]: Finished difference Result 5770 states and 15947 transitions. [2023-08-18 16:43:22,445 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5770 states and 15947 transitions. [2023-08-18 16:43:22,487 INFO L131 ngComponentsAnalysis]: Automaton has 802 accepting balls. 1668 [2023-08-18 16:43:22,532 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5770 states to 5770 states and 15947 transitions. [2023-08-18 16:43:22,532 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5770 [2023-08-18 16:43:22,540 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5770 [2023-08-18 16:43:22,540 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5770 states and 15947 transitions. [2023-08-18 16:43:22,549 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:22,550 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5770 states and 15947 transitions. [2023-08-18 16:43:22,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5770 states and 15947 transitions. [2023-08-18 16:43:22,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5770 to 4352. [2023-08-18 16:43:22,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4352 states, 4352 states have (on average 2.8168658088235294) internal successors, (12259), 4351 states have internal predecessors, (12259), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:22,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4352 states to 4352 states and 12259 transitions. [2023-08-18 16:43:22,700 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4352 states and 12259 transitions. [2023-08-18 16:43:22,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-08-18 16:43:22,702 INFO L428 stractBuchiCegarLoop]: Abstraction has 4352 states and 12259 transitions. [2023-08-18 16:43:22,702 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-08-18 16:43:22,702 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4352 states and 12259 transitions. [2023-08-18 16:43:22,724 INFO L131 ngComponentsAnalysis]: Automaton has 640 accepting balls. 1344 [2023-08-18 16:43:22,724 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:22,724 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:22,726 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:22,726 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-08-18 16:43:22,727 INFO L748 eck$LassoCheckResult]: Stem: 48570#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 48572#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 50460#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 50462#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 53348#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 53350#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 52714#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 52716#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 51764#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 51766#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 55192#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 51128#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 51130#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 51518#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 51520#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 50706#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 50708#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 51342#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 53456#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 53458#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 53632#[$Ultimate##0, L845-3]don't care [394] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 48954#[L845-3, $Ultimate##3]don't care [396] $Ultimate##3-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 48956#[L753-1, L845-3]don't care [398] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 52990#[L705, L845-3]don't care [402] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 51974#[L845-3, L707]don't care [405] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 51016#[L845-3, L710]don't care [407] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 51018#[L845-3, L713]don't care [410] L713-->L728: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_5 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} AuxVars[] AssignedVars[] 52086#[L728, L845-3]don't care [413] L728-->L730: Formula: (= v_~y~0_16 1) InVars {} OutVars{~y~0=v_~y~0_16} AuxVars[] AssignedVars[~y~0] 51624#[L845-3, L730]don't care [415] L730-->L733: Formula: (= v_thr1Thread1of1ForFork1_~x1~0_1 v_~x~0_4) InVars {~x~0=v_~x~0_4} OutVars{~x~0=v_~x~0_4, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~x1~0] 51628#[L845-3, L733]don't care [419] L733-->L735: Formula: (not (= v_thr1Thread1of1ForFork1_~x1~0_3 1)) InVars {thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_3} OutVars{thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_3} AuxVars[] AssignedVars[] 54364#[L845-3, L735]don't care [422] L735-->L737: Formula: (= v_~b1~0_3 0) InVars {} OutVars{~b1~0=v_~b1~0_3} AuxVars[] AssignedVars[~b1~0] 54366#[L845-3, L737]don't care [423] L737-->L744: Formula: (= v_~b2~0_5 v_thr1Thread1of1ForFork1_~b21~0_1) InVars {~b2~0=v_~b2~0_5} OutVars{~b2~0=v_~b2~0_5, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~b21~0] 53068#[L845-3, L744]don't care [2023-08-18 16:43:22,728 INFO L750 eck$LassoCheckResult]: Loop: 53068#[L845-3, L744]don't care [424] L744-->L742: Formula: (<= 1 v_thr1Thread1of1ForFork1_~b21~0_3) InVars {thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_3} OutVars{thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_3} AuxVars[] AssignedVars[] 53070#[L845-3, L742]don't care [427] L742-->L744: Formula: (= v_~b2~0_6 v_thr1Thread1of1ForFork1_~b21~0_7) InVars {~b2~0=v_~b2~0_6} OutVars{~b2~0=v_~b2~0_6, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~b21~0] 53068#[L845-3, L744]don't care [2023-08-18 16:43:22,729 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:22,729 INFO L85 PathProgramCache]: Analyzing trace with hash 1808196190, now seen corresponding path program 1 times [2023-08-18 16:43:22,729 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:22,729 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [397332240] [2023-08-18 16:43:22,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:22,729 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:22,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:22,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:22,889 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:22,889 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [397332240] [2023-08-18 16:43:22,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [397332240] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:22,890 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:22,890 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:22,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072336044] [2023-08-18 16:43:22,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:22,890 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-08-18 16:43:22,891 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:22,891 INFO L85 PathProgramCache]: Analyzing trace with hash 14532, now seen corresponding path program 1 times [2023-08-18 16:43:22,891 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:22,891 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706803312] [2023-08-18 16:43:22,891 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:22,891 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:22,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:22,895 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:22,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:22,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:22,911 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:22,911 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-08-18 16:43:22,911 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-08-18 16:43:22,912 INFO L87 Difference]: Start difference. First operand 4352 states and 12259 transitions. cyclomatic complexity: 8547 Second operand has 4 states, 4 states have (on average 8.0) internal successors, (32), 4 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:22,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:22,966 INFO L93 Difference]: Finished difference Result 7274 states and 20077 transitions. [2023-08-18 16:43:22,966 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7274 states and 20077 transitions. [2023-08-18 16:43:23,013 INFO L131 ngComponentsAnalysis]: Automaton has 976 accepting balls. 2032 [2023-08-18 16:43:23,044 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7274 states to 6682 states and 18497 transitions. [2023-08-18 16:43:23,045 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6682 [2023-08-18 16:43:23,052 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6682 [2023-08-18 16:43:23,052 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6682 states and 18497 transitions. [2023-08-18 16:43:23,060 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:23,060 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6682 states and 18497 transitions. [2023-08-18 16:43:23,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6682 states and 18497 transitions. [2023-08-18 16:43:23,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6682 to 4214. [2023-08-18 16:43:23,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4214 states, 4214 states have (on average 2.8196487897484577) internal successors, (11882), 4213 states have internal predecessors, (11882), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:23,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4214 states to 4214 states and 11882 transitions. [2023-08-18 16:43:23,254 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4214 states and 11882 transitions. [2023-08-18 16:43:23,254 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-08-18 16:43:23,255 INFO L428 stractBuchiCegarLoop]: Abstraction has 4214 states and 11882 transitions. [2023-08-18 16:43:23,255 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-08-18 16:43:23,255 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4214 states and 11882 transitions. [2023-08-18 16:43:23,279 INFO L131 ngComponentsAnalysis]: Automaton has 644 accepting balls. 1352 [2023-08-18 16:43:23,279 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:23,279 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:23,280 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:23,280 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-08-18 16:43:23,281 INFO L748 eck$LassoCheckResult]: Stem: 64451#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 64453#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 66097#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 66099#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 68655#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 68657#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 68081#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 68083#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 67219#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 67221#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 70339#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 66673#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 66675#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 66991#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 66993#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 66319#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 66321#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 66841#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 68749#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 68751#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 68915#[$Ultimate##0, L845-3]don't care [319] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 69859#[L845-4, $Ultimate##0]don't care [251] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 69861#[$Ultimate##0, L846]don't care [237] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 67643#[$Ultimate##0, L846-1]don't care [230] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 67645#[L846-2, $Ultimate##0]don't care [250] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 70307#[L846-3, $Ultimate##0]don't care [438] L846-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 68351#[$Ultimate##0, L846-4, $Ultimate##0]don't care [352] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 68353#[$Ultimate##0, L846-4, $Ultimate##3]don't care [354] $Ultimate##3-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 70187#[$Ultimate##0, L823-1, L846-4]don't care [356] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 64749#[$Ultimate##0, L846-4, L775]don't care [360] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 64753#[$Ultimate##0, L777, L846-4]don't care [363] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 70301#[$Ultimate##0, L780, L846-4]don't care [365] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 70193#[$Ultimate##0, L846-4, L783]don't care [367] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 70195#[$Ultimate##0, L785, L846-4]don't care [370] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 66755#[$Ultimate##0, L846-4, L787]don't care [372] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 65731#[$Ultimate##0, L794, L846-4]don't care [2023-08-18 16:43:23,281 INFO L750 eck$LassoCheckResult]: Loop: 65731#[$Ultimate##0, L794, L846-4]don't care [374] L794-->L792: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_9 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} AuxVars[] AssignedVars[] 65725#[$Ultimate##0, L792, L846-4]don't care [379] L792-->L794: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_13 v_~y~0_5) InVars {~y~0=v_~y~0_5} OutVars{~y~0=v_~y~0_5, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_13} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 65731#[$Ultimate##0, L794, L846-4]don't care [2023-08-18 16:43:23,282 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:23,282 INFO L85 PathProgramCache]: Analyzing trace with hash -55886038, now seen corresponding path program 1 times [2023-08-18 16:43:23,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:23,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549450779] [2023-08-18 16:43:23,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:23,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:23,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:23,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:23,334 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:23,335 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549450779] [2023-08-18 16:43:23,335 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549450779] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:23,335 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:23,335 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:23,335 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227590398] [2023-08-18 16:43:23,335 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:23,335 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-08-18 16:43:23,336 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:23,336 INFO L85 PathProgramCache]: Analyzing trace with hash 12934, now seen corresponding path program 1 times [2023-08-18 16:43:23,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:23,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164347187] [2023-08-18 16:43:23,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:23,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:23,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:23,339 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:23,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:23,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:23,358 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:23,358 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-08-18 16:43:23,358 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-08-18 16:43:23,358 INFO L87 Difference]: Start difference. First operand 4214 states and 11882 transitions. cyclomatic complexity: 8312 Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:23,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:23,437 INFO L93 Difference]: Finished difference Result 4792 states and 13163 transitions. [2023-08-18 16:43:23,437 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4792 states and 13163 transitions. [2023-08-18 16:43:23,473 INFO L131 ngComponentsAnalysis]: Automaton has 677 accepting balls. 1418 [2023-08-18 16:43:23,545 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4792 states to 4792 states and 13163 transitions. [2023-08-18 16:43:23,545 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4792 [2023-08-18 16:43:23,550 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4792 [2023-08-18 16:43:23,550 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4792 states and 13163 transitions. [2023-08-18 16:43:23,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:23,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4792 states and 13163 transitions. [2023-08-18 16:43:23,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4792 states and 13163 transitions. [2023-08-18 16:43:23,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4792 to 3943. [2023-08-18 16:43:23,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3943 states, 3943 states have (on average 2.7846817144306364) internal successors, (10980), 3942 states have internal predecessors, (10980), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:23,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3943 states to 3943 states and 10980 transitions. [2023-08-18 16:43:23,648 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3943 states and 10980 transitions. [2023-08-18 16:43:23,648 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-08-18 16:43:23,650 INFO L428 stractBuchiCegarLoop]: Abstraction has 3943 states and 10980 transitions. [2023-08-18 16:43:23,650 INFO L335 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2023-08-18 16:43:23,650 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3943 states and 10980 transitions. [2023-08-18 16:43:23,668 INFO L131 ngComponentsAnalysis]: Automaton has 581 accepting balls. 1226 [2023-08-18 16:43:23,668 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:23,668 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:23,670 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:23,670 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-08-18 16:43:23,671 INFO L748 eck$LassoCheckResult]: Stem: 77634#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 77636#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 79232#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 79234#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 81748#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 81750#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 81226#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 81228#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 80362#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 80364#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 83588#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 79810#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 79812#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 80124#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 80126#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 79452#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 79454#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 79972#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 81838#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 81840#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 82012#[$Ultimate##0, L845-3]don't care [319] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 82968#[L845-4, $Ultimate##0]don't care [251] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 82970#[$Ultimate##0, L846]don't care [237] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 80788#[$Ultimate##0, L846-1]don't care [230] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 80790#[L846-2, $Ultimate##0]don't care [250] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 83524#[L846-3, $Ultimate##0]don't care [438] L846-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 81486#[$Ultimate##0, L846-4, $Ultimate##0]don't care [352] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 81488#[$Ultimate##0, L846-4, $Ultimate##3]don't care [354] $Ultimate##3-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 83364#[$Ultimate##0, L823-1, L846-4]don't care [356] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 77918#[$Ultimate##0, L846-4, L775]don't care [360] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 77922#[$Ultimate##0, L777, L846-4]don't care [363] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 83512#[$Ultimate##0, L780, L846-4]don't care [365] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 83370#[$Ultimate##0, L846-4, L783]don't care [368] L783-->L798: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_5 0) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_5} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_5} AuxVars[] AssignedVars[] 81462#[L798, $Ultimate##0, L846-4]don't care [371] L798-->L800: Formula: (= 2 v_~y~0_6) InVars {} OutVars{~y~0=v_~y~0_6} AuxVars[] AssignedVars[~y~0] 77764#[$Ultimate##0, L800, L846-4]don't care [373] L800-->L803: Formula: (= v_~x~0_2 v_thr2Thread1of1ForFork0_~x2~0_1) InVars {~x~0=v_~x~0_2} OutVars{thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_1, ~x~0=v_~x~0_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~x2~0] 77768#[$Ultimate##0, L846-4, L803]don't care [377] L803-->L805: Formula: (not (= 2 v_thr2Thread1of1ForFork0_~x2~0_3)) InVars {thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_3} OutVars{thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_3} AuxVars[] AssignedVars[] 83412#[$Ultimate##0, L805, L846-4]don't care [380] L805-->L807: Formula: (= v_~b2~0_4 0) InVars {} OutVars{~b2~0=v_~b2~0_4} AuxVars[] AssignedVars[~b2~0] 82068#[L807, $Ultimate##0, L846-4]don't care [381] L807-->L814: Formula: (= v_~b1~0_1 v_thr2Thread1of1ForFork0_~b12~0_1) InVars {~b1~0=v_~b1~0_1} OutVars{~b1~0=v_~b1~0_1, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~b12~0] 81702#[$Ultimate##0, L814, L846-4]don't care [2023-08-18 16:43:23,671 INFO L750 eck$LassoCheckResult]: Loop: 81702#[$Ultimate##0, L814, L846-4]don't care [382] L814-->L812: Formula: (<= 1 v_thr2Thread1of1ForFork0_~b12~0_3) InVars {thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_3} OutVars{thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_3} AuxVars[] AssignedVars[] 81700#[$Ultimate##0, L846-4, L812]don't care [385] L812-->L814: Formula: (= v_~b1~0_2 v_thr2Thread1of1ForFork0_~b12~0_7) InVars {~b1~0=v_~b1~0_2} OutVars{~b1~0=v_~b1~0_2, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~b12~0] 81702#[$Ultimate##0, L814, L846-4]don't care [2023-08-18 16:43:23,672 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:23,672 INFO L85 PathProgramCache]: Analyzing trace with hash 1576309711, now seen corresponding path program 1 times [2023-08-18 16:43:23,672 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:23,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988904681] [2023-08-18 16:43:23,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:23,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:23,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-08-18 16:43:23,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-08-18 16:43:23,756 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-08-18 16:43:23,756 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988904681] [2023-08-18 16:43:23,756 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1988904681] provided 1 perfect and 0 imperfect interpolant sequences [2023-08-18 16:43:23,756 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-08-18 16:43:23,756 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-08-18 16:43:23,756 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [595342428] [2023-08-18 16:43:23,757 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-08-18 16:43:23,757 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-08-18 16:43:23,757 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:23,758 INFO L85 PathProgramCache]: Analyzing trace with hash 13188, now seen corresponding path program 1 times [2023-08-18 16:43:23,758 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:23,758 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373602698] [2023-08-18 16:43:23,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:23,758 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:23,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:23,761 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:23,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:23,778 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:23,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-08-18 16:43:23,788 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-08-18 16:43:23,788 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-08-18 16:43:23,789 INFO L87 Difference]: Start difference. First operand 3943 states and 10980 transitions. cyclomatic complexity: 7618 Second operand has 4 states, 4 states have (on average 9.5) internal successors, (38), 4 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:23,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-08-18 16:43:23,839 INFO L93 Difference]: Finished difference Result 4003 states and 10607 transitions. [2023-08-18 16:43:23,839 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4003 states and 10607 transitions. [2023-08-18 16:43:23,861 INFO L131 ngComponentsAnalysis]: Automaton has 473 accepting balls. 978 [2023-08-18 16:43:23,876 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4003 states to 3288 states and 8784 transitions. [2023-08-18 16:43:23,876 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3288 [2023-08-18 16:43:23,879 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3288 [2023-08-18 16:43:23,879 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3288 states and 8784 transitions. [2023-08-18 16:43:23,883 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-08-18 16:43:23,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3288 states and 8784 transitions. [2023-08-18 16:43:23,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3288 states and 8784 transitions. [2023-08-18 16:43:23,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3288 to 2984. [2023-08-18 16:43:23,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2984 states, 2984 states have (on average 2.687667560321716) internal successors, (8020), 2983 states have internal predecessors, (8020), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-08-18 16:43:23,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2984 states to 2984 states and 8020 transitions. [2023-08-18 16:43:23,998 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2984 states and 8020 transitions. [2023-08-18 16:43:23,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-08-18 16:43:23,999 INFO L428 stractBuchiCegarLoop]: Abstraction has 2984 states and 8020 transitions. [2023-08-18 16:43:24,000 INFO L335 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2023-08-18 16:43:24,000 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2984 states and 8020 transitions. [2023-08-18 16:43:24,010 INFO L131 ngComponentsAnalysis]: Automaton has 417 accepting balls. 866 [2023-08-18 16:43:24,010 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-08-18 16:43:24,010 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-08-18 16:43:24,012 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-08-18 16:43:24,012 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2023-08-18 16:43:24,014 INFO L748 eck$LassoCheckResult]: Stem: 89940#[$Ultimate##0]don't care [252] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 89942#[L-1]don't care [258] L-1-->L-1-1: Formula: (= 0 (select |v_#valid_13| 0)) InVars {#valid=|v_#valid_13|} OutVars{#valid=|v_#valid_13|} AuxVars[] AssignedVars[] 91900#[L-1-1]don't care [342] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_3|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_3|} AuxVars[] AssignedVars[] 91902#[L12]don't care [296] L12-->L12-1: Formula: (and (= (select |v_#length_9| 1) 2) (= (select |v_#valid_14| 1) 1)) InVars {#length=|v_#length_9|, #valid=|v_#valid_14|} OutVars{#length=|v_#length_9|, #valid=|v_#valid_14|} AuxVars[] AssignedVars[] 93602#[L12-1]don't care [311] L12-1-->L12-2: Formula: (= (select (select |v_#memory_int_7| 1) 0) 48) InVars {#memory_int=|v_#memory_int_7|} OutVars{#memory_int=|v_#memory_int_7|} AuxVars[] AssignedVars[] 92300#[L12-2]don't care [310] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_8| 1) 1) 0) InVars {#memory_int=|v_#memory_int_8|} OutVars{#memory_int=|v_#memory_int_8|} AuxVars[] AssignedVars[] 92302#[L12-3]don't care [333] L12-3-->L12-4: Formula: (and (= (select |v_#length_10| 2) 10) (= (select |v_#valid_15| 2) 1)) InVars {#length=|v_#length_10|, #valid=|v_#valid_15|} OutVars{#length=|v_#length_10|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[] 91250#[L12-4]don't care [326] L12-4-->L700: Formula: (= v_~x~0_5 0) InVars {} OutVars{~x~0=v_~x~0_5} AuxVars[] AssignedVars[~x~0] 91252#[L700]don't care [272] L700-->L701: Formula: (= v_~y~0_17 0) InVars {} OutVars{~y~0=v_~y~0_17} AuxVars[] AssignedVars[~y~0] 92916#[L701]don't care [338] L701-->L701-1: Formula: (= v_~b1~0_7 0) InVars {} OutVars{~b1~0=v_~b1~0_7} AuxVars[] AssignedVars[~b1~0] 93662#[L701-1]don't care [241] L701-1-->L702: Formula: (= v_~b2~0_7 0) InVars {} OutVars{~b2~0=v_~b2~0_7} AuxVars[] AssignedVars[~b2~0] 92478#[L702]don't care [245] L702-->L-1-2: Formula: (= v_~X~0_7 0) InVars {} OutVars{~X~0=v_~X~0_7} AuxVars[] AssignedVars[~X~0] 92480#[L-1-2]don't care [344] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 92728#[L-1-3]don't care [345] L-1-3-->L844: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_1|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_~#t2~0#1.offset, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_#t~pre4#1, ULTIMATE.start_main_~#t1~0#1.offset, ULTIMATE.start_main_~#t2~0#1.base] 92202#[L844]don't care [286] L844-->L844-1: Formula: (and (= (store |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 1) |v_#valid_1|) (= |v_ULTIMATE.start_main_~#t1~0#1.offset_2| 0) (= (select |v_#valid_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) 0) (< |v_#StackHeapBarrier_1| |v_ULTIMATE.start_main_~#t1~0#1.base_2|) (= (store |v_#length_2| |v_ULTIMATE.start_main_~#t1~0#1.base_2| 4) |v_#length_1|) (not (= |v_ULTIMATE.start_main_~#t1~0#1.base_2| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|, #length=|v_#length_1|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_2|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_2|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_main_~#t1~0#1.base, ULTIMATE.start_main_~#t1~0#1.offset] 92154#[L844-1]don't care [271] L844-1-->L844-2: Formula: (and (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) (not (= |v_ULTIMATE.start_main_~#t2~0#1.base_2| 0)) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 4)) (= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_2|) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2| 1) |v_#valid_3|) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t2~0#1.base_2|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_2|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~0#1.offset, #valid, #length, ULTIMATE.start_main_~#t2~0#1.base] 92156#[L844-2]don't care [304] L844-2-->L845: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 91298#[L845]don't care [330] L845-->L845-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 91300#[L845-1]don't care [238] L845-1-->L845-2: Formula: (and (<= 0 |v_ULTIMATE.start_main_~#t1~0#1.offset_3|) (= (select |v_#valid_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) 1) (= (store |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3| (store (select |v_#memory_int_2| |v_ULTIMATE.start_main_~#t1~0#1.base_3|) |v_ULTIMATE.start_main_~#t1~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_1|) (<= (+ |v_ULTIMATE.start_main_~#t1~0#1.offset_3| 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#t1~0#1.base_3|))) InVars {#valid=|v_#valid_5|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} OutVars{#valid=|v_#valid_5|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, ULTIMATE.start_main_~#t1~0#1.base=|v_ULTIMATE.start_main_~#t1~0#1.base_3|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|, ULTIMATE.start_main_~#t1~0#1.offset=|v_ULTIMATE.start_main_~#t1~0#1.offset_3|} AuxVars[] AssignedVars[#memory_int] 93658#[L845-2]don't care [441] L845-2-->$Ultimate##0: Formula: (and (= v_thr1Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork1_thidvar0_2) (= |v_thr1Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr1Thread1of1ForFork1_#in~_.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_4|, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_4, thr1Thread1of1ForFork1_~b21~0=v_thr1Thread1of1ForFork1_~b21~0_10, thr1Thread1of1ForFork1_#res.base=|v_thr1Thread1of1ForFork1_#res.base_4|, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_30, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_4|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_4, thr1Thread1of1ForFork1_#res.offset=|v_thr1Thread1of1ForFork1_#res.offset_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork1_thidvar1=v_thr1Thread1of1ForFork1_thidvar1_2, thr1Thread1of1ForFork1_thidvar0=v_thr1Thread1of1ForFork1_thidvar0_2, thr1Thread1of1ForFork1_~x1~0=v_thr1Thread1of1ForFork1_~x1~0_8} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_#in~_.offset, thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~b21~0, thr1Thread1of1ForFork1_#res.base, thr1Thread1of1ForFork1_~y1~0, thr1Thread1of1ForFork1_#in~_.base, thr1Thread1of1ForFork1_~_.offset, thr1Thread1of1ForFork1_#res.offset, thr1Thread1of1ForFork1_thidvar1, thr1Thread1of1ForFork1_thidvar0, thr1Thread1of1ForFork1_~x1~0] 92134#[$Ultimate##0, L845-3]don't care [394] $Ultimate##0-->$Ultimate##3: Formula: (and (= v_thr1Thread1of1ForFork1_~_.base_1 |v_thr1Thread1of1ForFork1_#in~_.base_1|) (= |v_thr1Thread1of1ForFork1_#in~_.offset_1| v_thr1Thread1of1ForFork1_~_.offset_1)) InVars {thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|} OutVars{thr1Thread1of1ForFork1_#in~_.offset=|v_thr1Thread1of1ForFork1_#in~_.offset_1|, thr1Thread1of1ForFork1_#in~_.base=|v_thr1Thread1of1ForFork1_#in~_.base_1|, thr1Thread1of1ForFork1_~_.offset=v_thr1Thread1of1ForFork1_~_.offset_1, thr1Thread1of1ForFork1_~_.base=v_thr1Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~_.base, thr1Thread1of1ForFork1_~_.offset] 90384#[L845-3, $Ultimate##3]don't care [396] $Ultimate##3-->L753-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 90386#[L753-1, L845-3]don't care [398] L753-1-->L705: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 93494#[L705, L845-3]don't care [402] L705-->L707: Formula: (= v_~b1~0_4 1) InVars {} OutVars{~b1~0=v_~b1~0_4} AuxVars[] AssignedVars[~b1~0] 93050#[L845-3, L707]don't care [405] L707-->L710: Formula: (= v_~x~0_3 1) InVars {} OutVars{~x~0=v_~x~0_3} AuxVars[] AssignedVars[~x~0] 92388#[L845-3, L710]don't care [407] L710-->L713: Formula: (= v_~y~0_12 v_thr1Thread1of1ForFork1_~y1~0_1) InVars {~y~0=v_~y~0_12} OutVars{~y~0=v_~y~0_12, thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork1_~y1~0] 92390#[L845-3, L713]don't care [410] L713-->L728: Formula: (= v_thr1Thread1of1ForFork1_~y1~0_5 0) InVars {thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} OutVars{thr1Thread1of1ForFork1_~y1~0=v_thr1Thread1of1ForFork1_~y1~0_5} AuxVars[] AssignedVars[] 90180#[L728, L845-3]don't care [413] L728-->L730: Formula: (= v_~y~0_16 1) InVars {} OutVars{~y~0=v_~y~0_16} AuxVars[] AssignedVars[~y~0] 90182#[L845-3, L730]don't care [319] L845-3-->L845-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 92808#[L845-4, L730]don't care [251] L845-4-->L846: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 91446#[L846, L730]don't care [237] L846-->L846-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 93398#[L846-1, L730]don't care [230] L846-1-->L846-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 92816#[L846-2, L730]don't care [250] L846-2-->L846-3: Formula: (and (<= (+ 4 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|) (select |v_#length_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|)) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) |v_ULTIMATE.start_main_~#t2~0#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_3|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~0#1.base_3|) 1) (<= 0 |v_ULTIMATE.start_main_~#t2~0#1.offset_3|)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_4|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} OutVars{ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, ULTIMATE.start_main_~#t2~0#1.offset=|v_ULTIMATE.start_main_~#t2~0#1.offset_3|, #valid=|v_#valid_6|, #memory_int=|v_#memory_int_3|, #length=|v_#length_6|, ULTIMATE.start_main_~#t2~0#1.base=|v_ULTIMATE.start_main_~#t2~0#1.base_3|} AuxVars[] AssignedVars[#memory_int] 93230#[L846-3, L730]don't care [438] L846-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork0_thidvar2_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork0_thidvar0_2) (= |v_thr2Thread1of1ForFork0_#in~_.offset_4| 0) (= |v_thr2Thread1of1ForFork0_#in~_.base_4| 0) (= v_thr2Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_30, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_4|, thr2Thread1of1ForFork0_#res.base=|v_thr2Thread1of1ForFork0_#res.base_4|, thr2Thread1of1ForFork0_~x2~0=v_thr2Thread1of1ForFork0_~x2~0_8, thr2Thread1of1ForFork0_#res.offset=|v_thr2Thread1of1ForFork0_#res.offset_4|, thr2Thread1of1ForFork0_~b12~0=v_thr2Thread1of1ForFork0_~b12~0_10, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_4|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_4, thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_4, thr2Thread1of1ForFork0_thidvar0=v_thr2Thread1of1ForFork0_thidvar0_2, thr2Thread1of1ForFork0_thidvar1=v_thr2Thread1of1ForFork0_thidvar1_2, thr2Thread1of1ForFork0_thidvar2=v_thr2Thread1of1ForFork0_thidvar2_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0, thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_#in~_.offset, thr2Thread1of1ForFork0_#res.base, thr2Thread1of1ForFork0_thidvar0, thr2Thread1of1ForFork0_thidvar1, thr2Thread1of1ForFork0_thidvar2, thr2Thread1of1ForFork0_~x2~0, thr2Thread1of1ForFork0_#res.offset, thr2Thread1of1ForFork0_~b12~0, thr2Thread1of1ForFork0_#in~_.base, thr2Thread1of1ForFork0_~_.base] 93112#[L730, L846-4, $Ultimate##0]don't care [352] $Ultimate##0-->$Ultimate##3: Formula: (and (= |v_thr2Thread1of1ForFork0_#in~_.base_1| v_thr2Thread1of1ForFork0_~_.base_1) (= v_thr2Thread1of1ForFork0_~_.offset_1 |v_thr2Thread1of1ForFork0_#in~_.offset_1|)) InVars {thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|} OutVars{thr2Thread1of1ForFork0_~_.offset=v_thr2Thread1of1ForFork0_~_.offset_1, thr2Thread1of1ForFork0_#in~_.offset=|v_thr2Thread1of1ForFork0_#in~_.offset_1|, thr2Thread1of1ForFork0_#in~_.base=|v_thr2Thread1of1ForFork0_#in~_.base_1|, thr2Thread1of1ForFork0_~_.base=v_thr2Thread1of1ForFork0_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~_.offset, thr2Thread1of1ForFork0_~_.base] 93114#[L730, L846-4, $Ultimate##3]don't care [354] $Ultimate##3-->L823-1: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 91878#[L730, L823-1, L846-4]don't care [356] L823-1-->L775: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 91212#[L730, L846-4, L775]don't care [360] L775-->L777: Formula: (= v_~b2~0_1 1) InVars {} OutVars{~b2~0=v_~b2~0_1} AuxVars[] AssignedVars[~b2~0] 91214#[L730, L777, L846-4]don't care [363] L777-->L780: Formula: (= 2 v_~x~0_1) InVars {} OutVars{~x~0=v_~x~0_1} AuxVars[] AssignedVars[~x~0] 93282#[L730, L780, L846-4]don't care [365] L780-->L783: Formula: (= v_~y~0_2 v_thr2Thread1of1ForFork0_~y2~0_1) InVars {~y~0=v_~y~0_2} OutVars{~y~0=v_~y~0_2, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 94210#[L730, L846-4, L783]don't care [367] L783-->L785: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_3 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_3} AuxVars[] AssignedVars[] 94214#[L730, L785, L846-4]don't care [370] L785-->L787: Formula: (= v_~b2~0_2 0) InVars {} OutVars{~b2~0=v_~b2~0_2} AuxVars[] AssignedVars[~b2~0] 94544#[L730, L846-4, L787]don't care [372] L787-->L794: Formula: (= v_~y~0_3 v_thr2Thread1of1ForFork0_~y2~0_7) InVars {~y~0=v_~y~0_3} OutVars{~y~0=v_~y~0_3, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 94548#[L730, L794, L846-4]don't care [2023-08-18 16:43:24,014 INFO L750 eck$LassoCheckResult]: Loop: 94548#[L730, L794, L846-4]don't care [374] L794-->L792: Formula: (not (= v_thr2Thread1of1ForFork0_~y2~0_9 0)) InVars {thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} OutVars{thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_9} AuxVars[] AssignedVars[] 94572#[L730, L792, L846-4]don't care [379] L792-->L794: Formula: (= v_thr2Thread1of1ForFork0_~y2~0_13 v_~y~0_5) InVars {~y~0=v_~y~0_5} OutVars{~y~0=v_~y~0_5, thr2Thread1of1ForFork0_~y2~0=v_thr2Thread1of1ForFork0_~y2~0_13} AuxVars[] AssignedVars[thr2Thread1of1ForFork0_~y2~0] 94548#[L730, L794, L846-4]don't care [2023-08-18 16:43:24,014 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:24,015 INFO L85 PathProgramCache]: Analyzing trace with hash 433695967, now seen corresponding path program 1 times [2023-08-18 16:43:24,015 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:24,015 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1124588067] [2023-08-18 16:43:24,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:24,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:24,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,030 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:24,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,051 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:24,052 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:24,052 INFO L85 PathProgramCache]: Analyzing trace with hash 12934, now seen corresponding path program 2 times [2023-08-18 16:43:24,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:24,053 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218338655] [2023-08-18 16:43:24,053 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:24,053 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:24,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,056 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:24,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,057 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:24,058 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-08-18 16:43:24,058 INFO L85 PathProgramCache]: Analyzing trace with hash 170008548, now seen corresponding path program 1 times [2023-08-18 16:43:24,058 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-08-18 16:43:24,058 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [856248146] [2023-08-18 16:43:24,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-08-18 16:43:24,059 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-08-18 16:43:24,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,072 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:24,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,090 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-08-18 16:43:24,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:24,943 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-08-18 16:43:24,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-08-18 16:43:25,005 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 18.08 04:43:25 BoogieIcfgContainer [2023-08-18 16:43:25,006 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2023-08-18 16:43:25,006 INFO L158 Benchmark]: Toolchain (without parser) took 5909.77ms. Allocated memory was 263.2MB in the beginning and 649.1MB in the end (delta: 385.9MB). Free memory was 213.7MB in the beginning and 413.5MB in the end (delta: -199.8MB). Peak memory consumption was 186.9MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,006 INFO L158 Benchmark]: CDTParser took 0.09ms. Allocated memory is still 176.2MB. Free memory was 123.2MB in the beginning and 123.0MB in the end (delta: 167.8kB). There was no memory consumed. Max. memory is 8.0GB. [2023-08-18 16:43:25,007 INFO L158 Benchmark]: CACSL2BoogieTranslator took 368.74ms. Allocated memory is still 263.2MB. Free memory was 213.7MB in the beginning and 193.0MB in the end (delta: 20.7MB). Peak memory consumption was 21.0MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,007 INFO L158 Benchmark]: Boogie Procedure Inliner took 43.93ms. Allocated memory is still 263.2MB. Free memory was 193.0MB in the beginning and 191.1MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,007 INFO L158 Benchmark]: Boogie Preprocessor took 41.24ms. Allocated memory is still 263.2MB. Free memory was 191.1MB in the beginning and 189.3MB in the end (delta: 1.7MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,008 INFO L158 Benchmark]: RCFGBuilder took 336.16ms. Allocated memory is still 263.2MB. Free memory was 189.3MB in the beginning and 173.9MB in the end (delta: 15.4MB). Peak memory consumption was 15.7MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,008 INFO L158 Benchmark]: BuchiAutomizer took 5116.28ms. Allocated memory was 263.2MB in the beginning and 649.1MB in the end (delta: 385.9MB). Free memory was 173.9MB in the beginning and 413.5MB in the end (delta: -239.5MB). Peak memory consumption was 147.1MB. Max. memory is 8.0GB. [2023-08-18 16:43:25,010 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09ms. Allocated memory is still 176.2MB. Free memory was 123.2MB in the beginning and 123.0MB in the end (delta: 167.8kB). There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 368.74ms. Allocated memory is still 263.2MB. Free memory was 213.7MB in the beginning and 193.0MB in the end (delta: 20.7MB). Peak memory consumption was 21.0MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 43.93ms. Allocated memory is still 263.2MB. Free memory was 193.0MB in the beginning and 191.1MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 41.24ms. Allocated memory is still 263.2MB. Free memory was 191.1MB in the beginning and 189.3MB in the end (delta: 1.7MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 336.16ms. Allocated memory is still 263.2MB. Free memory was 189.3MB in the beginning and 173.9MB in the end (delta: 15.4MB). Peak memory consumption was 15.7MB. Max. memory is 8.0GB. * BuchiAutomizer took 5116.28ms. Allocated memory was 263.2MB in the beginning and 649.1MB in the end (delta: 385.9MB). Free memory was 173.9MB in the beginning and 413.5MB in the end (delta: -239.5MB). Peak memory consumption was 147.1MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 6 terminating modules (6 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.6 modules have a trivial ranking function, the largest among these consists of 5 locations. The remainder module has 2984 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 4.9s and 7 iterations. TraceHistogramMax:1. Analysis of lassos took 1.8s. Construction of modules took 0.3s. Büchi inclusion checks took 2.1s. Highest rank in rank-based complementation 0. Minimization of det autom 6. Minimization of nondet autom 0. Automata minimization 0.9s AutomataMinimizationTime, 6 MinimizatonAttempts, 10027 StatesRemovedByMinimization, 6 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 1199 SdHoareTripleChecker+Valid, 0.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 1199 mSDsluCounter, 2724 SdHoareTripleChecker+Invalid, 0.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1699 mSDsCounter, 104 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 479 IncrementalHoareTripleChecker+Invalid, 583 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 104 mSolverCounterUnsat, 1025 mSDtfsCounter, 479 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI2 SFLT0 conc0 concLT0 SILN4 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 791]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L700] 0 int x, y; VAL [x=0, y=0] [L701] 0 int b1, b2; VAL [b1=0, b2=0, x=0, y=0] [L702] 0 int X; VAL [X=0, b1=0, b2=0, x=0, y=0] [L844] 0 pthread_t t1, t2; VAL [X=0, b1=0, b2=0, t1={28880:0}, t2={28881:0}, x=0, y=0] [L845] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [X=0, _={0:0}, b1=0, b2=0, pthread_create(&t1, 0, thr1, 0)=-2, t1={28880:0}, t2={28881:0}, x=0, y=0] [L704] COND TRUE 1 1 VAL [X=0, _={0:0}, _={0:0}, b1=0, b2=0, x=0, y=0] [L706] 1 b1 = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=0, y=0] [L709] 1 x = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L712] 1 int y1 = y; VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=0] [L714] COND FALSE 1 !(y1 != 0) VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=0] [L729] 1 y = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=1] [L846] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [X=0, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, pthread_create(&t2, 0, thr2, 0)=-1, t1={28880:0}, t2={28881:0}, x=1, y1=0, y=1] [L774] COND TRUE 2 1 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=1] [L776] 2 b2 = 1 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=1, y1=0, y=1] [L779] 2 x = 2 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y=1] [L782] 2 int y2 = y; VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y2=1, y=1] [L784] COND TRUE 2 y2 != 0 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y2=1, y=1] [L786] 2 b2 = 0 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y1=0, y2=1, y=1] [L789] 2 y2 = y VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y1=0, y2=1, y=1] Loop: [L791] COND TRUE y2 != 0 [L793] y2 = y End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 791]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int x, y; VAL [x=0, y=0] [L701] 0 int b1, b2; VAL [b1=0, b2=0, x=0, y=0] [L702] 0 int X; VAL [X=0, b1=0, b2=0, x=0, y=0] [L844] 0 pthread_t t1, t2; VAL [X=0, b1=0, b2=0, t1={28880:0}, t2={28881:0}, x=0, y=0] [L845] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [X=0, _={0:0}, b1=0, b2=0, pthread_create(&t1, 0, thr1, 0)=-2, t1={28880:0}, t2={28881:0}, x=0, y=0] [L704] COND TRUE 1 1 VAL [X=0, _={0:0}, _={0:0}, b1=0, b2=0, x=0, y=0] [L706] 1 b1 = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=0, y=0] [L709] 1 x = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y=0] [L712] 1 int y1 = y; VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=0] [L714] COND FALSE 1 !(y1 != 0) VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=0] [L729] 1 y = 1 VAL [X=0, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=1] [L846] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [X=0, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, pthread_create(&t2, 0, thr2, 0)=-1, t1={28880:0}, t2={28881:0}, x=1, y1=0, y=1] [L774] COND TRUE 2 1 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=1, y1=0, y=1] [L776] 2 b2 = 1 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=1, y1=0, y=1] [L779] 2 x = 2 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y=1] [L782] 2 int y2 = y; VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y2=1, y=1] [L784] COND TRUE 2 y2 != 0 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=1, x=2, y1=0, y2=1, y=1] [L786] 2 b2 = 0 VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y1=0, y2=1, y=1] [L789] 2 y2 = y VAL [X=0, _={0:0}, _={0:0}, _={0:0}, _={0:0}, b1=1, b2=0, x=2, y1=0, y2=1, y=1] Loop: [L791] COND TRUE y2 != 0 [L793] y2 = y End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2023-08-18 16:43:25,071 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request...