/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf --buchiautomizer.fairness.type.for.concurrent.programs NONE -i ../../../trunk/examples/svcomp/pthread-atomic/peterson.i -------------------------------------------------------------------------------- This is Ultimate 0.2.3-wip.me.fairness-42053ae-m [2023-09-08 14:26:39,340 INFO L172 SettingsManager]: Resetting all preferences to default values... [2023-09-08 14:26:39,396 INFO L100 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf [2023-09-08 14:26:39,426 INFO L114 SettingsManager]: Preferences different from defaults after loading the file: [2023-09-08 14:26:39,427 INFO L135 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-09-08 14:26:39,427 INFO L137 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-09-08 14:26:39,428 INFO L135 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-09-08 14:26:39,431 INFO L137 SettingsManager]: * Create parallel compositions if possible=false [2023-09-08 14:26:39,431 INFO L137 SettingsManager]: * Use SBE=true [2023-09-08 14:26:39,435 INFO L135 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-09-08 14:26:39,435 INFO L137 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-09-08 14:26:39,435 INFO L137 SettingsManager]: * Use old map elimination=false [2023-09-08 14:26:39,435 INFO L137 SettingsManager]: * Use external solver (rank synthesis)=false [2023-09-08 14:26:39,436 INFO L137 SettingsManager]: * Use only trivial implications for array writes=true [2023-09-08 14:26:39,437 INFO L137 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-09-08 14:26:39,437 INFO L135 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-09-08 14:26:39,437 INFO L137 SettingsManager]: * sizeof long=4 [2023-09-08 14:26:39,438 INFO L137 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2023-09-08 14:26:39,438 INFO L137 SettingsManager]: * Overapproximate operations on floating types=true [2023-09-08 14:26:39,438 INFO L137 SettingsManager]: * sizeof POINTER=4 [2023-09-08 14:26:39,438 INFO L137 SettingsManager]: * Check division by zero=IGNORE [2023-09-08 14:26:39,439 INFO L137 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-09-08 14:26:39,439 INFO L137 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-09-08 14:26:39,439 INFO L137 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-09-08 14:26:39,439 INFO L137 SettingsManager]: * sizeof long double=12 [2023-09-08 14:26:39,439 INFO L137 SettingsManager]: * Check if freed pointer was valid=false [2023-09-08 14:26:39,440 INFO L137 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-09-08 14:26:39,440 INFO L137 SettingsManager]: * Use constant arrays=true [2023-09-08 14:26:39,440 INFO L137 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-09-08 14:26:39,440 INFO L135 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-09-08 14:26:39,441 INFO L137 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-09-08 14:26:39,441 INFO L135 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-09-08 14:26:39,441 INFO L137 SettingsManager]: * Trace refinement strategy=CAMEL [2023-09-08 14:26:39,442 INFO L137 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2023-09-08 14:26:39,443 INFO L135 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-09-08 14:26:39,443 INFO L137 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: Fairness type for concurrent programs -> NONE [2023-09-08 14:26:39,642 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-09-08 14:26:39,662 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-09-08 14:26:39,665 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-09-08 14:26:39,666 INFO L270 PluginConnector]: Initializing CDTParser... [2023-09-08 14:26:39,666 INFO L274 PluginConnector]: CDTParser initialized [2023-09-08 14:26:39,667 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/peterson.i [2023-09-08 14:26:40,805 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-09-08 14:26:41,025 INFO L384 CDTParser]: Found 1 translation units. [2023-09-08 14:26:41,025 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i [2023-09-08 14:26:41,039 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58e0d43b3/44463bf725514c1298b26be07210aabd/FLAG7831fe325 [2023-09-08 14:26:41,057 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/58e0d43b3/44463bf725514c1298b26be07210aabd [2023-09-08 14:26:41,059 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-09-08 14:26:41,060 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2023-09-08 14:26:41,061 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-09-08 14:26:41,061 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-09-08 14:26:41,063 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-09-08 14:26:41,064 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,065 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9ff9fdf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41, skipping insertion in model container [2023-09-08 14:26:41,065 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,070 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2023-09-08 14:26:41,112 INFO L178 MainTranslator]: Built tables and reachable declarations [2023-09-08 14:26:41,254 WARN L633 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2023-09-08 14:26:41,389 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[30997,31010] [2023-09-08 14:26:41,394 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[31682,31695] [2023-09-08 14:26:41,402 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-09-08 14:26:41,415 INFO L203 MainTranslator]: Completed pre-run [2023-09-08 14:26:41,445 WARN L633 FunctionHandler]: implicit declaration of function __builtin_bswap16 [2023-09-08 14:26:41,472 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[30997,31010] [2023-09-08 14:26:41,474 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/peterson.i[31682,31695] [2023-09-08 14:26:41,476 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-09-08 14:26:41,507 WARN L667 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2023-09-08 14:26:41,507 WARN L667 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2023-09-08 14:26:41,507 WARN L667 CHandler]: The function __builtin_bswap16 is called, but not defined or handled by StandardFunctionHandler. [2023-09-08 14:26:41,513 INFO L208 MainTranslator]: Completed translation [2023-09-08 14:26:41,515 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41 WrapperNode [2023-09-08 14:26:41,515 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-09-08 14:26:41,516 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-09-08 14:26:41,517 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-09-08 14:26:41,517 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-09-08 14:26:41,522 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,550 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,569 INFO L138 Inliner]: procedures = 171, calls = 47, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 43 [2023-09-08 14:26:41,570 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-09-08 14:26:41,570 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-09-08 14:26:41,570 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-09-08 14:26:41,570 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-09-08 14:26:41,577 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,577 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,588 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,589 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,597 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,600 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,601 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,602 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,604 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-09-08 14:26:41,613 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-09-08 14:26:41,614 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-09-08 14:26:41,614 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-09-08 14:26:41,615 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (1/1) ... [2023-09-08 14:26:41,621 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-09-08 14:26:41,631 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2023-09-08 14:26:41,643 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-09-08 14:26:41,668 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-09-08 14:26:41,684 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2023-09-08 14:26:41,684 INFO L130 BoogieDeclarations]: Found specification of procedure thr2 [2023-09-08 14:26:41,684 INFO L138 BoogieDeclarations]: Found implementation of procedure thr2 [2023-09-08 14:26:41,684 INFO L130 BoogieDeclarations]: Found specification of procedure thr1 [2023-09-08 14:26:41,685 INFO L138 BoogieDeclarations]: Found implementation of procedure thr1 [2023-09-08 14:26:41,685 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-09-08 14:26:41,685 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2023-09-08 14:26:41,685 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-09-08 14:26:41,686 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-09-08 14:26:41,687 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-09-08 14:26:41,687 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-09-08 14:26:41,687 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2023-09-08 14:26:41,687 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-09-08 14:26:41,687 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-09-08 14:26:41,689 WARN L210 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2023-09-08 14:26:41,808 INFO L236 CfgBuilder]: Building ICFG [2023-09-08 14:26:41,810 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-09-08 14:26:41,938 INFO L277 CfgBuilder]: Performing block encoding [2023-09-08 14:26:41,944 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-09-08 14:26:41,944 INFO L302 CfgBuilder]: Removed 2 assume(true) statements. [2023-09-08 14:26:41,946 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.09 02:26:41 BoogieIcfgContainer [2023-09-08 14:26:41,947 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-09-08 14:26:41,947 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-09-08 14:26:41,948 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-09-08 14:26:41,951 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-09-08 14:26:41,952 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-08 14:26:41,952 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.09 02:26:41" (1/3) ... [2023-09-08 14:26:41,953 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2a4d57d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.09 02:26:41, skipping insertion in model container [2023-09-08 14:26:41,953 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-08 14:26:41,953 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.09 02:26:41" (2/3) ... [2023-09-08 14:26:41,953 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2a4d57d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.09 02:26:41, skipping insertion in model container [2023-09-08 14:26:41,953 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-08 14:26:41,953 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 08.09 02:26:41" (3/3) ... [2023-09-08 14:26:41,955 INFO L332 chiAutomizerObserver]: Analyzing ICFG peterson.i [2023-09-08 14:26:42,041 INFO L144 ThreadInstanceAdder]: Constructed 2 joinOtherThreadTransitions. [2023-09-08 14:26:42,066 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 77 places, 78 transitions, 172 flow [2023-09-08 14:26:42,093 INFO L124 PetriNetUnfolderBase]: 6/74 cut-off events. [2023-09-08 14:26:42,093 INFO L125 PetriNetUnfolderBase]: For 2/2 co-relation queries the response was YES. [2023-09-08 14:26:42,100 INFO L83 FinitePrefix]: Finished finitePrefix Result has 83 conditions, 74 events. 6/74 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 64 event pairs, 0 based on Foata normal form. 0/68 useless extension candidates. Maximal degree in co-relation 45. Up to 2 conditions per place. [2023-09-08 14:26:42,101 INFO L82 GeneralOperation]: Start removeDead. Operand has 77 places, 78 transitions, 172 flow [2023-09-08 14:26:42,110 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 75 places, 74 transitions, 160 flow [2023-09-08 14:26:42,122 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-09-08 14:26:42,123 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-09-08 14:26:42,126 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-09-08 14:26:42,126 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-09-08 14:26:42,126 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-09-08 14:26:42,126 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-09-08 14:26:42,126 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-09-08 14:26:42,127 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-09-08 14:26:42,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 0 states, but on-demand construction may add more states [2023-09-08 14:26:42,298 INFO L131 ngComponentsAnalysis]: Automaton has 109 accepting balls. 351 [2023-09-08 14:26:42,298 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-08 14:26:42,298 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-08 14:26:42,304 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-08 14:26:42,304 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-09-08 14:26:42,304 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-09-08 14:26:42,304 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand currently 1062 states, but on-demand construction may add more states [2023-09-08 14:26:42,325 INFO L131 ngComponentsAnalysis]: Automaton has 109 accepting balls. 351 [2023-09-08 14:26:42,326 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-08 14:26:42,326 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-08 14:26:42,327 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-08 14:26:42,327 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-09-08 14:26:42,333 INFO L748 eck$LassoCheckResult]: Stem: 80#[$Ultimate##0]don't care [126] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 83#[L-1]don't care [142] L-1-->L-1-1: Formula: (= (select |v_#valid_15| 0) 0) InVars {#valid=|v_#valid_15|} OutVars{#valid=|v_#valid_15|} AuxVars[] AssignedVars[] 85#[L-1-1]don't care [165] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 87#[L12]don't care [116] L12-->L12-1: Formula: (and (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[] 89#[L12-1]don't care [133] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 91#[L12-2]don't care [131] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 93#[L12-3]don't care [155] L12-3-->L12-4: Formula: (and (= (select |v_#valid_2| 2) 1) (= (select |v_#length_2| 2) 11)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 95#[L12-4]don't care [149] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 97#[L700]don't care [166] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 99#[L701]don't care [158] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 101#[L702]don't care [121] L702-->L-1-2: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 103#[L-1-2]don't care [167] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 105#[L-1-3]don't care [170] L-1-3-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 107#[L760]don't care [157] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_3|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 109#[L760-1]don't care [140] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (= (store |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1) |v_#valid_5|) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 111#[L760-2]don't care [152] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 113#[L761]don't care [123] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 115#[L761-1]don't care [150] L761-1-->L761-2: Formula: (and (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 117#[L761-2]don't care [214] L761-2-->$Ultimate##0: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 119#[L761-3, $Ultimate##0]don't care [195] $Ultimate##0-->L704: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 121#[L761-3, L704]don't care [196] L704-->L706: Formula: (= v_~flag1~0_3 1) InVars {} OutVars{~flag1~0=v_~flag1~0_3} AuxVars[] AssignedVars[~flag1~0] 125#[L761-3, L706]don't care [197] L706-->L709: Formula: (= v_~turn~0_4 1) InVars {} OutVars{~turn~0=v_~turn~0_4} AuxVars[] AssignedVars[~turn~0] 131#[L761-3, L709]don't care [198] L709-->L712: Formula: (= v_~flag2~0_3 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_3} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 139#[L761-3, L712]don't care [199] L712-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 149#[L761-3, L722]don't care [2023-09-08 14:26:42,333 INFO L750 eck$LassoCheckResult]: Loop: 149#[L761-3, L722]don't care [200] L722-->L717: Formula: (and (= v_thr1Thread1of1ForFork0_~f21~0_3 1) (= v_thr1Thread1of1ForFork0_~t1~0_3 1)) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_3} AuxVars[] AssignedVars[] 161#[L761-3, L717]don't care [203] L717-->L719: Formula: (= v_~flag2~0_4 v_thr1Thread1of1ForFork0_~f21~0_7) InVars {~flag2~0=v_~flag2~0_4} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 177#[L761-3, L719]don't care [205] L719-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_7 v_~turn~0_6) InVars {~turn~0=v_~turn~0_6} OutVars{~turn~0=v_~turn~0_6, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 149#[L761-3, L722]don't care [2023-09-08 14:26:42,338 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:42,338 INFO L85 PathProgramCache]: Analyzing trace with hash 723466407, now seen corresponding path program 1 times [2023-09-08 14:26:42,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:42,347 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904192396] [2023-09-08 14:26:42,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:42,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:42,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:42,453 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:42,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:42,517 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:42,519 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:42,520 INFO L85 PathProgramCache]: Analyzing trace with hash 228489, now seen corresponding path program 1 times [2023-09-08 14:26:42,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:42,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2128636976] [2023-09-08 14:26:42,520 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:42,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:42,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:42,532 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:42,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:42,539 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:42,539 INFO L85 PathProgramCache]: Analyzing trace with hash 642038307, now seen corresponding path program 1 times [2023-09-08 14:26:42,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:42,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713568264] [2023-09-08 14:26:42,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:42,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:42,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-08 14:26:42,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-09-08 14:26:42,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-08 14:26:42,811 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713568264] [2023-09-08 14:26:42,811 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1713568264] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-08 14:26:42,811 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-08 14:26:42,812 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-08 14:26:42,812 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [47296684] [2023-09-08 14:26:42,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-08 14:26:42,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-08 14:26:42,917 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-08 14:26:42,918 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-08 14:26:42,921 INFO L87 Difference]: Start difference. First operand currently 1062 states, but on-demand construction may add more states Second operand has 4 states, 4 states have (on average 6.75) internal successors, (27), 4 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-08 14:26:43,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-08 14:26:43,068 INFO L93 Difference]: Finished difference Result 1563 states and 4042 transitions. [2023-09-08 14:26:43,070 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1563 states and 4042 transitions. [2023-09-08 14:26:43,094 INFO L131 ngComponentsAnalysis]: Automaton has 122 accepting balls. 390 [2023-09-08 14:26:43,113 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1563 states to 947 states and 2443 transitions. [2023-09-08 14:26:43,114 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 947 [2023-09-08 14:26:43,117 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 947 [2023-09-08 14:26:43,118 INFO L73 IsDeterministic]: Start isDeterministic. Operand 947 states and 2443 transitions. [2023-09-08 14:26:43,128 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-08 14:26:43,129 INFO L218 hiAutomatonCegarLoop]: Abstraction has 947 states and 2443 transitions. [2023-09-08 14:26:43,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 947 states and 2443 transitions. [2023-09-08 14:26:43,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 947 to 761. [2023-09-08 14:26:43,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 761 states, 761 states have (on average 2.5873850197109065) internal successors, (1969), 760 states have internal predecessors, (1969), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-08 14:26:43,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 761 states to 761 states and 1969 transitions. [2023-09-08 14:26:43,222 INFO L240 hiAutomatonCegarLoop]: Abstraction has 761 states and 1969 transitions. [2023-09-08 14:26:43,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-09-08 14:26:43,227 INFO L428 stractBuchiCegarLoop]: Abstraction has 761 states and 1969 transitions. [2023-09-08 14:26:43,228 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-09-08 14:26:43,228 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 761 states and 1969 transitions. [2023-09-08 14:26:43,237 INFO L131 ngComponentsAnalysis]: Automaton has 91 accepting balls. 297 [2023-09-08 14:26:43,237 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-08 14:26:43,237 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-08 14:26:43,238 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-08 14:26:43,238 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-09-08 14:26:43,243 INFO L748 eck$LassoCheckResult]: Stem: 4861#[$Ultimate##0]don't care [126] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 4863#[L-1]don't care [142] L-1-->L-1-1: Formula: (= (select |v_#valid_15| 0) 0) InVars {#valid=|v_#valid_15|} OutVars{#valid=|v_#valid_15|} AuxVars[] AssignedVars[] 5279#[L-1-1]don't care [165] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 5239#[L12]don't care [116] L12-->L12-1: Formula: (and (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[] 5241#[L12-1]don't care [133] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 4549#[L12-2]don't care [131] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 4551#[L12-3]don't care [155] L12-3-->L12-4: Formula: (and (= (select |v_#valid_2| 2) 1) (= (select |v_#length_2| 2) 11)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 4647#[L12-4]don't care [149] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 5213#[L700]don't care [166] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 5215#[L701]don't care [158] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 4835#[L702]don't care [121] L702-->L-1-2: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 4837#[L-1-2]don't care [167] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 5125#[L-1-3]don't care [170] L-1-3-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 5127#[L760]don't care [157] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_3|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 5189#[L760-1]don't care [140] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (= (store |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1) |v_#valid_5|) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 5099#[L760-2]don't care [152] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 5101#[L761]don't care [123] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 4611#[L761-1]don't care [150] L761-1-->L761-2: Formula: (and (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 4613#[L761-2]don't care [214] L761-2-->$Ultimate##0: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 5155#[L761-3, $Ultimate##0]don't care [174] L761-3-->L761-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 5107#[$Ultimate##0, L761-4]don't care [143] L761-4-->L762: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 5109#[L762, $Ultimate##0]don't care [120] L762-->L762-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 5003#[L762-1, $Ultimate##0]don't care [130] L762-1-->L762-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 5005#[$Ultimate##0, L762-2]don't care [114] L762-2-->L762-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) |v_ULTIMATE.start_main_~#t2~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_5|) (<= (+ |v_ULTIMATE.start_main_~#t2~1#1.offset_3| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t2~1#1.offset_3|) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) 1)) InVars {ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[#memory_int] 4829#[$Ultimate##0, L762-3]don't care [217] L762-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_10, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_10, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0, thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 4833#[$Ultimate##0, L762-4, $Ultimate##0]don't care [178] $Ultimate##0-->L732: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 4217#[$Ultimate##0, L762-4, L732]don't care [179] L732-->L734: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 4221#[L734, $Ultimate##0, L762-4]don't care [180] L734-->L737: Formula: (= v_~turn~0_1 0) InVars {} OutVars{~turn~0=v_~turn~0_1} AuxVars[] AssignedVars[~turn~0] 4181#[L737, $Ultimate##0, L762-4]don't care [181] L737-->L740: Formula: (= v_~flag1~0_1 v_thr2Thread1of1ForFork1_~f12~0_1) InVars {~flag1~0=v_~flag1~0_1} OutVars{~flag1~0=v_~flag1~0_1, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 4183#[$Ultimate##0, L762-4, L740]don't care [182] L740-->L750: Formula: (= v_thr2Thread1of1ForFork1_~t2~0_1 v_~turn~0_2) InVars {~turn~0=v_~turn~0_2} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_1, ~turn~0=v_~turn~0_2} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0] 3953#[$Ultimate##0, L762-4, L750]don't care [2023-09-08 14:26:43,244 INFO L750 eck$LassoCheckResult]: Loop: 3953#[$Ultimate##0, L762-4, L750]don't care [183] L750-->L745: Formula: (and (= v_thr2Thread1of1ForFork1_~t2~0_3 0) (= v_thr2Thread1of1ForFork1_~f12~0_3 1)) InVars {thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_3, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_3} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_3, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_3} AuxVars[] AssignedVars[] 4005#[L745, $Ultimate##0, L762-4]don't care [186] L745-->L747: Formula: (= v_~flag1~0_2 v_thr2Thread1of1ForFork1_~f12~0_7) InVars {~flag1~0=v_~flag1~0_2} OutVars{~flag1~0=v_~flag1~0_2, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_7} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~f12~0] 3947#[$Ultimate##0, L762-4, L747]don't care [188] L747-->L750: Formula: (= v_thr2Thread1of1ForFork1_~t2~0_7 v_~turn~0_3) InVars {~turn~0=v_~turn~0_3} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_7, ~turn~0=v_~turn~0_3} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0] 3953#[$Ultimate##0, L762-4, L750]don't care [2023-09-08 14:26:43,245 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,245 INFO L85 PathProgramCache]: Analyzing trace with hash -391913916, now seen corresponding path program 1 times [2023-09-08 14:26:43,245 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1666433574] [2023-09-08 14:26:43,246 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,246 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,296 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:43,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:43,325 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,325 INFO L85 PathProgramCache]: Analyzing trace with hash 211608, now seen corresponding path program 1 times [2023-09-08 14:26:43,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [78110186] [2023-09-08 14:26:43,325 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,331 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:43,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:43,335 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,336 INFO L85 PathProgramCache]: Analyzing trace with hash -1786179211, now seen corresponding path program 1 times [2023-09-08 14:26:43,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [175861680] [2023-09-08 14:26:43,337 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-08 14:26:43,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-09-08 14:26:43,414 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-08 14:26:43,415 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [175861680] [2023-09-08 14:26:43,415 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [175861680] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-08 14:26:43,415 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-08 14:26:43,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-08 14:26:43,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1282151134] [2023-09-08 14:26:43,416 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-08 14:26:43,439 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-08 14:26:43,439 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-08 14:26:43,440 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-08 14:26:43,440 INFO L87 Difference]: Start difference. First operand 761 states and 1969 transitions. cyclomatic complexity: 1299 Second operand has 4 states, 4 states have (on average 8.25) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-08 14:26:43,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-08 14:26:43,483 INFO L93 Difference]: Finished difference Result 966 states and 2459 transitions. [2023-09-08 14:26:43,483 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 966 states and 2459 transitions. [2023-09-08 14:26:43,493 INFO L131 ngComponentsAnalysis]: Automaton has 92 accepting balls. 300 [2023-09-08 14:26:43,500 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 966 states to 751 states and 1941 transitions. [2023-09-08 14:26:43,500 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 751 [2023-09-08 14:26:43,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 751 [2023-09-08 14:26:43,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 751 states and 1941 transitions. [2023-09-08 14:26:43,503 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-08 14:26:43,504 INFO L218 hiAutomatonCegarLoop]: Abstraction has 751 states and 1941 transitions. [2023-09-08 14:26:43,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 751 states and 1941 transitions. [2023-09-08 14:26:43,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 751 to 655. [2023-09-08 14:26:43,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 655 states, 655 states have (on average 2.596946564885496) internal successors, (1701), 654 states have internal predecessors, (1701), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-08 14:26:43,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 655 states to 655 states and 1701 transitions. [2023-09-08 14:26:43,529 INFO L240 hiAutomatonCegarLoop]: Abstraction has 655 states and 1701 transitions. [2023-09-08 14:26:43,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-09-08 14:26:43,530 INFO L428 stractBuchiCegarLoop]: Abstraction has 655 states and 1701 transitions. [2023-09-08 14:26:43,531 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-09-08 14:26:43,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 655 states and 1701 transitions. [2023-09-08 14:26:43,536 INFO L131 ngComponentsAnalysis]: Automaton has 76 accepting balls. 252 [2023-09-08 14:26:43,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-08 14:26:43,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-08 14:26:43,537 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-08 14:26:43,537 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2023-09-08 14:26:43,538 INFO L748 eck$LassoCheckResult]: Stem: 7140#[$Ultimate##0]don't care [126] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 7142#[L-1]don't care [142] L-1-->L-1-1: Formula: (= (select |v_#valid_15| 0) 0) InVars {#valid=|v_#valid_15|} OutVars{#valid=|v_#valid_15|} AuxVars[] AssignedVars[] 7528#[L-1-1]don't care [165] L-1-1-->L12: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 7494#[L12]don't care [116] L12-->L12-1: Formula: (and (= (select |v_#valid_1| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_1|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_1|} AuxVars[] AssignedVars[] 7496#[L12-1]don't care [133] L12-1-->L12-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 6852#[L12-2]don't care [131] L12-2-->L12-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 6854#[L12-3]don't care [155] L12-3-->L12-4: Formula: (and (= (select |v_#valid_2| 2) 1) (= (select |v_#length_2| 2) 11)) InVars {#length=|v_#length_2|, #valid=|v_#valid_2|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_2|} AuxVars[] AssignedVars[] 6952#[L12-4]don't care [149] L12-4-->L700: Formula: (= v_~flag1~0_5 0) InVars {} OutVars{~flag1~0=v_~flag1~0_5} AuxVars[] AssignedVars[~flag1~0] 7468#[L700]don't care [166] L700-->L701: Formula: (= v_~flag2~0_5 0) InVars {} OutVars{~flag2~0=v_~flag2~0_5} AuxVars[] AssignedVars[~flag2~0] 7470#[L701]don't care [158] L701-->L702: Formula: (= v_~turn~0_7 0) InVars {} OutVars{~turn~0=v_~turn~0_7} AuxVars[] AssignedVars[~turn~0] 7116#[L702]don't care [121] L702-->L-1-2: Formula: (= v_~x~0_7 0) InVars {} OutVars{~x~0=v_~x~0_7} AuxVars[] AssignedVars[~x~0] 7118#[L-1-2]don't care [167] L-1-2-->L-1-3: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 7384#[L-1-3]don't care [170] L-1-3-->L760: Formula: true InVars {} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_1|, ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_1|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_1|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_1|, ULTIMATE.start_main_#t~mem8#1=|v_ULTIMATE.start_main_#t~mem8#1_1|, ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_1|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_1|, ULTIMATE.start_main_#t~nondet7#1=|v_ULTIMATE.start_main_#t~nondet7#1_1|, ULTIMATE.start_main_#t~mem9#1=|v_ULTIMATE.start_main_#t~mem9#1_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, ULTIMATE.start_main_#t~pre6#1, ULTIMATE.start_main_#t~mem8#1, ULTIMATE.start_main_#t~nondet5#1, ULTIMATE.start_main_~#t1~1#1.base, ULTIMATE.start_main_#t~nondet7#1, ULTIMATE.start_main_#t~mem9#1, ULTIMATE.start_main_#t~pre4#1] 7386#[L760]don't care [157] L760-->L760-1: Formula: (and (= (store |v_#length_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 4) |v_#length_3|) (= |v_ULTIMATE.start_main_~#t1~1#1.offset_2| 0) (= (select |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2|) 0) (not (= |v_ULTIMATE.start_main_~#t1~1#1.base_2| 0)) (= (store |v_#valid_4| |v_ULTIMATE.start_main_~#t1~1#1.base_2| 1) |v_#valid_3|) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#t1~1#1.base_2|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_4|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1~1#1.offset, ULTIMATE.start_main_~#t1~1#1.base, #valid, #length] 7442#[L760-1]don't care [140] L760-1-->L760-2: Formula: (and (= (store |v_#length_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 4) |v_#length_5|) (= (select |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) 0) (= (store |v_#valid_6| |v_ULTIMATE.start_main_~#t2~1#1.base_2| 1) |v_#valid_5|) (not (= |v_ULTIMATE.start_main_~#t2~1#1.base_2| 0)) (< |v_#StackHeapBarrier_3| |v_ULTIMATE.start_main_~#t2~1#1.base_2|) (= |v_ULTIMATE.start_main_~#t2~1#1.offset_2| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_6|, #valid=|v_#valid_6|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_2|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_2|, #StackHeapBarrier=|v_#StackHeapBarrier_3|, #length=|v_#length_5|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2~1#1.base, ULTIMATE.start_main_~#t2~1#1.offset, #valid, #length] 7362#[L760-2]don't care [152] L760-2-->L761: Formula: (= |v_ULTIMATE.start_main_#t~pre4#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 7364#[L761]don't care [123] L761-->L761-1: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 6914#[L761-1]don't care [150] L761-1-->L761-2: Formula: (and (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) 1) (<= (+ |v_ULTIMATE.start_main_~#t1~1#1.offset_3| 4) (select |v_#length_7| |v_ULTIMATE.start_main_~#t1~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t1~1#1.offset_3|) (= (store |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3| (store (select |v_#memory_int_4| |v_ULTIMATE.start_main_~#t1~1#1.base_3|) |v_ULTIMATE.start_main_~#t1~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre4#1_3|)) |v_#memory_int_3|)) InVars {ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} OutVars{ULTIMATE.start_main_~#t1~1#1.offset=|v_ULTIMATE.start_main_~#t1~1#1.offset_3|, ULTIMATE.start_main_~#t1~1#1.base=|v_ULTIMATE.start_main_~#t1~1#1.base_3|, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_3|} AuxVars[] AssignedVars[#memory_int] 6916#[L761-2]don't care [214] L761-2-->$Ultimate##0: Formula: (and (= 0 |v_thr1Thread1of1ForFork0_#in~_.base_4|) (= |v_ULTIMATE.start_main_#t~pre4#1_6| v_thr1Thread1of1ForFork0_thidvar0_2) (= |v_thr1Thread1of1ForFork0_#in~_.offset_4| 0) (= v_thr1Thread1of1ForFork0_thidvar1_2 0)) InVars {ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_4, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_4|, thr1Thread1of1ForFork0_#res.base=|v_thr1Thread1of1ForFork0_#res.base_4|, thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_10, thr1Thread1of1ForFork0_thidvar0=v_thr1Thread1of1ForFork0_thidvar0_2, thr1Thread1of1ForFork0_thidvar1=v_thr1Thread1of1ForFork0_thidvar1_2, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_4|, ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_6|, thr1Thread1of1ForFork0_#res.offset=|v_thr1Thread1of1ForFork0_#res.offset_4|, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_10, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_#in~_.offset, thr1Thread1of1ForFork0_#res.base, thr1Thread1of1ForFork0_~f21~0, thr1Thread1of1ForFork0_thidvar0, thr1Thread1of1ForFork0_thidvar1, thr1Thread1of1ForFork0_#in~_.base, thr1Thread1of1ForFork0_#res.offset, thr1Thread1of1ForFork0_~t1~0, thr1Thread1of1ForFork0_~_.offset] 7400#[L761-3, $Ultimate##0]don't care [195] $Ultimate##0-->L704: Formula: (and (= v_thr1Thread1of1ForFork0_~_.base_1 |v_thr1Thread1of1ForFork0_#in~_.base_1|) (= |v_thr1Thread1of1ForFork0_#in~_.offset_1| v_thr1Thread1of1ForFork0_~_.offset_1)) InVars {thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|} OutVars{thr1Thread1of1ForFork0_~_.base=v_thr1Thread1of1ForFork0_~_.base_1, thr1Thread1of1ForFork0_#in~_.offset=|v_thr1Thread1of1ForFork0_#in~_.offset_1|, thr1Thread1of1ForFork0_#in~_.base=|v_thr1Thread1of1ForFork0_#in~_.base_1|, thr1Thread1of1ForFork0_~_.offset=v_thr1Thread1of1ForFork0_~_.offset_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~_.base, thr1Thread1of1ForFork0_~_.offset] 7170#[L761-3, L704]don't care [196] L704-->L706: Formula: (= v_~flag1~0_3 1) InVars {} OutVars{~flag1~0=v_~flag1~0_3} AuxVars[] AssignedVars[~flag1~0] 7172#[L761-3, L706]don't care [197] L706-->L709: Formula: (= v_~turn~0_4 1) InVars {} OutVars{~turn~0=v_~turn~0_4} AuxVars[] AssignedVars[~turn~0] 6612#[L761-3, L709]don't care [174] L761-3-->L761-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre4#1=|v_ULTIMATE.start_main_#t~pre4#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre4#1] 6590#[L761-4, L709]don't care [143] L761-4-->L762: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet5#1=|v_ULTIMATE.start_main_#t~nondet5#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet5#1] 6288#[L762, L709]don't care [120] L762-->L762-1: Formula: (= |v_ULTIMATE.start_main_#t~pre6#1_2| |v_#pthreadsForks_4|) InVars {#pthreadsForks=|v_#pthreadsForks_4|} OutVars{#pthreadsForks=|v_#pthreadsForks_4|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre6#1] 6292#[L762-1, L709]don't care [130] L762-1-->L762-2: Formula: (= (+ 1 |v_#pthreadsForks_6|) |v_#pthreadsForks_5|) InVars {#pthreadsForks=|v_#pthreadsForks_6|} OutVars{#pthreadsForks=|v_#pthreadsForks_5|} AuxVars[] AssignedVars[#pthreadsForks] 7476#[L762-2, L709]don't care [114] L762-2-->L762-3: Formula: (and (= (store |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3| (store (select |v_#memory_int_6| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) |v_ULTIMATE.start_main_~#t2~1#1.offset_3| |v_ULTIMATE.start_main_#t~pre6#1_3|)) |v_#memory_int_5|) (<= (+ |v_ULTIMATE.start_main_~#t2~1#1.offset_3| 4) (select |v_#length_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|)) (<= 0 |v_ULTIMATE.start_main_~#t2~1#1.offset_3|) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#t2~1#1.base_3|) 1)) InVars {ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_6|, #length=|v_#length_8|} OutVars{ULTIMATE.start_main_~#t2~1#1.base=|v_ULTIMATE.start_main_~#t2~1#1.base_3|, ULTIMATE.start_main_~#t2~1#1.offset=|v_ULTIMATE.start_main_~#t2~1#1.offset_3|, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_3|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, #length=|v_#length_8|} AuxVars[] AssignedVars[#memory_int] 7454#[L762-3, L709]don't care [217] L762-3-->$Ultimate##0: Formula: (and (= v_thr2Thread1of1ForFork1_thidvar2_2 0) (= |v_thr2Thread1of1ForFork1_#in~_.base_4| 0) (= |v_thr2Thread1of1ForFork1_#in~_.offset_4| 0) (= v_thr2Thread1of1ForFork1_thidvar1_2 0) (= |v_ULTIMATE.start_main_#t~pre6#1_6| v_thr2Thread1of1ForFork1_thidvar0_2)) InVars {ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|} OutVars{thr2Thread1of1ForFork1_~t2~0=v_thr2Thread1of1ForFork1_~t2~0_10, thr2Thread1of1ForFork1_thidvar0=v_thr2Thread1of1ForFork1_thidvar0_2, thr2Thread1of1ForFork1_thidvar1=v_thr2Thread1of1ForFork1_thidvar1_2, thr2Thread1of1ForFork1_thidvar2=v_thr2Thread1of1ForFork1_thidvar2_2, thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_4, ULTIMATE.start_main_#t~pre6#1=|v_ULTIMATE.start_main_#t~pre6#1_6|, thr2Thread1of1ForFork1_#res.base=|v_thr2Thread1of1ForFork1_#res.base_4|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_4|, thr2Thread1of1ForFork1_#res.offset=|v_thr2Thread1of1ForFork1_#res.offset_4|, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_4|, thr2Thread1of1ForFork1_~f12~0=v_thr2Thread1of1ForFork1_~f12~0_10, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_4} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~t2~0, thr2Thread1of1ForFork1_thidvar0, thr2Thread1of1ForFork1_thidvar1, thr2Thread1of1ForFork1_thidvar2, thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_#res.base, thr2Thread1of1ForFork1_#in~_.offset, thr2Thread1of1ForFork1_#res.offset, thr2Thread1of1ForFork1_#in~_.base, thr2Thread1of1ForFork1_~f12~0, thr2Thread1of1ForFork1_~_.base] 6780#[L709, L762-4, $Ultimate##0]don't care [178] $Ultimate##0-->L732: Formula: (and (= v_thr2Thread1of1ForFork1_~_.offset_1 |v_thr2Thread1of1ForFork1_#in~_.offset_1|) (= |v_thr2Thread1of1ForFork1_#in~_.base_1| v_thr2Thread1of1ForFork1_~_.base_1)) InVars {thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|} OutVars{thr2Thread1of1ForFork1_~_.offset=v_thr2Thread1of1ForFork1_~_.offset_1, thr2Thread1of1ForFork1_#in~_.base=|v_thr2Thread1of1ForFork1_#in~_.base_1|, thr2Thread1of1ForFork1_#in~_.offset=|v_thr2Thread1of1ForFork1_#in~_.offset_1|, thr2Thread1of1ForFork1_~_.base=v_thr2Thread1of1ForFork1_~_.base_1} AuxVars[] AssignedVars[thr2Thread1of1ForFork1_~_.offset, thr2Thread1of1ForFork1_~_.base] 6782#[L709, L762-4, L732]don't care [179] L732-->L734: Formula: (= v_~flag2~0_1 1) InVars {} OutVars{~flag2~0=v_~flag2~0_1} AuxVars[] AssignedVars[~flag2~0] 7408#[L709, L762-4, L734]don't care [198] L709-->L712: Formula: (= v_~flag2~0_3 v_thr1Thread1of1ForFork0_~f21~0_1) InVars {~flag2~0=v_~flag2~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_1, ~flag2~0=v_~flag2~0_3} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 7524#[L734, L762-4, L712]don't care [199] L712-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_1 v_~turn~0_5) InVars {~turn~0=v_~turn~0_5} OutVars{~turn~0=v_~turn~0_5, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_1} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 7526#[L722, L734, L762-4]don't care [2023-09-08 14:26:43,539 INFO L750 eck$LassoCheckResult]: Loop: 7526#[L722, L734, L762-4]don't care [200] L722-->L717: Formula: (and (= v_thr1Thread1of1ForFork0_~f21~0_3 1) (= v_thr1Thread1of1ForFork0_~t1~0_3 1)) InVars {thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_3} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_3, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_3} AuxVars[] AssignedVars[] 6774#[L734, L717, L762-4]don't care [203] L717-->L719: Formula: (= v_~flag2~0_4 v_thr1Thread1of1ForFork0_~f21~0_7) InVars {~flag2~0=v_~flag2~0_4} OutVars{thr1Thread1of1ForFork0_~f21~0=v_thr1Thread1of1ForFork0_~f21~0_7, ~flag2~0=v_~flag2~0_4} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~f21~0] 6778#[L734, L762-4, L719]don't care [205] L719-->L722: Formula: (= v_thr1Thread1of1ForFork0_~t1~0_7 v_~turn~0_6) InVars {~turn~0=v_~turn~0_6} OutVars{~turn~0=v_~turn~0_6, thr1Thread1of1ForFork0_~t1~0=v_thr1Thread1of1ForFork0_~t1~0_7} AuxVars[] AssignedVars[thr1Thread1of1ForFork0_~t1~0] 7526#[L722, L734, L762-4]don't care [2023-09-08 14:26:43,539 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1417012218, now seen corresponding path program 1 times [2023-09-08 14:26:43,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703580312] [2023-09-08 14:26:43,540 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,561 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:43,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,590 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:43,590 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,590 INFO L85 PathProgramCache]: Analyzing trace with hash 228489, now seen corresponding path program 2 times [2023-09-08 14:26:43,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,591 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647612029] [2023-09-08 14:26:43,591 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,598 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:43,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,603 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:43,604 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-08 14:26:43,604 INFO L85 PathProgramCache]: Analyzing trace with hash -1022367248, now seen corresponding path program 1 times [2023-09-08 14:26:43,604 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-08 14:26:43,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115483854] [2023-09-08 14:26:43,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-08 14:26:43,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-08 14:26:43,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,632 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:43,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:43,658 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-08 14:26:44,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:44,776 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-08 14:26:44,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-08 14:26:44,890 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.09 02:26:44 BoogieIcfgContainer [2023-09-08 14:26:44,890 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2023-09-08 14:26:44,891 INFO L158 Benchmark]: Toolchain (without parser) took 3830.81ms. Allocated memory is still 255.9MB. Free memory was 208.6MB in the beginning and 153.9MB in the end (delta: 54.8MB). Peak memory consumption was 55.3MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,891 INFO L158 Benchmark]: CDTParser took 0.12ms. Allocated memory is still 187.7MB. Free memory is still 141.8MB. There was no memory consumed. Max. memory is 8.0GB. [2023-09-08 14:26:44,891 INFO L158 Benchmark]: CACSL2BoogieTranslator took 454.93ms. Allocated memory is still 255.9MB. Free memory was 208.6MB in the beginning and 188.6MB in the end (delta: 20.0MB). Peak memory consumption was 19.9MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,892 INFO L158 Benchmark]: Boogie Procedure Inliner took 53.21ms. Allocated memory is still 255.9MB. Free memory was 188.6MB in the beginning and 186.6MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,892 INFO L158 Benchmark]: Boogie Preprocessor took 33.69ms. Allocated memory is still 255.9MB. Free memory was 186.6MB in the beginning and 185.1MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,893 INFO L158 Benchmark]: RCFGBuilder took 333.24ms. Allocated memory is still 255.9MB. Free memory was 185.1MB in the beginning and 170.9MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,893 INFO L158 Benchmark]: BuchiAutomizer took 2942.52ms. Allocated memory is still 255.9MB. Free memory was 170.9MB in the beginning and 153.9MB in the end (delta: 17.0MB). Peak memory consumption was 17.6MB. Max. memory is 8.0GB. [2023-09-08 14:26:44,895 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12ms. Allocated memory is still 187.7MB. Free memory is still 141.8MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 454.93ms. Allocated memory is still 255.9MB. Free memory was 208.6MB in the beginning and 188.6MB in the end (delta: 20.0MB). Peak memory consumption was 19.9MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 53.21ms. Allocated memory is still 255.9MB. Free memory was 188.6MB in the beginning and 186.6MB in the end (delta: 2.0MB). Peak memory consumption was 2.1MB. Max. memory is 8.0GB. * Boogie Preprocessor took 33.69ms. Allocated memory is still 255.9MB. Free memory was 186.6MB in the beginning and 185.1MB in the end (delta: 1.6MB). Peak memory consumption was 1.0MB. Max. memory is 8.0GB. * RCFGBuilder took 333.24ms. Allocated memory is still 255.9MB. Free memory was 185.1MB in the beginning and 170.9MB in the end (delta: 14.2MB). Peak memory consumption was 14.7MB. Max. memory is 8.0GB. * BuchiAutomizer took 2942.52ms. Allocated memory is still 255.9MB. Free memory was 170.9MB in the beginning and 153.9MB in the end (delta: 17.0MB). Peak memory consumption was 17.6MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 2 terminating modules (2 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.2 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 655 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.7s and 3 iterations. TraceHistogramMax:1. Analysis of lassos took 2.0s. Construction of modules took 0.0s. Büchi inclusion checks took 0.3s. Highest rank in rank-based complementation 0. Minimization of det autom 2. Minimization of nondet autom 0. Automata minimization 0.1s AutomataMinimizationTime, 2 MinimizatonAttempts, 282 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 166 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 166 mSDsluCounter, 390 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 225 mSDsCounter, 4 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 46 IncrementalHoareTripleChecker+Invalid, 50 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 4 mSolverCounterUnsat, 165 mSDtfsCounter, 46 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc2 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 716]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L700] 0 int flag1 = 0, flag2 = 0; VAL [flag1=0, flag2=0] [L701] 0 int turn; VAL [flag1=0, flag2=0, turn=0] [L702] 0 int x; VAL [flag1=0, flag2=0, turn=0, x=0] [L760] 0 pthread_t t1, t2; VAL [flag1=0, flag2=0, t1={8512:0}, t2={8511:0}, turn=0, x=0] [L761] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [_={0:0}, flag1=0, flag2=0, pthread_create(&t1, 0, thr1, 0)=15502, t1={8512:0}, t2={8511:0}, turn=0, x=0] [L705] 1 flag1 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, turn=0, x=0] [L708] 1 turn = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, turn=1, x=0] [L762] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [_={0:0}, _={0:0}, _={0:0}, flag1=1, flag2=0, pthread_create(&t2, 0, thr2, 0)=15503, t1={8512:0}, t2={8511:0}, turn=1, x=0] [L733] 2 flag2 = 1 VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, flag1=1, flag2=1, turn=1, x=0] [L711] 1 int f21 = flag2; VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, f21=1, flag1=1, flag2=1, turn=1, x=0] [L714] 1 int t1 = turn; VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, f21=1, flag1=1, flag2=1, t1=1, turn=1, x=0] Loop: [L716] COND TRUE f21==1 && t1==1 [L718] f21 = flag2 [L721] t1 = turn End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 716]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L700] 0 int flag1 = 0, flag2 = 0; VAL [flag1=0, flag2=0] [L701] 0 int turn; VAL [flag1=0, flag2=0, turn=0] [L702] 0 int x; VAL [flag1=0, flag2=0, turn=0, x=0] [L760] 0 pthread_t t1, t2; VAL [flag1=0, flag2=0, t1={8512:0}, t2={8511:0}, turn=0, x=0] [L761] FCALL, FORK 0 pthread_create(&t1, 0, thr1, 0) VAL [_={0:0}, flag1=0, flag2=0, pthread_create(&t1, 0, thr1, 0)=15502, t1={8512:0}, t2={8511:0}, turn=0, x=0] [L705] 1 flag1 = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, turn=0, x=0] [L708] 1 turn = 1 VAL [_={0:0}, _={0:0}, flag1=1, flag2=0, turn=1, x=0] [L762] FCALL, FORK 0 pthread_create(&t2, 0, thr2, 0) VAL [_={0:0}, _={0:0}, _={0:0}, flag1=1, flag2=0, pthread_create(&t2, 0, thr2, 0)=15503, t1={8512:0}, t2={8511:0}, turn=1, x=0] [L733] 2 flag2 = 1 VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, flag1=1, flag2=1, turn=1, x=0] [L711] 1 int f21 = flag2; VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, f21=1, flag1=1, flag2=1, turn=1, x=0] [L714] 1 int t1 = turn; VAL [_={0:0}, _={0:0}, _={0:0}, _={0:0}, f21=1, flag1=1, flag2=1, t1=1, turn=1, x=0] Loop: [L716] COND TRUE f21==1 && t1==1 [L718] f21 = flag2 [L721] t1 = turn End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2023-09-08 14:26:44,962 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...