/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/BuchiAutomizerCInline.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf --buchiautomizer.fairness.type.for.concurrent.programs FAIRNESS_LAZY -i ../../../trunk/examples/svcomp/pthread-deagle/airline-15.i -------------------------------------------------------------------------------- This is Ultimate 0.2.3-wip.me.fairness-42053ae-m [2023-09-17 12:11:00,199 INFO L172 SettingsManager]: Resetting all preferences to default values... [2023-09-17 12:11:00,291 INFO L100 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Termination-32bit-Automizer_Default.epf [2023-09-17 12:11:00,324 INFO L114 SettingsManager]: Preferences different from defaults after loading the file: [2023-09-17 12:11:00,325 INFO L135 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2023-09-17 12:11:00,325 INFO L137 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2023-09-17 12:11:00,327 INFO L135 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2023-09-17 12:11:00,327 INFO L137 SettingsManager]: * Create parallel compositions if possible=false [2023-09-17 12:11:00,327 INFO L137 SettingsManager]: * Use SBE=true [2023-09-17 12:11:00,330 INFO L135 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2023-09-17 12:11:00,331 INFO L137 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2023-09-17 12:11:00,331 INFO L137 SettingsManager]: * Use old map elimination=false [2023-09-17 12:11:00,331 INFO L137 SettingsManager]: * Use external solver (rank synthesis)=false [2023-09-17 12:11:00,332 INFO L137 SettingsManager]: * Use only trivial implications for array writes=true [2023-09-17 12:11:00,332 INFO L137 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2023-09-17 12:11:00,333 INFO L135 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2023-09-17 12:11:00,333 INFO L137 SettingsManager]: * sizeof long=4 [2023-09-17 12:11:00,333 INFO L137 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2023-09-17 12:11:00,333 INFO L137 SettingsManager]: * Overapproximate operations on floating types=true [2023-09-17 12:11:00,333 INFO L137 SettingsManager]: * sizeof POINTER=4 [2023-09-17 12:11:00,334 INFO L137 SettingsManager]: * Check division by zero=IGNORE [2023-09-17 12:11:00,334 INFO L137 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * sizeof long double=12 [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * Check if freed pointer was valid=false [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * Assume nondeterminstic values are in range=false [2023-09-17 12:11:00,335 INFO L137 SettingsManager]: * Use constant arrays=true [2023-09-17 12:11:00,336 INFO L137 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2023-09-17 12:11:00,336 INFO L135 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2023-09-17 12:11:00,337 INFO L137 SettingsManager]: * Size of a code block=SequenceOfStatements [2023-09-17 12:11:00,337 INFO L135 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2023-09-17 12:11:00,337 INFO L137 SettingsManager]: * Trace refinement strategy=CAMEL [2023-09-17 12:11:00,337 INFO L137 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2023-09-17 12:11:00,341 INFO L135 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2023-09-17 12:11:00,341 INFO L137 SettingsManager]: * TransformationType=MODULO_NEIGHBOR WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer: Fairness type for concurrent programs -> FAIRNESS_LAZY [2023-09-17 12:11:00,696 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2023-09-17 12:11:00,739 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2023-09-17 12:11:00,741 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2023-09-17 12:11:00,742 INFO L270 PluginConnector]: Initializing CDTParser... [2023-09-17 12:11:00,742 INFO L274 PluginConnector]: CDTParser initialized [2023-09-17 12:11:00,743 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-deagle/airline-15.i [2023-09-17 12:11:01,981 INFO L533 CDTParser]: Created temporary CDT project at NULL [2023-09-17 12:11:02,138 INFO L384 CDTParser]: Found 1 translation units. [2023-09-17 12:11:02,139 INFO L180 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-15.i [2023-09-17 12:11:02,149 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a3326dd76/5873c9325368459088a66fac3768d8a8/FLAG1b4b20ff2 [2023-09-17 12:11:02,163 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/a3326dd76/5873c9325368459088a66fac3768d8a8 [2023-09-17 12:11:02,165 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2023-09-17 12:11:02,166 INFO L133 ToolchainWalker]: Walking toolchain with 5 elements. [2023-09-17 12:11:02,167 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2023-09-17 12:11:02,167 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2023-09-17 12:11:02,170 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2023-09-17 12:11:02,172 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,173 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66634793 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02, skipping insertion in model container [2023-09-17 12:11:02,173 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,179 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2023-09-17 12:11:02,208 INFO L178 MainTranslator]: Built tables and reachable declarations [2023-09-17 12:11:02,431 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-15.i[32027,32040] [2023-09-17 12:11:02,432 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-09-17 12:11:02,443 INFO L203 MainTranslator]: Completed pre-run [2023-09-17 12:11:02,487 WARN L247 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/pthread-deagle/airline-15.i[32027,32040] [2023-09-17 12:11:02,488 INFO L209 PostProcessor]: Analyzing one entry point: main [2023-09-17 12:11:02,510 WARN L667 CHandler]: The function __VERIFIER_atomic_begin is called, but not defined or handled by StandardFunctionHandler. [2023-09-17 12:11:02,511 WARN L667 CHandler]: The function __VERIFIER_atomic_end is called, but not defined or handled by StandardFunctionHandler. [2023-09-17 12:11:02,516 INFO L208 MainTranslator]: Completed translation [2023-09-17 12:11:02,517 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02 WrapperNode [2023-09-17 12:11:02,517 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2023-09-17 12:11:02,518 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2023-09-17 12:11:02,518 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2023-09-17 12:11:02,518 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2023-09-17 12:11:02,523 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,543 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,557 INFO L138 Inliner]: procedures = 162, calls = 22, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 50 [2023-09-17 12:11:02,557 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2023-09-17 12:11:02,558 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2023-09-17 12:11:02,558 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2023-09-17 12:11:02,558 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2023-09-17 12:11:02,564 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,564 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,570 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,571 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,585 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,587 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,588 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,589 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,590 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2023-09-17 12:11:02,591 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2023-09-17 12:11:02,591 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2023-09-17 12:11:02,591 INFO L274 PluginConnector]: RCFGBuilder initialized [2023-09-17 12:11:02,592 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (1/1) ... [2023-09-17 12:11:02,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2023-09-17 12:11:02,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2023-09-17 12:11:02,618 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2023-09-17 12:11:02,627 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2023-09-17 12:11:02,673 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2023-09-17 12:11:02,673 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure salethread [2023-09-17 12:11:02,674 INFO L138 BoogieDeclarations]: Found implementation of procedure salethread [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2023-09-17 12:11:02,674 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2023-09-17 12:11:02,674 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2023-09-17 12:11:02,675 WARN L210 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2023-09-17 12:11:02,787 INFO L236 CfgBuilder]: Building ICFG [2023-09-17 12:11:02,788 INFO L262 CfgBuilder]: Building CFG for each procedure with an implementation [2023-09-17 12:11:02,901 INFO L277 CfgBuilder]: Performing block encoding [2023-09-17 12:11:02,905 INFO L297 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2023-09-17 12:11:02,905 INFO L302 CfgBuilder]: Removed 1 assume(true) statements. [2023-09-17 12:11:02,907 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.09 12:11:02 BoogieIcfgContainer [2023-09-17 12:11:02,907 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2023-09-17 12:11:02,908 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2023-09-17 12:11:02,908 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2023-09-17 12:11:02,911 INFO L274 PluginConnector]: BuchiAutomizer initialized [2023-09-17 12:11:02,911 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-17 12:11:02,911 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 17.09 12:11:02" (1/3) ... [2023-09-17 12:11:02,912 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4d359c7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.09 12:11:02, skipping insertion in model container [2023-09-17 12:11:02,912 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-17 12:11:02,912 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.09 12:11:02" (2/3) ... [2023-09-17 12:11:02,913 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4d359c7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 17.09 12:11:02, skipping insertion in model container [2023-09-17 12:11:02,913 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2023-09-17 12:11:02,913 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.09 12:11:02" (3/3) ... [2023-09-17 12:11:02,914 INFO L332 chiAutomizerObserver]: Analyzing ICFG airline-15.i [2023-09-17 12:11:02,959 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2023-09-17 12:11:02,981 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 53 places, 55 transitions, 115 flow [2023-09-17 12:11:03,003 INFO L124 PetriNetUnfolderBase]: 7/71 cut-off events. [2023-09-17 12:11:03,003 INFO L125 PetriNetUnfolderBase]: For 0/0 co-relation queries the response was YES. [2023-09-17 12:11:03,007 INFO L83 FinitePrefix]: Finished finitePrefix Result has 76 conditions, 71 events. 7/71 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 77 event pairs, 0 based on Foata normal form. 0/63 useless extension candidates. Maximal degree in co-relation 37. Up to 4 conditions per place. [2023-09-17 12:11:03,008 INFO L82 GeneralOperation]: Start removeDead. Operand has 53 places, 55 transitions, 115 flow [2023-09-17 12:11:03,011 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 53 places, 55 transitions, 115 flow [2023-09-17 12:11:03,022 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-09-17 12:11:03,022 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-09-17 12:11:03,022 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-09-17 12:11:03,022 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-09-17 12:11:03,022 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-09-17 12:11:03,022 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-09-17 12:11:03,022 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-09-17 12:11:03,023 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-09-17 12:11:03,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:03,238 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:03,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:03,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:03,247 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:03,248 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:03,248 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-09-17 12:11:03,248 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:03,291 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:03,291 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:03,292 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:03,293 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:03,293 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:03,305 INFO L748 eck$LassoCheckResult]: Stem: SleepPredicate [underlying: 56#[$Ultimate##0]don't care, sleep set: []] [99] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] SleepPredicate [underlying: 59#[L-1]don't care, sleep set: []] [107] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 61#[L-1-1]don't care, sleep set: []] [121] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 63#[L23]don't care, sleep set: []] [88] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 65#[L23-1]don't care, sleep set: []] [94] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 67#[L23-2]don't care, sleep set: []] [98] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 69#[L23-3]don't care, sleep set: []] [127] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 71#[L23-4]don't care, sleep set: []] [90] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 73#[L23-5]don't care, sleep set: []] [101] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 75#[L718]don't care, sleep set: []] [93] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 77#[L719]don't care, sleep set: []] [78] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 79#[L-1-2]don't care, sleep set: []] [123] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] SleepPredicate [underlying: 81#[L-1-3]don't care, sleep set: []] [125] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] SleepPredicate [underlying: 83#[L-1-4]don't care, sleep set: []] [111] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 85#[L735]don't care, sleep set: []] [122] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] SleepPredicate [underlying: 87#[L735-1]don't care, sleep set: []] [128] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] SleepPredicate [underlying: 89#[L736]don't care, sleep set: []] [102] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 91#[L736-1]don't care, sleep set: []] [126] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 93#[L739]don't care, sleep set: []] [77] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 95#[L742]don't care, sleep set: []] [106] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 97#[L745]don't care, sleep set: []] [82] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 99#[L746-5]don't care, sleep set: []] [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 101#[L747]don't care, sleep set: []] [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 105#[L747-1]don't care, sleep set: []] [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 109#[L747-2]don't care, sleep set: []] [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 115#[L747-3]don't care, sleep set: []] [142] L747-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre2#1_6| v_salethreadThread1of1ForFork0_thidvar0_2) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread1of1ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_4|, salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_4, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_4, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_4|, salethreadThread1of1ForFork0_thidvar0=v_salethreadThread1of1ForFork0_thidvar0_2, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_4|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0, salethreadThread1of1ForFork0_#in~arg.base, salethreadThread1of1ForFork0_thidvar0, salethreadThread1of1ForFork0_#in~arg.offset, salethreadThread1of1ForFork0_#res.offset] SleepPredicate [underlying: 121#[L747-4, $Ultimate##0]don't care, sleep set: []] [130] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread1of1ForFork0_~arg.base_1 |v_salethreadThread1of1ForFork0_#in~arg.base_1|) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_1| v_salethreadThread1of1ForFork0_~arg.offset_1)) InVars {salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_1, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_1, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base] SleepPredicate [underlying: 125#[L747-4, L721]don't care, sleep set: [ULTIMATE.start]] [132] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 133#[L747-4, L721-1]don't care, sleep set: [ULTIMATE.start]] [134] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of1ForFork0_#res.base_1| 0) (= |v_salethreadThread1of1ForFork0_#res.offset_1| 0)) InVars {} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_1|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_#res.offset] SleepPredicate [underlying: 145#[L747-4, salethreadFINAL]don't care, sleep set: [ULTIMATE.start]] [137] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 163#[L747-4, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [117] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 181#[L747-5, salethreadEXIT]don't care, sleep set: []] [115] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 199#[L746-2, salethreadEXIT]don't care, sleep set: []] [89] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 219#[L746-3, salethreadEXIT]don't care, sleep set: []] [110] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 243#[L746-4, salethreadEXIT]don't care, sleep set: []] [84] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 273#[L746-5, salethreadEXIT]don't care, sleep set: []] [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 313#[L747, salethreadEXIT]don't care, sleep set: []] [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 357#[L747-1, salethreadEXIT]don't care, sleep set: []] [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 401#[L747-2, salethreadEXIT]don't care, sleep set: []] [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 439#[L747-3, salethreadEXIT]don't care, sleep set: []] [140] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 467#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care, sleep set: []] [2023-09-17 12:11:03,307 INFO L750 eck$LassoCheckResult]: Loop: SleepPredicate [underlying: 467#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care, sleep set: []] [141] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 467#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care, sleep set: []] [2023-09-17 12:11:03,314 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,315 INFO L85 PathProgramCache]: Analyzing trace with hash -1964818749, now seen corresponding path program 1 times [2023-09-17 12:11:03,321 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [43423783] [2023-09-17 12:11:03,322 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:03,532 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-09-17 12:11:03,532 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:03,532 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [43423783] [2023-09-17 12:11:03,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [43423783] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:03,533 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:03,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-09-17 12:11:03,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1550298734] [2023-09-17 12:11:03,535 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:03,547 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:03,548 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,548 INFO L85 PathProgramCache]: Analyzing trace with hash 172, now seen corresponding path program 1 times [2023-09-17 12:11:03,549 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,549 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973971241] [2023-09-17 12:11:03,549 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,549 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,555 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:03,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:03,574 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:03,594 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-09-17 12:11:03,594 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-09-17 12:11:03,596 INFO L87 Difference]: Start difference. First operand null Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:03,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:03,641 INFO L93 Difference]: Finished difference Result 617 states and 1189 transitions. [2023-09-17 12:11:03,643 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 617 states and 1189 transitions. [2023-09-17 12:11:03,647 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2023-09-17 12:11:03,658 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 617 states to 339 states and 640 transitions. [2023-09-17 12:11:03,659 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 137 [2023-09-17 12:11:03,661 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 248 [2023-09-17 12:11:03,662 INFO L73 IsDeterministic]: Start isDeterministic. Operand 339 states and 640 transitions. [2023-09-17 12:11:03,667 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:03,667 INFO L218 hiAutomatonCegarLoop]: Abstraction has 339 states and 640 transitions. [2023-09-17 12:11:03,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states and 640 transitions. [2023-09-17 12:11:03,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 248. [2023-09-17 12:11:03,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 248 states, 248 states have (on average 1.971774193548387) internal successors, (489), 247 states have internal predecessors, (489), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:03,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 489 transitions. [2023-09-17 12:11:03,721 INFO L240 hiAutomatonCegarLoop]: Abstraction has 248 states and 489 transitions. [2023-09-17 12:11:03,722 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-09-17 12:11:03,727 INFO L428 stractBuchiCegarLoop]: Abstraction has 248 states and 489 transitions. [2023-09-17 12:11:03,727 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-09-17 12:11:03,727 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 248 states and 489 transitions. [2023-09-17 12:11:03,729 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:03,729 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:03,729 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:03,732 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:03,732 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:03,739 INFO L748 eck$LassoCheckResult]: Stem: 1314#[$Ultimate##0]don't care [99] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 1316#[L-1]don't care [107] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 1400#[L-1-1]don't care [121] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 1216#[L23]don't care [88] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 1218#[L23-1]don't care [94] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 1578#[L23-2]don't care [98] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 1506#[L23-3]don't care [127] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 1508#[L23-4]don't care [90] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 1350#[L23-5]don't care [101] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 1352#[L718]don't care [93] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 1522#[L719]don't care [78] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 1524#[L-1-2]don't care [123] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 1620#[L-1-3]don't care [125] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 1416#[L-1-4]don't care [111] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 1418#[L735]don't care [122] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 1510#[L735-1]don't care [128] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 1360#[L736]don't care [102] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 1362#[L736-1]don't care [126] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 1130#[L739]don't care [77] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 1132#[L742]don't care [106] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 1376#[L745]don't care [82] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 1540#[L746-5]don't care [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 1190#[L747]don't care [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1192#[L747-1]don't care [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 1422#[L747-2]don't care [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 1424#[L747-3]don't care [142] L747-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre2#1_6| v_salethreadThread1of1ForFork0_thidvar0_2) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread1of1ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_4|, salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_4, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_4, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_4|, salethreadThread1of1ForFork0_thidvar0=v_salethreadThread1of1ForFork0_thidvar0_2, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_4|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0, salethreadThread1of1ForFork0_#in~arg.base, salethreadThread1of1ForFork0_thidvar0, salethreadThread1of1ForFork0_#in~arg.offset, salethreadThread1of1ForFork0_#res.offset] 1354#[L747-4, $Ultimate##0]don't care [130] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread1of1ForFork0_~arg.base_1 |v_salethreadThread1of1ForFork0_#in~arg.base_1|) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_1| v_salethreadThread1of1ForFork0_~arg.offset_1)) InVars {salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_1, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_1, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base] 1356#[L747-4, L721]don't care [131] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 1428#[L747-4, L722]don't care [133] L722-->L723: Formula: (= v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_~_numberOfSeatsSold~0] 1174#[L747-4, L723]don't care [117] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1180#[L723, L747-5]don't care [115] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 1394#[L723, L746-2]don't care [135] L723-->L724: Formula: (<= 14 v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_3) InVars {salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_3} OutVars{salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_3} AuxVars[] AssignedVars[] 1396#[L746-2, L724]don't care [89] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 1502#[L746-3, L724]don't care [138] L724-->L721-1: Formula: (= v_~stopSales~0_2 1) InVars {} OutVars{~stopSales~0=v_~stopSales~0_2} AuxVars[] AssignedVars[~stopSales~0] 1228#[L721-1, L746-3]don't care [134] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of1ForFork0_#res.base_1| 0) (= |v_salethreadThread1of1ForFork0_#res.offset_1| 0)) InVars {} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_1|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_#res.offset] 1624#[salethreadFINAL, L746-3]don't care [137] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1450#[L746-3, salethreadEXIT]don't care [110] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 1560#[L746-4, salethreadEXIT]don't care [84] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 1426#[L746-5, salethreadEXIT]don't care [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 1220#[L747, salethreadEXIT]don't care [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1184#[L747-1, salethreadEXIT]don't care [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 1550#[L747-2, salethreadEXIT]don't care [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 1364#[L747-3, salethreadEXIT]don't care [140] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1172#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [2023-09-17 12:11:03,740 INFO L750 eck$LassoCheckResult]: Loop: 1172#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [141] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1172#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [2023-09-17 12:11:03,742 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,743 INFO L85 PathProgramCache]: Analyzing trace with hash 1752223960, now seen corresponding path program 1 times [2023-09-17 12:11:03,743 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,743 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973994112] [2023-09-17 12:11:03,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:03,899 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2023-09-17 12:11:03,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:03,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973994112] [2023-09-17 12:11:03,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973994112] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:03,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:03,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-17 12:11:03,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859621771] [2023-09-17 12:11:03,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:03,900 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:03,901 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,901 INFO L85 PathProgramCache]: Analyzing trace with hash 172, now seen corresponding path program 2 times [2023-09-17 12:11:03,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1502295070] [2023-09-17 12:11:03,901 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,905 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:03,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,907 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:03,909 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:03,909 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-17 12:11:03,909 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-17 12:11:03,909 INFO L87 Difference]: Start difference. First operand 248 states and 489 transitions. cyclomatic complexity: 250 Second operand has 4 states, 4 states have (on average 10.75) internal successors, (43), 4 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:03,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:03,923 INFO L93 Difference]: Finished difference Result 218 states and 399 transitions. [2023-09-17 12:11:03,923 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 218 states and 399 transitions. [2023-09-17 12:11:03,925 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:03,926 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 218 states to 218 states and 399 transitions. [2023-09-17 12:11:03,926 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 154 [2023-09-17 12:11:03,926 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2023-09-17 12:11:03,926 INFO L73 IsDeterministic]: Start isDeterministic. Operand 218 states and 399 transitions. [2023-09-17 12:11:03,927 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:03,927 INFO L218 hiAutomatonCegarLoop]: Abstraction has 218 states and 399 transitions. [2023-09-17 12:11:03,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states and 399 transitions. [2023-09-17 12:11:03,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 218. [2023-09-17 12:11:03,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 218 states, 218 states have (on average 1.8302752293577982) internal successors, (399), 217 states have internal predecessors, (399), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:03,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 399 transitions. [2023-09-17 12:11:03,935 INFO L240 hiAutomatonCegarLoop]: Abstraction has 218 states and 399 transitions. [2023-09-17 12:11:03,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-09-17 12:11:03,938 INFO L428 stractBuchiCegarLoop]: Abstraction has 218 states and 399 transitions. [2023-09-17 12:11:03,939 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-09-17 12:11:03,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 218 states and 399 transitions. [2023-09-17 12:11:03,939 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:03,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:03,940 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:03,940 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:03,940 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:03,941 INFO L748 eck$LassoCheckResult]: Stem: 2005#[$Ultimate##0]don't care [99] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 2007#[L-1]don't care [107] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 2079#[L-1-1]don't care [121] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 1915#[L23]don't care [88] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 1917#[L23-1]don't care [94] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 2249#[L23-2]don't care [98] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 2183#[L23-3]don't care [127] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 2185#[L23-4]don't care [90] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 2029#[L23-5]don't care [101] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 2031#[L718]don't care [93] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 2191#[L719]don't care [78] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 2193#[L-1-2]don't care [123] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 2285#[L-1-3]don't care [125] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 2093#[L-1-4]don't care [111] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 2095#[L735]don't care [122] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 2187#[L735-1]don't care [128] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 2039#[L736]don't care [102] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 2041#[L736-1]don't care [126] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 1853#[L739]don't care [77] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 1855#[L742]don't care [106] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 2055#[L745]don't care [82] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 2207#[L746-5]don't care [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 1901#[L747]don't care [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1903#[L747-1]don't care [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 2099#[L747-2]don't care [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 2101#[L747-3]don't care [142] L747-3-->$Ultimate##0: Formula: (and (= |v_ULTIMATE.start_main_#t~pre2#1_6| v_salethreadThread1of1ForFork0_thidvar0_2) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread1of1ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_4|, salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_4, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_4, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_4|, salethreadThread1of1ForFork0_thidvar0=v_salethreadThread1of1ForFork0_thidvar0_2, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_4|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_6|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0, salethreadThread1of1ForFork0_#in~arg.base, salethreadThread1of1ForFork0_thidvar0, salethreadThread1of1ForFork0_#in~arg.offset, salethreadThread1of1ForFork0_#res.offset] 2033#[L747-4, $Ultimate##0]don't care [130] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread1of1ForFork0_~arg.base_1 |v_salethreadThread1of1ForFork0_#in~arg.base_1|) (= |v_salethreadThread1of1ForFork0_#in~arg.offset_1| v_salethreadThread1of1ForFork0_~arg.offset_1)) InVars {salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of1ForFork0_~arg.offset=v_salethreadThread1of1ForFork0_~arg.offset_1, salethreadThread1of1ForFork0_~arg.base=v_salethreadThread1of1ForFork0_~arg.base_1, salethreadThread1of1ForFork0_#in~arg.base=|v_salethreadThread1of1ForFork0_#in~arg.base_1|, salethreadThread1of1ForFork0_#in~arg.offset=|v_salethreadThread1of1ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_~arg.offset, salethreadThread1of1ForFork0_~arg.base] 2035#[L747-4, L721]don't care [131] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 2105#[L747-4, L722]don't care [133] L722-->L723: Formula: (= v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_~_numberOfSeatsSold~0] 1885#[L747-4, L723]don't care [117] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1887#[L723, L747-5]don't care [115] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 2067#[L723, L746-2]don't care [136] L723-->L728: Formula: (< v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_5 14) InVars {salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_5} OutVars{salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_5} AuxVars[] AssignedVars[] 1905#[L746-2, L728]don't care [89] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 1907#[L746-3, L728]don't care [139] L728-->L721-1: Formula: (= v_~numberOfSeatsSold~0_2 (+ v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_7 1)) InVars {salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_7} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_2, salethreadThread1of1ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of1ForFork0_~_numberOfSeatsSold~0_7} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 1935#[L721-1, L746-3]don't care [134] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of1ForFork0_#res.base_1| 0) (= |v_salethreadThread1of1ForFork0_#res.offset_1| 0)) InVars {} OutVars{salethreadThread1of1ForFork0_#res.base=|v_salethreadThread1of1ForFork0_#res.base_1|, salethreadThread1of1ForFork0_#res.offset=|v_salethreadThread1of1ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread1of1ForFork0_#res.base, salethreadThread1of1ForFork0_#res.offset] 2129#[salethreadFINAL, L746-3]don't care [137] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 2131#[L746-3, salethreadEXIT]don't care [110] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 2227#[L746-4, salethreadEXIT]don't care [84] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 2103#[L746-5, salethreadEXIT]don't care [103] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 1951#[L747, salethreadEXIT]don't care [87] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 1895#[L747-1, salethreadEXIT]don't care [112] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 2217#[L747-2, salethreadEXIT]don't care [113] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 2043#[L747-3, salethreadEXIT]don't care [140] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1883#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [2023-09-17 12:11:03,942 INFO L750 eck$LassoCheckResult]: Loop: 1883#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [141] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 1883#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT]don't care [2023-09-17 12:11:03,942 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1684793174, now seen corresponding path program 1 times [2023-09-17 12:11:03,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611397900] [2023-09-17 12:11:03,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,968 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:03,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,986 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:03,987 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,987 INFO L85 PathProgramCache]: Analyzing trace with hash 172, now seen corresponding path program 3 times [2023-09-17 12:11:03,987 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,987 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058939037] [2023-09-17 12:11:03,987 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,987 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:03,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,990 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:03,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:03,992 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:03,992 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:03,992 INFO L85 PathProgramCache]: Analyzing trace with hash 688980983, now seen corresponding path program 1 times [2023-09-17 12:11:03,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:03,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644560968] [2023-09-17 12:11:03,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:03,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:04,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:04,007 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:04,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:04,020 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:04,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:04,792 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:04,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:04,817 WARN L148 chiAutomizerObserver]: 1 thread instances were not sufficient, I will increase this number and restart the analysis [2023-09-17 12:11:04,826 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2023-09-17 12:11:04,829 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 64 places, 66 transitions, 144 flow [2023-09-17 12:11:04,839 INFO L124 PetriNetUnfolderBase]: 11/103 cut-off events. [2023-09-17 12:11:04,840 INFO L125 PetriNetUnfolderBase]: For 2/2 co-relation queries the response was YES. [2023-09-17 12:11:04,841 INFO L83 FinitePrefix]: Finished finitePrefix Result has 113 conditions, 103 events. 11/103 cut-off events. For 2/2 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 134 event pairs, 0 based on Foata normal form. 0/90 useless extension candidates. Maximal degree in co-relation 71. Up to 6 conditions per place. [2023-09-17 12:11:04,841 INFO L82 GeneralOperation]: Start removeDead. Operand has 64 places, 66 transitions, 144 flow [2023-09-17 12:11:04,843 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 64 places, 66 transitions, 144 flow [2023-09-17 12:11:04,843 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-09-17 12:11:04,843 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-09-17 12:11:04,843 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-09-17 12:11:04,843 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-09-17 12:11:04,843 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-09-17 12:11:04,843 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-09-17 12:11:04,843 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-09-17 12:11:04,843 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-09-17 12:11:04,843 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:06,091 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:06,092 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:06,092 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:06,093 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:06,093 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:06,093 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-09-17 12:11:06,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:06,606 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:06,607 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:06,607 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:06,608 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:06,608 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:06,610 INFO L748 eck$LassoCheckResult]: Stem: SleepPredicate [underlying: 67#[$Ultimate##0]don't care, sleep set: []] [165] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] SleepPredicate [underlying: 70#[L-1]don't care, sleep set: []] [173] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 72#[L-1-1]don't care, sleep set: []] [187] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 74#[L23]don't care, sleep set: []] [154] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 76#[L23-1]don't care, sleep set: []] [160] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 78#[L23-2]don't care, sleep set: []] [164] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 80#[L23-3]don't care, sleep set: []] [193] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 82#[L23-4]don't care, sleep set: []] [156] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 84#[L23-5]don't care, sleep set: []] [167] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 86#[L718]don't care, sleep set: []] [159] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 88#[L719]don't care, sleep set: []] [144] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 90#[L-1-2]don't care, sleep set: []] [189] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] SleepPredicate [underlying: 92#[L-1-3]don't care, sleep set: []] [191] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] SleepPredicate [underlying: 94#[L-1-4]don't care, sleep set: []] [177] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 96#[L735]don't care, sleep set: []] [188] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] SleepPredicate [underlying: 98#[L735-1]don't care, sleep set: []] [194] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] SleepPredicate [underlying: 100#[L736]don't care, sleep set: []] [168] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 102#[L736-1]don't care, sleep set: []] [192] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 104#[L739]don't care, sleep set: []] [143] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 106#[L742]don't care, sleep set: []] [172] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 108#[L745]don't care, sleep set: []] [148] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 110#[L746-5]don't care, sleep set: []] [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 112#[L747]don't care, sleep set: []] [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 116#[L747-1]don't care, sleep set: []] [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 120#[L747-2]don't care, sleep set: []] [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 126#[L747-3]don't care, sleep set: []] [218] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] SleepPredicate [underlying: 132#[L747-4, $Ultimate##0]don't care, sleep set: []] [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 136#[$Ultimate##0, L747-5]don't care, sleep set: [salethreadThread1of2ForFork0]] [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 142#[L746-2, $Ultimate##0]don't care, sleep set: [salethreadThread1of2ForFork0]] [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 152#[L746-3, $Ultimate##0]don't care, sleep set: [salethreadThread1of2ForFork0]] [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 166#[$Ultimate##0, L746-4]don't care, sleep set: [salethreadThread1of2ForFork0]] [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 184#[L746-5, $Ultimate##0]don't care, sleep set: [salethreadThread1of2ForFork0]] [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 202#[$Ultimate##0, L747]don't care, sleep set: [salethreadThread1of2ForFork0]] [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 222#[$Ultimate##0, L747-1]don't care, sleep set: [salethreadThread1of2ForFork0]] [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 244#[$Ultimate##0, L747-2]don't care, sleep set: [salethreadThread1of2ForFork0]] [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 272#[L747-3, $Ultimate##0]don't care, sleep set: [salethreadThread1of2ForFork0]] [196] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_1| v_salethreadThread1of2ForFork0_~arg.offset_1) (= v_salethreadThread1of2ForFork0_~arg.base_1 |v_salethreadThread1of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_1, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_1, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset] SleepPredicate [underlying: 306#[L721, L747-3]don't care, sleep set: []] [198] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 350#[L747-3, L721-1]don't care, sleep set: [salethreadThread2of2ForFork0]] [200] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_1|, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_#res.base] SleepPredicate [underlying: 398#[L747-3, salethreadFINAL]don't care, sleep set: [salethreadThread2of2ForFork0]] [203] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 458#[L747-3, salethreadEXIT]don't care, sleep set: [salethreadThread2of2ForFork0]] [219] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] SleepPredicate [underlying: 526#[salethreadEXIT, L747-4, $Ultimate##0]don't care, sleep set: []] [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 614#[$Ultimate##0, salethreadEXIT, L747-5]don't care, sleep set: [salethreadThread2of2ForFork0]] [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 734#[salethreadEXIT, L746-2, $Ultimate##0]don't care, sleep set: [salethreadThread2of2ForFork0]] [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 880#[$Ultimate##0, salethreadEXIT, L746-3]don't care, sleep set: [salethreadThread2of2ForFork0]] [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 1050#[salethreadEXIT, L746-4, $Ultimate##0]don't care, sleep set: [salethreadThread2of2ForFork0]] [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 1234#[$Ultimate##0, salethreadEXIT, L746-5]don't care, sleep set: [salethreadThread2of2ForFork0]] [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 1446#[salethreadEXIT, L747, $Ultimate##0]don't care, sleep set: [salethreadThread2of2ForFork0]] [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 1698#[$Ultimate##0, salethreadEXIT, L747-1]don't care, sleep set: [salethreadThread2of2ForFork0]] [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 1998#[salethreadEXIT, L747-2, $Ultimate##0]don't care, sleep set: [salethreadThread2of2ForFork0]] [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 2338#[$Ultimate##0, salethreadEXIT, L747-3]don't care, sleep set: [salethreadThread2of2ForFork0]] [206] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_1| v_salethreadThread2of2ForFork0_~arg.offset_1) (= v_salethreadThread2of2ForFork0_~arg.base_1 |v_salethreadThread2of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_1, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_~arg.offset] SleepPredicate [underlying: 2700#[salethreadEXIT, L721, L747-3]don't care, sleep set: []] [208] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 3044#[salethreadEXIT, L747-3, L721-1]don't care, sleep set: [ULTIMATE.start]] [210] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread2of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_1|, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_#res.base] SleepPredicate [underlying: 3340#[salethreadEXIT, salethreadFINAL, L747-3]don't care, sleep set: [ULTIMATE.start]] [213] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 3568#[salethreadEXIT, salethreadEXIT, L747-3]don't care, sleep set: [ULTIMATE.start]] [216] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 3720#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care, sleep set: []] [2023-09-17 12:11:06,610 INFO L750 eck$LassoCheckResult]: Loop: SleepPredicate [underlying: 3720#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care, sleep set: []] [217] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 3720#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care, sleep set: []] [2023-09-17 12:11:06,611 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:06,611 INFO L85 PathProgramCache]: Analyzing trace with hash -60927569, now seen corresponding path program 1 times [2023-09-17 12:11:06,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:06,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070421120] [2023-09-17 12:11:06,612 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:06,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:06,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:06,700 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2023-09-17 12:11:06,700 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:06,701 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1070421120] [2023-09-17 12:11:06,701 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1070421120] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:06,701 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:06,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-09-17 12:11:06,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [170038648] [2023-09-17 12:11:06,701 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:06,701 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:06,702 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:06,702 INFO L85 PathProgramCache]: Analyzing trace with hash 248, now seen corresponding path program 1 times [2023-09-17 12:11:06,702 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:06,702 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475936117] [2023-09-17 12:11:06,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:06,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:06,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:06,705 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:06,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:06,706 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:06,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:06,708 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-09-17 12:11:06,709 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-09-17 12:11:06,709 INFO L87 Difference]: Start difference. First operand null Second operand has 3 states, 3 states have (on average 16.666666666666668) internal successors, (50), 3 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:07,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:07,512 INFO L93 Difference]: Finished difference Result 13142 states and 39971 transitions. [2023-09-17 12:11:07,513 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13142 states and 39971 transitions. [2023-09-17 12:11:07,704 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2023-09-17 12:11:07,752 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13142 states to 7268 states and 21951 transitions. [2023-09-17 12:11:07,753 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1369 [2023-09-17 12:11:07,762 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2482 [2023-09-17 12:11:07,762 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7268 states and 21951 transitions. [2023-09-17 12:11:07,776 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:07,776 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7268 states and 21951 transitions. [2023-09-17 12:11:07,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7268 states and 21951 transitions. [2023-09-17 12:11:07,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7268 to 5293. [2023-09-17 12:11:07,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5293 states, 5293 states have (on average 3.077649726053278) internal successors, (16290), 5292 states have internal predecessors, (16290), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:07,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5293 states to 5293 states and 16290 transitions. [2023-09-17 12:11:07,906 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5293 states and 16290 transitions. [2023-09-17 12:11:07,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-09-17 12:11:07,909 INFO L428 stractBuchiCegarLoop]: Abstraction has 5293 states and 16290 transitions. [2023-09-17 12:11:07,909 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-09-17 12:11:07,909 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5293 states and 16290 transitions. [2023-09-17 12:11:07,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:07,930 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:07,930 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:07,931 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:07,931 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:07,932 INFO L748 eck$LassoCheckResult]: Stem: 18968#[$Ultimate##0]don't care [165] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 18970#[L-1]don't care [173] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 21888#[L-1-1]don't care [187] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 19960#[L23]don't care [154] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 19528#[L23-1]don't care [160] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 19530#[L23-2]don't care [164] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 24838#[L23-3]don't care [193] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 22648#[L23-4]don't care [156] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 17480#[L23-5]don't care [167] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 17482#[L718]don't care [159] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 21494#[L719]don't care [144] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 21496#[L-1-2]don't care [189] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 23738#[L-1-3]don't care [191] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 17654#[L-1-4]don't care [177] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 17656#[L735]don't care [188] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 17904#[L735-1]don't care [194] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 17906#[L736]don't care [168] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 19028#[L736-1]don't care [192] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 23310#[L739]don't care [143] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 20230#[L742]don't care [172] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 20232#[L745]don't care [148] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 20454#[L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 22984#[L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 20274#[L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 20276#[L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 24084#[L747-3]don't care [218] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] 21548#[L747-4, $Ultimate##0]don't care [196] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_1| v_salethreadThread1of2ForFork0_~arg.offset_1) (= v_salethreadThread1of2ForFork0_~arg.base_1 |v_salethreadThread1of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_1, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_1, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset] 17294#[L721, L747-4]don't care [197] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 17298#[L747-4, L722]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 24688#[L722, L747-5]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 21478#[L746-2, L722]don't care [199] L722-->L723: Formula: (= v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~_numberOfSeatsSold~0] 18544#[L746-2, L723]don't care [201] L723-->L724: Formula: (<= 14 v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_3) InVars {salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_3} OutVars{salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_3} AuxVars[] AssignedVars[] 21020#[L746-2, L724]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 22894#[L746-3, L724]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 20876#[L724, L746-4]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 19838#[L746-5, L724]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 19840#[L724, L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 17916#[L724, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 17918#[L724, L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 22212#[L747-3, L724]don't care [219] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] 22464#[$Ultimate##0, L747-4, L724]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 25206#[L724, L747-5, $Ultimate##0]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 25194#[L724, $Ultimate##0, L746-2]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 25196#[$Ultimate##0, L746-3, L724]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 26314#[L724, L746-4, $Ultimate##0]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 26282#[L724, $Ultimate##0, L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 26230#[$Ultimate##0, L747, L724]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 26154#[L724, L747-1, $Ultimate##0]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 26156#[L724, $Ultimate##0, L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 26310#[$Ultimate##0, L747-3, L724]don't care [216] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 26268#[L724, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [204] L724-->L721-1: Formula: (= v_~stopSales~0_2 1) InVars {} OutVars{~stopSales~0=v_~stopSales~0_2} AuxVars[] AssignedVars[~stopSales~0] 26270#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1, $Ultimate##0]don't care [200] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_1|, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_#res.base] 27496#[salethreadFINAL, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [203] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 21004#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [206] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_1| v_salethreadThread2of2ForFork0_~arg.offset_1) (= v_salethreadThread2of2ForFork0_~arg.base_1 |v_salethreadThread2of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_1, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_~arg.offset] 21000#[salethreadEXIT, L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [208] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] 21668#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1]don't care [210] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread2of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_1|, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_#res.base] 19002#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadFINAL]don't care [213] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 19004#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:07,933 INFO L750 eck$LassoCheckResult]: Loop: 19004#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [217] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 19004#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:07,933 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:07,933 INFO L85 PathProgramCache]: Analyzing trace with hash 647298552, now seen corresponding path program 1 times [2023-09-17 12:11:07,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:07,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1490989393] [2023-09-17 12:11:07,933 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:07,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:07,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:08,023 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2023-09-17 12:11:08,023 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:08,023 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1490989393] [2023-09-17 12:11:08,024 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1490989393] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:08,024 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:08,024 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-17 12:11:08,024 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1458596915] [2023-09-17 12:11:08,024 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:08,024 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:08,024 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:08,025 INFO L85 PathProgramCache]: Analyzing trace with hash 248, now seen corresponding path program 2 times [2023-09-17 12:11:08,025 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:08,025 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1883324412] [2023-09-17 12:11:08,025 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:08,025 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:08,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:08,028 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:08,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:08,029 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:08,046 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:08,046 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-17 12:11:08,047 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-17 12:11:08,047 INFO L87 Difference]: Start difference. First operand 5293 states and 16290 transitions. cyclomatic complexity: 11204 Second operand has 4 states, 4 states have (on average 12.5) internal successors, (50), 4 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:08,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:08,121 INFO L93 Difference]: Finished difference Result 6077 states and 17524 transitions. [2023-09-17 12:11:08,121 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6077 states and 17524 transitions. [2023-09-17 12:11:08,163 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2023-09-17 12:11:08,207 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6077 states to 6077 states and 17524 transitions. [2023-09-17 12:11:08,207 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2133 [2023-09-17 12:11:08,214 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2133 [2023-09-17 12:11:08,214 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6077 states and 17524 transitions. [2023-09-17 12:11:08,225 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:08,226 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6077 states and 17524 transitions. [2023-09-17 12:11:08,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6077 states and 17524 transitions. [2023-09-17 12:11:08,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6077 to 4774. [2023-09-17 12:11:08,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4774 states, 4774 states have (on average 2.949099287808965) internal successors, (14079), 4773 states have internal predecessors, (14079), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:08,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4774 states to 4774 states and 14079 transitions. [2023-09-17 12:11:08,359 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4774 states and 14079 transitions. [2023-09-17 12:11:08,360 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-09-17 12:11:08,361 INFO L428 stractBuchiCegarLoop]: Abstraction has 4774 states and 14079 transitions. [2023-09-17 12:11:08,362 INFO L335 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2023-09-17 12:11:08,362 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4774 states and 14079 transitions. [2023-09-17 12:11:08,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:08,383 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:08,383 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:08,385 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:08,385 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:08,388 INFO L748 eck$LassoCheckResult]: Stem: 35378#[$Ultimate##0]don't care [165] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 35380#[L-1]don't care [173] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 37926#[L-1-1]don't care [187] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 36280#[L23]don't care [154] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 35886#[L23-1]don't care [160] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 35888#[L23-2]don't care [164] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 40426#[L23-3]don't care [193] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 38594#[L23-4]don't care [156] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 34118#[L23-5]don't care [167] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 34120#[L718]don't care [159] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 37596#[L719]don't care [144] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 37598#[L-1-2]don't care [189] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 39528#[L-1-3]don't care [191] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 34266#[L-1-4]don't care [177] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 34268#[L735]don't care [188] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 34474#[L735-1]don't care [194] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 34476#[L736]don't care [168] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 35434#[L736-1]don't care [192] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 39170#[L739]don't care [143] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 36526#[L742]don't care [172] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 36528#[L745]don't care [148] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 36716#[L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 38898#[L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 36564#[L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 36566#[L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 39836#[L747-3]don't care [218] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] 37648#[L747-4, $Ultimate##0]don't care [196] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_1| v_salethreadThread1of2ForFork0_~arg.offset_1) (= v_salethreadThread1of2ForFork0_~arg.base_1 |v_salethreadThread1of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_1, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_1, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset] 33928#[L721, L747-4]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 33932#[L721, L747-5]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 36000#[L721, L746-2]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 40360#[L721, L746-3]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 37232#[L721, L746-4]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 37230#[L721, L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 34592#[L721, L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 34590#[L721, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 35480#[L721, L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 33864#[L721, L747-3]don't care [219] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] 33862#[L721, L747-4, $Ultimate##0]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 34304#[L721, $Ultimate##0, L747-5]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 40676#[L721, L746-2, $Ultimate##0]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 40872#[L721, $Ultimate##0, L746-3]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 40870#[L721, L746-4, $Ultimate##0]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 40868#[L721, $Ultimate##0, L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 40864#[L721, L747, $Ultimate##0]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 40858#[L721, $Ultimate##0, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 40852#[L721, L747-2, $Ultimate##0]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 40842#[L721, $Ultimate##0, L747-3]don't care [216] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 40844#[L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [206] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_1| v_salethreadThread2of2ForFork0_~arg.offset_1) (= v_salethreadThread2of2ForFork0_~arg.base_1 |v_salethreadThread2of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_1, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_~arg.offset] 37624#[L721, L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [207] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 35650#[L721, L722, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [209] L722-->L723: Formula: (= v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1, ~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~_numberOfSeatsSold~0] 35952#[L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L723]don't care [211] L723-->L724: Formula: (<= 14 v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3) InVars {salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3} AuxVars[] AssignedVars[] 42288#[L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L724]don't care [214] L724-->L721-1: Formula: (= v_~stopSales~0_2 1) InVars {} OutVars{~stopSales~0=v_~stopSales~0_2} AuxVars[] AssignedVars[~stopSales~0] 35076#[L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1]don't care [210] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread2of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_1|, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_#res.base] 40162#[L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadFINAL]don't care [213] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 34486#[L721, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [198] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] 35988#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1]don't care [200] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_1|, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_#res.base] 35414#[salethreadEXIT, salethreadFINAL, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [203] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 35406#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:08,388 INFO L750 eck$LassoCheckResult]: Loop: 35406#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [217] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 35406#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:08,388 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:08,388 INFO L85 PathProgramCache]: Analyzing trace with hash -963477740, now seen corresponding path program 1 times [2023-09-17 12:11:08,388 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:08,388 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016429374] [2023-09-17 12:11:08,388 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:08,389 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:08,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:08,476 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2023-09-17 12:11:08,477 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:08,477 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016429374] [2023-09-17 12:11:08,477 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2016429374] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:08,477 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:08,477 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-17 12:11:08,477 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1532393282] [2023-09-17 12:11:08,478 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:08,478 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:08,478 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:08,478 INFO L85 PathProgramCache]: Analyzing trace with hash 248, now seen corresponding path program 3 times [2023-09-17 12:11:08,478 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:08,478 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989331685] [2023-09-17 12:11:08,479 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:08,479 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:08,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:08,481 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:08,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:08,483 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:08,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:08,485 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-17 12:11:08,485 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-17 12:11:08,485 INFO L87 Difference]: Start difference. First operand 4774 states and 14079 transitions. cyclomatic complexity: 9492 Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:08,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:08,534 INFO L93 Difference]: Finished difference Result 4755 states and 13435 transitions. [2023-09-17 12:11:08,534 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4755 states and 13435 transitions. [2023-09-17 12:11:08,614 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2023-09-17 12:11:08,643 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4755 states to 4755 states and 13435 transitions. [2023-09-17 12:11:08,644 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1705 [2023-09-17 12:11:08,649 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1705 [2023-09-17 12:11:08,649 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4755 states and 13435 transitions. [2023-09-17 12:11:08,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:08,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4755 states and 13435 transitions. [2023-09-17 12:11:08,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4755 states and 13435 transitions. [2023-09-17 12:11:08,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4755 to 4198. [2023-09-17 12:11:08,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4198 states, 4198 states have (on average 2.8525488327775133) internal successors, (11975), 4197 states have internal predecessors, (11975), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:08,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4198 states to 4198 states and 11975 transitions. [2023-09-17 12:11:08,756 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4198 states and 11975 transitions. [2023-09-17 12:11:08,757 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2023-09-17 12:11:08,757 INFO L428 stractBuchiCegarLoop]: Abstraction has 4198 states and 11975 transitions. [2023-09-17 12:11:08,758 INFO L335 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2023-09-17 12:11:08,758 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4198 states and 11975 transitions. [2023-09-17 12:11:08,774 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:08,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:08,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:08,775 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:08,775 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:08,777 INFO L748 eck$LassoCheckResult]: Stem: 49544#[$Ultimate##0]don't care [165] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 49546#[L-1]don't care [173] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 51842#[L-1-1]don't care [187] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 50372#[L23]don't care [154] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 50010#[L23-1]don't care [160] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 50012#[L23-2]don't care [164] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 54070#[L23-3]don't care [193] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 52402#[L23-4]don't care [156] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 48388#[L23-5]don't care [167] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 48390#[L718]don't care [159] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 51552#[L719]don't care [144] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 51554#[L-1-2]don't care [189] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 53274#[L-1-3]don't care [191] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 48538#[L-1-4]don't care [177] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 48540#[L735]don't care [188] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 48740#[L735-1]don't care [194] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 48742#[L736]don't care [168] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 49600#[L736-1]don't care [192] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 52956#[L739]don't care [143] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 50588#[L742]don't care [172] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 50590#[L745]don't care [148] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 50766#[L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 52678#[L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 50620#[L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 50622#[L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 53548#[L747-3]don't care [218] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] 51576#[L747-4, $Ultimate##0]don't care [196] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_1| v_salethreadThread1of2ForFork0_~arg.offset_1) (= v_salethreadThread1of2ForFork0_~arg.base_1 |v_salethreadThread1of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_1, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_1, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset] 48220#[L721, L747-4]don't care [197] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 48222#[L747-4, L722]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 53974#[L722, L747-5]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 51538#[L746-2, L722]don't care [199] L722-->L723: Formula: (= v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~_numberOfSeatsSold~0] 49196#[L746-2, L723]don't care [202] L723-->L728: Formula: (< v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5 14) InVars {salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5} OutVars{salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5} AuxVars[] AssignedVars[] 51192#[L746-2, L728]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 52608#[L746-3, L728]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 49308#[L728, L746-4]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 51508#[L746-5, L728]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 51510#[L728, L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 53054#[L728, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 51144#[L728, L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 51140#[L747-3, L728]don't care [219] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] 52702#[L747-4, L728, $Ultimate##0]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 54376#[$Ultimate##0, L747-5, L728]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 54406#[L728, L746-2, $Ultimate##0]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 54402#[$Ultimate##0, L728, L746-3]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 54404#[L746-4, L728, $Ultimate##0]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 54318#[$Ultimate##0, L728, L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 54314#[L747, L728, $Ultimate##0]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 54316#[$Ultimate##0, L728, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 54336#[L728, L747-2, $Ultimate##0]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 54332#[$Ultimate##0, L728, L747-3]don't care [216] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 54328#[L728, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [205] L728-->L721-1: Formula: (= (+ v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7 1) v_~numberOfSeatsSold~0_2) InVars {salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_2, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 52924#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1, $Ultimate##0]don't care [200] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_1|, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_#res.base] 52926#[salethreadFINAL, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [203] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 51182#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [206] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_1| v_salethreadThread2of2ForFork0_~arg.offset_1) (= v_salethreadThread2of2ForFork0_~arg.base_1 |v_salethreadThread2of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_1, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_~arg.offset] 51180#[salethreadEXIT, L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [207] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 48832#[salethreadEXIT, L722, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [209] L722-->L723: Formula: (= v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1, ~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~_numberOfSeatsSold~0] 50548#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L723]don't care [211] L723-->L724: Formula: (<= 14 v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3) InVars {salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_3} AuxVars[] AssignedVars[] 56176#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L724]don't care [214] L724-->L721-1: Formula: (= v_~stopSales~0_2 1) InVars {} OutVars{~stopSales~0=v_~stopSales~0_2} AuxVars[] AssignedVars[~stopSales~0] 51660#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1]don't care [210] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread2of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_1|, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_#res.base] 49572#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadFINAL]don't care [213] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 49574#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:08,777 INFO L750 eck$LassoCheckResult]: Loop: 49574#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [217] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 49574#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:08,777 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:08,777 INFO L85 PathProgramCache]: Analyzing trace with hash -264808093, now seen corresponding path program 1 times [2023-09-17 12:11:08,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:08,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539108498] [2023-09-17 12:11:08,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:08,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:08,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:08,856 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2023-09-17 12:11:08,857 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:08,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539108498] [2023-09-17 12:11:08,857 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1539108498] provided 0 perfect and 1 imperfect interpolant sequences [2023-09-17 12:11:08,857 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1550157136] [2023-09-17 12:11:08,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:08,857 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2023-09-17 12:11:08,858 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2023-09-17 12:11:08,920 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2023-09-17 12:11:08,962 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2023-09-17 12:11:09,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:09,032 INFO L262 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 5 conjunts are in the unsatisfiable core [2023-09-17 12:11:09,034 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2023-09-17 12:11:09,096 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2023-09-17 12:11:09,096 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2023-09-17 12:11:09,163 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2023-09-17 12:11:09,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1550157136] provided 0 perfect and 2 imperfect interpolant sequences [2023-09-17 12:11:09,164 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2023-09-17 12:11:09,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2023-09-17 12:11:09,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1334788115] [2023-09-17 12:11:09,164 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2023-09-17 12:11:09,165 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:09,165 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:09,165 INFO L85 PathProgramCache]: Analyzing trace with hash 248, now seen corresponding path program 4 times [2023-09-17 12:11:09,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:09,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254722525] [2023-09-17 12:11:09,165 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:09,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:09,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,168 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:09,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,170 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:09,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:09,172 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2023-09-17 12:11:09,172 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2023-09-17 12:11:09,173 INFO L87 Difference]: Start difference. First operand 4198 states and 11975 transitions. cyclomatic complexity: 7938 Second operand has 12 states, 12 states have (on average 9.25) internal successors, (111), 12 states have internal predecessors, (111), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:09,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:11:09,291 INFO L93 Difference]: Finished difference Result 4780 states and 13090 transitions. [2023-09-17 12:11:09,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4780 states and 13090 transitions. [2023-09-17 12:11:09,317 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2023-09-17 12:11:09,338 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4780 states to 4780 states and 13090 transitions. [2023-09-17 12:11:09,338 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1756 [2023-09-17 12:11:09,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1756 [2023-09-17 12:11:09,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4780 states and 13090 transitions. [2023-09-17 12:11:09,351 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:11:09,351 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4780 states and 13090 transitions. [2023-09-17 12:11:09,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4780 states and 13090 transitions. [2023-09-17 12:11:09,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4780 to 3625. [2023-09-17 12:11:09,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3625 states, 3625 states have (on average 2.7820689655172415) internal successors, (10085), 3624 states have internal predecessors, (10085), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:11:09,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3625 states to 3625 states and 10085 transitions. [2023-09-17 12:11:09,439 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3625 states and 10085 transitions. [2023-09-17 12:11:09,439 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2023-09-17 12:11:09,440 INFO L428 stractBuchiCegarLoop]: Abstraction has 3625 states and 10085 transitions. [2023-09-17 12:11:09,441 INFO L335 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2023-09-17 12:11:09,441 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3625 states and 10085 transitions. [2023-09-17 12:11:09,456 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:09,456 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:09,456 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:09,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:09,457 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:09,458 INFO L748 eck$LassoCheckResult]: Stem: 63005#[$Ultimate##0]don't care [165] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 63007#[L-1]don't care [173] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 65149#[L-1-1]don't care [187] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 63743#[L23]don't care [154] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 63431#[L23-1]don't care [160] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 63433#[L23-2]don't care [164] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 67209#[L23-3]don't care [193] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 65681#[L23-4]don't care [156] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 61947#[L23-5]don't care [167] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 61949#[L718]don't care [159] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 64875#[L719]don't care [144] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 64877#[L-1-2]don't care [189] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 66501#[L-1-3]don't care [191] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 62091#[L-1-4]don't care [177] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 62093#[L735]don't care [188] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 62273#[L735-1]don't care [194] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 62275#[L736]don't care [168] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 63061#[L736-1]don't care [192] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 66189#[L739]don't care [143] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 63943#[L742]don't care [172] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 63945#[L745]don't care [148] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 64129#[L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 65949#[L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 63985#[L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 63987#[L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 66743#[L747-3]don't care [218] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread1of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_12|) (= |v_salethreadThread1of2ForFork0_#in~arg.base_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_4|, salethreadThread1of2ForFork0_thidvar0=v_salethreadThread1of2ForFork0_thidvar0_2, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_4|, salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_4|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_4, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_4, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_12|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_thidvar0, salethreadThread1of2ForFork0_#in~arg.base, salethreadThread1of2ForFork0_#in~arg.offset, salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0, salethreadThread1of2ForFork0_#res.base] 64913#[L747-4, $Ultimate##0]don't care [196] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of2ForFork0_#in~arg.offset_1| v_salethreadThread1of2ForFork0_~arg.offset_1) (= v_salethreadThread1of2ForFork0_~arg.base_1 |v_salethreadThread1of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} OutVars{salethreadThread1of2ForFork0_#in~arg.offset=|v_salethreadThread1of2ForFork0_#in~arg.offset_1|, salethreadThread1of2ForFork0_~arg.base=v_salethreadThread1of2ForFork0_~arg.base_1, salethreadThread1of2ForFork0_~arg.offset=v_salethreadThread1of2ForFork0_~arg.offset_1, salethreadThread1of2ForFork0_#in~arg.base=|v_salethreadThread1of2ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~arg.base, salethreadThread1of2ForFork0_~arg.offset] 61787#[L721, L747-4]don't care [197] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 61789#[L747-4, L722]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 67119#[L722, L747-5]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 64859#[L746-2, L722]don't care [199] L722-->L723: Formula: (= v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_~_numberOfSeatsSold~0] 62693#[L746-2, L723]don't care [202] L723-->L728: Formula: (< v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5 14) InVars {salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5} OutVars{salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_5} AuxVars[] AssignedVars[] 64527#[L746-2, L728]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 65885#[L746-3, L728]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 62807#[L728, L746-4]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 64831#[L746-5, L728]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 64827#[L728, L747]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 66287#[L728, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 64487#[L728, L747-2]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 64489#[L747-3, L728]don't care [219] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_4| 0) (= v_salethreadThread2of2ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_14|) (= 0 |v_salethreadThread2of2ForFork0_#in~arg.base_4|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} OutVars{salethreadThread2of2ForFork0_thidvar0=v_salethreadThread2of2ForFork0_thidvar0_2, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_4|, salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_4|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_4, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_4|, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_4|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_14|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_thidvar0, salethreadThread2of2ForFork0_#in~arg.base, salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_#in~arg.offset, salethreadThread2of2ForFork0_~_numberOfSeatsSold~0, salethreadThread2of2ForFork0_#res.base, salethreadThread2of2ForFork0_~arg.offset] 65959#[L747-4, L728, $Ultimate##0]don't care [183] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 67451#[$Ultimate##0, L747-5, L728]don't care [181] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 67689#[L728, L746-2, $Ultimate##0]don't care [155] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 67583#[$Ultimate##0, L728, L746-3]don't care [176] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 67585#[L746-4, L728, $Ultimate##0]don't care [150] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 67605#[$Ultimate##0, L728, L746-5]don't care [169] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 67607#[L747, L728, $Ultimate##0]don't care [153] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 67699#[$Ultimate##0, L728, L747-1]don't care [178] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 67497#[L728, L747-2, $Ultimate##0]don't care [179] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 67455#[$Ultimate##0, L728, L747-3]don't care [216] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 67457#[L728, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [205] L728-->L721-1: Formula: (= (+ v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7 1) v_~numberOfSeatsSold~0_2) InVars {salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_2, salethreadThread1of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of2ForFork0_~_numberOfSeatsSold~0_7} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 66153#[ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1, $Ultimate##0]don't care [200] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of2ForFork0_#res.offset=|v_salethreadThread1of2ForFork0_#res.offset_1|, salethreadThread1of2ForFork0_#res.base=|v_salethreadThread1of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread1of2ForFork0_#res.offset, salethreadThread1of2ForFork0_#res.base] 66155#[salethreadFINAL, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [203] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 64513#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, $Ultimate##0]don't care [206] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread2of2ForFork0_#in~arg.offset_1| v_salethreadThread2of2ForFork0_~arg.offset_1) (= v_salethreadThread2of2ForFork0_~arg.base_1 |v_salethreadThread2of2ForFork0_#in~arg.base_1|)) InVars {salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of2ForFork0_#in~arg.offset=|v_salethreadThread2of2ForFork0_#in~arg.offset_1|, salethreadThread2of2ForFork0_~arg.base=v_salethreadThread2of2ForFork0_~arg.base_1, salethreadThread2of2ForFork0_#in~arg.base=|v_salethreadThread2of2ForFork0_#in~arg.base_1|, salethreadThread2of2ForFork0_~arg.offset=v_salethreadThread2of2ForFork0_~arg.offset_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~arg.base, salethreadThread2of2ForFork0_~arg.offset] 64511#[salethreadEXIT, L721, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [207] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 62363#[salethreadEXIT, L722, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [209] L722-->L723: Formula: (= v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_1, ~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_~_numberOfSeatsSold~0] 61683#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L723]don't care [212] L723-->L728: Formula: (< v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_5 14) InVars {salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_5} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_5} AuxVars[] AssignedVars[] 63707#[salethreadEXIT, L728, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [215] L728-->L721-1: Formula: (= (+ v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_7 1) v_~numberOfSeatsSold~0_2) InVars {salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_7} OutVars{salethreadThread2of2ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of2ForFork0_~_numberOfSeatsSold~0_7, ~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_2} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 64985#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, L721-1]don't care [210] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of2ForFork0_#res.offset_1| 0) (= |v_salethreadThread2of2ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread2of2ForFork0_#res.offset=|v_salethreadThread2of2ForFork0_#res.offset_1|, salethreadThread2of2ForFork0_#res.base=|v_salethreadThread2of2ForFork0_#res.base_1|} AuxVars[] AssignedVars[salethreadThread2of2ForFork0_#res.offset, salethreadThread2of2ForFork0_#res.base] 63035#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadFINAL]don't care [213] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 63033#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:09,458 INFO L750 eck$LassoCheckResult]: Loop: 63033#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [217] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 63033#[salethreadEXIT, salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES]don't care [2023-09-17 12:11:09,458 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:09,459 INFO L85 PathProgramCache]: Analyzing trace with hash -264777341, now seen corresponding path program 1 times [2023-09-17 12:11:09,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:09,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1814741458] [2023-09-17 12:11:09,459 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:09,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:09,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,471 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:09,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,485 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:09,485 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:09,486 INFO L85 PathProgramCache]: Analyzing trace with hash 248, now seen corresponding path program 5 times [2023-09-17 12:11:09,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:09,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949366719] [2023-09-17 12:11:09,486 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:09,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:09,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,488 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:09,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,490 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:09,490 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:09,491 INFO L85 PathProgramCache]: Analyzing trace with hash 381837238, now seen corresponding path program 1 times [2023-09-17 12:11:09,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:09,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031974177] [2023-09-17 12:11:09,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:09,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:09,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,502 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:09,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:09,515 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:10,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:10,559 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:10,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:10,581 WARN L148 chiAutomizerObserver]: 2 thread instances were not sufficient, I will increase this number and restart the analysis [2023-09-17 12:11:10,609 INFO L144 ThreadInstanceAdder]: Constructed 0 joinOtherThreadTransitions. [2023-09-17 12:11:10,615 INFO L73 FinitePrefix]: Start finitePrefix. Operand has 75 places, 77 transitions, 175 flow [2023-09-17 12:11:10,648 INFO L124 PetriNetUnfolderBase]: 15/135 cut-off events. [2023-09-17 12:11:10,648 INFO L125 PetriNetUnfolderBase]: For 7/7 co-relation queries the response was YES. [2023-09-17 12:11:10,649 INFO L83 FinitePrefix]: Finished finitePrefix Result has 151 conditions, 135 events. 15/135 cut-off events. For 7/7 co-relation queries the response was YES. Maximal size of possible extension queue 4. Compared 189 event pairs, 0 based on Foata normal form. 0/117 useless extension candidates. Maximal degree in co-relation 106. Up to 8 conditions per place. [2023-09-17 12:11:10,649 INFO L82 GeneralOperation]: Start removeDead. Operand has 75 places, 77 transitions, 175 flow [2023-09-17 12:11:10,651 INFO L88 GeneralOperation]: Finished RemoveDead, result has has 75 places, 77 transitions, 175 flow [2023-09-17 12:11:10,651 INFO L303 stractBuchiCegarLoop]: Interprodecural is true [2023-09-17 12:11:10,651 INFO L304 stractBuchiCegarLoop]: Hoare is false [2023-09-17 12:11:10,652 INFO L305 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2023-09-17 12:11:10,652 INFO L306 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2023-09-17 12:11:10,652 INFO L307 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2023-09-17 12:11:10,652 INFO L308 stractBuchiCegarLoop]: Difference is false [2023-09-17 12:11:10,652 INFO L309 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2023-09-17 12:11:10,652 INFO L313 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2023-09-17 12:11:10,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:31,108 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:31,109 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:31,109 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:31,110 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:31,110 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:31,110 INFO L335 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2023-09-17 12:11:31,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand null [2023-09-17 12:11:45,059 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:11:45,060 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:11:45,060 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:11:45,061 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:11:45,061 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:11:45,062 INFO L748 eck$LassoCheckResult]: Stem: SleepPredicate [underlying: 78#[$Ultimate##0]don't care, sleep set: []] [242] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] SleepPredicate [underlying: 81#[L-1]don't care, sleep set: []] [250] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 83#[L-1-1]don't care, sleep set: []] [264] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 85#[L23]don't care, sleep set: []] [231] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 87#[L23-1]don't care, sleep set: []] [237] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 89#[L23-2]don't care, sleep set: []] [241] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 91#[L23-3]don't care, sleep set: []] [270] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 93#[L23-4]don't care, sleep set: []] [233] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 95#[L23-5]don't care, sleep set: []] [244] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 97#[L718]don't care, sleep set: []] [236] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 99#[L719]don't care, sleep set: []] [221] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 101#[L-1-2]don't care, sleep set: []] [266] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] SleepPredicate [underlying: 103#[L-1-3]don't care, sleep set: []] [268] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] SleepPredicate [underlying: 105#[L-1-4]don't care, sleep set: []] [254] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 107#[L735]don't care, sleep set: []] [265] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] SleepPredicate [underlying: 109#[L735-1]don't care, sleep set: []] [271] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] SleepPredicate [underlying: 111#[L736]don't care, sleep set: []] [245] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] SleepPredicate [underlying: 113#[L736-1]don't care, sleep set: []] [269] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] SleepPredicate [underlying: 115#[L739]don't care, sleep set: []] [220] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] SleepPredicate [underlying: 117#[L742]don't care, sleep set: []] [249] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] SleepPredicate [underlying: 119#[L745]don't care, sleep set: []] [225] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 121#[L746-5]don't care, sleep set: []] [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 123#[L747]don't care, sleep set: []] [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 127#[L747-1]don't care, sleep set: []] [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 131#[L747-2]don't care, sleep set: []] [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 137#[L747-3]don't care, sleep set: []] [305] L747-3-->$Ultimate##0: Formula: (and (= v_salethreadThread1of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_27|) (= |v_salethreadThread1of3ForFork0_#in~arg.base_4| 0) (= |v_salethreadThread1of3ForFork0_#in~arg.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_27|} OutVars{salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_4|, salethreadThread1of3ForFork0_~arg.base=v_salethreadThread1of3ForFork0_~arg.base_4, salethreadThread1of3ForFork0_thidvar0=v_salethreadThread1of3ForFork0_thidvar0_2, salethreadThread1of3ForFork0_#res.base=|v_salethreadThread1of3ForFork0_#res.base_4|, salethreadThread1of3ForFork0_#res.offset=|v_salethreadThread1of3ForFork0_#res.offset_4|, salethreadThread1of3ForFork0_~arg.offset=v_salethreadThread1of3ForFork0_~arg.offset_4, salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_27|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~_numberOfSeatsSold~0, salethreadThread1of3ForFork0_#in~arg.offset, salethreadThread1of3ForFork0_~arg.base, salethreadThread1of3ForFork0_thidvar0, salethreadThread1of3ForFork0_#res.base, salethreadThread1of3ForFork0_#res.offset, salethreadThread1of3ForFork0_~arg.offset, salethreadThread1of3ForFork0_#in~arg.base] SleepPredicate [underlying: 143#[$Ultimate##0, L747-4]don't care, sleep set: []] [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 147#[L747-5, $Ultimate##0]don't care, sleep set: [salethreadThread1of3ForFork0]] [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 153#[$Ultimate##0, L746-2]don't care, sleep set: [salethreadThread1of3ForFork0]] [293] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of3ForFork0_#in~arg.offset_1| v_salethreadThread1of3ForFork0_~arg.offset_1) (= |v_salethreadThread1of3ForFork0_#in~arg.base_1| v_salethreadThread1of3ForFork0_~arg.base_1)) InVars {salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_1|, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_1|} OutVars{salethreadThread1of3ForFork0_~arg.base=v_salethreadThread1of3ForFork0_~arg.base_1, salethreadThread1of3ForFork0_~arg.offset=v_salethreadThread1of3ForFork0_~arg.offset_1, salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_1|, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~arg.base, salethreadThread1of3ForFork0_~arg.offset] SleepPredicate [underlying: 163#[L746-2, L721]don't care, sleep set: []] [295] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 179#[L746-2, L721-1]don't care, sleep set: [ULTIMATE.start]] [297] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of3ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of3ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of3ForFork0_#res.base=|v_salethreadThread1of3ForFork0_#res.base_1|, salethreadThread1of3ForFork0_#res.offset=|v_salethreadThread1of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_#res.base, salethreadThread1of3ForFork0_#res.offset] SleepPredicate [underlying: 199#[L746-2, salethreadFINAL]don't care, sleep set: [ULTIMATE.start]] [300] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 221#[salethreadEXIT, L746-2]don't care, sleep set: [ULTIMATE.start]] [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 241#[salethreadEXIT, L746-3]don't care, sleep set: []] [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 265#[salethreadEXIT, L746-4]don't care, sleep set: []] [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 295#[salethreadEXIT, L746-5]don't care, sleep set: []] [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 335#[salethreadEXIT, L747]don't care, sleep set: []] [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 379#[salethreadEXIT, L747-1]don't care, sleep set: []] [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 427#[salethreadEXIT, L747-2]don't care, sleep set: []] [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 481#[salethreadEXIT, L747-3]don't care, sleep set: []] [306] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread2of3ForFork0_#in~arg.base_4| 0) (= v_salethreadThread2of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_29|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_29|} OutVars{salethreadThread2of3ForFork0_thidvar0=v_salethreadThread2of3ForFork0_thidvar0_2, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_4|, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_4|, salethreadThread2of3ForFork0_#res.base=|v_salethreadThread2of3ForFork0_#res.base_4|, salethreadThread2of3ForFork0_~arg.offset=v_salethreadThread2of3ForFork0_~arg.offset_4, salethreadThread2of3ForFork0_#res.offset=|v_salethreadThread2of3ForFork0_#res.offset_4|, salethreadThread2of3ForFork0_~arg.base=v_salethreadThread2of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_29|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_thidvar0, salethreadThread2of3ForFork0_#in~arg.offset, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0, salethreadThread2of3ForFork0_#in~arg.base, salethreadThread2of3ForFork0_#res.base, salethreadThread2of3ForFork0_~arg.offset, salethreadThread2of3ForFork0_#res.offset, salethreadThread2of3ForFork0_~arg.base] SleepPredicate [underlying: 545#[$Ultimate##0, salethreadEXIT, L747-4]don't care, sleep set: []] [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 633#[$Ultimate##0, salethreadEXIT, L747-5]don't care, sleep set: [salethreadThread2of3ForFork0]] [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 751#[$Ultimate##0, L746-2, salethreadEXIT]don't care, sleep set: [salethreadThread2of3ForFork0]] [273] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread2of3ForFork0_~arg.base_1 |v_salethreadThread2of3ForFork0_#in~arg.base_1|) (= v_salethreadThread2of3ForFork0_~arg.offset_1 |v_salethreadThread2of3ForFork0_#in~arg.offset_1|)) InVars {salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_1|, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_1|, salethreadThread2of3ForFork0_~arg.offset=v_salethreadThread2of3ForFork0_~arg.offset_1, salethreadThread2of3ForFork0_~arg.base=v_salethreadThread2of3ForFork0_~arg.base_1, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_~arg.offset, salethreadThread2of3ForFork0_~arg.base] SleepPredicate [underlying: 895#[L746-2, salethreadEXIT, L721]don't care, sleep set: []] [275] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 1063#[L746-2, salethreadEXIT, L721-1]don't care, sleep set: [ULTIMATE.start]] [277] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of3ForFork0_#res.base_1| 0) (= |v_salethreadThread2of3ForFork0_#res.offset_1| 0)) InVars {} OutVars{salethreadThread2of3ForFork0_#res.base=|v_salethreadThread2of3ForFork0_#res.base_1|, salethreadThread2of3ForFork0_#res.offset=|v_salethreadThread2of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_#res.base, salethreadThread2of3ForFork0_#res.offset] SleepPredicate [underlying: 1249#[L746-2, salethreadFINAL, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [280] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 1465#[L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 1717#[salethreadEXIT, salethreadEXIT, L746-3]don't care, sleep set: []] [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 2023#[salethreadEXIT, L746-4, salethreadEXIT]don't care, sleep set: []] [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 2385#[salethreadEXIT, L746-5, salethreadEXIT]don't care, sleep set: []] [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 2813#[salethreadEXIT, L747, salethreadEXIT]don't care, sleep set: []] [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 3303#[salethreadEXIT, salethreadEXIT, L747-1]don't care, sleep set: []] [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 3891#[salethreadEXIT, salethreadEXIT, L747-2]don't care, sleep set: []] [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 4619#[salethreadEXIT, salethreadEXIT, L747-3]don't care, sleep set: []] [307] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread3of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread3of3ForFork0_#in~arg.base_4| 0) (= v_salethreadThread3of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_31|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_31|} OutVars{salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_4|, salethreadThread3of3ForFork0_#res.offset=|v_salethreadThread3of3ForFork0_#res.offset_4|, salethreadThread3of3ForFork0_#res.base=|v_salethreadThread3of3ForFork0_#res.base_4|, salethreadThread3of3ForFork0_~arg.offset=v_salethreadThread3of3ForFork0_~arg.offset_4, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread3of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread3of3ForFork0_thidvar0=v_salethreadThread3of3ForFork0_thidvar0_2, salethreadThread3of3ForFork0_~arg.base=v_salethreadThread3of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_31|, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_4|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_#in~arg.offset, salethreadThread3of3ForFork0_#res.offset, salethreadThread3of3ForFork0_#res.base, salethreadThread3of3ForFork0_~arg.offset, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0, salethreadThread3of3ForFork0_thidvar0, salethreadThread3of3ForFork0_~arg.base, salethreadThread3of3ForFork0_#in~arg.base] SleepPredicate [underlying: 5535#[$Ultimate##0, salethreadEXIT, L747-4, salethreadEXIT]don't care, sleep set: []] [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 6685#[$Ultimate##0, salethreadEXIT, L747-5, salethreadEXIT]don't care, sleep set: [salethreadThread3of3ForFork0]] [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] SleepPredicate [underlying: 8071#[$Ultimate##0, L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: [salethreadThread3of3ForFork0]] [283] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread3of3ForFork0_~arg.offset_1 |v_salethreadThread3of3ForFork0_#in~arg.offset_1|) (= |v_salethreadThread3of3ForFork0_#in~arg.base_1| v_salethreadThread3of3ForFork0_~arg.base_1)) InVars {salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_1|, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_1|} OutVars{salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_1|, salethreadThread3of3ForFork0_~arg.offset=v_salethreadThread3of3ForFork0_~arg.offset_1, salethreadThread3of3ForFork0_~arg.base=v_salethreadThread3of3ForFork0_~arg.base_1, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_~arg.offset, salethreadThread3of3ForFork0_~arg.base] SleepPredicate [underlying: 9679#[L721, L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [285] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] SleepPredicate [underlying: 11533#[L721-1, L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [287] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread3of3ForFork0_#res.offset_1| 0) (= |v_salethreadThread3of3ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread3of3ForFork0_#res.base=|v_salethreadThread3of3ForFork0_#res.base_1|, salethreadThread3of3ForFork0_#res.offset=|v_salethreadThread3of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_#res.offset, salethreadThread3of3ForFork0_#res.base] SleepPredicate [underlying: 13659#[salethreadFINAL, L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [290] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 16117#[salethreadEXIT, L746-2, salethreadEXIT, salethreadEXIT]don't care, sleep set: [ULTIMATE.start]] [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 18873#[salethreadEXIT, L746-3, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] SleepPredicate [underlying: 21841#[L746-4, salethreadEXIT, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] SleepPredicate [underlying: 24811#[L746-5, salethreadEXIT, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] SleepPredicate [underlying: 27571#[L747, salethreadEXIT, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] SleepPredicate [underlying: 29881#[L747-1, salethreadEXIT, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] SleepPredicate [underlying: 31657#[salethreadEXIT, salethreadEXIT, L747-2, salethreadEXIT]don't care, sleep set: []] [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] SleepPredicate [underlying: 32879#[salethreadEXIT, L747-3, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [303] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 33637#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [2023-09-17 12:11:45,062 INFO L750 eck$LassoCheckResult]: Loop: SleepPredicate [underlying: 33637#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [304] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] SleepPredicate [underlying: 33637#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care, sleep set: []] [2023-09-17 12:11:45,063 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:45,063 INFO L85 PathProgramCache]: Analyzing trace with hash 354956696, now seen corresponding path program 1 times [2023-09-17 12:11:45,063 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:45,063 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507236498] [2023-09-17 12:11:45,063 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:45,063 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:45,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:11:45,112 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2023-09-17 12:11:45,112 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:11:45,113 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507236498] [2023-09-17 12:11:45,113 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [507236498] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:11:45,113 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:11:45,113 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2023-09-17 12:11:45,114 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1785689793] [2023-09-17 12:11:45,114 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:11:45,114 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:11:45,115 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:11:45,115 INFO L85 PathProgramCache]: Analyzing trace with hash 335, now seen corresponding path program 1 times [2023-09-17 12:11:45,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:11:45,115 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153908907] [2023-09-17 12:11:45,115 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:11:45,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:11:45,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:45,118 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:11:45,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:11:45,119 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:11:45,121 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:11:45,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2023-09-17 12:11:45,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2023-09-17 12:11:45,121 INFO L87 Difference]: Start difference. First operand null Second operand has 3 states, 3 states have (on average 17.333333333333332) internal successors, (52), 3 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:12:01,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:12:01,191 INFO L93 Difference]: Finished difference Result 242381 states and 1009090 transitions. [2023-09-17 12:12:01,191 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 242381 states and 1009090 transitions. [2023-09-17 12:12:06,369 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2023-09-17 12:12:08,718 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 242381 states to 134528 states and 557189 transitions. [2023-09-17 12:12:08,719 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13347 [2023-09-17 12:12:09,004 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 23124 [2023-09-17 12:12:09,004 INFO L73 IsDeterministic]: Start isDeterministic. Operand 134528 states and 557189 transitions. [2023-09-17 12:12:09,561 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:12:09,562 INFO L218 hiAutomatonCegarLoop]: Abstraction has 134528 states and 557189 transitions. [2023-09-17 12:12:09,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134528 states and 557189 transitions. [2023-09-17 12:12:13,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134528 to 102105. [2023-09-17 12:12:14,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 102105 states, 102105 states have (on average 4.177337054992409) internal successors, (426527), 102104 states have internal predecessors, (426527), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:12:15,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102105 states to 102105 states and 426527 transitions. [2023-09-17 12:12:15,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 102105 states and 426527 transitions. [2023-09-17 12:12:15,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2023-09-17 12:12:15,128 INFO L428 stractBuchiCegarLoop]: Abstraction has 102105 states and 426527 transitions. [2023-09-17 12:12:15,128 INFO L335 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2023-09-17 12:12:15,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 102105 states and 426527 transitions. [2023-09-17 12:12:16,207 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2023-09-17 12:12:16,207 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2023-09-17 12:12:16,207 INFO L119 BuchiIsEmpty]: Starting construction of run [2023-09-17 12:12:16,208 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2023-09-17 12:12:16,208 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2023-09-17 12:12:16,209 INFO L748 eck$LassoCheckResult]: Stem: 342956#[$Ultimate##0]don't care [242] $Ultimate##0-->L-1: Formula: (and (= |v_#NULL.base_1| 0) (= |v_#NULL.offset_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] 339864#[L-1]don't care [250] L-1-->L-1-1: Formula: (= (select |v_#valid_3| 0) 0) InVars {#valid=|v_#valid_3|} OutVars{#valid=|v_#valid_3|} AuxVars[] AssignedVars[] 286662#[L-1-1]don't care [264] L-1-1-->L23: Formula: (< 0 |v_#StackHeapBarrier_1|) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_1|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_1|} AuxVars[] AssignedVars[] 281886#[L23]don't care [231] L23-->L23-1: Formula: (and (= (select |v_#valid_4| 1) 1) (= 2 (select |v_#length_1| 1))) InVars {#length=|v_#length_1|, #valid=|v_#valid_4|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] 281888#[L23-1]don't care [237] L23-1-->L23-2: Formula: (= 48 (select (select |v_#memory_int_1| 1) 0)) InVars {#memory_int=|v_#memory_int_1|} OutVars{#memory_int=|v_#memory_int_1|} AuxVars[] AssignedVars[] 326276#[L23-2]don't care [241] L23-2-->L23-3: Formula: (= (select (select |v_#memory_int_2| 1) 1) 0) InVars {#memory_int=|v_#memory_int_2|} OutVars{#memory_int=|v_#memory_int_2|} AuxVars[] AssignedVars[] 326278#[L23-3]don't care [270] L23-3-->L23-4: Formula: (and (= (select |v_#valid_5| 2) 1) (= (select |v_#length_2| 2) 1)) InVars {#length=|v_#length_2|, #valid=|v_#valid_5|} OutVars{#length=|v_#length_2|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[] 335412#[L23-4]don't care [233] L23-4-->L23-5: Formula: (= (select (select |v_#memory_int_3| 2) 0) 0) InVars {#memory_int=|v_#memory_int_3|} OutVars{#memory_int=|v_#memory_int_3|} AuxVars[] AssignedVars[] 277406#[L23-5]don't care [244] L23-5-->L718: Formula: (= v_~numberOfSeatsSold~0_3 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_3} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 277408#[L718]don't care [236] L718-->L719: Formula: (= v_~stopSales~0_4 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_4} AuxVars[] AssignedVars[~stopSales~0] 288282#[L719]don't care [221] L719-->L-1-2: Formula: (= v_~numOfTickets~0_1 0) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_1} AuxVars[] AssignedVars[~numOfTickets~0] 326676#[L-1-2]don't care [266] L-1-2-->L-1-3: Formula: (and (= |v_ULTIMATE.start_#in~argv#1.offset_1| |v_ULTIMATE.start_main_#in~argv#1.offset_1|) (= |v_ULTIMATE.start_main_#in~argv#1.base_1| |v_ULTIMATE.start_#in~argv#1.base_1|) (= |v_ULTIMATE.start_main_#in~argc#1_1| |v_ULTIMATE.start_#in~argc#1_1|)) InVars {ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} OutVars{ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_1|, ULTIMATE.start_#in~argc#1=|v_ULTIMATE.start_#in~argc#1_1|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_1|, ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.offset=|v_ULTIMATE.start_#in~argv#1.offset_1|, ULTIMATE.start_#in~argv#1.base=|v_ULTIMATE.start_#in~argv#1.base_1|} AuxVars[] AssignedVars[ULTIMATE.start_main_#in~argv#1.base, ULTIMATE.start_main_#in~argc#1, ULTIMATE.start_main_#in~argv#1.offset] 290930#[L-1-3]don't care [268] L-1-3-->L-1-4: Formula: true InVars {} OutVars{ULTIMATE.start_main_#res#1=|v_ULTIMATE.start_main_#res#1_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_#res#1] 290932#[L-1-4]don't care [254] L-1-4-->L735: Formula: true InVars {} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_1|, ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_1|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_1|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_1|, ULTIMATE.start_main_~_numberOfSeatsSold~1#1=|v_ULTIMATE.start_main_~_numberOfSeatsSold~1#1_3|, ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_1|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_3|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_1|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_3|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1, ULTIMATE.start_main_#t~post1#1, ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~i~0#1, ULTIMATE.start_main_~_numberOfSeatsSold~1#1, ULTIMATE.start_main_#t~nondet3#1, ULTIMATE.start_main_~#salethreads~0#1.base, ULTIMATE.start_main_~argv#1.offset, ULTIMATE.start_main_#t~pre2#1, ULTIMATE.start_main_~#salethreads~0#1.offset] 312650#[L735]don't care [265] L735-->L735-1: Formula: (= |v_ULTIMATE.start_main_#in~argc#1_2| |v_ULTIMATE.start_main_~argc#1_2|) InVars {ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} OutVars{ULTIMATE.start_main_~argc#1=|v_ULTIMATE.start_main_~argc#1_2|, ULTIMATE.start_main_#in~argc#1=|v_ULTIMATE.start_main_#in~argc#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argc#1] 364724#[L735-1]don't care [271] L735-1-->L736: Formula: (and (= |v_ULTIMATE.start_main_~argv#1.offset_2| |v_ULTIMATE.start_main_#in~argv#1.offset_2|) (= |v_ULTIMATE.start_main_#in~argv#1.base_2| |v_ULTIMATE.start_main_~argv#1.base_2|)) InVars {ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|} OutVars{ULTIMATE.start_main_#in~argv#1.offset=|v_ULTIMATE.start_main_#in~argv#1.offset_2|, ULTIMATE.start_main_~argv#1.base=|v_ULTIMATE.start_main_~argv#1.base_2|, ULTIMATE.start_main_#in~argv#1.base=|v_ULTIMATE.start_main_#in~argv#1.base_2|, ULTIMATE.start_main_~argv#1.offset=|v_ULTIMATE.start_main_~argv#1.offset_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~argv#1.base, ULTIMATE.start_main_~argv#1.offset] 364726#[L736]don't care [245] L736-->L736-1: Formula: (and (not (= |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 0)) (< |v_#StackHeapBarrier_2| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) (= |v_#valid_6| (store |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 1)) (= (select |v_#valid_7| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4|) 0) (= |v_ULTIMATE.start_main_~#salethreads~0#1.offset_4| 0) (= |v_#length_3| (store |v_#length_4| |v_ULTIMATE.start_main_~#salethreads~0#1.base_4| 60))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_4|, #valid=|v_#valid_7|} OutVars{ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_4|, #StackHeapBarrier=|v_#StackHeapBarrier_2|, #length=|v_#length_3|, #valid=|v_#valid_6|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_4|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_~#salethreads~0#1.base, #length, ULTIMATE.start_main_~#salethreads~0#1.offset] 349586#[L736-1]don't care [269] L736-1-->L739: Formula: (= v_~numOfTickets~0_2 15) InVars {} OutVars{~numOfTickets~0=v_~numOfTickets~0_2} AuxVars[] AssignedVars[~numOfTickets~0] 337760#[L739]don't care [220] L739-->L742: Formula: (= v_~numberOfSeatsSold~0_4 0) InVars {} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_4} AuxVars[] AssignedVars[~numberOfSeatsSold~0] 282244#[L742]don't care [249] L742-->L745: Formula: (= v_~stopSales~0_5 0) InVars {} OutVars{~stopSales~0=v_~stopSales~0_5} AuxVars[] AssignedVars[~stopSales~0] 282246#[L745]don't care [225] L745-->L746-5: Formula: (= |v_ULTIMATE.start_main_~i~0#1_2| 0) InVars {} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 282952#[L746-5]don't care [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 306450#[L747]don't care [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 306452#[L747-1]don't care [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 291710#[L747-2]don't care [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 291712#[L747-3]don't care [305] L747-3-->$Ultimate##0: Formula: (and (= v_salethreadThread1of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_27|) (= |v_salethreadThread1of3ForFork0_#in~arg.base_4| 0) (= |v_salethreadThread1of3ForFork0_#in~arg.offset_4| 0)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_27|} OutVars{salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_4|, salethreadThread1of3ForFork0_~arg.base=v_salethreadThread1of3ForFork0_~arg.base_4, salethreadThread1of3ForFork0_thidvar0=v_salethreadThread1of3ForFork0_thidvar0_2, salethreadThread1of3ForFork0_#res.base=|v_salethreadThread1of3ForFork0_#res.base_4|, salethreadThread1of3ForFork0_#res.offset=|v_salethreadThread1of3ForFork0_#res.offset_4|, salethreadThread1of3ForFork0_~arg.offset=v_salethreadThread1of3ForFork0_~arg.offset_4, salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_4|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_27|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~_numberOfSeatsSold~0, salethreadThread1of3ForFork0_#in~arg.offset, salethreadThread1of3ForFork0_~arg.base, salethreadThread1of3ForFork0_thidvar0, salethreadThread1of3ForFork0_#res.base, salethreadThread1of3ForFork0_#res.offset, salethreadThread1of3ForFork0_~arg.offset, salethreadThread1of3ForFork0_#in~arg.base] 351016#[$Ultimate##0, L747-4]don't care [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 343510#[L747-5, $Ultimate##0]don't care [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 293620#[$Ultimate##0, L746-2]don't care [293] $Ultimate##0-->L721: Formula: (and (= |v_salethreadThread1of3ForFork0_#in~arg.offset_1| v_salethreadThread1of3ForFork0_~arg.offset_1) (= |v_salethreadThread1of3ForFork0_#in~arg.base_1| v_salethreadThread1of3ForFork0_~arg.base_1)) InVars {salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_1|, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_1|} OutVars{salethreadThread1of3ForFork0_~arg.base=v_salethreadThread1of3ForFork0_~arg.base_1, salethreadThread1of3ForFork0_~arg.offset=v_salethreadThread1of3ForFork0_~arg.offset_1, salethreadThread1of3ForFork0_#in~arg.base=|v_salethreadThread1of3ForFork0_#in~arg.base_1|, salethreadThread1of3ForFork0_#in~arg.offset=|v_salethreadThread1of3ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~arg.base, salethreadThread1of3ForFork0_~arg.offset] 293622#[L746-2, L721]don't care [294] L721-->L722: Formula: (= v_~stopSales~0_1 0) InVars {~stopSales~0=v_~stopSales~0_1} OutVars{~stopSales~0=v_~stopSales~0_1} AuxVars[] AssignedVars[] 312698#[L722, L746-2]don't care [296] L722-->L723: Formula: (= v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_1 v_~numberOfSeatsSold~0_1) InVars {~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1} OutVars{~numberOfSeatsSold~0=v_~numberOfSeatsSold~0_1, salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_1} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_~_numberOfSeatsSold~0] 303106#[L723, L746-2]don't care [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 305954#[L746-3, L723]don't care [298] L723-->L724: Formula: (<= 14 v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_3) InVars {salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_3} OutVars{salethreadThread1of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread1of3ForFork0_~_numberOfSeatsSold~0_3} AuxVars[] AssignedVars[] 371458#[L746-3, L724]don't care [301] L724-->L721-1: Formula: (= v_~stopSales~0_2 1) InVars {} OutVars{~stopSales~0=v_~stopSales~0_2} AuxVars[] AssignedVars[~stopSales~0] 295788#[L746-3, L721-1]don't care [297] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread1of3ForFork0_#res.offset_1| 0) (= |v_salethreadThread1of3ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread1of3ForFork0_#res.base=|v_salethreadThread1of3ForFork0_#res.base_1|, salethreadThread1of3ForFork0_#res.offset=|v_salethreadThread1of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread1of3ForFork0_#res.base, salethreadThread1of3ForFork0_#res.offset] 304374#[L746-3, salethreadFINAL]don't care [300] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 357416#[salethreadEXIT, L746-3]don't care [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 364976#[salethreadEXIT, L746-4]don't care [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 319230#[salethreadEXIT, L746-5]don't care [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 280902#[salethreadEXIT, L747]don't care [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 300366#[salethreadEXIT, L747-1]don't care [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 301008#[salethreadEXIT, L747-2]don't care [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 328892#[salethreadEXIT, L747-3]don't care [306] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread2of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread2of3ForFork0_#in~arg.base_4| 0) (= v_salethreadThread2of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_29|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_29|} OutVars{salethreadThread2of3ForFork0_thidvar0=v_salethreadThread2of3ForFork0_thidvar0_2, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_4|, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread2of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_4|, salethreadThread2of3ForFork0_#res.base=|v_salethreadThread2of3ForFork0_#res.base_4|, salethreadThread2of3ForFork0_~arg.offset=v_salethreadThread2of3ForFork0_~arg.offset_4, salethreadThread2of3ForFork0_#res.offset=|v_salethreadThread2of3ForFork0_#res.offset_4|, salethreadThread2of3ForFork0_~arg.base=v_salethreadThread2of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_29|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_thidvar0, salethreadThread2of3ForFork0_#in~arg.offset, salethreadThread2of3ForFork0_~_numberOfSeatsSold~0, salethreadThread2of3ForFork0_#in~arg.base, salethreadThread2of3ForFork0_#res.base, salethreadThread2of3ForFork0_~arg.offset, salethreadThread2of3ForFork0_#res.offset, salethreadThread2of3ForFork0_~arg.base] 367234#[$Ultimate##0, salethreadEXIT, L747-4]don't care [273] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread2of3ForFork0_~arg.base_1 |v_salethreadThread2of3ForFork0_#in~arg.base_1|) (= v_salethreadThread2of3ForFork0_~arg.offset_1 |v_salethreadThread2of3ForFork0_#in~arg.offset_1|)) InVars {salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_1|, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_1|} OutVars{salethreadThread2of3ForFork0_#in~arg.base=|v_salethreadThread2of3ForFork0_#in~arg.base_1|, salethreadThread2of3ForFork0_~arg.offset=v_salethreadThread2of3ForFork0_~arg.offset_1, salethreadThread2of3ForFork0_~arg.base=v_salethreadThread2of3ForFork0_~arg.base_1, salethreadThread2of3ForFork0_#in~arg.offset=|v_salethreadThread2of3ForFork0_#in~arg.offset_1|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_~arg.offset, salethreadThread2of3ForFork0_~arg.base] 314908#[salethreadEXIT, L721, L747-4]don't care [275] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] 315224#[salethreadEXIT, L747-4, L721-1]don't care [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 327062#[salethreadEXIT, L747-5, L721-1]don't care [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 418826#[L746-2, salethreadEXIT, L721-1]don't care [277] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread2of3ForFork0_#res.base_1| 0) (= |v_salethreadThread2of3ForFork0_#res.offset_1| 0)) InVars {} OutVars{salethreadThread2of3ForFork0_#res.base=|v_salethreadThread2of3ForFork0_#res.base_1|, salethreadThread2of3ForFork0_#res.offset=|v_salethreadThread2of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread2of3ForFork0_#res.base, salethreadThread2of3ForFork0_#res.offset] 480684#[L746-2, salethreadFINAL, salethreadEXIT]don't care [280] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 375926#[L746-2, salethreadEXIT, salethreadEXIT]don't care [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 382604#[salethreadEXIT, salethreadEXIT, L746-3]don't care [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 368158#[salethreadEXIT, L746-4, salethreadEXIT]don't care [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 334840#[salethreadEXIT, L746-5, salethreadEXIT]don't care [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 327844#[salethreadEXIT, L747, salethreadEXIT]don't care [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 337542#[salethreadEXIT, salethreadEXIT, L747-1]don't care [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 369448#[salethreadEXIT, salethreadEXIT, L747-2]don't care [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 312458#[salethreadEXIT, salethreadEXIT, L747-3]don't care [307] L747-3-->$Ultimate##0: Formula: (and (= |v_salethreadThread3of3ForFork0_#in~arg.offset_4| 0) (= |v_salethreadThread3of3ForFork0_#in~arg.base_4| 0) (= v_salethreadThread3of3ForFork0_thidvar0_2 |v_ULTIMATE.start_main_#t~pre2#1_31|)) InVars {ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_31|} OutVars{salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_4|, salethreadThread3of3ForFork0_#res.offset=|v_salethreadThread3of3ForFork0_#res.offset_4|, salethreadThread3of3ForFork0_#res.base=|v_salethreadThread3of3ForFork0_#res.base_4|, salethreadThread3of3ForFork0_~arg.offset=v_salethreadThread3of3ForFork0_~arg.offset_4, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0=v_salethreadThread3of3ForFork0_~_numberOfSeatsSold~0_10, salethreadThread3of3ForFork0_thidvar0=v_salethreadThread3of3ForFork0_thidvar0_2, salethreadThread3of3ForFork0_~arg.base=v_salethreadThread3of3ForFork0_~arg.base_4, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_31|, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_4|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_#in~arg.offset, salethreadThread3of3ForFork0_#res.offset, salethreadThread3of3ForFork0_#res.base, salethreadThread3of3ForFork0_~arg.offset, salethreadThread3of3ForFork0_~_numberOfSeatsSold~0, salethreadThread3of3ForFork0_thidvar0, salethreadThread3of3ForFork0_~arg.base, salethreadThread3of3ForFork0_#in~arg.base] 398820#[$Ultimate##0, salethreadEXIT, L747-4, salethreadEXIT]don't care [260] L747-4-->L747-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 480232#[$Ultimate##0, salethreadEXIT, L747-5, salethreadEXIT]don't care [258] L747-5-->L746-2: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~nondet3#1=|v_ULTIMATE.start_main_#t~nondet3#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet3#1] 480230#[$Ultimate##0, L746-2, salethreadEXIT, salethreadEXIT]don't care [232] L746-2-->L746-3: Formula: (= |v_ULTIMATE.start_main_#t~post1#1_2| |v_ULTIMATE.start_main_~i~0#1_6|) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_2|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 480228#[$Ultimate##0, L746-3, salethreadEXIT, salethreadEXIT]don't care [283] $Ultimate##0-->L721: Formula: (and (= v_salethreadThread3of3ForFork0_~arg.offset_1 |v_salethreadThread3of3ForFork0_#in~arg.offset_1|) (= |v_salethreadThread3of3ForFork0_#in~arg.base_1| v_salethreadThread3of3ForFork0_~arg.base_1)) InVars {salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_1|, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_1|} OutVars{salethreadThread3of3ForFork0_#in~arg.offset=|v_salethreadThread3of3ForFork0_#in~arg.offset_1|, salethreadThread3of3ForFork0_~arg.offset=v_salethreadThread3of3ForFork0_~arg.offset_1, salethreadThread3of3ForFork0_~arg.base=v_salethreadThread3of3ForFork0_~arg.base_1, salethreadThread3of3ForFork0_#in~arg.base=|v_salethreadThread3of3ForFork0_#in~arg.base_1|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_~arg.offset, salethreadThread3of3ForFork0_~arg.base] 480678#[L721, L746-3, salethreadEXIT, salethreadEXIT]don't care [285] L721-->L721-1: Formula: (not (= v_~stopSales~0_3 0)) InVars {~stopSales~0=v_~stopSales~0_3} OutVars{~stopSales~0=v_~stopSales~0_3} AuxVars[] AssignedVars[] 289854#[L746-3, salethreadEXIT, salethreadEXIT, L721-1]don't care [253] L746-3-->L746-4: Formula: (= (+ |v_ULTIMATE.start_main_#t~post1#1_3| 1) |v_ULTIMATE.start_main_~i~0#1_7|) InVars {ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_3|, ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_~i~0#1] 349340#[L721-1, L746-4, salethreadEXIT, salethreadEXIT]don't care [227] L746-4-->L746-5: Formula: true InVars {} OutVars{ULTIMATE.start_main_#t~post1#1=|v_ULTIMATE.start_main_#t~post1#1_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~post1#1] 290820#[salethreadEXIT, L746-5, salethreadEXIT, L721-1]don't care [246] L746-5-->L747: Formula: (< |v_ULTIMATE.start_main_~i~0#1_4| 15) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_4|} AuxVars[] AssignedVars[] 290818#[L721-1, L747, salethreadEXIT, salethreadEXIT]don't care [230] L747-->L747-1: Formula: (= |v_ULTIMATE.start_main_#t~pre2#1_2| |v_#pthreadsForks_1|) InVars {#pthreadsForks=|v_#pthreadsForks_1|} OutVars{#pthreadsForks=|v_#pthreadsForks_1|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_2|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~pre2#1] 352652#[L747-1, salethreadEXIT, salethreadEXIT, L721-1]don't care [287] L721-1-->salethreadFINAL: Formula: (and (= |v_salethreadThread3of3ForFork0_#res.offset_1| 0) (= |v_salethreadThread3of3ForFork0_#res.base_1| 0)) InVars {} OutVars{salethreadThread3of3ForFork0_#res.base=|v_salethreadThread3of3ForFork0_#res.base_1|, salethreadThread3of3ForFork0_#res.offset=|v_salethreadThread3of3ForFork0_#res.offset_1|} AuxVars[] AssignedVars[salethreadThread3of3ForFork0_#res.offset, salethreadThread3of3ForFork0_#res.base] 381422#[salethreadFINAL, L747-1, salethreadEXIT, salethreadEXIT]don't care [290] salethreadFINAL-->salethreadEXIT: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 287396#[L747-1, salethreadEXIT, salethreadEXIT, salethreadEXIT]don't care [255] L747-1-->L747-2: Formula: (= (+ 1 |v_#pthreadsForks_3|) |v_#pthreadsForks_2|) InVars {#pthreadsForks=|v_#pthreadsForks_3|} OutVars{#pthreadsForks=|v_#pthreadsForks_2|} AuxVars[] AssignedVars[#pthreadsForks] 287398#[salethreadEXIT, salethreadEXIT, L747-2, salethreadEXIT]don't care [256] L747-2-->L747-3: Formula: (let ((.cse1 (* |v_ULTIMATE.start_main_~i~0#1_5| 4))) (let ((.cse0 (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1))) (and (<= 0 .cse0) (<= (+ |v_ULTIMATE.start_main_~#salethreads~0#1.offset_5| .cse1 4) (select |v_#length_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|)) (= (select |v_#valid_8| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) 1) (= (store |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5| (store (select |v_#memory_int_5| |v_ULTIMATE.start_main_~#salethreads~0#1.base_5|) .cse0 |v_ULTIMATE.start_main_#t~pre2#1_3|)) |v_#memory_int_4|)))) InVars {ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_5|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} OutVars{ULTIMATE.start_main_~i~0#1=|v_ULTIMATE.start_main_~i~0#1_5|, #valid=|v_#valid_8|, #memory_int=|v_#memory_int_4|, ULTIMATE.start_main_~#salethreads~0#1.base=|v_ULTIMATE.start_main_~#salethreads~0#1.base_5|, #length=|v_#length_5|, ULTIMATE.start_main_#t~pre2#1=|v_ULTIMATE.start_main_#t~pre2#1_3|, ULTIMATE.start_main_~#salethreads~0#1.offset=|v_ULTIMATE.start_main_~#salethreads~0#1.offset_5|} AuxVars[] AssignedVars[#memory_int] 280180#[salethreadEXIT, L747-3, salethreadEXIT, salethreadEXIT]don't care [303] L747-3-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 320610#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care [2023-09-17 12:12:16,209 INFO L750 eck$LassoCheckResult]: Loop: 320610#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care [304] ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES-->ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] 320610#[salethreadEXIT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, salethreadEXIT, salethreadEXIT]don't care [2023-09-17 12:12:16,210 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:12:16,210 INFO L85 PathProgramCache]: Analyzing trace with hash -1646081154, now seen corresponding path program 1 times [2023-09-17 12:12:16,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:12:16,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129767916] [2023-09-17 12:12:16,210 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:12:16,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:12:16,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2023-09-17 12:12:16,256 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2023-09-17 12:12:16,256 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2023-09-17 12:12:16,256 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129767916] [2023-09-17 12:12:16,256 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2129767916] provided 1 perfect and 0 imperfect interpolant sequences [2023-09-17 12:12:16,257 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2023-09-17 12:12:16,257 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2023-09-17 12:12:16,257 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317313869] [2023-09-17 12:12:16,257 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2023-09-17 12:12:16,257 INFO L753 eck$LassoCheckResult]: stem already infeasible [2023-09-17 12:12:16,257 INFO L145 PredicateUnifier]: Initialized classic predicate unifier [2023-09-17 12:12:16,257 INFO L85 PathProgramCache]: Analyzing trace with hash 335, now seen corresponding path program 2 times [2023-09-17 12:12:16,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2023-09-17 12:12:16,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609634892] [2023-09-17 12:12:16,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2023-09-17 12:12:16,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2023-09-17 12:12:16,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:12:16,260 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2023-09-17 12:12:16,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2023-09-17 12:12:16,268 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2023-09-17 12:12:16,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2023-09-17 12:12:16,270 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2023-09-17 12:12:16,270 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2023-09-17 12:12:16,270 INFO L87 Difference]: Start difference. First operand 102105 states and 426527 transitions. cyclomatic complexity: 328717 Second operand has 4 states, 4 states have (on average 14.0) internal successors, (56), 4 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2023-09-17 12:12:18,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2023-09-17 12:12:18,003 INFO L93 Difference]: Finished difference Result 144582 states and 571852 transitions. [2023-09-17 12:12:18,003 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 144582 states and 571852 transitions. [2023-09-17 12:12:20,723 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 3 [2023-09-17 12:12:23,344 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 144582 states to 144582 states and 571852 transitions. [2023-09-17 12:12:23,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 25935 [2023-09-17 12:12:23,801 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 25935 [2023-09-17 12:12:23,801 INFO L73 IsDeterministic]: Start isDeterministic. Operand 144582 states and 571852 transitions. [2023-09-17 12:12:24,298 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2023-09-17 12:12:24,312 INFO L218 hiAutomatonCegarLoop]: Abstraction has 144582 states and 571852 transitions. [2023-09-17 12:12:24,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144582 states and 571852 transitions. [2023-09-17 12:12:29,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144582 to 100734. [2023-09-17 12:12:29,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100734 states, 100734 states have (on average 4.040860086961701) internal successors, (407052), 100733 states have internal predecessors, (407052), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)