/root/.sdkman/candidates/java/current/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data -s ../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf --traceabstraction.dfs.order.used.in.por LOOP_LOCKSTEP --traceabstraction.additional.conditional.commutativity.checking DFS --traceabstraction.criterion.for.conditional.commutativity.checking DEFAULT --traceabstraction.use.limited.checks.recommended.for.dfs true --traceabstraction.limit.for.limited.checks 50 -tc ../benchexec/../../../trunk/examples/toolchains/AutomizerBplInline.xml -i ../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/min-max-inc-dec.wvr.bpl -------------------------------------------------------------------------------- This is Ultimate 0.2.4-wip.dk.conditional-comm-faa7b7a-m [2024-04-27 12:35:35,164 INFO L188 SettingsManager]: Resetting all preferences to default values... [2024-04-27 12:35:35,229 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../benchexec/../../../trunk/examples/settings/gemcutter/NewStatesSleep.epf [2024-04-27 12:35:35,233 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2024-04-27 12:35:35,234 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2024-04-27 12:35:35,257 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2024-04-27 12:35:35,257 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2024-04-27 12:35:35,258 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2024-04-27 12:35:35,258 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2024-04-27 12:35:35,261 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2024-04-27 12:35:35,261 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2024-04-27 12:35:35,262 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2024-04-27 12:35:35,262 INFO L153 SettingsManager]: * Use SBE=true [2024-04-27 12:35:35,263 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2024-04-27 12:35:35,263 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2024-04-27 12:35:35,263 INFO L153 SettingsManager]: * sizeof long=4 [2024-04-27 12:35:35,264 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2024-04-27 12:35:35,264 INFO L153 SettingsManager]: * sizeof POINTER=4 [2024-04-27 12:35:35,264 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2024-04-27 12:35:35,264 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2024-04-27 12:35:35,264 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2024-04-27 12:35:35,265 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2024-04-27 12:35:35,265 INFO L153 SettingsManager]: * sizeof long double=12 [2024-04-27 12:35:35,265 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2024-04-27 12:35:35,265 INFO L153 SettingsManager]: * Use constant arrays=true [2024-04-27 12:35:35,265 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2024-04-27 12:35:35,266 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2024-04-27 12:35:35,266 INFO L153 SettingsManager]: * To the following directory=./dump/ [2024-04-27 12:35:35,266 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2024-04-27 12:35:35,266 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-04-27 12:35:35,267 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2024-04-27 12:35:35,267 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2024-04-27 12:35:35,267 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2024-04-27 12:35:35,267 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * Partial Order Reduction in concurrent analysis=SLEEP_NEW_STATES [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PARTIAL_ORDER_FA [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2024-04-27 12:35:35,268 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: DFS Order used in POR -> LOOP_LOCKSTEP Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Additional conditional commutativity checking -> DFS Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Criterion for conditional commutativity checking -> DEFAULT Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: use limited checks (recommended for DFS) -> true Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: Limit for limited checks -> 50 [2024-04-27 12:35:35,469 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2024-04-27 12:35:35,486 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2024-04-27 12:35:35,488 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2024-04-27 12:35:35,489 INFO L270 PluginConnector]: Initializing Boogie PL CUP Parser... [2024-04-27 12:35:35,489 INFO L274 PluginConnector]: Boogie PL CUP Parser initialized [2024-04-27 12:35:35,490 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/min-max-inc-dec.wvr.bpl [2024-04-27 12:35:35,490 INFO L110 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/../../../trunk/examples/concurrent/bpl/weaver-benchmarks/generated/popl20/min-max-inc-dec.wvr.bpl' [2024-04-27 12:35:35,545 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2024-04-27 12:35:35,554 INFO L133 ToolchainWalker]: Walking toolchain with 4 elements. [2024-04-27 12:35:35,555 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2024-04-27 12:35:35,555 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2024-04-27 12:35:35,556 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2024-04-27 12:35:35,567 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,575 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,580 INFO L138 Inliner]: procedures = 6, calls = 5, calls flagged for inlining = 0, calls inlined = 0, statements flattened = 0 [2024-04-27 12:35:35,581 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2024-04-27 12:35:35,582 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2024-04-27 12:35:35,582 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2024-04-27 12:35:35,582 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2024-04-27 12:35:35,589 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,589 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,592 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,596 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,598 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,600 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,601 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,602 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,606 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2024-04-27 12:35:35,607 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2024-04-27 12:35:35,607 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2024-04-27 12:35:35,607 INFO L274 PluginConnector]: RCFGBuilder initialized [2024-04-27 12:35:35,608 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/1) ... [2024-04-27 12:35:35,613 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2024-04-27 12:35:35,619 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:35:35,640 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2024-04-27 12:35:35,646 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2024-04-27 12:35:35,675 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread1 given in one single declaration [2024-04-27 12:35:35,675 INFO L130 BoogieDeclarations]: Found specification of procedure thread1 [2024-04-27 12:35:35,675 INFO L138 BoogieDeclarations]: Found implementation of procedure thread1 [2024-04-27 12:35:35,675 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread2 given in one single declaration [2024-04-27 12:35:35,676 INFO L130 BoogieDeclarations]: Found specification of procedure thread2 [2024-04-27 12:35:35,676 INFO L138 BoogieDeclarations]: Found implementation of procedure thread2 [2024-04-27 12:35:35,676 INFO L124 BoogieDeclarations]: Specification and implementation of procedure ULTIMATE.start given in one single declaration [2024-04-27 12:35:35,676 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2024-04-27 12:35:35,676 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2024-04-27 12:35:35,676 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread3 given in one single declaration [2024-04-27 12:35:35,676 INFO L130 BoogieDeclarations]: Found specification of procedure thread3 [2024-04-27 12:35:35,676 INFO L138 BoogieDeclarations]: Found implementation of procedure thread3 [2024-04-27 12:35:35,677 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread4 given in one single declaration [2024-04-27 12:35:35,677 INFO L130 BoogieDeclarations]: Found specification of procedure thread4 [2024-04-27 12:35:35,677 INFO L138 BoogieDeclarations]: Found implementation of procedure thread4 [2024-04-27 12:35:35,677 INFO L124 BoogieDeclarations]: Specification and implementation of procedure thread5 given in one single declaration [2024-04-27 12:35:35,677 INFO L130 BoogieDeclarations]: Found specification of procedure thread5 [2024-04-27 12:35:35,677 INFO L138 BoogieDeclarations]: Found implementation of procedure thread5 [2024-04-27 12:35:35,678 WARN L213 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to OneNontrivialStatement [2024-04-27 12:35:35,718 INFO L241 CfgBuilder]: Building ICFG [2024-04-27 12:35:35,719 INFO L267 CfgBuilder]: Building CFG for each procedure with an implementation [2024-04-27 12:35:35,833 INFO L282 CfgBuilder]: Performing block encoding [2024-04-27 12:35:35,854 INFO L304 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2024-04-27 12:35:35,854 INFO L309 CfgBuilder]: Removed 0 assume(true) statements. [2024-04-27 12:35:35,855 INFO L201 PluginConnector]: Adding new model min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 12:35:35 BoogieIcfgContainer [2024-04-27 12:35:35,856 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2024-04-27 12:35:35,857 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2024-04-27 12:35:35,858 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2024-04-27 12:35:35,861 INFO L274 PluginConnector]: TraceAbstraction initialized [2024-04-27 12:35:35,861 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 27.04 12:35:35" (1/2) ... [2024-04-27 12:35:35,862 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@ec64443 and model type min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.04 12:35:35, skipping insertion in model container [2024-04-27 12:35:35,862 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "min-max-inc-dec.wvr.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.04 12:35:35" (2/2) ... [2024-04-27 12:35:35,863 INFO L112 eAbstractionObserver]: Analyzing ICFG min-max-inc-dec.wvr.bpl [2024-04-27 12:35:35,869 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2024-04-27 12:35:35,875 INFO L203 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2024-04-27 12:35:35,876 INFO L162 ceAbstractionStarter]: Applying trace abstraction to program that has 1 error locations. [2024-04-27 12:35:35,878 INFO L514 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2024-04-27 12:35:35,944 INFO L144 ThreadInstanceAdder]: Constructed 5 joinOtherThreadTransitions. [2024-04-27 12:35:35,972 INFO L100 denceProviderFactory]: Independence Relation #1: [IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=true, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2024-04-27 12:35:35,973 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 [2024-04-27 12:35:35,973 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:35:35,975 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (exit command is (exit), workingDir is null) [2024-04-27 12:35:35,977 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:1000 (2)] Waiting until timeout for monitored process [2024-04-27 12:35:36,002 INFO L187 artialOrderCegarLoop]: Running PartialOrderCegarLoop with 1 independence relations. [2024-04-27 12:35:36,011 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:35:36,012 INFO L356 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2024-04-27 12:35:36,017 INFO L357 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PARTIAL_ORDER_FA, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7edd8677, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms], mConComChecker=DFS, mConComCheckerCriterion=DEFAULT, mConComCheckerLimitedChecksCriterion=true, mConComCheckerCriterionLimit=50, mConComCheckerRandomProb=100, mConComCheckerRandomSeed=123, mConComCheckerConditionCriterion=false [2024-04-27 12:35:36,017 INFO L358 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2024-04-27 12:35:36,068 INFO L420 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:35:36,069 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:35:36,070 INFO L85 PathProgramCache]: Analyzing trace with hash -563538088, now seen corresponding path program 1 times [2024-04-27 12:35:36,076 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:35:36,077 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1522429207] [2024-04-27 12:35:36,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:36,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:36,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:36,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:36,309 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:35:36,309 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1522429207] [2024-04-27 12:35:36,310 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1522429207] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:35:36,310 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:35:36,310 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2024-04-27 12:35:36,311 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [277857447] [2024-04-27 12:35:36,312 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:35:36,315 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-04-27 12:35:36,315 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:35:36,335 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 12:35:36,336 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-04-27 12:35:36,337 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:35:36,338 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:35:36,339 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 5.4) internal successors, (27), 5 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:35:36,339 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:35:36,811 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:36,813 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:36,866 INFO L85 PathProgramCache]: Analyzing trace with hash -439467170, now seen corresponding path program 1 times [2024-04-27 12:35:36,867 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:36,868 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:36,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:36,945 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:36,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:36,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:36,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:37,000 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:37,001 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 12:35:37,001 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2024-04-27 12:35:37,335 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:37,336 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:37,413 INFO L85 PathProgramCache]: Analyzing trace with hash -1091384554, now seen corresponding path program 1 times [2024-04-27 12:35:37,413 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:37,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:37,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:37,476 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:37,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:37,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:37,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:37,501 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:37,640 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:37,641 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:37,696 INFO L85 PathProgramCache]: Analyzing trace with hash -832419688, now seen corresponding path program 1 times [2024-04-27 12:35:37,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:37,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:37,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:37,733 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:37,733 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:37,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:37,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:37,765 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:37,904 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:37,905 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:37,966 INFO L85 PathProgramCache]: Analyzing trace with hash -35115144, now seen corresponding path program 1 times [2024-04-27 12:35:37,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:37,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:37,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,001 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:38,002 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,029 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:38,140 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:38,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:38,199 INFO L85 PathProgramCache]: Analyzing trace with hash -1966514822, now seen corresponding path program 1 times [2024-04-27 12:35:38,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,221 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:38,221 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,221 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,238 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:38,363 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:38,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:38,409 INFO L85 PathProgramCache]: Analyzing trace with hash 1752217120, now seen corresponding path program 1 times [2024-04-27 12:35:38,409 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,409 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,446 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:38,446 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,470 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:38,563 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:38,563 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:38,600 INFO L85 PathProgramCache]: Analyzing trace with hash -1061862638, now seen corresponding path program 2 times [2024-04-27 12:35:38,600 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,601 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,618 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:38,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,641 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:38,744 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:38,744 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:38,827 INFO L85 PathProgramCache]: Analyzing trace with hash 1441551746, now seen corresponding path program 1 times [2024-04-27 12:35:38,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,847 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:38,847 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:38,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:38,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:38,868 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:38,985 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:38,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:41,048 INFO L85 PathProgramCache]: Analyzing trace with hash -34254092, now seen corresponding path program 2 times [2024-04-27 12:35:41,048 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,077 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:41,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,117 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:41,240 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:41,241 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:41,298 INFO L85 PathProgramCache]: Analyzing trace with hash -1061831886, now seen corresponding path program 1 times [2024-04-27 12:35:41,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,352 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:41,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,374 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:41,471 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:41,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:41,530 INFO L85 PathProgramCache]: Analyzing trace with hash 1781777556, now seen corresponding path program 2 times [2024-04-27 12:35:41,530 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,530 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,548 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:41,548 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,565 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:41,656 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:41,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:41,702 INFO L85 PathProgramCache]: Analyzing trace with hash -351868020, now seen corresponding path program 3 times [2024-04-27 12:35:41,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,721 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:41,721 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:41,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:41,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:41,771 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:41,853 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:41,853 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:43,894 INFO L85 PathProgramCache]: Analyzing trace with hash 1976993380, now seen corresponding path program 1 times [2024-04-27 12:35:43,894 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:43,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:43,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:43,914 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:43,915 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:43,915 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:43,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:43,932 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,023 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,023 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:44,071 INFO L85 PathProgramCache]: Analyzing trace with hash 1157252750, now seen corresponding path program 1 times [2024-04-27 12:35:44,071 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,072 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,104 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,104 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,104 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,134 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,227 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,227 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:44,278 INFO L85 PathProgramCache]: Analyzing trace with hash 1976993381, now seen corresponding path program 4 times [2024-04-27 12:35:44,279 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,297 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,316 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,411 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,411 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:44,458 INFO L85 PathProgramCache]: Analyzing trace with hash 1976993381, now seen corresponding path program 5 times [2024-04-27 12:35:44,458 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,497 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,516 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,611 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:44,655 INFO L85 PathProgramCache]: Analyzing trace with hash -565539929, now seen corresponding path program 6 times [2024-04-27 12:35:44,656 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,687 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,687 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,687 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,703 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,787 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:44,819 INFO L85 PathProgramCache]: Analyzing trace with hash -565539929, now seen corresponding path program 7 times [2024-04-27 12:35:44,820 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,820 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,836 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,836 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:44,855 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:44,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:44,949 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:44,993 INFO L85 PathProgramCache]: Analyzing trace with hash 1162319158, now seen corresponding path program 8 times [2024-04-27 12:35:44,993 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:44,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:44,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,017 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:35:45,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,040 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:35:45,133 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:45,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:45,231 INFO L85 PathProgramCache]: Analyzing trace with hash -351862736, now seen corresponding path program 9 times [2024-04-27 12:35:45,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,254 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:45,254 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,255 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,270 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:45,360 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:45,360 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:45,407 INFO L85 PathProgramCache]: Analyzing trace with hash -599470504, now seen corresponding path program 1 times [2024-04-27 12:35:45,407 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,422 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,423 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,442 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,550 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:45,550 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:45,599 INFO L85 PathProgramCache]: Analyzing trace with hash -1403716330, now seen corresponding path program 1 times [2024-04-27 12:35:45,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,603 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,618 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,618 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,618 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,637 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,720 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:45,720 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:45,765 INFO L85 PathProgramCache]: Analyzing trace with hash -599470503, now seen corresponding path program 10 times [2024-04-27 12:35:45,765 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,779 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,793 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,911 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:45,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:45,949 INFO L85 PathProgramCache]: Analyzing trace with hash -599470503, now seen corresponding path program 11 times [2024-04-27 12:35:45,949 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,949 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,966 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:45,966 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:45,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:45,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:45,985 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:46,081 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:46,082 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:46,125 INFO L85 PathProgramCache]: Analyzing trace with hash -1403716298, now seen corresponding path program 12 times [2024-04-27 12:35:46,125 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:46,127 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:46,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:46,156 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:46,156 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:46,156 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:46,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:46,174 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:46,264 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:46,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:48,309 INFO L85 PathProgramCache]: Analyzing trace with hash -362710508, now seen corresponding path program 13 times [2024-04-27 12:35:48,309 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,325 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:48,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,341 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:48,425 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:48,426 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:48,461 INFO L85 PathProgramCache]: Analyzing trace with hash -1403727842, now seen corresponding path program 14 times [2024-04-27 12:35:48,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,461 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,475 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:48,476 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,490 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:48,583 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:48,584 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:48,639 INFO L85 PathProgramCache]: Analyzing trace with hash 23990200, now seen corresponding path program 1 times [2024-04-27 12:35:48,639 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,639 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,654 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:48,654 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,654 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,667 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:48,794 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:48,794 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:48,842 INFO L85 PathProgramCache]: Analyzing trace with hash -1966453318, now seen corresponding path program 1 times [2024-04-27 12:35:48,842 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,843 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:48,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:48,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:48,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:48,880 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,011 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,011 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:49,058 INFO L85 PathProgramCache]: Analyzing trace with hash -830419306, now seen corresponding path program 1 times [2024-04-27 12:35:49,058 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,058 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,074 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,087 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,193 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,194 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:49,246 INFO L85 PathProgramCache]: Analyzing trace with hash -2003096552, now seen corresponding path program 1 times [2024-04-27 12:35:49,247 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,258 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,258 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,269 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,386 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,388 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:49,433 INFO L85 PathProgramCache]: Analyzing trace with hash -114468286, now seen corresponding path program 1 times [2024-04-27 12:35:49,433 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,433 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,450 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:49,450 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,450 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,464 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:49,560 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,561 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:49,599 INFO L85 PathProgramCache]: Analyzing trace with hash 53512116, now seen corresponding path program 2 times [2024-04-27 12:35:49,599 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,599 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,613 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,614 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,627 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,767 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,767 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:49,825 INFO L85 PathProgramCache]: Analyzing trace with hash 1658430752, now seen corresponding path program 1 times [2024-04-27 12:35:49,826 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,840 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,840 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:49,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:49,855 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:49,945 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:49,946 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:49,997 INFO L85 PathProgramCache]: Analyzing trace with hash -829558254, now seen corresponding path program 2 times [2024-04-27 12:35:49,997 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:49,997 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,017 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:50,017 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:50,017 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,029 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:35:50,160 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:50,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:50,215 INFO L85 PathProgramCache]: Analyzing trace with hash 611292, now seen corresponding path program 1 times [2024-04-27 12:35:50,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:50,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,229 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:50,229 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:50,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,243 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:50,344 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:50,344 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:50,397 INFO L85 PathProgramCache]: Analyzing trace with hash -84915490, now seen corresponding path program 2 times [2024-04-27 12:35:50,397 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:50,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,412 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:50,412 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:50,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:50,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:50,428 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:50,526 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:50,526 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:52,581 INFO L85 PathProgramCache]: Analyzing trace with hash 53542868, now seen corresponding path program 3 times [2024-04-27 12:35:52,581 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,595 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:52,595 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,595 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,608 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:52,736 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:52,737 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:52,775 INFO L85 PathProgramCache]: Analyzing trace with hash -84907850, now seen corresponding path program 4 times [2024-04-27 12:35:52,776 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,776 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,790 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:52,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,803 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:52,908 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:52,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:52,956 INFO L85 PathProgramCache]: Analyzing trace with hash -961499474, now seen corresponding path program 5 times [2024-04-27 12:35:52,956 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,973 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:52,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:52,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:52,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:52,989 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,090 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:53,091 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:53,134 INFO L85 PathProgramCache]: Analyzing trace with hash 258287490, now seen corresponding path program 1 times [2024-04-27 12:35:53,134 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,149 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,149 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,177 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,286 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:53,286 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:53,345 INFO L85 PathProgramCache]: Analyzing trace with hash -583022288, now seen corresponding path program 1 times [2024-04-27 12:35:53,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,375 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,375 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,392 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,496 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:53,496 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:53,550 INFO L85 PathProgramCache]: Analyzing trace with hash 258287491, now seen corresponding path program 6 times [2024-04-27 12:35:53,550 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,609 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,609 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,610 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,635 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,745 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:53,745 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:53,782 INFO L85 PathProgramCache]: Analyzing trace with hash 258287491, now seen corresponding path program 7 times [2024-04-27 12:35:53,782 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,782 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,804 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,821 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,921 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:53,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:53,973 INFO L85 PathProgramCache]: Analyzing trace with hash 246078533, now seen corresponding path program 8 times [2024-04-27 12:35:53,973 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:53,987 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:53,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:53,988 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:53,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,001 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:54,088 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,089 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:54,127 INFO L85 PathProgramCache]: Analyzing trace with hash 246078533, now seen corresponding path program 9 times [2024-04-27 12:35:54,128 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,128 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,141 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:54,142 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,155 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:54,246 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,246 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:54,298 INFO L85 PathProgramCache]: Analyzing trace with hash 1662824054, now seen corresponding path program 1 times [2024-04-27 12:35:54,298 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,314 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,315 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,332 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,436 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,436 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:54,486 INFO L85 PathProgramCache]: Analyzing trace with hash 7938232, now seen corresponding path program 1 times [2024-04-27 12:35:54,487 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,500 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,501 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,514 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,651 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,651 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:54,701 INFO L85 PathProgramCache]: Analyzing trace with hash 1662824055, now seen corresponding path program 10 times [2024-04-27 12:35:54,702 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,702 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,718 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,730 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,819 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,819 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:54,856 INFO L85 PathProgramCache]: Analyzing trace with hash 1662824055, now seen corresponding path program 11 times [2024-04-27 12:35:54,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,857 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,869 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:54,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:54,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:54,882 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:54,976 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:54,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:55,037 INFO L85 PathProgramCache]: Analyzing trace with hash 7938264, now seen corresponding path program 12 times [2024-04-27 12:35:55,037 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,037 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,051 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,051 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,064 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,170 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:55,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:35:55,213 INFO L85 PathProgramCache]: Analyzing trace with hash -972341962, now seen corresponding path program 13 times [2024-04-27 12:35:55,214 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,227 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:55,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,241 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:55,350 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:55,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:55,408 INFO L85 PathProgramCache]: Analyzing trace with hash 7926720, now seen corresponding path program 14 times [2024-04-27 12:35:55,408 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,421 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,422 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,422 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,434 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,536 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:55,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:55,586 INFO L85 PathProgramCache]: Analyzing trace with hash 133906032, now seen corresponding path program 1 times [2024-04-27 12:35:55,586 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,622 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:55,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,623 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,643 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:35:55,761 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:55,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:55,788 INFO L85 PathProgramCache]: Analyzing trace with hash 1765500510, now seen corresponding path program 2 times [2024-04-27 12:35:55,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,802 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,802 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,803 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,815 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,894 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:55,895 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:55,924 INFO L85 PathProgramCache]: Analyzing trace with hash -1104742204, now seen corresponding path program 1 times [2024-04-27 12:35:55,925 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,925 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,939 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:55,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:55,939 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:55,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:55,960 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,050 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,050 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:56,079 INFO L85 PathProgramCache]: Analyzing trace with hash 1442424242, now seen corresponding path program 2 times [2024-04-27 12:35:56,079 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,079 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,092 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,106 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,191 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:56,231 INFO L85 PathProgramCache]: Analyzing trace with hash 1765629524, now seen corresponding path program 1 times [2024-04-27 12:35:56,231 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,231 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,244 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,257 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,348 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:56,384 INFO L85 PathProgramCache]: Analyzing trace with hash 462171970, now seen corresponding path program 2 times [2024-04-27 12:35:56,384 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,396 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,396 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,408 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:56,497 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,497 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:56,526 INFO L85 PathProgramCache]: Analyzing trace with hash 1442454994, now seen corresponding path program 1 times [2024-04-27 12:35:56,527 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,539 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:56,539 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,563 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:56,636 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:56,663 INFO L85 PathProgramCache]: Analyzing trace with hash 1835576456, now seen corresponding path program 2 times [2024-04-27 12:35:56,663 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,717 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:56,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,717 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,733 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:56,823 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:56,823 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:56,869 INFO L85 PathProgramCache]: Analyzing trace with hash 1068295392, now seen corresponding path program 1 times [2024-04-27 12:35:56,869 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,883 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:56,883 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:56,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:56,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:56,916 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,013 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,013 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:57,047 INFO L85 PathProgramCache]: Analyzing trace with hash -1242581110, now seen corresponding path program 1 times [2024-04-27 12:35:57,047 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,048 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,061 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,080 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,166 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,167 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:57,198 INFO L85 PathProgramCache]: Analyzing trace with hash 1068295393, now seen corresponding path program 3 times [2024-04-27 12:35:57,199 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,199 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,213 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,227 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,307 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,307 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:57,333 INFO L85 PathProgramCache]: Analyzing trace with hash 1068295393, now seen corresponding path program 4 times [2024-04-27 12:35:57,334 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,347 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,347 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,347 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,360 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,439 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,440 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:57,471 INFO L85 PathProgramCache]: Analyzing trace with hash 1029043471, now seen corresponding path program 5 times [2024-04-27 12:35:57,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,472 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,485 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,485 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,485 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,497 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,578 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,578 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:57,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1029043471, now seen corresponding path program 6 times [2024-04-27 12:35:57,602 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,661 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,662 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,677 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,768 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,768 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:57,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1235012236, now seen corresponding path program 7 times [2024-04-27 12:35:57,797 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,813 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:35:57,814 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,814 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,829 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:35:57,919 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:57,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:57,947 INFO L85 PathProgramCache]: Analyzing trace with hash 1835584322, now seen corresponding path program 8 times [2024-04-27 12:35:57,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,964 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:57,965 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:57,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:57,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:57,979 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:35:58,057 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,057 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:58,082 INFO L85 PathProgramCache]: Analyzing trace with hash 1766431952, now seen corresponding path program 3 times [2024-04-27 12:35:58,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,083 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,095 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,095 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,114 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,195 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,195 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:58,223 INFO L85 PathProgramCache]: Analyzing trace with hash -1075184236, now seen corresponding path program 3 times [2024-04-27 12:35:58,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,235 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,235 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,247 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,333 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:58,361 INFO L85 PathProgramCache]: Analyzing trace with hash 1029027180, now seen corresponding path program 3 times [2024-04-27 12:35:58,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,374 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,374 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,374 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,386 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,476 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,476 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:35:58,503 INFO L85 PathProgramCache]: Analyzing trace with hash 1766431953, now seen corresponding path program 9 times [2024-04-27 12:35:58,503 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,515 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,527 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,605 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,605 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:58,632 INFO L85 PathProgramCache]: Analyzing trace with hash 1766431953, now seen corresponding path program 10 times [2024-04-27 12:35:58,632 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,646 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,658 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,772 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:58,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:58,913 INFO L85 PathProgramCache]: Analyzing trace with hash -1074943942, now seen corresponding path program 11 times [2024-04-27 12:35:58,913 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,928 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:58,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:58,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:58,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:58,952 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:59,043 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,043 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:35:59,075 INFO L85 PathProgramCache]: Analyzing trace with hash 1442455228, now seen corresponding path program 12 times [2024-04-27 12:35:59,075 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,088 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:59,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,100 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:35:59,191 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,192 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:35:59,215 INFO L85 PathProgramCache]: Analyzing trace with hash -802867016, now seen corresponding path program 1 times [2024-04-27 12:35:59,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,224 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,224 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,233 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,318 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,319 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:59,344 INFO L85 PathProgramCache]: Analyzing trace with hash 1538914140, now seen corresponding path program 2 times [2024-04-27 12:35:59,345 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,364 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:59,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,375 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:59,468 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,469 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:59,495 INFO L85 PathProgramCache]: Analyzing trace with hash -866061426, now seen corresponding path program 1 times [2024-04-27 12:35:59,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,508 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:59,508 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,520 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:35:59,605 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,606 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:59,652 INFO L85 PathProgramCache]: Analyzing trace with hash -148387076, now seen corresponding path program 2 times [2024-04-27 12:35:59,652 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,665 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,665 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,665 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,677 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,772 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,772 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:59,800 INFO L85 PathProgramCache]: Analyzing trace with hash -305715226, now seen corresponding path program 1 times [2024-04-27 12:35:59,800 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,813 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,813 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,825 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,907 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:35:59,908 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:35:59,935 INFO L85 PathProgramCache]: Analyzing trace with hash 549401940, now seen corresponding path program 2 times [2024-04-27 12:35:59,935 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,935 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,947 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:35:59,947 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:35:59,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:35:59,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:35:59,967 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:00,104 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,105 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:00,131 INFO L85 PathProgramCache]: Analyzing trace with hash -148258062, now seen corresponding path program 1 times [2024-04-27 12:36:00,131 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,145 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:00,145 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,146 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,157 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:00,257 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:00,284 INFO L85 PathProgramCache]: Analyzing trace with hash 1541743456, now seen corresponding path program 2 times [2024-04-27 12:36:00,285 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,297 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:00,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,308 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:00,393 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:00,420 INFO L85 PathProgramCache]: Analyzing trace with hash 549432692, now seen corresponding path program 1 times [2024-04-27 12:36:00,420 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,438 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:00,438 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,450 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:00,541 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,541 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:00,605 INFO L85 PathProgramCache]: Analyzing trace with hash 901356330, now seen corresponding path program 2 times [2024-04-27 12:36:00,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,606 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,619 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:00,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,631 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:00,735 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,735 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:00,777 INFO L85 PathProgramCache]: Analyzing trace with hash -2122724738, now seen corresponding path program 1 times [2024-04-27 12:36:00,777 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,790 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:00,790 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,803 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:00,896 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:00,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:00,945 INFO L85 PathProgramCache]: Analyzing trace with hash -1379957332, now seen corresponding path program 1 times [2024-04-27 12:36:00,945 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,958 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:00,959 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:00,959 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:00,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:00,971 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,056 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,056 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:01,088 INFO L85 PathProgramCache]: Analyzing trace with hash -2122724737, now seen corresponding path program 3 times [2024-04-27 12:36:01,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,101 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,101 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,113 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,192 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,193 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:01,225 INFO L85 PathProgramCache]: Analyzing trace with hash -2122724737, now seen corresponding path program 4 times [2024-04-27 12:36:01,225 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,225 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,283 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,284 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,296 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,385 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,385 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:01,443 INFO L85 PathProgramCache]: Analyzing trace with hash 29076013, now seen corresponding path program 5 times [2024-04-27 12:36:01,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,463 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,463 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,475 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,552 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,552 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:01,578 INFO L85 PathProgramCache]: Analyzing trace with hash 29076013, now seen corresponding path program 6 times [2024-04-27 12:36:01,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,604 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,616 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,698 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:01,723 INFO L85 PathProgramCache]: Analyzing trace with hash -1372388458, now seen corresponding path program 7 times [2024-04-27 12:36:01,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,736 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:01,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,748 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:01,836 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,836 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:01,865 INFO L85 PathProgramCache]: Analyzing trace with hash 901364196, now seen corresponding path program 8 times [2024-04-27 12:36:01,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,881 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:01,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:01,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:01,896 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:01,983 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:01,983 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:02,015 INFO L85 PathProgramCache]: Analyzing trace with hash -147455634, now seen corresponding path program 3 times [2024-04-27 12:36:02,015 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:02,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:02,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:02,027 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:02,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:02,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:02,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:02,039 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:02,129 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:02,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:04,154 INFO L85 PathProgramCache]: Analyzing trace with hash -276157258, now seen corresponding path program 3 times [2024-04-27 12:36:04,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,154 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,166 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,167 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,179 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,263 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:04,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:04,288 INFO L85 PathProgramCache]: Analyzing trace with hash 29059722, now seen corresponding path program 3 times [2024-04-27 12:36:04,288 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,300 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,300 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,314 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,434 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:04,435 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:04,475 INFO L85 PathProgramCache]: Analyzing trace with hash -147455633, now seen corresponding path program 9 times [2024-04-27 12:36:04,475 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,489 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,503 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,592 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:04,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:04,628 INFO L85 PathProgramCache]: Analyzing trace with hash -147455633, now seen corresponding path program 10 times [2024-04-27 12:36:04,628 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,628 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,641 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,641 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,654 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,743 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:04,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:04,774 INFO L85 PathProgramCache]: Analyzing trace with hash -275916964, now seen corresponding path program 11 times [2024-04-27 12:36:04,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,787 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,788 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,788 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,813 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,896 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:04,897 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:04,928 INFO L85 PathProgramCache]: Analyzing trace with hash 549432926, now seen corresponding path program 12 times [2024-04-27 12:36:04,928 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,928 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,939 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:04,939 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:04,940 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:04,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:04,954 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:05,047 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:05,047 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:05,077 INFO L85 PathProgramCache]: Analyzing trace with hash -1965561510, now seen corresponding path program 1 times [2024-04-27 12:36:05,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:05,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:05,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:05,085 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:05,085 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:05,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:05,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:05,092 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:05,173 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:05,174 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:07,196 INFO L85 PathProgramCache]: Analyzing trace with hash 881002366, now seen corresponding path program 2 times [2024-04-27 12:36:07,196 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,196 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,211 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:07,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,222 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:07,312 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:07,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:07,348 INFO L85 PathProgramCache]: Analyzing trace with hash -1794914828, now seen corresponding path program 1 times [2024-04-27 12:36:07,348 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,348 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,378 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:07,378 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,390 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:07,490 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:07,491 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:07,522 INFO L85 PathProgramCache]: Analyzing trace with hash 784723546, now seen corresponding path program 2 times [2024-04-27 12:36:07,522 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,534 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,552 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,643 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:07,643 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:07,672 INFO L85 PathProgramCache]: Analyzing trace with hash -1444057016, now seen corresponding path program 1 times [2024-04-27 12:36:07,672 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,683 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,684 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,694 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,776 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:07,776 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:07,809 INFO L85 PathProgramCache]: Analyzing trace with hash -251781714, now seen corresponding path program 2 times [2024-04-27 12:36:07,809 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,809 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,866 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,866 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,878 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,955 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:07,955 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:07,974 INFO L85 PathProgramCache]: Analyzing trace with hash 784852440, now seen corresponding path program 1 times [2024-04-27 12:36:07,974 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,986 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:07,986 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:07,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:07,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:07,997 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:08,075 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:08,075 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:08,093 INFO L85 PathProgramCache]: Analyzing trace with hash 1377351486, now seen corresponding path program 2 times [2024-04-27 12:36:08,093 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:08,093 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:08,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:08,105 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:08,106 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:08,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:08,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:08,119 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:08,201 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:08,201 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:09,816 INFO L85 PathProgramCache]: Analyzing trace with hash -1414504350, now seen corresponding path program 1 times [2024-04-27 12:36:09,816 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:09,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:09,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:09,828 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:09,829 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:09,829 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:09,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:09,840 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:09,928 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:09,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:10,000 INFO L85 PathProgramCache]: Analyzing trace with hash -2129011578, now seen corresponding path program 2 times [2024-04-27 12:36:10,000 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,000 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,013 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:10,013 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,025 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:10,110 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:10,111 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:10,147 INFO L85 PathProgramCache]: Analyzing trace with hash 1885347772, now seen corresponding path program 3 times [2024-04-27 12:36:10,148 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,148 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,162 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,162 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,162 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,176 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,264 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:10,264 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:10,332 INFO L85 PathProgramCache]: Analyzing trace with hash -1683761108, now seen corresponding path program 1 times [2024-04-27 12:36:10,333 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,356 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,357 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,357 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,370 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:10,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:10,567 INFO L85 PathProgramCache]: Analyzing trace with hash -656986690, now seen corresponding path program 1 times [2024-04-27 12:36:10,567 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,587 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,587 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,604 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,684 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:10,685 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:10,714 INFO L85 PathProgramCache]: Analyzing trace with hash -1683761107, now seen corresponding path program 4 times [2024-04-27 12:36:10,714 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,715 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,728 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,728 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,741 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,871 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:10,872 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:10,897 INFO L85 PathProgramCache]: Analyzing trace with hash -1683761107, now seen corresponding path program 5 times [2024-04-27 12:36:10,897 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,911 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:10,912 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:10,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:10,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:10,926 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,026 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,026 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:11,059 INFO L85 PathProgramCache]: Analyzing trace with hash -1601750317, now seen corresponding path program 6 times [2024-04-27 12:36:11,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,073 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,086 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,184 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,209 INFO L85 PathProgramCache]: Analyzing trace with hash -1601750317, now seen corresponding path program 7 times [2024-04-27 12:36:11,209 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,209 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,222 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,222 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,235 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,333 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,356 INFO L85 PathProgramCache]: Analyzing trace with hash -649536984, now seen corresponding path program 8 times [2024-04-27 12:36:11,356 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,371 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-04-27 12:36:11,371 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,371 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,385 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2024-04-27 12:36:11,483 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,518 INFO L85 PathProgramCache]: Analyzing trace with hash 1885355518, now seen corresponding path program 9 times [2024-04-27 12:36:11,518 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,518 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,532 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,532 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,545 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:11,628 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,628 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,647 INFO L85 PathProgramCache]: Analyzing trace with hash -1574849380, now seen corresponding path program 3 times [2024-04-27 12:36:11,647 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,659 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:11,660 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,660 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,672 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:11,757 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,757 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,786 INFO L85 PathProgramCache]: Analyzing trace with hash -1575690424, now seen corresponding path program 3 times [2024-04-27 12:36:11,786 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,786 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,799 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:11,799 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,812 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:11,896 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:11,896 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:11,917 INFO L85 PathProgramCache]: Analyzing trace with hash -1601762760, now seen corresponding path program 3 times [2024-04-27 12:36:11,917 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,930 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:11,931 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:11,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:11,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:11,943 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,024 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:12,054 INFO L85 PathProgramCache]: Analyzing trace with hash -1574849379, now seen corresponding path program 10 times [2024-04-27 12:36:12,054 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,055 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,066 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,066 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,081 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,233 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,233 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:12,251 INFO L85 PathProgramCache]: Analyzing trace with hash -1574849379, now seen corresponding path program 11 times [2024-04-27 12:36:12,251 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,265 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,265 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,277 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,363 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,363 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:12,391 INFO L85 PathProgramCache]: Analyzing trace with hash -1575690392, now seen corresponding path program 12 times [2024-04-27 12:36:12,391 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,391 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,404 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,404 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,404 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,417 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,499 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,499 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:12,519 INFO L85 PathProgramCache]: Analyzing trace with hash 1890533380, now seen corresponding path program 13 times [2024-04-27 12:36:12,519 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,533 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:12,533 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,546 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:12,634 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:12,671 INFO L85 PathProgramCache]: Analyzing trace with hash -1575684618, now seen corresponding path program 14 times [2024-04-27 12:36:12,673 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,699 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,700 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,713 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:12,795 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,795 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:12,815 INFO L85 PathProgramCache]: Analyzing trace with hash 1618870162, now seen corresponding path program 1 times [2024-04-27 12:36:12,815 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,815 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,826 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:12,827 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,827 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,838 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:12,919 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:12,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:12,938 INFO L85 PathProgramCache]: Analyzing trace with hash -266471560, now seen corresponding path program 2 times [2024-04-27 12:36:12,938 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,938 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,950 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:12,950 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:12,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:12,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:12,973 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,057 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,058 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,077 INFO L85 PathProgramCache]: Analyzing trace with hash 328633066, now seen corresponding path program 1 times [2024-04-27 12:36:13,077 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,088 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,088 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,100 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,184 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1376876752, now seen corresponding path program 2 times [2024-04-27 12:36:13,201 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,212 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,213 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,232 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,330 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,330 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,354 INFO L85 PathProgramCache]: Analyzing trace with hash -266342666, now seen corresponding path program 1 times [2024-04-27 12:36:13,354 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,354 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,365 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,381 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,466 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,466 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,496 INFO L85 PathProgramCache]: Analyzing trace with hash 1568436188, now seen corresponding path program 2 times [2024-04-27 12:36:13,496 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,551 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,552 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,564 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:13,667 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,696 INFO L85 PathProgramCache]: Analyzing trace with hash -2026451634, now seen corresponding path program 1 times [2024-04-27 12:36:13,696 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,711 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:13,712 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,728 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:13,832 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,832 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:13,862 INFO L85 PathProgramCache]: Analyzing trace with hash 619119668, now seen corresponding path program 2 times [2024-04-27 12:36:13,862 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,862 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,880 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:13,881 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:13,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:13,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:13,898 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:13,989 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:13,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:14,012 INFO L85 PathProgramCache]: Analyzing trace with hash 358185732, now seen corresponding path program 3 times [2024-04-27 12:36:14,012 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,026 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:14,027 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,027 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,040 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:14,125 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,125 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:14,152 INFO L85 PathProgramCache]: Analyzing trace with hash 619108008, now seen corresponding path program 4 times [2024-04-27 12:36:14,152 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,152 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,164 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:14,164 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,164 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,176 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:14,257 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:14,286 INFO L85 PathProgramCache]: Analyzing trace with hash 318716126, now seen corresponding path program 5 times [2024-04-27 12:36:14,286 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,299 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,299 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,299 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,312 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,403 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,403 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:14,437 INFO L85 PathProgramCache]: Analyzing trace with hash 1290265418, now seen corresponding path program 1 times [2024-04-27 12:36:14,437 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,437 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,450 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,451 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,451 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,464 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,555 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,555 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:14,604 INFO L85 PathProgramCache]: Analyzing trace with hash 1343522400, now seen corresponding path program 1 times [2024-04-27 12:36:14,604 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,617 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,617 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,630 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,711 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,711 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:14,746 INFO L85 PathProgramCache]: Analyzing trace with hash 1290265419, now seen corresponding path program 6 times [2024-04-27 12:36:14,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,759 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,759 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,774 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,859 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:14,860 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:14,884 INFO L85 PathProgramCache]: Analyzing trace with hash 1290265419, now seen corresponding path program 7 times [2024-04-27 12:36:14,885 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,897 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:14,898 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:14,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:14,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:14,921 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:15,002 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,002 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:15,028 INFO L85 PathProgramCache]: Analyzing trace with hash 1257207153, now seen corresponding path program 8 times [2024-04-27 12:36:15,028 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,042 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:15,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,054 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:15,176 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,176 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:15,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1257207153, now seen corresponding path program 9 times [2024-04-27 12:36:15,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,215 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:15,215 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,230 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:15,309 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,309 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:15,336 INFO L85 PathProgramCache]: Analyzing trace with hash 2012479162, now seen corresponding path program 3 times [2024-04-27 12:36:15,336 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,363 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,364 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,377 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,461 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,462 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:15,481 INFO L85 PathProgramCache]: Analyzing trace with hash -2037655318, now seen corresponding path program 3 times [2024-04-27 12:36:15,481 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,481 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,494 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,494 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,494 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,506 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,588 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,588 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:15,621 INFO L85 PathProgramCache]: Analyzing trace with hash 1257194710, now seen corresponding path program 3 times [2024-04-27 12:36:15,621 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,621 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,633 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,656 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,743 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,743 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:15,774 INFO L85 PathProgramCache]: Analyzing trace with hash 2012479163, now seen corresponding path program 10 times [2024-04-27 12:36:15,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,786 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,787 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,787 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,798 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,877 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:15,878 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:15,896 INFO L85 PathProgramCache]: Analyzing trace with hash 2012479163, now seen corresponding path program 11 times [2024-04-27 12:36:15,896 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,908 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:15,908 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:15,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:15,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:15,927 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:16,005 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:16,005 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:16,030 INFO L85 PathProgramCache]: Analyzing trace with hash -2037655286, now seen corresponding path program 12 times [2024-04-27 12:36:16,030 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,030 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,042 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:16,042 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,042 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,054 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:16,148 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:16,148 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:16,189 INFO L85 PathProgramCache]: Analyzing trace with hash 323901734, now seen corresponding path program 13 times [2024-04-27 12:36:16,189 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,189 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,202 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:16,202 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,202 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,214 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:16,295 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:16,295 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:16,340 INFO L85 PathProgramCache]: Analyzing trace with hash -2037649512, now seen corresponding path program 14 times [2024-04-27 12:36:16,340 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,352 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:16,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:16,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:16,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:16,365 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:16,470 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:16,470 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:18,510 INFO L85 PathProgramCache]: Analyzing trace with hash -329752206, now seen corresponding path program 1 times [2024-04-27 12:36:18,510 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,554 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:18,555 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,577 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:18,661 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:18,661 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:18,682 INFO L85 PathProgramCache]: Analyzing trace with hash 1572381610, now seen corresponding path program 2 times [2024-04-27 12:36:18,683 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,683 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,731 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:18,732 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,792 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:18,883 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:18,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:18,913 INFO L85 PathProgramCache]: Analyzing trace with hash 1499189766, now seen corresponding path program 1 times [2024-04-27 12:36:18,914 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,914 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,929 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:18,930 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:18,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:18,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:18,945 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:19,051 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:19,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:19,074 INFO L85 PathProgramCache]: Analyzing trace with hash -769757396, now seen corresponding path program 1 times [2024-04-27 12:36:19,074 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,075 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,091 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:19,091 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,091 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,107 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:19,208 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:19,209 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:19,237 INFO L85 PathProgramCache]: Analyzing trace with hash 1499189767, now seen corresponding path program 3 times [2024-04-27 12:36:19,237 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,237 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,468 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:19,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,546 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:19,632 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:19,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:19,660 INFO L85 PathProgramCache]: Analyzing trace with hash 1499189767, now seen corresponding path program 4 times [2024-04-27 12:36:19,661 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,843 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:19,844 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:19,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:19,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:19,903 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:20,000 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,001 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:20,032 INFO L85 PathProgramCache]: Analyzing trace with hash -1057656683, now seen corresponding path program 5 times [2024-04-27 12:36:20,032 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,032 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,062 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:20,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,079 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:20,165 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,165 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:20,195 INFO L85 PathProgramCache]: Analyzing trace with hash -1057656683, now seen corresponding path program 6 times [2024-04-27 12:36:20,195 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,195 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,212 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:20,212 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,212 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,228 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2024-04-27 12:36:20,312 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,313 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:20,344 INFO L85 PathProgramCache]: Analyzing trace with hash -764512236, now seen corresponding path program 7 times [2024-04-27 12:36:20,344 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,344 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,361 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:20,361 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,378 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:20,538 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,538 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:20,571 INFO L85 PathProgramCache]: Analyzing trace with hash 1572387074, now seen corresponding path program 8 times [2024-04-27 12:36:20,571 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,587 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:20,588 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,588 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,604 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:20,709 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,709 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:20,743 INFO L85 PathProgramCache]: Analyzing trace with hash -1632383686, now seen corresponding path program 1 times [2024-04-27 12:36:20,743 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,743 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,758 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:20,758 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,759 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,773 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:20,873 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:20,873 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:20,903 INFO L85 PathProgramCache]: Analyzing trace with hash 935713396, now seen corresponding path program 1 times [2024-04-27 12:36:20,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,919 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:20,919 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:20,919 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:20,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:20,934 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:21,035 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:21,036 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:21,068 INFO L85 PathProgramCache]: Analyzing trace with hash -1632383685, now seen corresponding path program 9 times [2024-04-27 12:36:21,068 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,085 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:21,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,101 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:21,197 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:21,198 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:21,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1632383685, now seen corresponding path program 10 times [2024-04-27 12:36:21,217 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,232 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:21,232 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,247 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:36:21,331 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:21,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:21,353 INFO L85 PathProgramCache]: Analyzing trace with hash 935477016, now seen corresponding path program 11 times [2024-04-27 12:36:21,353 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,566 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:21,566 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,602 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:21,693 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:21,693 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:21,722 INFO L85 PathProgramCache]: Analyzing trace with hash -329752450, now seen corresponding path program 12 times [2024-04-27 12:36:21,723 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,723 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,875 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:21,875 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:21,904 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 4 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:21,977 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:21,977 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:21,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1700856378, now seen corresponding path program 13 times [2024-04-27 12:36:21,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:21,995 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:21,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,076 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:22,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,100 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:22,184 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:22,184 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:22,211 INFO L85 PathProgramCache]: Analyzing trace with hash -1859556964, now seen corresponding path program 14 times [2024-04-27 12:36:22,211 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,211 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,297 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:22,297 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,297 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,315 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:22,428 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:22,429 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:22,473 INFO L85 PathProgramCache]: Analyzing trace with hash 1826652934, now seen corresponding path program 1 times [2024-04-27 12:36:22,473 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,491 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:22,491 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,509 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:22,595 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:22,596 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:22,615 INFO L85 PathProgramCache]: Analyzing trace with hash 862837566, now seen corresponding path program 2 times [2024-04-27 12:36:22,615 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,633 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:22,633 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,651 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:22,735 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:22,736 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:22,755 INFO L85 PathProgramCache]: Analyzing trace with hash 978160882, now seen corresponding path program 1 times [2024-04-27 12:36:22,755 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,755 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,774 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:22,774 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,793 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:22,870 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:22,871 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:22,895 INFO L85 PathProgramCache]: Analyzing trace with hash 258216384, now seen corresponding path program 1 times [2024-04-27 12:36:22,895 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,910 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:22,910 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:22,910 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:22,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:22,925 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:23,012 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:23,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:23,046 INFO L85 PathProgramCache]: Analyzing trace with hash 978160883, now seen corresponding path program 3 times [2024-04-27 12:36:23,046 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:23,046 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:23,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:23,062 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:23,062 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:23,062 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:23,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:23,078 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:23,175 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:23,175 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:23,200 INFO L85 PathProgramCache]: Analyzing trace with hash 978160883, now seen corresponding path program 4 times [2024-04-27 12:36:23,200 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:23,200 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:23,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:23,248 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:23,249 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:23,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:23,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:23,305 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:23,407 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:23,407 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:25,452 INFO L85 PathProgramCache]: Analyzing trace with hash 582022785, now seen corresponding path program 5 times [2024-04-27 12:36:25,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,453 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,470 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:25,470 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,470 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,487 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:25,574 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:25,574 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:25,608 INFO L85 PathProgramCache]: Analyzing trace with hash 582022785, now seen corresponding path program 6 times [2024-04-27 12:36:25,608 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,608 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,623 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:25,623 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,639 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2024-04-27 12:36:25,730 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:25,730 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:25,761 INFO L85 PathProgramCache]: Analyzing trace with hash 263461544, now seen corresponding path program 7 times [2024-04-27 12:36:25,761 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,761 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,777 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:25,778 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,794 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:25,889 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:25,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:25,924 INFO L85 PathProgramCache]: Analyzing trace with hash 862843030, now seen corresponding path program 8 times [2024-04-27 12:36:25,924 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,924 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,941 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:25,941 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:25,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:25,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:25,963 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:26,052 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,052 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:26,076 INFO L85 PathProgramCache]: Analyzing trace with hash 791666214, now seen corresponding path program 1 times [2024-04-27 12:36:26,076 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,077 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,169 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:26,169 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,183 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:26,269 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,269 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:26,295 INFO L85 PathProgramCache]: Analyzing trace with hash -1228151032, now seen corresponding path program 1 times [2024-04-27 12:36:26,295 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,295 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,310 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:26,310 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,323 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2024-04-27 12:36:26,424 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,425 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 35 [2024-04-27 12:36:26,452 INFO L85 PathProgramCache]: Analyzing trace with hash 791666215, now seen corresponding path program 9 times [2024-04-27 12:36:26,452 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,452 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,467 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:26,468 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,483 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:26,576 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:26,605 INFO L85 PathProgramCache]: Analyzing trace with hash 791666215, now seen corresponding path program 10 times [2024-04-27 12:36:26,605 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,619 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:26,619 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,619 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,633 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2024-04-27 12:36:26,718 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,719 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:26,738 INFO L85 PathProgramCache]: Analyzing trace with hash -1228387412, now seen corresponding path program 11 times [2024-04-27 12:36:26,738 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,771 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:26,772 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,772 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,803 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:26,883 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:26,883 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:26,902 INFO L85 PathProgramCache]: Analyzing trace with hash 1826652690, now seen corresponding path program 12 times [2024-04-27 12:36:26,903 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,903 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,927 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:26,927 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:26,927 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:26,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:26,951 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 5 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2024-04-27 12:36:27,048 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,048 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:27,072 INFO L85 PathProgramCache]: Analyzing trace with hash -222229042, now seen corresponding path program 13 times [2024-04-27 12:36:27,073 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:27,094 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:27,094 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,095 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:27,117 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:27,217 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:27,245 INFO L85 PathProgramCache]: Analyzing trace with hash -222194384, now seen corresponding path program 1 times [2024-04-27 12:36:27,245 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,245 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,254 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:27,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,393 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,393 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:27,428 INFO L85 PathProgramCache]: Analyzing trace with hash 1219565330, now seen corresponding path program 2 times [2024-04-27 12:36:27,429 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,429 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,435 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:27,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,536 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,536 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:27,558 INFO L85 PathProgramCache]: Analyzing trace with hash 1506240360, now seen corresponding path program 3 times [2024-04-27 12:36:27,558 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,573 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:27,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,684 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:27,804 INFO L85 PathProgramCache]: Analyzing trace with hash -852199313, now seen corresponding path program 4 times [2024-04-27 12:36:27,805 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,813 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:27,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,934 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:27,934 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:27,970 INFO L85 PathProgramCache]: Analyzing trace with hash 1375217297, now seen corresponding path program 5 times [2024-04-27 12:36:27,970 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:27,974 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:27,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:27,993 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:28,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,116 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:28,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:28,155 INFO L85 PathProgramCache]: Analyzing trace with hash -317936646, now seen corresponding path program 6 times [2024-04-27 12:36:28,157 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,182 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:28,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,345 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:28,345 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:28,397 INFO L85 PathProgramCache]: Analyzing trace with hash -1266101326, now seen corresponding path program 1 times [2024-04-27 12:36:28,398 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,398 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,409 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:28,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,516 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:28,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2024-04-27 12:36:28,550 INFO L85 PathProgramCache]: Analyzing trace with hash -1266101325, now seen corresponding path program 7 times [2024-04-27 12:36:28,551 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,551 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,561 INFO L356 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2024-04-27 12:36:28,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2024-04-27 12:36:28,681 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:28,681 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 38 [2024-04-27 12:36:28,718 INFO L85 PathProgramCache]: Analyzing trace with hash -1266101325, now seen corresponding path program 8 times [2024-04-27 12:36:28,718 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:28,779 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:28,779 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,779 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:28,814 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:28,911 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:28,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 60 treesize of output 52 [2024-04-27 12:36:28,968 INFO L85 PathProgramCache]: Analyzing trace with hash -594435307, now seen corresponding path program 1 times [2024-04-27 12:36:28,968 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:28,968 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:28,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:29,086 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 12:36:29,086 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:29,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:29,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:29,124 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 3 proven. 9 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2024-04-27 12:36:29,232 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:29,232 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:31,304 INFO L85 PathProgramCache]: Analyzing trace with hash -594435307, now seen corresponding path program 2 times [2024-04-27 12:36:31,304 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:31,304 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:31,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:31,339 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:31,339 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:31,339 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:31,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:31,374 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:31,482 INFO L349 Elim1Store]: treesize reduction 4, result has 50.0 percent of original size [2024-04-27 12:36:31,483 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 28 treesize of output 24 [2024-04-27 12:36:31,579 INFO L85 PathProgramCache]: Analyzing trace with hash -1247625227, now seen corresponding path program 1 times [2024-04-27 12:36:31,579 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:31,579 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:31,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:31,614 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:31,614 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:31,615 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:31,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:31,650 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 7 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2024-04-27 12:36:32,379 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2024-04-27 12:36:32,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1164759676, now seen corresponding path program 1 times [2024-04-27 12:36:32,427 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:32,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:32,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:32,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:32,444 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:32,444 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:32,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:32,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:32,455 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 12:36:32,456 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=2955, Unknown=0, NotChecked=0, Total=3192 [2024-04-27 12:36:33,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:33,225 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable306,SelfDestructingSolverStorable307,SelfDestructingSolverStorable308,SelfDestructingSolverStorable309,SelfDestructingSolverStorable302,SelfDestructingSolverStorable303,SelfDestructingSolverStorable304,SelfDestructingSolverStorable305,SelfDestructingSolverStorable300,SelfDestructingSolverStorable301,SelfDestructingSolverStorable330,SelfDestructingSolverStorable207,SelfDestructingSolverStorable328,SelfDestructingSolverStorable208,SelfDestructingSolverStorable329,SelfDestructingSolverStorable209,SelfDestructingSolverStorable203,SelfDestructingSolverStorable324,SelfDestructingSolverStorable204,SelfDestructingSolverStorable325,SelfDestructingSolverStorable205,SelfDestructingSolverStorable326,SelfDestructingSolverStorable206,SelfDestructingSolverStorable327,SelfDestructingSolverStorable320,SelfDestructingSolverStorable200,SelfDestructingSolverStorable321,SelfDestructingSolverStorable201,SelfDestructingSolverStorable322,SelfDestructingSolverStorable202,SelfDestructingSolverStorable323,SelfDestructingSolverStorable317,SelfDestructingSolverStorable318,SelfDestructingSolverStorable319,SelfDestructingSolverStorable313,SelfDestructingSolverStorable314,SelfDestructingSolverStorable315,SelfDestructingSolverStorable316,SelfDestructingSolverStorable310,SelfDestructingSolverStorable311,SelfDestructingSolverStorable312,SelfDestructingSolverStorable90,SelfDestructingSolverStorable91,SelfDestructingSolverStorable92,SelfDestructingSolverStorable93,SelfDestructingSolverStorable94,SelfDestructingSolverStorable95,SelfDestructingSolverStorable96,SelfDestructingSolverStorable97,SelfDestructingSolverStorable98,SelfDestructingSolverStorable99,SelfDestructingSolverStorable195,SelfDestructingSolverStorable196,SelfDestructingSolverStorable197,SelfDestructingSolverStorable198,SelfDestructingSolverStorable191,SelfDestructingSolverStorable192,SelfDestructingSolverStorable193,SelfDestructingSolverStorable194,SelfDestructingSolverStorable190,SelfDestructingSolverStorable188,SelfDestructingSolverStorable189,SelfDestructingSolverStorable184,SelfDestructingSolverStorable185,SelfDestructingSolverStorable186,SelfDestructingSolverStorable187,SelfDestructingSolverStorable180,SelfDestructingSolverStorable181,SelfDestructingSolverStorable182,SelfDestructingSolverStorable183,SelfDestructingSolverStorable177,SelfDestructingSolverStorable298,SelfDestructingSolverStorable178,SelfDestructingSolverStorable299,SelfDestructingSolverStorable179,SelfDestructingSolverStorable199,SelfDestructingSolverStorable151,SelfDestructingSolverStorable272,SelfDestructingSolverStorable393,SelfDestructingSolverStorable152,SelfDestructingSolverStorable273,SelfDestructingSolverStorable394,SelfDestructingSolverStorable153,SelfDestructingSolverStorable274,SelfDestructingSolverStorable154,SelfDestructingSolverStorable275,SelfDestructingSolverStorable390,SelfDestructingSolverStorable30,SelfDestructingSolverStorable270,SelfDestructingSolverStorable391,SelfDestructingSolverStorable31,SelfDestructingSolverStorable150,SelfDestructingSolverStorable271,SelfDestructingSolverStorable392,SelfDestructingSolverStorable4,SelfDestructingSolverStorable3,SelfDestructingSolverStorable2,SelfDestructingSolverStorable1,SelfDestructingSolverStorable8,SelfDestructingSolverStorable7,SelfDestructingSolverStorable6,SelfDestructingSolverStorable5,SelfDestructingSolverStorable32,SelfDestructingSolverStorable148,SelfDestructingSolverStorable269,SelfDestructingSolverStorable33,SelfDestructingSolverStorable149,SelfDestructingSolverStorable34,SelfDestructingSolverStorable9,SelfDestructingSolverStorable35,SelfDestructingSolverStorable36,SelfDestructingSolverStorable144,SelfDestructingSolverStorable265,SelfDestructingSolverStorable386,SelfDestructingSolverStorable37,SelfDestructingSolverStorable145,SelfDestructingSolverStorable266,SelfDestructingSolverStorable387,SelfDestructingSolverStorable38,SelfDestructingSolverStorable146,SelfDestructingSolverStorable267,SelfDestructingSolverStorable388,SelfDestructingSolverStorable39,SelfDestructingSolverStorable147,SelfDestructingSolverStorable268,SelfDestructingSolverStorable389,SelfDestructingSolverStorable140,SelfDestructingSolverStorable261,SelfDestructingSolverStorable382,SelfDestructingSolverStorable141,SelfDestructingSolverStorable262,SelfDestructingSolverStorable383,SelfDestructingSolverStorable142,SelfDestructingSolverStorable263,SelfDestructingSolverStorable384,SelfDestructingSolverStorable143,SelfDestructingSolverStorable264,SelfDestructingSolverStorable385,SelfDestructingSolverStorable40,SelfDestructingSolverStorable41,SelfDestructingSolverStorable380,SelfDestructingSolverStorable42,SelfDestructingSolverStorable260,SelfDestructingSolverStorable381,SelfDestructingSolverStorable0,SelfDestructingSolverStorable43,SelfDestructingSolverStorable137,SelfDestructingSolverStorable258,SelfDestructingSolverStorable379,SelfDestructingSolverStorable44,SelfDestructingSolverStorable138,SelfDestructingSolverStorable259,SelfDestructingSolverStorable45,SelfDestructingSolverStorable139,SelfDestructingSolverStorable46,SelfDestructingSolverStorable47,SelfDestructingSolverStorable133,SelfDestructingSolverStorable254,SelfDestructingSolverStorable375,SelfDestructingSolverStorable48,SelfDestructingSolverStorable134,SelfDestructingSolverStorable255,SelfDestructingSolverStorable376,SelfDestructingSolverStorable49,SelfDestructingSolverStorable135,SelfDestructingSolverStorable256,SelfDestructingSolverStorable377,SelfDestructingSolverStorable136,SelfDestructingSolverStorable257,SelfDestructingSolverStorable378,SelfDestructingSolverStorable173,SelfDestructingSolverStorable294,SelfDestructingSolverStorable174,SelfDestructingSolverStorable295,SelfDestructingSolverStorable175,SelfDestructingSolverStorable296,SelfDestructingSolverStorable176,SelfDestructingSolverStorable297,SelfDestructingSolverStorable290,SelfDestructingSolverStorable170,SelfDestructingSolverStorable291,SelfDestructingSolverStorable171,SelfDestructingSolverStorable292,SelfDestructingSolverStorable172,SelfDestructingSolverStorable293,SelfDestructingSolverStorable18,SelfDestructingSolverStorable19,SelfDestructingSolverStorable10,SelfDestructingSolverStorable11,SelfDestructingSolverStorable12,SelfDestructingSolverStorable13,SelfDestructingSolverStorable14,SelfDestructingSolverStorable166,SelfDestructingSolverStorable287,SelfDestructingSolverStorable15,SelfDestructingSolverStorable167,SelfDestructingSolverStorable288,SelfDestructingSolverStorable16,SelfDestructingSolverStorable168,SelfDestructingSolverStorable289,SelfDestructingSolverStorable17,SelfDestructingSolverStorable169,SelfDestructingSolverStorable162,SelfDestructingSolverStorable283,SelfDestructingSolverStorable163,SelfDestructingSolverStorable284,SelfDestructingSolverStorable164,SelfDestructingSolverStorable285,SelfDestructingSolverStorable165,SelfDestructingSolverStorable286,SelfDestructingSolverStorable280,SelfDestructingSolverStorable160,SelfDestructingSolverStorable281,SelfDestructingSolverStorable20,SelfDestructingSolverStorable161,SelfDestructingSolverStorable282,SelfDestructingSolverStorable29,SelfDestructingSolverStorable21,SelfDestructingSolverStorable159,SelfDestructingSolverStorable22,SelfDestructingSolverStorable23,SelfDestructingSolverStorable24,SelfDestructingSolverStorable25,SelfDestructingSolverStorable155,SelfDestructingSolverStorable276,SelfDestructingSolverStorable26,SelfDestructingSolverStorable156,SelfDestructingSolverStorable277,SelfDestructingSolverStorable27,SelfDestructingSolverStorable157,SelfDestructingSolverStorable278,SelfDestructingSolverStorable28,SelfDestructingSolverStorable158,SelfDestructingSolverStorable279,SelfDestructingSolverStorable350,SelfDestructingSolverStorable70,SelfDestructingSolverStorable230,SelfDestructingSolverStorable351,SelfDestructingSolverStorable71,SelfDestructingSolverStorable110,SelfDestructingSolverStorable231,SelfDestructingSolverStorable352,SelfDestructingSolverStorable72,SelfDestructingSolverStorable73,SelfDestructingSolverStorable74,SelfDestructingSolverStorable75,SelfDestructingSolverStorable108,SelfDestructingSolverStorable229,SelfDestructingSolverStorable109,SelfDestructingSolverStorable76,SelfDestructingSolverStorable104,SelfDestructingSolverStorable225,SelfDestructingSolverStorable346,SelfDestructingSolverStorable77,SelfDestructingSolverStorable105,SelfDestructingSolverStorable226,SelfDestructingSolverStorable347,SelfDestructingSolverStorable78,SelfDestructingSolverStorable106,SelfDestructingSolverStorable227,SelfDestructingSolverStorable348,SelfDestructingSolverStorable79,SelfDestructingSolverStorable107,SelfDestructingSolverStorable228,SelfDestructingSolverStorable349,SelfDestructingSolverStorable100,SelfDestructingSolverStorable221,SelfDestructingSolverStorable342,SelfDestructingSolverStorable101,SelfDestructingSolverStorable222,SelfDestructingSolverStorable343,SelfDestructingSolverStorable102,SelfDestructingSolverStorable223,SelfDestructingSolverStorable344,SelfDestructingSolverStorable103,SelfDestructingSolverStorable224,SelfDestructingSolverStorable345,SelfDestructingSolverStorable80,SelfDestructingSolverStorable81,SelfDestructingSolverStorable340,SelfDestructingSolverStorable82,SelfDestructingSolverStorable220,SelfDestructingSolverStorable341,SelfDestructingSolverStorable83,SelfDestructingSolverStorable84,SelfDestructingSolverStorable85,SelfDestructingSolverStorable86,SelfDestructingSolverStorable218,SelfDestructingSolverStorable339,SelfDestructingSolverStorable219,SelfDestructingSolverStorable87,SelfDestructingSolverStorable214,SelfDestructingSolverStorable335,SelfDestructingSolverStorable88,SelfDestructingSolverStorable215,SelfDestructingSolverStorable336,SelfDestructingSolverStorable89,SelfDestructingSolverStorable216,SelfDestructingSolverStorable337,SelfDestructingSolverStorable217,SelfDestructingSolverStorable338,SelfDestructingSolverStorable210,SelfDestructingSolverStorable331,SelfDestructingSolverStorable211,SelfDestructingSolverStorable332,SelfDestructingSolverStorable212,SelfDestructingSolverStorable333,SelfDestructingSolverStorable213,SelfDestructingSolverStorable334,SelfDestructingSolverStorable250,SelfDestructingSolverStorable371,SelfDestructingSolverStorable130,SelfDestructingSolverStorable251,SelfDestructingSolverStorable372,SelfDestructingSolverStorable131,SelfDestructingSolverStorable252,SelfDestructingSolverStorable373,SelfDestructingSolverStorable132,SelfDestructingSolverStorable253,SelfDestructingSolverStorable374,SelfDestructingSolverStorable50,SelfDestructingSolverStorable51,SelfDestructingSolverStorable52,SelfDestructingSolverStorable53,SelfDestructingSolverStorable370,SelfDestructingSolverStorable54,SelfDestructingSolverStorable126,SelfDestructingSolverStorable247,SelfDestructingSolverStorable368,SelfDestructingSolverStorable55,SelfDestructingSolverStorable127,SelfDestructingSolverStorable248,SelfDestructingSolverStorable369,SelfDestructingSolverStorable56,SelfDestructingSolverStorable128,SelfDestructingSolverStorable249,SelfDestructingSolverStorable57,SelfDestructingSolverStorable129,SelfDestructingSolverStorable58,SelfDestructingSolverStorable122,SelfDestructingSolverStorable243,SelfDestructingSolverStorable364,SelfDestructingSolverStorable59,SelfDestructingSolverStorable123,SelfDestructingSolverStorable244,SelfDestructingSolverStorable365,SelfDestructingSolverStorable124,SelfDestructingSolverStorable245,SelfDestructingSolverStorable366,SelfDestructingSolverStorable125,SelfDestructingSolverStorable246,SelfDestructingSolverStorable367,SelfDestructingSolverStorable360,SelfDestructingSolverStorable240,SelfDestructingSolverStorable361,SelfDestructingSolverStorable120,SelfDestructingSolverStorable241,SelfDestructingSolverStorable362,SelfDestructingSolverStorable60,SelfDestructingSolverStorable121,SelfDestructingSolverStorable242,SelfDestructingSolverStorable363,SelfDestructingSolverStorable61,SelfDestructingSolverStorable62,SelfDestructingSolverStorable63,SelfDestructingSolverStorable64,SelfDestructingSolverStorable119,SelfDestructingSolverStorable65,SelfDestructingSolverStorable115,SelfDestructingSolverStorable236,SelfDestructingSolverStorable357,SelfDestructingSolverStorable66,SelfDestructingSolverStorable116,SelfDestructingSolverStorable237,SelfDestructingSolverStorable358,SelfDestructingSolverStorable67,SelfDestructingSolverStorable117,SelfDestructingSolverStorable238,SelfDestructingSolverStorable359,SelfDestructingSolverStorable68,SelfDestructingSolverStorable118,SelfDestructingSolverStorable239,SelfDestructingSolverStorable69,SelfDestructingSolverStorable111,SelfDestructingSolverStorable232,SelfDestructingSolverStorable353,SelfDestructingSolverStorable112,SelfDestructingSolverStorable233,SelfDestructingSolverStorable354,SelfDestructingSolverStorable113,SelfDestructingSolverStorable234,SelfDestructingSolverStorable355,SelfDestructingSolverStorable114,SelfDestructingSolverStorable235,SelfDestructingSolverStorable356 [2024-04-27 12:36:33,227 INFO L420 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:33,227 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:33,227 INFO L85 PathProgramCache]: Analyzing trace with hash 2277392, now seen corresponding path program 1 times [2024-04-27 12:36:33,227 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:33,228 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [375762240] [2024-04-27 12:36:33,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:33,228 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:33,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:33,249 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:33,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:33,250 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [375762240] [2024-04-27 12:36:33,250 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [375762240] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:36:33,250 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:36:33,250 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-04-27 12:36:33,250 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760764535] [2024-04-27 12:36:33,250 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:36:33,251 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-04-27 12:36:33,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:33,252 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 12:36:33,252 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-04-27 12:36:33,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:33,252 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:33,252 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.2) internal successors, (31), 4 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:33,252 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:33,252 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:34,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:34,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:34,126 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable395 [2024-04-27 12:36:34,126 INFO L420 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:34,126 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:34,126 INFO L85 PathProgramCache]: Analyzing trace with hash 1695061486, now seen corresponding path program 1 times [2024-04-27 12:36:34,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:34,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [833128830] [2024-04-27 12:36:34,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:34,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:34,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:34,145 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:34,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:34,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [833128830] [2024-04-27 12:36:34,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [833128830] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:36:34,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:36:34,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2024-04-27 12:36:34,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [244326346] [2024-04-27 12:36:34,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:36:34,145 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2024-04-27 12:36:34,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:34,146 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2024-04-27 12:36:34,146 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2024-04-27 12:36:34,146 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:34,146 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:34,146 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 6.6) internal successors, (33), 4 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:34,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:34,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:34,146 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:35,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:35,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:35,004 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:35,004 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable396 [2024-04-27 12:36:35,004 INFO L420 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:35,004 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:35,004 INFO L85 PathProgramCache]: Analyzing trace with hash -1239302896, now seen corresponding path program 1 times [2024-04-27 12:36:35,004 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:35,004 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046198091] [2024-04-27 12:36:35,004 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:35,005 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:35,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:35,154 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:35,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:35,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046198091] [2024-04-27 12:36:35,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2046198091] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 12:36:35,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1375638266] [2024-04-27 12:36:35,154 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:35,154 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:36:35,155 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:36:35,156 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 12:36:35,156 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2024-04-27 12:36:35,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:35,279 INFO L262 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 12 conjunts are in the unsatisfiable core [2024-04-27 12:36:35,280 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 12:36:35,389 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-04-27 12:36:35,421 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:35,421 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 12:36:35,565 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:35,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1375638266] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 12:36:35,565 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 12:36:35,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7] total 15 [2024-04-27 12:36:35,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850912897] [2024-04-27 12:36:35,565 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 12:36:35,565 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-04-27 12:36:35,565 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:35,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-04-27 12:36:35,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2024-04-27 12:36:35,566 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:35,566 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:35,566 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.4) internal successors, (66), 15 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:35,566 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:35,566 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:35,566 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:35,566 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:38,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:38,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:38,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:38,534 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2024-04-27 12:36:38,540 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2024-04-27 12:36:38,735 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 3 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable397 [2024-04-27 12:36:38,735 INFO L420 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:38,735 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:38,736 INFO L85 PathProgramCache]: Analyzing trace with hash 2021480220, now seen corresponding path program 2 times [2024-04-27 12:36:38,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:38,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744179339] [2024-04-27 12:36:38,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:38,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:38,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:38,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:38,758 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:38,758 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744179339] [2024-04-27 12:36:38,758 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744179339] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:36:38,758 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:36:38,758 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-04-27 12:36:38,758 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1080583375] [2024-04-27 12:36:38,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:36:38,759 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-04-27 12:36:38,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:38,759 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 12:36:38,760 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-04-27 12:36:38,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:38,760 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:38,760 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 6.75) internal successors, (27), 3 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:38,760 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:38,760 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:38,760 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:38,760 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 18 states. [2024-04-27 12:36:38,760 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:47,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:47,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:47,398 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,398 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable398 [2024-04-27 12:36:47,399 INFO L420 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:47,399 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:47,399 INFO L85 PathProgramCache]: Analyzing trace with hash 1740352160, now seen corresponding path program 1 times [2024-04-27 12:36:47,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:47,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951492761] [2024-04-27 12:36:47,399 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:47,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:47,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:47,412 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:47,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:47,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951492761] [2024-04-27 12:36:47,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [951492761] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:36:47,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:36:47,412 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-04-27 12:36:47,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1894786671] [2024-04-27 12:36:47,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:36:47,412 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-04-27 12:36:47,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:47,413 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 12:36:47,413 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-04-27 12:36:47,413 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:47,413 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:47,413 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:47,413 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,941 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable399 [2024-04-27 12:36:51,941 INFO L420 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:51,941 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:51,941 INFO L85 PathProgramCache]: Analyzing trace with hash -818888160, now seen corresponding path program 1 times [2024-04-27 12:36:51,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:51,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [745394700] [2024-04-27 12:36:51,942 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:51,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:51,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:51,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2024-04-27 12:36:51,955 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:51,955 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [745394700] [2024-04-27 12:36:51,955 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [745394700] provided 1 perfect and 0 imperfect interpolant sequences [2024-04-27 12:36:51,955 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2024-04-27 12:36:51,955 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2024-04-27 12:36:51,955 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [740896785] [2024-04-27 12:36:51,955 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2024-04-27 12:36:51,955 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2024-04-27 12:36:51,955 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:51,956 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2024-04-27 12:36:51,956 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2024-04-27 12:36:51,956 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:51,956 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:51,956 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 7.25) internal successors, (29), 3 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:51,956 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:56,488 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:56,488 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable400 [2024-04-27 12:36:56,489 INFO L420 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:36:56,489 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:36:56,489 INFO L85 PathProgramCache]: Analyzing trace with hash -408697990, now seen corresponding path program 2 times [2024-04-27 12:36:56,489 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:36:56,489 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [844031262] [2024-04-27 12:36:56,489 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:36:56,489 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:36:56,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:36:56,611 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:56,612 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:36:56,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [844031262] [2024-04-27 12:36:56,612 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [844031262] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 12:36:56,612 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1685063958] [2024-04-27 12:36:56,612 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2024-04-27 12:36:56,612 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:36:56,612 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:36:56,613 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 12:36:56,615 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2024-04-27 12:36:56,709 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2024-04-27 12:36:56,709 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-04-27 12:36:56,710 INFO L262 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 16 conjunts are in the unsatisfiable core [2024-04-27 12:36:56,712 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 12:36:56,787 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11 [2024-04-27 12:36:56,796 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 13 [2024-04-27 12:36:56,802 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7 [2024-04-27 12:36:56,822 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:56,822 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 12:36:57,069 INFO L349 Elim1Store]: treesize reduction 48, result has 2.0 percent of original size [2024-04-27 12:36:57,070 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 4 new quantified variables, introduced 6 case distinctions, treesize of input 137 treesize of output 1 [2024-04-27 12:36:57,070 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:36:57,070 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1685063958] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 12:36:57,070 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 12:36:57,070 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 15 [2024-04-27 12:36:57,070 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130262348] [2024-04-27 12:36:57,071 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 12:36:57,071 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2024-04-27 12:36:57,071 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:36:57,072 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2024-04-27 12:36:57,072 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=149, Unknown=0, NotChecked=0, Total=210 [2024-04-27 12:36:57,072 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:36:57,072 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:36:57,072 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 4.466666666666667) internal successors, (67), 15 states have internal predecessors, (67), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:57,072 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:36:57,073 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:37:17,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,260 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-04-27 12:37:17,267 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2024-04-27 12:37:17,460 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable401,4 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:37:17,461 INFO L420 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:37:17,461 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:37:17,461 INFO L85 PathProgramCache]: Analyzing trace with hash -278730592, now seen corresponding path program 3 times [2024-04-27 12:37:17,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:37:17,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270042631] [2024-04-27 12:37:17,461 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:37:17,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:37:17,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:37:17,498 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 11 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2024-04-27 12:37:17,498 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:37:17,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270042631] [2024-04-27 12:37:17,498 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [270042631] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 12:37:17,498 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [608854379] [2024-04-27 12:37:17,498 INFO L93 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2024-04-27 12:37:17,499 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:37:17,499 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:37:17,500 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 12:37:17,501 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2024-04-27 12:37:17,595 INFO L228 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2024-04-27 12:37:17,595 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-04-27 12:37:17,596 INFO L262 TraceCheckSpWp]: Trace formula consists of 119 conjuncts, 6 conjunts are in the unsatisfiable core [2024-04-27 12:37:17,597 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 12:37:17,649 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:37:17,649 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 12:37:17,700 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 3 proven. 10 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2024-04-27 12:37:17,700 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [608854379] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 12:37:17,700 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 12:37:17,701 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 5, 5] total 11 [2024-04-27 12:37:17,701 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1588144766] [2024-04-27 12:37:17,701 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 12:37:17,701 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2024-04-27 12:37:17,701 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:37:17,701 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2024-04-27 12:37:17,701 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2024-04-27 12:37:17,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:37:17,702 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:37:17,702 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 6.0) internal successors, (72), 11 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-04-27 12:37:17,702 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2024-04-27 12:38:24,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2024-04-27 12:38:24,523 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2024-04-27 12:38:24,723 WARN L477 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable402,5 /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:38:24,724 INFO L420 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONASSERT === [ULTIMATE.startErr0ASSERT_VIOLATIONASSERT, ULTIMATE.startErr0INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES, ULTIMATE.startErr1INUSE_VIOLATIONSUFFICIENT_THREAD_INSTANCES (and 3 more)] === [2024-04-27 12:38:24,724 INFO L160 PredicateUnifier]: Initialized classic predicate unifier [2024-04-27 12:38:24,724 INFO L85 PathProgramCache]: Analyzing trace with hash 577846284, now seen corresponding path program 4 times [2024-04-27 12:38:24,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2024-04-27 12:38:24,724 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857735591] [2024-04-27 12:38:24,724 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2024-04-27 12:38:24,724 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2024-04-27 12:38:24,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2024-04-27 12:38:24,957 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 20 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2024-04-27 12:38:24,957 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2024-04-27 12:38:24,957 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857735591] [2024-04-27 12:38:24,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857735591] provided 0 perfect and 1 imperfect interpolant sequences [2024-04-27 12:38:24,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1192417946] [2024-04-27 12:38:24,958 INFO L93 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2024-04-27 12:38:24,958 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2024-04-27 12:38:24,958 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 [2024-04-27 12:38:24,959 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2024-04-27 12:38:24,961 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UGemCutter-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2024-04-27 12:38:25,052 INFO L228 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2024-04-27 12:38:25,052 INFO L229 tOrderPrioritization]: Conjunction of SSA is unsat [2024-04-27 12:38:25,053 INFO L262 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 5 conjunts are in the unsatisfiable core [2024-04-27 12:38:25,054 INFO L285 TraceCheckSpWp]: Computing forward predicates... [2024-04-27 12:38:25,095 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 17 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 12:38:25,095 INFO L327 TraceCheckSpWp]: Computing backward predicates... [2024-04-27 12:38:25,140 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 17 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2024-04-27 12:38:25,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1192417946] provided 0 perfect and 2 imperfect interpolant sequences [2024-04-27 12:38:25,141 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2024-04-27 12:38:25,141 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 4] total 9 [2024-04-27 12:38:25,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [18129281] [2024-04-27 12:38:25,141 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2024-04-27 12:38:25,142 INFO L571 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2024-04-27 12:38:25,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2024-04-27 12:38:25,142 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2024-04-27 12:38:25,142 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2024-04-27 12:38:25,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2024-04-27 12:38:25,142 INFO L495 AbstractCegarLoop]: Abstraction has currently 0 states, but on-demand construction may add more states [2024-04-27 12:38:25,142 INFO L496 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 7.5) internal successors, (75), 9 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2024-04-27 12:38:25,142 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 9 states. [2024-04-27 12:38:25,142 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 24 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 5 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 29 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 38 states. [2024-04-27 12:38:25,143 INFO L154 InterpolantAutomaton]: Switched to On-DemandConstruction mode: deterministic interpolant automaton has 2 states.